A method and apparatus for reducing read latency

Abstract

An embodiment of the present application provides a method and device for reducing read latency, which relates to the technical field of data storage and is used to reduce read latency. The method is applied to a controller, the front end of the controller is connected to a host, and the back end is connected to a Flash array, and includes: receiving a read request sent by the host, where the read request includes location indication information of the requested data; according to the first physical location indicated by the location indication information, obtaining the read voltage corresponding to the first storage area where the first physical location is located from the read voltage management information, the first physical location is the physical location of the requested data in the Flash array, the Flash array includes multiple storage areas, the physical characteristics of multiple physical locations included in the same storage area are the same or similar, the read voltage management information includes the correspondence between the storage area and the read voltage, and the read voltage in the read voltage management information is dynamically updated; obtaining the requested data according to the read voltage corresponding to the first storage area, and sending the requested data to the host.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of data storage, and in particular, to a method and device for reducing read latency. Background Art

[0002] A Solid State Drive (SSD) refers to a storage medium such as a hard disk or a memory card made of a solid-state electronic storage chip array. The Quality of Service (QoS) of an SSD is the ability of the SSD product to provide a stable, consistent, and predictable request-response service to the host, and it is one of the key factors shaping the competitiveness of SSD products. SSDs can be applied in scenarios such as data centers and servers. The Read Latency is a key performance indicator of QoS and mainly depends on the number of read operations occurring in the Flash medium that responds to the host IO request. As the main storage medium of an SSD, the characteristics of Flash are affected by various factors such as Program / Erase Cycles (PE) and Retention Time. The voltage signal carrying data will drift, so multiple read operations are required to successfully respond to the host IO request, resulting in a relatively long read latency in QoS.

[0003] Currently, in the prior art, the read latency can be reduced by the read voltage pre-table technology, that is, by analyzing the relationship between the factors affecting the read voltage and the voltage offset, making a compensation table for the influencing factors and the read voltage or generalizing a specific formula by fitting. When in use, the read voltage is compensated by looking up the table or calculating according to the influencing factor value, so as to improve the success rate of the first read and then reduce the read latency. However, the read voltage pre-table technology is related to the sampled samples, and different read voltage pre-tables need to be made for different storage media, resulting in a large workload. In addition, the storage medium will change during use, and the reliability of using the read voltage pre-table technology is relatively low, and the improvement amplitude of the success rate of the first read is limited, so the effect of reducing the read latency is not good. Summary of the Invention

[0004] The embodiments of the present application provide a method and device for reducing read latency, which solve the problem of relatively long read latency in the prior art.

[0005] To achieve the above object, the embodiments of the present application adopt the following technical solutions:

[0006] In a first aspect, a method for reducing read latency is provided and applied to a controller. The front end of the controller is connected to a host, and the back end is connected to a Flash array. The method includes: The controller receives a read request sent by the host, and the read request includes position indication information of the requested data; The controller obtains the read voltage corresponding to the first storage area where the first physical position is located from the read voltage management information according to the first physical position indicated by the position indication information; where the first physical position is the physical position of the requested data in the Flash array, the Flash array includes multiple storage areas, the physical characteristics of multiple physical positions included in the same storage area are the same or similar, the read voltage management information includes the correspondence between the storage area and the read voltage, and the read voltage in the read voltage management information is dynamically updated; The controller obtains the requested data according to the read voltage corresponding to the first storage area and sends the requested data to the host. In the above technical solution, since the physical characteristics and read voltage characteristics of multiple physical positions included in the first storage area are the same or similar, and the read voltage in the read voltage management information is dynamically updated, the accuracy of the read voltage obtained by the controller can be ensured. When obtaining the requested data based on this read voltage, the first read success rate can be improved, the number of read operations can be reduced, and thus the read latency can be reduced.

[0007] In a possible implementation manner of the first aspect, the read voltage characteristics of the physical positions included in the same storage area are the same or similar; and / or, the physical characteristics of the physical positions included in different storage areas are different; and / or, the read voltage characteristics of the physical positions included in different storage areas are different. In the above possible implementation manner, by dividing multiple physical positions with the same or similar physical characteristics and / or the same or similar read voltage characteristics into the same storage area and corresponding to one read voltage in the read voltage management information, the memory overhead in the controller can be saved.

[0008] In a possible implementation manner of the first aspect, for any one of the multiple storage areas, the method further includes: When a preset update condition is satisfied, the controller updates the read voltage corresponding to the storage area in the read voltage management information. In the above possible implementation manner, by dynamically updating the read voltage in the read voltage management information, the real-time effectiveness of the read voltage can be ensured, so that the success rate when obtaining the read data with this read voltage is relatively high, and thus the read latency is reduced.

[0009] In a possible implementation of the first aspect, the read voltage in the read voltage management information is dynamically updated, including: when a preset update condition is satisfied, the controller updates the read voltage corresponding to the storage area in the read voltage management information, including: when in the system idle time window or when a preset update period is satisfied, the controller determines a first error parameter at the read voltage corresponding to the storage area; when the first error parameter is greater than or equal to a first threshold, the controller updates the read voltage corresponding to the storage area in the read voltage management information. In the above possible implementation, by actively and dynamically updating the read voltage in the read voltage management information, the controller can ensure the real-time effectiveness of the read voltage, so that the success rate of obtaining read data at this read voltage is relatively high, and thus the read latency is reduced.

[0010] In a possible implementation of the first aspect, the preset update period is related to the usage status of the storage area; or, the preset update period is related to the average service life of multiple storage areas included in the Flash array. In the above possible implementation, by setting an appropriate preset update period and dynamically updating the read voltage in the read voltage management information according to the preset update period, it is possible to ensure the real-time effectiveness of the read voltage while avoiding unnecessary update operations, saving the energy consumption of the controller.

[0011] In a possible implementation of the first aspect, when a preset update condition is satisfied, the controller updates the read voltage corresponding to the storage area in the read voltage management information, including: when the second error parameter of the requested data read for the first time at the read voltage corresponding to the storage area is greater than or equal to the first threshold, the controller updates the read voltage corresponding to the storage area in the read voltage management information. In the above possible implementation, by passively and dynamically updating the read voltage in the read voltage management information, the controller can quickly and effectively update the read voltage after the first read data failure occurs at the read voltage, reducing the number of read operations, and thus reducing the read latency.

[0012] In a possible implementation of the first aspect, for any one of the multiple storage areas, when the controller updates the read voltage corresponding to the storage area in the read voltage management in a first time period and obtains the read voltage corresponding to the storage area from the read voltage management in a second time period, the first time period and the second time period do not overlap; and / or, for any two of the multiple storage areas, when the controller updates the read voltage corresponding to one storage area in the read voltage management in a third time period and obtains the read voltage corresponding to another storage area from the read voltage management in a fourth time period, the first time period and the second time period overlap, or the first time period and the second time period do not overlap. In the above possible implementation, the controller can perform different operations on the read voltage management information in different time periods, thereby saving the time for managing the read voltage management information and improving the system performance.

[0013] In a possible implementation of the first aspect, a storage area includes at least one storage unit, and the storage unit includes at least one of the following: a particle device, a logic unit die, a plane, a block, a super block, a layer, a sub-block, a word line WL, and a page. In the above possible implementation, by reasonably partitioning the storage area, the controller can reduce the data volume of the read voltage management information, thereby saving the memory overhead in the controller.

[0014] In a second aspect, a controller is provided. The front end of the controller is connected to a host, and the back end is connected to a Flash array. The controller includes: a receiving unit for receiving a read request sent by the host, where the read request includes position indication information of the requested data; a processing unit for obtaining, according to a first physical position indicated by the position indication information, a read voltage corresponding to a first storage area where the first physical position is located from the read voltage management information; where the first physical position is the physical position where the requested data is stored in the Flash array, the Flash array includes multiple storage areas, the physical characteristics of multiple physical positions included in the same storage area are the same or similar, the read voltage management information includes the correspondence between the storage area and the read voltage, and the read voltage in the read voltage management information is dynamically updated; the processing unit is further configured to obtain the requested data according to the read voltage corresponding to the first storage area; and a sending unit for sending the requested data to the host.

[0015] In a possible implementation of the second aspect, the read voltage characteristics of the physical positions included in the same storage area are the same or similar; and / or, the physical characteristics of the physical positions included in different storage areas are different; and / or, the read voltage characteristics of the physical positions included in different storage areas are different.

[0016] In a possible implementation of the second aspect, the processing unit is specifically configured to: for any one of the multiple storage areas, when a preset update condition is satisfied, update the read voltage corresponding to the storage area in the read voltage management information so that the read voltage in the read voltage management information is dynamically updated.

[0017] In a possible implementation of the second aspect, the processing unit is further configured to: when in a system idle time window or when a preset update period is satisfied, determine a first error parameter under the read voltage corresponding to the storage area; when the first error parameter is greater than or equal to a first threshold, update the read voltage corresponding to the storage area in the read voltage management information.

[0018] In a possible implementation of the second aspect, the preset update period is related to the usage status of the storage area; or, the preset update period is related to the average service life of multiple storage areas included in the Flash array.

[0019] In a possible implementation of the second aspect, the processing unit is further configured to: when the second error parameter of the requested data read for the first time is greater than or equal to the first threshold value at the read voltage corresponding to the storage area, update the read voltage corresponding to the storage area in the read voltage management information.

[0020] In a possible implementation of the second aspect, for any one of the multiple storage areas, when the read voltage corresponding to the storage area in the read voltage management is updated within the first time period and the read voltage corresponding to the storage area is obtained from the read voltage management within the second time period, the first time period and the second time period do not overlap; and / or, for any two of the multiple storage areas, when the read voltage corresponding to one storage area in the read voltage management is updated within the third time period and the read voltage corresponding to the other storage area is obtained from the read voltage management within the fourth time period, the first time period and the second time period overlap, or the first time period and the second time period do not overlap.

[0021] In a possible implementation of the second aspect, one storage area includes at least one storage unit, and the storage unit includes at least one of the following: a granule Device, a logic unit Die, a plane Plane, a block Block, a super block SuperBlock, a layer Layer, a sub-block Sub-Block, a word line WL, and a page Page.

[0022] In a third aspect, a system is provided, which includes a host, a controller, and a Flash array. The Flash array includes multiple storage areas, and the physical characteristics of multiple physical locations included in the same storage area are the same or similar; wherein, the host is configured to send a read request to the controller and receive the requested data returned by the controller, and the read request includes location indication information of the requested data; the controller is configured to manage read voltage management information, and the read voltage management information includes the correspondence between the storage area and the read voltage, and the read voltage in the read voltage management information is dynamically updated; the controller is further configured to, when receiving the read request, obtain, according to the first physical location indicated by the location indication information, the read voltage corresponding to the first storage area where the first physical location is located, where the first physical location is the physical location where the requested data is stored in the Flash array; the controller is further configured to obtain the requested data according to the read voltage corresponding to the first storage area and send the requested data to the host.

[0023] In a possible implementation of the third aspect, the read voltage characteristics of the physical locations included in the same storage area are the same or similar; and / or, the physical characteristics of the physical locations included in different storage areas are different; and / or, the read voltage characteristics of the physical locations included in different storage areas are different.

[0024] In a possible implementation of the third aspect, the controller is specifically configured to: for any one of the multiple storage areas, when a preset update condition is met, update the read voltage corresponding to the storage area in the read voltage management information, so that the read voltage in the read voltage management information is dynamically updated.

[0025] In a possible implementation of the third aspect, the controller is specifically configured to: when in the system idle time window or a preset update period is met, determine a first error parameter at the read voltage corresponding to the storage area; when the first error parameter is greater than or equal to a first threshold, update the read voltage corresponding to the storage area in the read voltage management information.

[0026] In a possible implementation of the third aspect, the preset update period is related to the usage status of the storage area; or, the preset update period is related to the average service life of multiple storage areas in the Flash array.

[0027] In a possible implementation of the third aspect, the controller is specifically configured to: when the second error parameter of the requested data read for the first time at the read voltage corresponding to the storage area is greater than or equal to the first threshold, update the read voltage corresponding to the storage area in the read voltage management information.

[0028] In a possible implementation of the third aspect, for any one of the multiple storage areas, when the controller updates the read voltage corresponding to the storage area in the read voltage management within a first time period and obtains the read voltage corresponding to the storage area from the read voltage management within a second time period, the first time period and the second time period do not overlap; and / or, for any two of the multiple storage areas, when the controller updates the read voltage corresponding to one storage area in the read voltage management within a third time period and obtains the read voltage corresponding to another storage area from the read voltage management within a fourth time period, the first time period and the second time period overlap, or the first time period and the second time period do not overlap.

[0029] In a possible implementation of the third aspect, one storage area includes at least one storage unit, and the storage unit includes at least one of the following: particle Device, logic unit Die, plane Plane, block Block, super block SuperBlock, layer Layer, sub-block Sub-Block, word line WL, and page page.

[0030] In another aspect of the present application, there is provided a computer-readable storage medium storing instructions that, when run on a computer, cause the computer to execute the method for reducing read latency provided in the above-mentioned first aspect or any possible implementation of the first aspect.

[0031] In another aspect of the present application, there is provided a computer program product containing instructions, which, when running on a computer, causes the computer to execute the method for reducing read latency provided in the above-mentioned first aspect or any possible implementation of the first aspect.

[0032] It can be understood that any of the above-mentioned devices, computer storage media, or computer program products for the method of reducing read latency are all used to execute the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding methods provided above, and will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 FIG. is a schematic structural diagram of a storage particle provided by an embodiment of the present application;

[0034] Figure 2 FIG. is a schematic structural diagram of a communication system provided by an embodiment of the present application;

[0035] Figure 3 FIG. is a schematic structural diagram of another communication system provided by an embodiment of the present application;

[0036] Figure 4 FIG. is a schematic flowchart of a method for reducing read latency provided by an embodiment of the present application;

[0037] Figure 5 FIG. is a schematic flowchart of another method for reducing read latency provided by an embodiment of the present application;

[0038] Figure 6 FIG. is a schematic flowchart of a process for updating read voltage management information provided by an embodiment of the present application;

[0039] Figure 7 FIG. is a schematic flowchart of another process for updating read voltage management information provided by an embodiment of the present application;

[0040] Figure 8 FIG. is a schematic flowchart of a process for processing a read request provided by an embodiment of the present application;

[0041] Figure 9 FIG. is a schematic diagram of an operation on read voltage management information provided by an embodiment of the present application;

[0042] Figure 10 FIG. is a schematic structural diagram of a controller provided by an embodiment of the present application;

[0043] Figure 11 FIG. is a schematic structural diagram of another controller provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0044] Currently, most storage devices use Solid State Drives (SSDs) for data storage, such as hard disks or memory cards. The Quality of Service (QoS) of an SSD is the ability of the storage device to provide stable, consistent, and predictable request-response services to the host, and it is one of the key factors affecting the market competitiveness of storage devices. QoS can include multiple performance metrics, among which the read latency is a key performance metric of QoS, mainly depending on the number of read operations occurring in the Flash media that responds to the host IO request. As the main storage medium of an SSD, the characteristics of Flash media are affected by various factors such as Program / Erase Cycles (PE), Retention Time, and Read Counts. The voltage signal carrying data will drift, so the backend needs to perform multiple read operations (trial and error) to successfully respond to the host IO request, thus affecting the read latency metric of QoS and causing a longer read latency.

[0045] As higher storage density cells, such as 3D TLC (Triple-Level Cell), gradually replace 2D MLC (Multi-Level Cell) as the mainstream storage medium, the read latency metric of QoS is facing more and more challenges. As Figure 1 shown, it is a hierarchical structure diagram inside a kind of particle provided by an embodiment of this application. Among them, the smallest unit of a write operation is a page, and the page can be divided into three types, namely the upper page, the middle page, and the lower page. An upper page, a middle page, and a lower page can form a word line (WL), and several WLs form a layer or a sub-block in different directions. For example, Figure 1 multiple horizontal WLs form a Layer, and multiple vertical WLs form a Sub-Block. The smallest erasure operation unit composed of Pages is called a Block. Multiple Blocks form a Plane, and multiple Planes can form a logical unit (Die). Multiple Dies form a particle (Device), and each Device corresponds to a Channel.

[0046] In addition, in many applications, the controller will form some Blocks into a Super Block. The feature of the Super Block in the application is that the internal Blocks will be erased simultaneously or programmed simultaneously, and the states of the usage conditions of the Blocks inside the Super Block are the same or close. For example, the program / erase cycles (PE), and the retention time, etc.

[0047] Compared with 2D MLC, for 3D TLC, the number of logic states in each cell increases from 4 (2 bits) to 8 (3 bits), and the voltage signal window for distinguishing different logic states becomes smaller, thus the accuracy requirement for reading voltage increases. In addition, the number of Pages in a Block and the number of Blocks in a Die gradually increase, and the physical inconsistency at all levels inside the Flash increases, making it increasingly difficult to set a unified effective read voltage for all Pages.

[0048] Therefore, in order to effectively improve the read latency, two problems must be solved simultaneously: the read voltage changes with the usage conditions, and there are physical differences at all levels inside the Flash. Based on this, the embodiments of the present application provide a method and device for reducing the read latency, which are used to improve the read latency index in QoS.

[0049] Figure 2 The hardware architecture diagram of a communication system applied to the embodiments of the present application is shown in Figure 2 , the system includes a host, an SSD controller, and a Flash array. The host can store / retrieve data in the Flash array through the SSD controller. Among them, the host can be connected to the front end of the SSD controller through multiple interfaces such as NVMe / SAS / PCIe, and the back end of the SSD controller can be connected to the Flash array through NFI. The host performs operations such as reading, writing, or erasing data in the Flash array through the SSD controller.

[0050] Optionally, as Figure 3 shown, it is the hardware architecture diagram of another communication system applied to the embodiments of the present application. The controller in this system is similar to the SSD controller in the system shown in Figure 2 . The difference is that the controller and the Flash array in this system are packaged into an independent chip. The host is connected to the controller through interfaces such as UFS / eMMC and accesses data through this interface. Exemplarily, the chip formed by packaging the controller and the Flash array can be applied to mobile terminals such as mobile phones, tablet computers, and wearable devices.

[0051] Figure 4The flowchart shows a method for reducing read latency provided by an embodiment of the present application. This method can be applied to the communication system shown in Figure 2 or Figure 3 as described above. Referring to Figure 4 , the method includes the following steps.

[0052] Step 401: The controller receives a read request sent by the host. The read request includes location indication information of the requested data.

[0053] Specifically, when the host needs to read a certain data from the Flash array managed by the controller, the host can send a read request to the controller. The data requested by the read request can be referred to as the requested data, and location indication information can be carried in the read request. The location indication information can be used to indicate the logical address, that is, the logical address used by the host to access the requested data. There is a mapping relationship between the logical address and the physical address. According to the logical address of the requested data, the physical location of the requested data in the Flash array can be determined. In practical applications, the location indication information can also be other information corresponding to the physical location. For example, the location indication information can be a key value. By the preset correspondence between the key value and the Value value, the corresponding Value value can be obtained. The Value value can be the physical location of the data. The embodiments of the present application do not limit this.

[0054] Specifically, when the controller receives the read request sent by the host, the controller can obtain the physical address where the requested data is stored in the Flash array according to the location indication information. Here, the physical address of the requested data is referred to as the first physical location.

[0055] Step 402: The controller obtains the read voltage corresponding to the first storage area where the first physical location is located from the read voltage management information. The Flash array includes multiple storage areas. The physical characteristics of multiple physical locations included in the same storage area are the same or similar. The read voltage management information includes the correspondence between the storage area and the read voltage, and the read voltage in the read voltage management information is dynamically updated.

[0056] Among them, each of the multiple storage areas may include at least one storage cell, and each storage cell may be represented by a corresponding physical location. The multiple physical locations included in one storage area may be the physical locations corresponding to the at least one storage cell included therein. The physical characteristics of the multiple physical locations included in the same storage area are the same or similar, that is, the physical characteristics of the storage cells included in the same storage area are the same or similar. The physical characteristics of the multiple physical locations included in different storage areas are different, that is, the physical characteristics of the storage cells included in different storage areas are different. The physical characteristics of the storage cells here may include multiple aspects, for example, the geometric size at the nanoscale, the electrical characteristics of the material, the structure of the storage cell combination, and the internal control circuit, etc. In the embodiments of the present application, that the physical characteristics of two storage cells are the same or similar means that the difference in the physical characteristics of the two storage cells is small. For example, if a certain parameter corresponding to their physical characteristics is less than a set threshold, or multiple parameters corresponding to their physical characteristics are all less than their respective set thresholds, it is determined that the difference in their physical characteristics is small. That the physical characteristics of two storage cells are different means that the difference in the physical characteristics of the two storage cells is large. For example, if a certain parameter corresponding to their physical characteristics is greater than the set threshold, or multiple parameters corresponding to their physical characteristics are all greater than their respective set thresholds, it is determined that the difference in their physical characteristics is small.

[0057] In addition, the physical characteristics of the storage cell are related to the read voltage characteristics corresponding to the storage cell. The read voltage refers to the conversion voltage corresponding to the conversion from an analog signal to a data signal. The read voltage characteristics may refer to the variation law of the corresponding error parameters when reading the read voltage using different devices under different conditions (for example, different temperatures, different times, different PEs, different data retention times, different read operation counts (Read Counts)). Specifically, the difference in the read voltage characteristics corresponding to multiple storage cells with the same or similar physical characteristics is small, and the difference in the read voltage characteristics corresponding to multiple storage cells with different physical characteristics is large. Therefore, if the physical characteristics of the storage cells included in the same storage area are the same or similar, the difference in the read voltage characteristics corresponding to the storage cells included in the same storage area is small, so that one storage area can correspond to one read voltage. If the physical characteristics of the storage cells included in different storage areas are different, the difference in the read voltage characteristics corresponding to the storage cells included in different storage areas is large, so that different storage areas can correspond to different read voltages.

[0058] Furthermore, for multiple storage areas included in a Flash array, read voltage characteristics of memory cells included in the same storage area are the same or similar, and read voltage characteristics of memory cells included in different storage areas are different. When read voltage characteristics of multiple memory cells are the same or similar, that is, when differences in read voltage characteristics of the multiple memory cells are small, the multiple memory cells may belong to the same storage area; when read voltage characteristics of multiple memory cells are different, that is, when differences in read voltage characteristics of the multiple memory cells are large, the multiple memory cells may belong to different storage areas. A method for determining small and large differences in read voltage characteristics may be similar to a method for determining small or large differences in physical characteristics. In an embodiment of the present application, by dividing multiple physical locations with the same or similar physical characteristics and the same or similar read voltage characteristics into the same storage area and corresponding to one read voltage, system overhead can be saved.

[0059] For each of the multiple storage areas, read voltage management information may include a correspondence between each storage area and a read voltage. The read voltage included in the read voltage management information is dynamically updated, that is, the read voltage corresponding to each storage area in the read voltage management information is refreshed in a timely manner to ensure the accuracy of the read voltage corresponding to each storage area.

[0060] Specifically, when the controller receives a read request, the controller may determine a storage area in which a first physical location in the read request is located among the multiple storage areas. Here, the storage area where the physical location is located is referred to as a first storage area. The controller obtains, according to the first storage area, a read voltage corresponding to the first storage area from the correspondence between the storage area and the read voltage included in the dynamically updated read voltage management information. The obtained read voltage has good accuracy, so that the success rate of reading data from the first storage area with the read voltage is relatively high.

[0061] Optionally, when the controller receives a read request, the controller may also select whether to obtain a read voltage through the read voltage management information according to a specific read request policy. When, according to the specific read request policy, it is selected to obtain a read voltage through the read voltage management information (that is, it is selected to be "yes"), the corresponding read voltage is obtained according to step 402 above. The specific read request policy may be set in advance. For different read requests, different read request policies may be set, or the same read request policy may be set. The embodiment of the present application does not make specific limitations thereto.

[0062] Further, a Flash array may include multiple Devices, and the internal structure of each Device may be as Figure 1As shown. When each storage area in the Flash array may include at least one storage unit, the storage unit may include at least one of the following: Device, Die, Plane, Block, SuperBlock, Layer, Sub-Block, Word Line (WL), and Page. That is, the partitioning granularity when the Flash array is partitioned into multiple storage areas may include at least one of the above.

[0063] For example, when the partitioning granularity includes Device, then at least one Device may be included in one storage area. When the partitioning granularity includes Die, then at least one Die may be included in one storage area. When the partitioning granularity includes Plane, then at least one Plane may be included in one storage area. When the partitioning granularity includes Block, then at least one Block may be included in one storage area. When the partitioning granularity includes Super Block, then at least one Super Block may be included in one storage area. When the partitioning granularity includes Layer, then at least one Layer may be included in one storage area. When the partitioning granularity includes Sub-Block, then at least one Sub-Block may be included in one storage area. When the partitioning granularity includes WL, then at least one WL may be included in one storage area. When the partitioning granularity includes Page, then at least one Page may be included in one storage area.

[0064] Optionally, generally, since the usage conditions of each Block in the Flash array (such as PE / Retention Time, etc.) are generally different, different Blocks may be located in different storage areas. In addition, the read voltage characteristics of the Pages inside the Block are related to the physical location of the Page in the Block. Therefore, Pages with the same or similar read voltage characteristics may be partitioned into the same storage area. The embodiments of the present application do not make specific limitations on this.

[0065] Step 403: The controller obtains the requested data according to the read voltage corresponding to the first storage area and sends the requested data to the host.

[0066] Among them, when the controller obtains the read voltage corresponding to the first storage area, the controller may obtain the requested data stored at the first physical location from the first storage area according to the read voltage corresponding to the first storage area. After that, the controller may send the requested data to the host, so that the host can receive the requested data.

[0067] In an embodiment of the present application, when the controller receives a read request sent by the host, the controller may obtain the read voltage corresponding to the first storage area where the first physical location is located from the correspondence between the storage areas included in the read voltage management information and the read voltages according to the first physical location indicated by the location indication information included in the read request. Since the physical characteristics and read voltage characteristics of multiple physical locations included in the first storage area are the same or similar, and the read voltages in the read voltage management information are dynamically updated, the accuracy of the obtained read voltage can be ensured. When obtaining request data based on this read voltage, the first read success rate can be improved, the number of read operations can be reduced, and thus the read latency can be reduced.

[0068] Further, referring to Figure 5 , the read voltages in the read voltage management information are dynamically updated, and it may include step 404: For any one of the multiple storage areas, when a preset condition is satisfied, the controller updates the read voltage corresponding to this storage area in the read voltage management information. Step 404 and steps 401 - step 403 may not be in a sequential order.

[0069] Among them, when the preset condition is satisfied, the controller may determine the effective read voltage corresponding to this storage area through a specific online read voltage optimization algorithm, and update the read voltage corresponding to this storage area in the read voltage management information according to this effective read voltage. Among them, when the controller dynamically updates the read voltage corresponding to this storage area in the read voltage management information, the controller may actively update the read voltage corresponding to this storage area, or passively update the read voltage corresponding to this storage area. Actively updating the read voltage in the read voltage management information, or passively updating the read voltage in the read voltage management information, can ensure that the read voltages in the read voltage management information are dynamically updated. The following will respectively elaborate on these two methods in detail.

[0070] First, the controller actively updates the read voltage corresponding to this storage area, which may specifically include: When the controller is in the system idle time window or meets the preset update period, the controller determines the first error parameter under the read voltage corresponding to this storage area; when the first error parameter is greater than or equal to the first threshold, the controller updates the read voltage corresponding to this storage area in the read voltage management information.

[0071] Among them, the controller being in the system idle time window may mean that the controller is in an idle state, which can be understood as the load of the read / write I / O of the controller being lower than a certain specific value, so that the controller is relatively idle. The preset update period can be set in advance, and the preset update period can include one period or multiple different periods. The setting of the preset update period corresponding to a storage area can be related to the usage status of the storage area (such as the number of PE times and the number of read operations), or related to the average service life of multiple storage areas included in the Flash array. For example, the average service life of multiple storage areas can be represented by the average PE. When the average PE is larger (such as in the early stage of life), a larger preset update period can be used. When the average PE is smaller (such as in the late stage of life), a smaller preset update period can be used.

[0072] In addition, the first error parameter can be used to indicate the degree of error in the read data. The first error parameter can be the number of error bits or the bit error rate RBER. The first threshold can be a pre-set fault tolerance threshold. If the first error parameter is less than the first threshold, it means that it is within the fault tolerance range. If the first error parameter is greater than or equal to the first threshold, it means that it is not within the fault tolerance range.

[0073] Specifically, when the controller is in the system idle time window or meets the preset update period, the controller takes the read voltage corresponding to the storage area currently stored in the read voltage management information as the detected read voltage. According to the detected read voltage, samples are taken from the physical locations included in the storage area, and the error parameter obtained at the detected read voltage is the first error parameter. If the first error parameter is less than the first threshold, the controller can determine that the read voltage corresponding to the storage area is valid and thus does not update it. If the first error parameter is greater than or equal to the first threshold, the controller can determine that the read voltage corresponding to the storage area is invalid and needs to be updated.

[0074] When the controller updates the read voltage corresponding to the storage area, the controller can determine the current valid read voltage by a trial method. For example, the controller can test the error parameters at multiple voltages in a way of gradually increasing or decreasing the voltage, and determine the read voltage with the smallest error parameter as the current valid read voltage, so as to replace the read voltage corresponding to the storage area in the read voltage management information with the current valid read voltage to achieve the update of the read voltage corresponding to the storage area.

[0075] In the above method for actively updating the read voltage in the read voltage management information, the controller actively updates the read voltage in the read voltage management information within each system idle time window, or actively updates the read voltage in the read voltage management information within each preset update period, thereby achieving an update of the read voltage in the read voltage management information at regular intervals. Therefore, actively updating the read voltage in the read voltage management information can keep the read voltage in the read voltage management information in a dynamically updated state, thus ensuring the real-time effectiveness of the read voltage in the read voltage management information.

[0076] In addition, when triggering the controller to actively update the read voltage corresponding to the storage area through the preset update period, it can be triggered by means of a timer interrupt. It can also be triggered by other forced signals to actively update the read voltage corresponding to the storage area. The specific forced signals can be set in advance, and the embodiments of the present application do not limit this.

[0077] Second, the controller passively updates the read voltage corresponding to the storage area, which may specifically include: when the second error parameter of the requested data read for the first time under the read voltage corresponding to the storage area is greater than or equal to the first threshold, the controller updates the read voltage corresponding to the storage area in the read voltage management information.

[0078] Among them, the requested data read for the first time refers to the requested data that the controller reads from the storage area for the first time according to the read voltage corresponding to the storage area in the read voltage management. This requested data is the data obtained based on the read request sent by the host, rather than the data actively sampled by the controller.

[0079] Specifically, the controller reads the requested data from the storage area for the first time under the read voltage corresponding to the storage area, and the error parameter of the read requested data is the second error parameter. If the second error parameter is less than the first threshold, the controller can determine that the read voltage corresponding to the storage area is valid and thus does not update it. If the second error parameter is greater than or equal to the first threshold, the controller can determine that the read voltage corresponding to the storage area is invalid and needs to be updated.

[0080] It should be noted that when the controller updates the read voltage corresponding to the storage area (i.e., obtains the current effective read voltage), it can also be updated in the way of gradually increasing or decreasing the voltage. The specific implementation process is the same as that described in the first method, and the embodiments of the present application will not elaborate here.

[0081] When the controller updates the read voltages corresponding to multiple storage areas in the read voltage management information, the controller may first determine the storage areas with invalid read voltages. After that, the controller may only update the read voltages of the storage areas with invalid read voltages in the read voltage management information. In the embodiments of this application, when the controller updates the read voltage corresponding to this storage area in the read voltage management information, by first determining whether the read voltage corresponding to this storage area stored in the read voltage management information is valid and updating it when it is determined to be invalid, unnecessary operations can be avoided, thereby saving system bandwidth and load overhead.

[0082] In the above method for passively updating the read voltages in the read voltage management information, when the read voltage in the read voltage management information is invalid, the controller will update it to the current valid read voltage. Thus, within each period of time, when one or more invalid read voltages appear in the read voltage management information, the controller will update the one or more read voltages. Therefore, passively updating the read voltages in the read voltage management information can keep the read voltages in the read voltage management information in a dynamically updated state, thereby ensuring the real-time validity of the read voltages in the read voltage management information.

[0083] For ease of understanding, through Figure 6 and Figure 7 the processing flows shown, the processes of the controller actively updating the read voltage management information and passively updating the read voltage management information are respectively illustrated by examples.

[0084] Figure 6 FIG. is a flowchart of a controller actively updating the read voltage management information, taking the controller being in the system idle time window as an example. Specifically, assuming that all the read voltages in the read voltage management information need to be updated, when the controller is in the system idle time window, the controller may determine the error parameters corresponding to each read voltage in the read voltage management information, and determine the read voltages in the read voltage management information that need to be updated (for example, when the corresponding error parameter is less than the first threshold, it is determined not to be updated, and when the corresponding error parameter is greater than or equal to the first threshold, it is determined to be updated), so as to obtain the to-be-updated read voltage record information (that is, the storage record with invalid read voltage in the read voltage management information); the controller updates the to-be-updated read voltage record information through a read voltage update method (such as the method provided in step 404 above). It ends when all the to-be-updated read voltage record information is updated, or when the system idle time window ends.

[0085] Figure 7A flowchart for a controller to passively update read voltage management information. Specifically, when the controller receives a read request sent by the host, it obtains the corresponding read voltage from the read voltage management information according to the physical location information included in the read request (i.e., responds to the read request through the read voltage management information). When the request data obtained for the first time based on this read voltage fails (i.e., the first read data fails), the read voltage in the read voltage management information is marked as an invalid read voltage; then, it enters the error recovery process (i.e., updates the invalid read voltage) or ends.

[0086] It should be noted that the step of the controller determining the invalid read voltage in the read voltage management information and the step of updating the invalid read voltage in the read voltage management information can be executed synchronously or asynchronously. That is, the controller can first determine all the invalid read voltages in the read voltage management information, and then update each of the invalid read voltages one by one; or, after the controller determines an invalid read voltage in the read voltage management information, it immediately updates the invalid read voltage, and then determines the next invalid read voltage for update, and so on; or, the controller determines the invalid read voltages in the read voltage management information while updating the determined invalid read voltages. The embodiments of the present application do not make specific limitations on this.

[0087] In practical applications, when the controller updates the read voltage management information, if the read voltage management information resides in a fast storage medium such as memory, it needs to be backed up in a non-volatile storage medium. When the system is initialized, the read voltage management information is imported from the non-volatile storage medium into the fast storage medium to complete the initialization. Or, the controller directly stores the read voltage management information in a storage medium that has both fast access and non-volatile characteristics.

[0088] Furthermore, the controller can not only obtain the read voltage from the read voltage management information and obtain the request data according to the read voltage, but also update the read voltage in the read voltage management information. Among them, for the sake of easy understanding, the operation of the controller obtaining the read voltage from the read voltage management information and obtaining the request data is called the acquisition operation, and the state of the read voltage management information at this time can be called the operation phase surface; the operation of the controller updating the read voltage in the read voltage management information is called the update operation, and the state of the read voltage management information at this time can be called the maintenance phase surface. The relationship between the acquisition operation and the update operation is specifically described as follows.

[0089] For any one of multiple storage areas, when the controller updates the read voltage corresponding to the storage area in the read voltage management within a first time period and obtains the read voltage corresponding to the storage area from the read voltage management within a second time period, there is no overlap between the first time period and the second time period. That is, for the read voltage corresponding to the same storage area in the read voltage management information, the controller cannot perform the acquisition operation and the update operation simultaneously; or, for the same storage area in the read voltage management information, it cannot be in the operation phase and the maintenance phase simultaneously.

[0090] For any two of multiple storage areas, when the controller updates the read voltage corresponding to one storage area in the read voltage management within a third time period and obtains the read voltage corresponding to another storage area from the read voltage management within a fourth time period, there is an overlap between the first time period and the second time period, or there is no overlap between the first time period and the second time period. That is, the controller cannot perform the acquisition operation and the update operation on the read voltage corresponding to the same storage area in the read voltage management information simultaneously. That is, for the read voltages corresponding to different storage areas in the read voltage management information, the controller can perform the acquisition operation and the update operation simultaneously, or can perform the acquisition operation and the update operation non-simultaneously; or, for different storage areas in the read voltage management information, they can be in the operation phase and the maintenance phase simultaneously, or can be in the operation phase and the maintenance phase non-simultaneously.

[0091] For ease of understanding, the solution of the embodiment of the present application is illustrated by Figure 8 the read request processing flow chart shown below. As Figure 8 shown, when the controller receives a read request sent by the host, it can determine whether to obtain the corresponding read voltage through the read voltage management information according to a specific read response policy. If not, it is processed by other response methods in the prior art. If so, it obtains the corresponding read voltage from the read voltage management information according to the physical location information included in the read request; obtains the requested data according to the corresponding read voltage; determines whether the read request response is successful; if yes (i.e., the response is successful), it ends, and if not (i.e., not successful), it enters the error recovery process.

[0092] Exemplarily, as Figure 9 shown, it is a schematic diagram of different operations corresponding to the read voltage management information in the operation phase and the maintenance phase. Figure 9Taking the case where the Flash array in the middle includes particles 0 to n, and each particle includes blocks 0 to n as an example for illustration. Specifically, in the operation phase, according to the read request sent by the host, assuming that the physical location included in the request is block 0 in particle n, the controller obtains the read voltage corresponding to block 0 from the read voltage management information, and obtains the requested data from the Flash array according to the read voltage corresponding to block 0, and then returns the requested data to the host. In the maintenance phase, when it is determined that the read voltage corresponding to block n in the read voltage management information is an invalid read voltage, the controller determines the currently valid read voltage corresponding to block n through a read voltage update method (for example, the method provided in step 404 above), and then updates the currently valid read voltage to the read voltage management information.

[0093] The above mainly introduces the solution provided by the embodiments of the present application from the perspective of the interaction between various devices. It can be understood that in order to implement the above functions, each device, such as the host and the controller, includes the corresponding hardware structure and / or software module for executing each function. Those skilled in the art should easily realize that, combining the devices and algorithm steps of each example described in the embodiments disclosed in this article, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0094] The embodiments of the present application can divide the functions of the controller according to the above method examples. For example, each function module can be divided corresponding to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware or in the form of a software function module. It should be noted that the division of modules in the embodiments of the present application is illustrative, and is only a logical function division. There may be other division methods in actual implementation.

[0095] In the case of dividing each function module corresponding to each function, the embodiments of the present application provide a possible structural schematic diagram of the controller involved in the above embodiments. See Figure 10 , the controller includes: a receiving unit 1001, a processing unit 1002, and a sending unit 1003. Among them, the receiving unit 1001 is used to support the controller to execute Figure 4 or Figure 5 the step 401 in the method for reducing read latency provided by Figure 4 or Figure 5In the processes of obtaining request data in step 402 and step 403 in the provided method for reducing read latency, and Figure 5 step 404 in, and / or other processes for the technologies described herein; the sending unit 1003 is used to support the controller to execute Figure 4 or Figure 5 the process of sending the request data to the host in step 403 in the provided method for reducing read latency. For specific descriptions, refer to the relevant elaborations in the above embodiments, and details are not repeated in the embodiments of the present application.

[0096] In terms of hardware implementation, the above processing unit 1002 can be a processor; the receiving unit 1001 can be a receiver, and the sending unit 1003 can be a transmitter. The receiver and the transmitter can form a communication interface.

[0097] The embodiments of the present application provide a possible schematic logical structure diagram of the controller involved in the above embodiments. Refer to Figure 11 , the controller includes: a processor 1102, a communication interface 1103, a memory 1101, and a bus 1104. The processor 1102, the communication interface 1103, and the memory 1101 are interconnected through the bus 1104. In the embodiments of the present application, the processor 1102 is used to control and manage the actions of the controller. For example, the processor 1102 is used to support the controller to execute Figure 4 or Figure 5 the processes of obtaining request data in step 402 and step 403 in the provided method for reducing read latency, and / or other processes for the technologies described herein. The communication interface 1103 is used to support the controller to communicate. The memory 1101 is used to store the program code and data of the controller.

[0098] Among them, the processor 1102 can be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field-programmable gate array, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute various exemplary logical blocks, modules, and circuits described in combination with the disclosure of the present application. The processor 1102 can also be a combination for implementing computing functions, such as a combination including one or more microprocessors, a combination of a digital signal processor and a microprocessor, and so on. The bus 1104 can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The bus 1104 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 11It is represented by only one thick line, but it does not mean that there is only one bus or one type of bus.

[0099] The embodiment of the present application also provides a system, which includes a host, a controller, and a Flash array. The Flash array includes multiple storage areas, and the physical characteristics of multiple physical locations in the same storage area are the same or similar to those of the system. This system can be Figure 2 Or Figure 3 The system shown. In the embodiment of the present application, the host can be used for the Flash array, send a read request to the controller, and receive the requested data sent by the controller; the controller can be used to manage and can be used to execute Figure 4 Or Figure 5 The steps of the controller in the provided method for reducing read latency. The controller is used to execute Figure 4 Steps 401-step 403 in, or used to execute Figure 5 Steps 401-step 404 in, and / or other processes of the technologies described herein. For the specific process, refer to the description in the above Figure 4 Or Figure 5 The embodiments shown. The embodiments of the present application will not be described in detail here.

[0100] In another embodiment of the present application, a computer-readable storage medium is further provided. Computer-executable instructions are stored in the computer-readable storage medium. When at least one processor of the device executes the computer-executable instructions, the device is caused to execute Figure 4 Or Figure 5 The provided method for reducing read latency.

[0101] In another embodiment of the invention of the present application, a computer program product is further provided. The computer program product includes computer-executable instructions, and the computer-executable instructions are stored in a computer-readable storage medium; at least one processor of the device can read the computer-executable instructions from the computer-readable storage medium, and at least one processor executes the computer-executable instructions to cause the device to implement and execute Figure 4 Or Figure 5 The provided method for reducing read latency.

[0102] In the embodiment of the present application, when the controller receives a read request sent by the host, the controller may obtain the read voltage corresponding to the first storage area where the first physical location is located from the correspondence between the storage areas included in the read voltage management information and the read voltages according to the first physical location indicated by the location indication information included in the read request. Since the physical characteristics and read voltage characteristics of the multiple physical locations included in the first storage area are the same or similar, and the read voltages in the read voltage management information are dynamically updated, the accuracy of the obtained read voltage can be ensured. When obtaining the requested data based on the read voltage, the success rate of the first read can be improved, the number of read operations can be reduced, and the read latency can be reduced accordingly.

[0103] Finally, it should be noted that the above are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method for reducing read latency, characterized in that, Applied to a controller, the front end of the controller is connected to a host, and the back end is connected to a Flash array. The method includes: The controller receives a read request sent by the host, and the read request includes position indication information of requested data. The controller obtains, according to a first physical position indicated by the position indication information, a read voltage corresponding to a first storage area where the first physical position is located from read voltage management information; wherein, the first physical position is a physical position of the requested data in the Flash array, the Flash array includes multiple storage areas, multiple physical positions with the same or similar physical characteristics and / or the same or similar read voltage characteristics are divided into the same storage area, multiple physical positions in the same storage area correspond to one read voltage, the read voltage management information includes a correspondence between the storage area and the read voltage, and the read voltage in the read voltage management information is dynamically updated. The controller obtains the requested data according to the read voltage corresponding to the first storage area, and sends the requested data to the host. When in a system idle time window or when a preset update period is satisfied, samples physical positions in the storage area based on the read voltage corresponding to the storage area to obtain a first error parameter. When the first error parameter is greater than or equal to a first threshold, the controller updates the read voltage corresponding to the storage area. When, under the read voltage corresponding to the storage area, a second error parameter of the requested data read for the first time is greater than or equal to the first threshold, the controller updates the read voltage corresponding to the storage area in the read voltage management information.

2. The method according to claim 1, wherein Physical characteristics of physical positions included in different storage areas are different; and / or, read voltage characteristics of physical positions included in different storage areas are different.

3. The method according to claim 1 or 2, characterized in that, The preset update period is related to the usage status of the storage area; or, the preset update period is related to the average service life of multiple storage areas included in the Flash array.

4. The method according to claim 1 or 2, wherein For any one of the multiple storage areas, when the controller updates the read voltage corresponding to the storage area in the read voltage management within a first time period and obtains the read voltage corresponding to the storage area from the read voltage management within a second time period, the first time period and the second time period do not overlap. and / or For any two of the multiple storage areas, when the controller updates the read voltage corresponding to one storage area in the read voltage management within a third time period and obtains the read voltage corresponding to another storage area from the read voltage management within a fourth time period, the third time period and the fourth time period overlap, or the third time period and the fourth time period do not overlap.

5. The method according to claim 1 or 2, characterized in that, A storage area includes at least one storage unit, and the storage unit includes at least one of the following: a granule Device, a logic unit Die, a plane Plane, a block Block, a super block Super Block, a layer Layer, a sub-block Sub-Block, a word line WL, and a page Page.

6. A system, characterized in that, The system includes a host, a controller, and a Flash array. The Flash array includes a plurality of storage areas. A plurality of physical locations with the same or similar physical characteristics and / or the same or similar read voltage characteristics are divided into one storage area, and a plurality of physical locations in the same storage area correspond to one read voltage. The host is configured to send a read request to the controller and receive the requested data returned by the controller. The read request includes location indication information of the requested data. The controller is configured to manage read voltage management information, where the read voltage management information includes the correspondence between the storage area and the read voltage, and the read voltage in the read voltage management information is dynamically updated. The controller is further configured to, when receiving the read request, obtain, according to the first physical location indicated by the location indication information, the read voltage corresponding to the first storage area where the first physical location is located from the read voltage management information, where the first physical location is the physical location of the requested data in the Flash array. The controller is further configured to obtain the requested data according to the read voltage corresponding to the first storage area and send the requested data to the host. The controller is further configured to: When in a system idle time window or when a preset update period is satisfied, sample the physical locations in the storage area based on the read voltage corresponding to the storage area to obtain a first error parameter. When the first error parameter is greater than or equal to a first threshold, update the read voltage corresponding to the storage area. The controller is further configured to: When, under the read voltage corresponding to the storage area, the second error parameter of the requested data read for the first time is greater than or equal to the first threshold, update the read voltage corresponding to the storage area in the read voltage management information.

7. The system according to claim 6, characterized in that, The physical characteristics of the physical locations included in different storage areas are different; and / or, the read voltage characteristics of the physical locations included in different storage areas are different.

8. The system according to claim 6, characterized in that, The preset update period is related to the usage state of the storage area; or, the preset update period is related to the average service life of the plurality of storage areas in the Flash array.

9. The system according to any one of claims 6-8, wherein For any one of the plurality of storage areas, when the controller updates the read voltage corresponding to the storage area in the read voltage management within a first time period and obtains the read voltage corresponding to the storage area from the read voltage management within a second time period, the first time period and the second time period do not overlap. and / or, For any two of the multiple storage areas, when the controller updates the read voltage corresponding to one storage area in the read voltage management during a third time period and obtains the read voltage corresponding to another storage area from the read voltage management during a fourth time period, the first time period and the second time period overlap, or the first time period and the second time period do not overlap.

10. The system according to any one of claims 6-8, characterized in that, One storage area includes at least one storage unit, and the storage unit includes at least one of the following: a granule Device, a logic unit Die, a plane Plane, a block Block, a super block Super Block, a layer Layer, a sub-block Sub-Block, a word line WL, and a page page.

11. A readable storage medium, characterized in that, Instructions are stored in the readable storage medium, and when the readable storage medium runs on a device, the device is caused to execute the method for reducing read latency according to any one of claims 1-5.

12. A computer program product, characterized in that, When the computer program product runs on a computer, the computer is caused to execute the method for reducing read latency according to any one of claims 1-5.

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