Semiconductor Devices
By setting the gate trench and gate electrode in the active region of the DRAM device and setting a multi-layer barrier film pattern therebetween, the problem of read signal unreliability caused by leakage current in the DRAM device is solved, and higher signal reliability is achieved.
Patent Information
- Application Number
- CN201811430052.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2017-11-29
- Filing Date
- 2018-11-27
- Publication Date
- 2025-03-04
- Estimated Expiration
- 2038-11-27
AI Technical Summary
With the high integration of DRAM devices, the influence of leakage current on adjacent word lines increases, resulting in unreliability of read signals. Existing buried channel array transistors (BCATs) are difficult to effectively solve this problem.
A semiconductor device is designed, which provides a gate trench in the active region of the substrate and a gate electrode is provided on the gate insulating film, which occupies the trench portion not occupied by the insulating film, and adjusts the electron density to reduce leakage current by providing a multi-layer barrier film pattern between the gate electrode and the insulating film.
By optimizing the electron density distribution, the occurrence of leakage current is reduced and the reliability of the read signal of the semiconductor device is improved.
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Figure CN109841624B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims the benefit of Korean Patent Application No. 10-2017-0161292, filed on November 29, 2017, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field
[0003] The present inventive concept relates to a semiconductor device, and more particularly, to a semiconductor memory device. More particularly, the semiconductor device of the present inventive concept has a transistor whose gate electrode is disposed in an active region, such as a recessed or buried channel array transistor (BCAT). Background Art
[0004] As dynamic random access memory (DRAM) devices are scaled down and integrated to a very high degree, the impact of leakage current on adjacent word lines has increased. Moreover, when a high voltage is applied to a word line of a DRAM device, if charge leaks from the word line, the readout of the memory cell composed of the word line may be unreliable.
[0005] Additionally, buried channel array transistors (BCAT) have been developed for DRAMs to eliminate known short channel effects that are more likely to occur as DRAMs become more highly integrated. BCATs include a gate electrode disposed in a trench in a substrate such that the gate electrode is "buried" in the substrate. Summary of the invention
[0006] According to the present invention, a semiconductor device is provided, comprising: a substrate, and a device isolation film defining an active area of the substrate, wherein the active area has a gate trench; a gate insulating film, disposed along the side and bottom of the gate trench; a gate electrode, disposed on the gate insulating film and occupying at least a portion of the gate trench not occupied by the gate insulating film, the gate electrode having a first portion, a second portion on the first portion, and a third portion on the second portion; a first barrier film pattern, disposed between the first portion of the gate electrode and the gate insulating film, the first barrier film pattern having a first work function; a second barrier film pattern, disposed between the second portion of the gate electrode and the gate insulating film, the second barrier film pattern having a second work function; a third barrier film pattern, disposed between the third portion of the gate electrode and the gate insulating film, the third barrier film pattern having a third work function; wherein the first work function is greater than the third work function and less than the second work function.
[0007] According to the inventive concept, a semiconductor device is also provided, comprising: a substrate, and a device isolation film defining an active area of the substrate, wherein the active area has a gate trench; a gate insulating film, arranged along the side and bottom of the gate trench; a gate electrode, arranged on the gate insulating film and occupying at least a portion of the gate trench not occupied by the gate insulating film, the gate electrode having a first portion, a second portion on the first portion, and a third portion on the second portion; a first barrier film pattern, having a first material, and being interposed between the first portion of the gate electrode and the gate insulating film; a second barrier film pattern, having a second material, and being interposed between the second portion of the gate electrode and the gate insulating film; a third barrier film pattern, having a third material, and being interposed between the third portion of the gate electrode and the gate insulating film; the first material and the second material, having an oxygen surface density, wherein the oxygen surface density of the second material is greater than the oxygen surface density of the first material.
[0008] According to the inventive concept, a semiconductor device is also provided, comprising: a substrate and a device isolation film defining an active area of the substrate, wherein the active area has a gate trench; a barrier film, arranged along at least a portion of the bottom and side of the gate trench; and a gate electrode, arranged on the barrier film and occupying at least a portion of the gate trench not occupied by the barrier film, and wherein the barrier film has: a lower barrier film pattern of a first material; an intermediate barrier film pattern of a second material, arranged on the lower barrier film pattern; and an upper barrier film pattern of a third material, arranged on the intermediate barrier film pattern, and the intermediate barrier film pattern and the upper barrier film pattern do not extend to the bottom of the gate trench.
[0009] According to the inventive concept, a semiconductor device is also provided, comprising: a substrate having an active area; a gate electrode buried in the active area; a gate insulating film between the gate electrode and the active area of the substrate; a first material barrier film between a lower portion of the gate electrode and the gate insulating film; a second material barrier film between a middle portion of the gate electrode and the gate insulating film and arranged above the first material barrier film in the device; and a third material barrier film between an upper portion of the gate electrode and the gate insulating film and arranged above the second material barrier film in the device, wherein the first material barrier film has a material selected from the group consisting of TiN, TaN, Ti, Ta, Mo and Al, the second material barrier film has a material selected from the group consisting of aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide and magnesium oxide, and the third material barrier film has a material selected from the group consisting of yttrium oxide, lanthanum oxide, germanium oxide, lutetium oxide and strontium oxide. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] The above and other aspects and features of the present inventive concept will become more apparent by describing in detail examples of the present inventive concept with reference to the accompanying drawings, in which:
[0011] Figure 1is a layout diagram of elements in an example of a semiconductor device according to the inventive concept;
[0012] Figure 2 is along Figure 1 A cross-sectional view of an example of a semiconductor device according to the inventive concept taken along line AA′;
[0013] Figure 3 yes Figure 2 A magnified view of region k;
[0014] Figure 4 is a graph of characteristics of an example of a semiconductor device according to the inventive concept and characteristics of an example of a semiconductor device for comparison with the example of the semiconductor device according to the inventive concept;
[0015] Figure 5 is along Figure 1 A cross-sectional view of an example of a semiconductor device according to the inventive concept taken along line AA′;
[0016] Figure 6 yes Figure 5 An enlarged view of region j;
[0017] Figure 7 is along Figure 1 A cross-sectional view of an example of a semiconductor device according to the inventive concept taken along line AA′;
[0018] Figure 8 yes Figure 7 An enlarged view of region m;
[0019] Fig. 9 is along Figure 1 A cross-sectional view of an example of a semiconductor device according to the inventive concept taken along line AA′; and
[0020] Fig.10 yes Fig. 9 Magnified view of area n. DETAILED DESCRIPTION
[0021] Hereinafter, examples of a semiconductor device according to the inventive concept will be described in detail with reference to the accompanying drawings.
[0022] First refer to Figures 1 to 3 , an example of a semiconductor device according to the inventive concept includes a substrate 100 having an active region (AC), an element isolation region (ISO), a word line (WL), and a bit line (BL).
[0023] The substrate 100 may be a silicon substrate or a substrate of another material, such as silicon germanium, indium antimonide, lead telluride, indium arsenide, indium phosphide, gallium arsenide, or gallium antimonide. Alternatively, the substrate 100 may include an epitaxial layer formed on a base. The substrate 100 may be a ceramic substrate, a quartz substrate, a display glass substrate, etc., and may be an SOI (semiconductor on insulator) substrate, such as a silicon on insulator substrate. Hereinafter, the present example will be described with reference to the substrate 100 as a bulk silicon substrate.
[0024] An active region (AC) is defined by forming an element isolation region (ISO) in a substrate 100. The active region (AC) may have an isolation island shape elongated in a first direction (DR1), that is, may extend longitudinally in the first direction. In addition, a gate electrode (that is, a word line (WL)) extends longitudinally in a second direction (DR2) that subtends a first acute angle (θ1) with the first direction (DR1), and a bit line (BL) extends longitudinally in a third direction (DR3) that subtends a second acute angle (θ2) with the first direction (DR1).
[0025] Here, the angle between two directions refers to the smaller angle among the angles formed by the intersection of the two directions. For example, in the case where two intersecting directions form angles of 120° and 60°, the angle "enclosed" by the two directions will refer to an angle of 60°. Figure 1 As shown, the angle included between the first direction (DR1) and the second direction (DR2) is θ1, and the angle included between the first direction (DR1) and the third direction (DR3) is θ2.
[0026] In an example of a semiconductor device according to the inventive concept, θ1 and θ2 may be 45°, 45°, or 30°, 60°, or 60°, 30°, but the inventive concept is not limited thereto. However, angles θ1 and / or θ2 are acute angles to maximize the spacing between the bit line contact 160 (a contact connecting the active region (AC) and the bit line (BL)) and the storage node contact 190 (a contact connecting the active region (AC) and the storage node).
[0027] Each active region (AC) includes a first contact region (DC) at the upper portion of the middle portion of the active region in the first direction DR1, and a second contact region (BC) at the upper portions of both ends of the active region in the first direction DR1. That is, the first contact region (DC) is a region for electrically connecting to the bit line (BL), and the second contact region (BC) is a region for electrically connecting to the storage node. Active regions (AC) adjacent to each other in the second direction (DR2) may be formed such that the second contact regions (BC) are arranged to be adjacent to each other. In each active region (AC), the first contact region (DC) and the second contact region (BC) do not overlap each other, i.e., are spaced apart from each other.
[0028] The device isolation film 105 may be formed in an element isolation region (ISO). The device isolation film 105 may be formed in the substrate 100 to define an active region (AC). The device isolation film 105 may constitute a shallow trench isolation (STI) structure, which is conducive to high integration due to excellent device isolation characteristics and a small occupied area, but the inventive concept is not limited thereto. The device isolation film 105 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. In addition, the device isolation film 105 may have a structure in which a stack of one or more alternating silicon oxide and silicon nitride layers is provided.
[0029] The gate trench 110 is formed in the active region 103 of the substrate 100. The gate trench 110 may have various shapes. For example, in the example shown, the gate trench 110 may be circular. Alternatively, the gate trench 110 may have inclined sidewalls.
[0030] The gate insulating film 112 may line the side and bottom of the gate trench 110. The gate insulating film 112 may be conformally formed along a surface of the active area AC defining the gate trench 110, for example.
[0031] The gate insulating film 112 may include silicon oxide, silicon nitride or silicon oxynitride, or at least one high dielectric constant material. Examples of high dielectric constant materials may include hafnium oxide, hafnium silicon oxide, lanthanum oxide, aluminum lanthanum oxide, zirconium oxide, zirconium silicon oxide, tantalum oxide, titanium oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, and lead zinc niobate.
[0032] The gate electrode 140 may be disposed on the gate insulating film 112 and may occupy at least a portion of the gate trench 110. That is, the gate electrode 140 may be recessed. Specifically, the upper surface of the gate electrode 140 may be located at a level lower than that of the upper surface of the substrate 100.
[0033] The gate electrode 140 may have a first portion 140a, a second portion 140b, and a third portion 140c. The first portion 140a, the second portion 140b, and the third portion 140c of the gate electrode 140 are respectively a lower portion, a middle portion, and an upper portion of the gate electrode 140. Specifically, the second portion 140b of the gate electrode 140 is a portion of the gate electrode 140 on the first portion 140a of the gate electrode 140, and the third portion 140c of the gate electrode 140 is a portion of the gate electrode 140 on the second portion 140b of the gate electrode 140. The first portion 140a, the second portion 140b, and the third portion 140c of the gate electrode 140 may be adjacent, as shown in FIG. Figure 3 As shown, chain lines are used only to show portions that delimit each other.
[0034] In some examples, all of the first portion 140a, the second portion 140b, and the third portion 140c of the gate electrode 140 have the same material. Alternatively, one of the first portion 140a, the second portion 140b, and the third portion 140c of the gate electrode 140 may have a material different from that of the rest of the gate electrode. In yet another example, the first portion 140a, the second portion 140b, and the third portion 140c of the gate electrode 140 have materials different from each other. In any of these examples, the interface film may be between the first portion 140a and the second portion 140b of the gate electrode 140 and / or between the second portion 140b and the third portion 140c.
[0035] When the interface film is interposed between the first portion 140a and the second portion 140b of the gate electrode 140, the interface film may cover the entire upper surface of the first portion 140a of the gate electrode 140. When the interface film is disposed between the second portion 140b and the third portion 140c of the gate electrode 140, the interface film may cover the entire upper surface of the second portion 140b of the gate electrode 140.
[0036] The interface film may be a material having a low resistance, such as tungsten nitride, titanium nitride, or cobalt silicide.
[0037] The gate electrode 140 may be a conductive material, such as a metal. For example, each of the first portion 140a, the second portion 140b, and the third portion 140c of the gate electrode 140 may include a metal selected from the group consisting of tungsten, aluminum, copper, molybdenum, titanium, tantalum, and ruthenium. However, the inventive concept is not limited thereto. For example, the material of the gate electrode 140 may have a low resistance.
[0038] In some examples, at least one of the first portion 140a, the second portion 140b, and the third portion 140c of the gate electrode 140 includes impurity-doped polysilicon. For example, the third portion 140c of the gate electrode 140 may include n+ polysilicon, and the second portion 140b may include p+ polysilicon.
[0039] Figure 2 The gate electrode 140 shows Figure 1 A corresponding word line in the word lines (WL) in the layout of.
[0040] The blocking film 130 may be disposed in the gate trench 110 between the gate electrode 140 and the gate insulating film 112. The blocking film 130 may extend along at least a portion of the bottom and side of the gate trench 110. The blocking film 130 may, for example, extend to an interface between the cap film 122 and the gate electrode 140. However, the inventive concept is not limited thereto. Of course, the blocking film 130 may further extend along the side of the gate trench 110 to protrude beyond the interface between the cap film 122 and the gate electrode 140, thereby extending between the gate insulating film 112 and at least a portion of the cap film 122.
[0041] The blocking film 130 includes a first blocking film pattern 131 disposed at the lower portion (of the gate electrode 140), a second blocking film pattern 133 disposed at the middle portion and above the first blocking film pattern 131, and a third blocking film pattern 135 disposed at the upper portion and above the second blocking film pattern. Hereinafter, the blocking film pattern may be referred to simply as a blocking pattern or a blocking film of a material, even if they are adjacent. In addition, here, as shown in the accompanying drawings, the term "above" refers to a blocking film pattern being above the horizontal plane of the uppermost portion of another (lower) blocking film pattern.
[0042] The first barrier pattern 131 may be interposed between the first portion 140a of the gate electrode 140 and the gate insulating film 112. The first barrier pattern 131 may extend along a portion of an upper side of the gate insulating film 112 on the gate insulating film 112. The first barrier pattern 131 may be disposed along a portion of a side of the gate trench 110 and along the bottom of the gate trench 110. More specifically, the first barrier pattern 131 may be disposed along the bottom and portions of both sides of the gate trench 110 to be centered on the bottom of the gate trench 110.
[0043] The first portion 140a of the gate electrode 140 may be disposed on the first barrier pattern 131. That is, the first portion 140a of the gate electrode 140 may be disposed up to a level corresponding to an upper limit or end of the first barrier pattern 131. Therefore, the uppermost portion (upper end) of the first barrier pattern 131 and the uppermost portion (top) of the first portion 140a of the gate electrode 140 may be disposed at substantially the same level in the device.
[0044] The second barrier pattern 133 may be disposed between the second portion 140 b of the gate electrode 140 and the gate insulating film 112 .
[0045] In some examples, the second barrier pattern 133 is disposed on the first barrier pattern 131 but not on the first portion 140a of the gate electrode 140. The second barrier pattern 133 may not extend between the first portion 140a of the gate electrode 140 and the second portion 140b of the gate electrode 140.
[0046] The second barrier pattern 133 may extend along a portion of the side of the gate trench 110, and in this respect may have the form of a trench liner. Therefore, the second barrier pattern 133 may be provided along a portion of the gate insulating film 112. The second barrier pattern 133 may extend along portions of both sides of the gate trench 110, centered relative to the first barrier pattern 131 and the top of the first portion 140a of the gate electrode 140. The second barrier pattern 133 may not extend between the first portion 140a of the gate electrode 140 and the first barrier pattern 131. The second portion 140b of the gate electrode 140 may be provided up to a horizontal plane corresponding to the horizontal plane of the upper end of the second barrier pattern 133. For example, the upper end of the second barrier pattern 133 and the top of the second portion 140b of the gate electrode 140 may be provided at substantially the same horizontal plane in the device.
[0047] The third barrier pattern 135 may be disposed between the third portion 140 c of the gate electrode 140 and the gate insulating film 112 .
[0048] In some examples, the third barrier pattern 135 is disposed on the second barrier pattern 133, but not on the second portion 140b of the gate electrode 140. The third barrier pattern 135 may not extend between the first portion 140a of the gate electrode 140 and the first barrier pattern 131. In addition, the third barrier pattern 135 may not extend between the second portion 140b of the gate electrode 140 and the third portion 140c of the gate electrode 140.
[0049] The third barrier pattern 135 may extend along a portion of the side of the gate trench 110 and may have the form of a trench liner. That is, the third barrier pattern 135 may be disposed along a portion of the gate insulating film 112. The third barrier pattern 135 may extend along portions of both sides of the gate trench 110, centered relative to the second barrier pattern 133 and the upper end of the second portion 140b of the gate electrode 140. The third barrier pattern 135 may not extend between the first portion 140a of the gate electrode 140 and the first barrier pattern 131. The third portion 140c of the gate electrode 140 may be disposed up to a horizontal plane corresponding to the horizontal plane of the upper end of the third barrier pattern 135. More specifically, the upper end of the third barrier pattern 135 and the top of the second portion 140b of the gate electrode 140 may be disposed at substantially the same horizontal plane in the device.
[0050] Each of the first barrier pattern 131, the second barrier pattern 133, and the third barrier pattern 135 may have a material different from each other. For example, the first barrier pattern 131, the second barrier pattern 133, and the third barrier pattern 135 may be respective materials having oxygen areal densities different from each other.
[0051] The first barrier pattern 131 may include, for example, at least one of TiN, TaN, Ti, Ta, Mo, and Al.
[0052] The second barrier pattern 133 may have a second material having a greater oxygen surface density than the first material constituting the first barrier pattern 131. In other words, the number of oxygen atoms per unit volume of the second material may be greater than that of the first material.
[0053] The third barrier pattern 135 may include a third material having an oxygen areal density less than that of the first material constituting the first barrier pattern 131. In other words, the number of oxygen atoms per unit volume of the third material may be less than that of the first material.
[0054] In summary, the oxygen surface density of the first material may be greater than the oxygen surface density of the third material, and less than the oxygen surface density of the second material.
[0055] The second barrier pattern 133 may be formed of one material selected from the group consisting of, for example, aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, and magnesium oxide.
[0056] The third barrier pattern 135 may be formed of one material selected from the group consisting of, for example, yttrium oxide, lanthanum oxide, germanium oxide, lutetium oxide, and strontium oxide.
[0057] The work function of the first barrier pattern 131 (i.e., the first work function), the work function of the second barrier pattern 133 (the second work function), and the work function of the third barrier pattern 135 (the third work function) may be different from each other. For example, the first work function may be greater than the third work function and less than the second work function. The work function may refer to a value of the work function expressed in eV.
[0058] Figure 4 Characteristics of a semiconductor device according to the inventive concept are shown.
[0059] Figure 4 The x-axis of the graph of represents the region corresponding to each of the first portion 140a, the second portion 140b, and the third portion 140c of the gate electrode 140, respectively. For example, Figure 4 The first point ( P1 ) on the x-axis of the graph of corresponds to the lowest point of the first barrier pattern 131 . Figure 4 The second point (P2) on the x-axis of the graph of corresponds to the boundary between the first portion 140a of the gate electrode 140 and the second portion 140b of the gate electrode 140. Therefore, Figure 4 A first segment ( R1 ) on the x-axis of the graph of corresponds to the first portion 140 a of the gate electrode 140 and the first barrier pattern 131 .
[0060] Figure 4The third point (P3) on the x-axis of the graph of corresponds to the boundary between the second portion 140b of the gate electrode 140 and the third portion 140c of the gate electrode 140. Therefore, Figure 4 The second segment ( R2 ) on the x-axis of the graph of corresponds to the second portion 140 b of the gate electrode 140 and the second barrier pattern 133 .
[0061] Figure 4 The fourth point (P4) on the x-axis of the graph of corresponds to the boundary between the cap film 122 and the gate electrode 140. Therefore, Figure 4 The third segment ( R3 ) on the x-axis of the graph of corresponds to the third portion 140 c of the gate electrode 140 and the third barrier pattern 135 .
[0062] Figure 4 The y-axis of the graph of represents the density of electrons in the gate electrode 140 (unit: AU (arbitrary unit)).
[0063] Figure 4 The first curve G1 represents the electron concentration in each segment when the work function of the middle barrier pattern is greater than the work function of the upper barrier pattern and less than the work function of the lower barrier pattern in the semiconductor device including the barrier patterns having three different work functions.
[0064] Figure 4 The second curve G2 is a graph representing the electron concentration in each segment when the work function of the lower barrier pattern (i.e., the first barrier pattern 131) is greater than the work function of the upper barrier pattern (i.e., the third barrier pattern 135) and is less than the work function of the middle barrier pattern (i.e., the second barrier pattern 133) in the semiconductor device according to the present invention.
[0065] Reference Figure 4 When a voltage is applied to the word line, the electron concentration near the upper blocking pattern (i.e., the third segment (R3)) can be very high. Because the work function of the upper blocking pattern is the lowest among the upper blocking pattern, the middle blocking pattern, and the lower blocking pattern, the electrons can move toward the vicinity of the lower blocking pattern (i.e., the first segment (R1)).
[0066] At this time, because the work function of the middle barrier pattern is not relatively high in the second section (R2) of the device represented by the first curve G1, the possibility that electrons coming down from the vicinity of the upper barrier pattern can be retained may also be low.
[0067] On the other hand, the semiconductor device according to the inventive concept may include a first barrier pattern 131, a second barrier pattern 133, and a third barrier pattern 135 having different work functions from each other. As described above, the first work function may be greater than the third work function and less than the second work function. In the second segment (R2) of the second curve G2, since the work function of the middle barrier pattern is relatively high, the possibility that the electrons coming down from the upper barrier pattern can be retained may be high.
[0068] In other words, at the fifth point (P5) of the second segment (R2), the electron concentration in the first curve G1 is higher than the electron concentration in the second curve G2. According to the device having the characteristics represented by the first curve G1 (comparison), a relatively large number of electrons can move to the vicinity of the lower barrier pattern. In this case, the possibility of electrons flowing along an undesirable path increases, which may cause leakage current, thereby reducing the reliability of the semiconductor device. On the other hand, in the device having the characteristics represented by the second curve G2 according to the present invention, a relatively small number of electrons will move to the vicinity of the lower barrier pattern (i.e., the first barrier pattern 131). In this case, the possibility of leakage current occurring is minimized, and the reliability of the semiconductor device can be improved.
[0069] Refer again Figures 1 to 3 The capping film 122 may fill the remaining portion of the gate trench 110 in which the gate electrode 140 is formed. The capping film 122 may include, for example, at least one of silicon oxide, silicon nitride, or silicon oxynitride.
[0070] The first source / drain region 107a may be disposed between the two first gate electrodes 140. The second source / drain region 107b may be disposed between the gate electrode 140 and the device isolation film 105. That is, two transistors may be formed in the active region 103. At this time, the first source / drain region 107a may be shared by two adjacent transistors, while the second source / drain region 107b is not shared by the two adjacent transistors.
[0071] The first interlayer insulating film 200a may be disposed on the substrate 100 to cover the gate electrode 140 and the device isolation film 105. The first interlayer insulating film 200a may include, for example, at least one of silicon oxide, silicon nitride, or silicon oxynitride. That is, the first interlayer insulating film 200a may be a single layer or multilayer structure.
[0072] The first interlayer insulating film 200a may include a first contact hole 150 exposing the first source / drain region 107a. That is, the first contact hole 150 may pass through the first interlayer insulating film 200a.
[0073] The bit line contact 160 may be formed in the first contact hole 150. The bit line contact 160 may include a conductive material, and may include, for example, at least one of polysilicon, a metal silicide compound, a conductive metal nitride, and a metal, but the inventive concept is not limited thereto.
[0074] A bit line 170 electrically connected to the bit line contact 160 may be formed on the bit line contact 160. The bit line 170 may include a conductive material, and may include, for example, at least one of polysilicon, a metal silicide compound, a conductive metal nitride, and a metal, but the inventive concept is not limited thereto. Figure 2 The bit line 170 is connected with Figure 1 The same elements as the bit lines (BL) shown in the layout.
[0075] The second interlayer insulating film 200b may be disposed on the first interlayer insulating film 200a to cover the bit line 170. The second interlayer insulating film 200b may include, for example, at least one of silicon oxide, silicon nitride, or silicon oxynitride. The second interlayer insulating film 200b may be a single layer or multilayer structure.
[0076] The second contact hole 180 may penetrate the first and second interlayer insulating films 200 a and 200 b to expose the second source / drain region 107 b .
[0077] A storage node contact 190 may be formed in the second contact hole 180. The storage node contact 190 may be electrically connected to the second source / drain region 107b. The storage node contact 190 may include a conductive material and may include, for example, at least one of polysilicon, a metal silicide compound, a conductive metal nitride, and a metal, but the inventive concept is not limited thereto.
[0078] The information storage element may be formed on the storage node contact 190. The information storage element formed on the storage node contact 190 may be, for example, a capacitor and may include a storage node in contact with the storage node contact 190. Alternatively, the information storage element may be a variable resistor. Specifically, the information storage element may include a phase change material or may be a magnetic tunnel connection pattern.
[0079] In the following, reference will be made to Figure 1 , Figure 5 and Figure 6 Other examples of semiconductor devices according to the inventive concept are described. For the sake of brevity, parts of the foregoing description that are also applicable to these examples will be simplified or omitted.
[0080] Figure 5 is along Figure 1 A cross-sectional view taken along line AA'. Figure 6 yes Figure 5 Magnified view of area j.
[0081] Reference Figure 5 and Figure 6 , the semiconductor device according to the inventive concept may include a blocking film 230 and a gate electrode 240 .
[0082] The blocking film 230 may include a first blocking film pattern 231 , a second blocking film pattern 233 , and a third blocking film pattern 235 , each of which will be simply referred to as a blocking pattern. The gate electrode 240 may have a first portion 241 , a second portion 243 , and a third portion 245 .
[0083] The first barrier pattern 231 may be disposed along a portion of the side and bottom of the gate trench 110. The first barrier pattern 231 may correspond to, for example, the above-described first barrier pattern 131. The first portion 241 of the gate electrode 240 may be disposed on the first barrier pattern 231. The first portion 241 of the gate electrode 240 may correspond to, for example, the above-described first portion 140a of the gate electrode 140.
[0084] The second barrier pattern 233 may include a first portion 233a and a second portion 233b. The first portion 233a of the second barrier pattern 233 may be a portion disposed on the first barrier pattern 231 and extending along a portion of the gate insulating film 112 (i.e., a portion of the side of the gate trench 110). The first portion 233a of the second barrier pattern 233 may correspond to, for example, the above-described second barrier pattern 133. The second portion 233b of the second barrier pattern 233 may be disposed on the first portion 241 of the gate electrode 240. The second portion 233b of the second barrier pattern 233 may be between the first portion 241 of the gate electrode 240 and the second portion 243 of the gate electrode 240.
[0085] The second portion 243 of the gate electrode 240 may be disposed on the second barrier pattern 233. The second portion 243 of the gate electrode 240 may correspond to, for example, the second portion 140b of the above-described gate electrode 140. However, the second portion 243 of the gate electrode 240 may have a different material from the first portion 241 of the gate electrode 240.
[0086] The third barrier pattern 235 may include a first portion 235a and a second portion 235b. The first portion 235a of the third barrier pattern 235 may be a portion disposed on the second barrier pattern 233 and extending along a portion of the gate insulating film 112 (i.e., a portion of the side of the gate trench 110). The first portion 235a of the third barrier pattern 235 may correspond to, for example, the third barrier pattern 135 described above. The second portion 235b of the third barrier pattern 235 may include a portion disposed on the second portion 243 of the gate electrode 240. The second portion 235b of the third barrier pattern 235 may be between the second portion 243 of the gate electrode 240 and the third portion 245 of the gate electrode 240.
[0087] In some examples, the second portion 235b of the third barrier pattern 235 may have a different material from the first portion 235a. The second portion 235b of the third barrier pattern 235 may be a material having low resistance, such as tungsten nitride, titanium nitride, or cobalt silicide.
[0088] The third portion 245 of the gate electrode 240 may be disposed on the third barrier pattern 235. The third portion 245 of the gate electrode 240 may correspond to, for example, the third portion 140c of the above-described gate electrode 140. However, the third portion 245 of the gate electrode 240 may have a material different from that of each of the first portion 241 and the second portion 243 of the gate electrode 240.
[0089] The work function of the first barrier pattern 231 may be smaller than the work function of the second barrier pattern 233, and may be greater than the work function of the third barrier pattern 235. For example, the oxygen surface density of the material of the first barrier pattern 231 may be smaller than the oxygen surface density of the material of the second barrier pattern 233, and may be greater than the oxygen surface density of the material of the third barrier pattern 235.
[0090] In the following, reference will be made to Figure 1 , Figure 7 and Figure 8 Another example of a semiconductor device according to the inventive concept is described. For the sake of brevity, parts of the foregoing description that are also applicable to this example will be simplified or omitted.
[0091] Figure 7 is along Figure 1 A cross-sectional view taken along line AA'. Figure 8 yes Figure 7 Magnified view of area m.
[0092] Reference Figure 7 and Figure 8 , the semiconductor device according to the inventive concept may include a blocking film 330 and a gate electrode 340 .
[0093] The blocking film 330 may include a first blocking pattern 331, a second blocking pattern 333, and a third blocking pattern 335. The gate electrode 340 may include a first portion 341 and a second portion 343. The first portion 341 of the third gate electrode 340 may include a first part 341a and a second part 341b.
[0094] The first barrier pattern 331 may be disposed along a portion of a side and a bottom of the gate trench 110. The first barrier pattern 331 may correspond to, for example, the first barrier pattern 131 described above.
[0095] The first portion 341 of the gate electrode 340 may be disposed on the first barrier pattern 331. The first part 341a of the first portion 341 of the third gate electrode 340 may correspond to, for example, the first portion 140a of the gate electrode 140 described above.
[0096] The second portion 341b of the first portion 341 of the third gate electrode 340 may be disposed on the first portion 341a of the first portion 341 of the third gate electrode 340. The second portion 341b of the first portion 341 of the third gate electrode 340 may correspond to, for example, the second portion 140b of the gate electrode 140 described above.
[0097] In some examples, the first portion 341 a of the first part 341 of the third gate electrode 340 may have the same material as the second portion 341 b .
[0098] In some examples, the first portion 341a of the first part 341 of the third gate electrode 340 may have a different kind of material from the second portion 341b. In this case, an interface film may be interposed between the first portion 341a and the second portion 341b.
[0099] The second barrier pattern 333 may be disposed on the first barrier pattern 331 and extend along a portion of the gate insulating film 112 (i.e., a portion of the side of the gate trench 110). The second barrier pattern 333 may correspond to, for example, the above-described second barrier pattern 133. The second barrier pattern 333 may not extend between the first portion 341a and the second portion 341b of the first portion 341 of the third gate electrode 340. The second barrier pattern 333 may be disposed between the second portion 341b of the first portion 341 of the third gate electrode 340 and the gate insulating film 112.
[0100] The third barrier pattern 335 may include a first portion 335a and a second portion 335b. The first portion 335a of the third barrier pattern 335 may correspond to the first portion 235a of the third barrier pattern 235. The second portion 335b of the third barrier pattern 335 may correspond to the second portion 235b of the third barrier pattern 235. For example, the second portion 335b of the third barrier pattern 335 may extend between the second portion 341b of the first portion 341 of the third gate electrode 340 and the second portion 343 of the third gate electrode 340.
[0101] In some examples, the first portion 335 a and the second portion 335 b of the third barrier pattern 335 may have the same material.
[0102] In some examples, the first portion 335a and the second portion 335b of the third barrier pattern 335 may have different materials from each other. In this case, the second portion 335b of the third barrier pattern 335 may have a low resistance material such as tungsten nitride, titanium nitride, or cobalt silicide.
[0103] The second portion 343 of the third gate electrode 340 may be disposed on the third barrier pattern 335. The second portion 343 of the third gate electrode 340 may correspond to, for example, the third portion 140c of the above-described gate electrode 140. However, the second portion 343 of the third gate electrode 340 may have a material different from that of the first portion 341 of the third gate electrode 340.
[0104] The work function of the first barrier pattern 331 may be less than the work function of the second barrier pattern 333, and may be greater than the work function of the third barrier pattern 335. For example, the oxygen surface density of the material of the first barrier pattern 331 may be less than the oxygen surface density of the material of the second barrier pattern 333, and may be greater than the oxygen surface density of the material of the third barrier pattern 335.
[0105] In the following, reference will be made to Figure 1 , Fig. 9 and Fig.10 Another example of a semiconductor device according to the inventive concept is described. For the sake of brevity, parts of the foregoing description that are also applicable to this example will be simplified or omitted.
[0106] Fig. 9 is along Figure 1 A cross-sectional view taken along line AA'. Fig.10 yes Fig. 9 Magnified view of area n.
[0107] refer to Fig. 9 and Fig.10 , the semiconductor device may include a blocking film 430 and a gate electrode 440 .
[0108] The blocking film 430 may include a first blocking pattern 431, a second blocking pattern 433, and a third blocking pattern 435. The gate electrode 440 may include a first portion 441 and a second portion 443. The second portion 443 of the gate electrode 440 may include a first part 443a and a second part 443b.
[0109] The first barrier pattern 431 may be disposed along portions of the side and bottom of the gate trench 110. The first barrier pattern 431 may correspond to, for example, the first barrier pattern 131 described above.
[0110] The first portion 441 of the gate electrode 440 may be disposed on the first barrier pattern 431. The first portion 441 of the gate electrode 440 may correspond to, for example, the first portion 140a of the gate electrode 140 described above.
[0111] The second barrier pattern 433 may include a first portion 433a and a second portion 433b. The first portion 433a of the second barrier pattern 433 may correspond to the first portion 233a of the second barrier pattern 233. The second portion 433b of the second barrier pattern 433 may correspond to the second portion 233b of the second barrier pattern 233. For example, the second portion 433b of the second barrier pattern 433 may extend between the first portion 441 and the second portion 443 of the gate electrode 440.
[0112] The third barrier pattern 435 may be disposed on the second barrier pattern 433 and extend along a portion of the gate insulating film 112 (i.e., a portion of the side of the gate trench 110). The third barrier pattern 435 may correspond to, for example, the third barrier pattern 135 described above. That is, the third barrier pattern 435 may not extend between the second portion 443b and the first portion 443a of the second portion 443 of the gate electrode 440. The third barrier pattern 435 may be disposed between the second portion 443b of the second portion 443 of the gate electrode 440 and the gate insulating film 112.
[0113] The first portion 443a of the second part 443 of the gate electrode 440 may be disposed on the second barrier pattern 433. The top of the first portion 443a of the second part 443 of the gate electrode 440 may be located on substantially the same plane as the top (upper end) of the second barrier pattern 433. The second portion 443b of the second part 443 of the gate electrode 440 may be disposed on the first portion 433a.
[0114] In some examples, the first portion 443 a and the second portion 443 b of the second part 443 of the gate electrode 440 may have the same material.
[0115] In some examples, the first portion 443a and the second portion 443b of the second part 443 of the gate electrode 440 may have different materials. In this case, an interface film may be further provided between the first portion 443a and the second portion 443b.
[0116] The work function of the first barrier pattern 431 may be less than that of the second barrier pattern 433, and may be greater than that of the third barrier pattern 435. For example, the oxygen surface density of the material included in the first barrier pattern 431 may be less than that of the material of the second barrier pattern 433, and may be greater than that of the material of the third barrier pattern 435.
[0117] Although the inventive concept has been specifically shown and described with reference to various examples of the inventive concept, it will be understood by those skilled in the art that various changes in form and detail may be made to such examples without departing from the spirit and scope of the inventive concept as defined by the appended claims. It is therefore desired that the present disclosure be considered in all respects as illustrative and not restrictive, with reference to the appended claims rather than the foregoing description to indicate the scope of the invention.
Claims
1. A semiconductor device, comprising: A substrate and a device isolation film defining an active region of the substrate, wherein the active region has a gate trench; A gate insulating film is provided along the side and bottom of the gate trench; a gate electrode disposed on the gate insulating film and occupying at least a portion of the gate trench not occupied by the gate insulating film, the gate electrode having a first portion, a second portion on the first portion, and a third portion on the second portion; A first barrier film pattern is disposed between the first portion of the gate electrode and the gate insulating film, wherein the first barrier film pattern has a first work function; a second barrier film pattern disposed between the second portion of the gate electrode and the gate insulating film, the second barrier film pattern having a second work function; a third barrier film pattern disposed between the third portion of the gate electrode and the gate insulating film, the third barrier film pattern having a third work function; The first work function is greater than the third work function and less than the second work function.
2. The semiconductor device according to claim 1, wherein The first barrier film pattern, the second barrier film pattern, and the third barrier film pattern include oxygen, The first barrier film pattern, the second barrier film pattern, and the third barrier film pattern have an oxygen surface density, wherein the oxygen surface density of the first barrier film pattern is greater than that of the third barrier film pattern, and the oxygen surface density of the first barrier film pattern is lower than that of the second barrier film pattern.
3. The semiconductor device according to claim 1, wherein The second barrier film pattern and the third barrier film pattern do not extend into the gate electrode.
4. The semiconductor device according to claim 1, wherein: The second barrier film pattern and the third barrier film pattern do not extend between the first portion of the gate electrode and the first barrier film pattern.
5. The semiconductor device according to claim 1, wherein The second barrier film pattern extends between a first portion of the gate electrode and a second portion of the gate electrode.
6. The semiconductor device according to claim 1, wherein The third barrier film pattern extends between the second portion of the gate electrode and the third portion of the gate electrode.
7. A semiconductor device comprising: A substrate and a device isolation film defining an active region of the substrate, wherein the active region has a gate trench; A gate insulating film is provided along the side and bottom of the gate trench; a gate electrode disposed on the gate insulating film and occupying at least a portion of the gate trench not occupied by the gate insulating film, the gate electrode having a first portion, a second portion on the first portion, and a third portion on the second portion; a first barrier film pattern of a first material, disposed between the first portion of the gate electrode and the gate insulating film; a second barrier film pattern of a second material, disposed between the second portion of the gate electrode and the gate insulating film; a third barrier film pattern of a third material, disposed between the third portion of the gate electrode and the gate insulating film; The first material and the second material have an oxygen areal density, wherein the oxygen areal density of the second material is greater than the oxygen areal density of the first material.
8. The semiconductor device according to claim 7, wherein: The first material, the second material, and the third material contain oxygen, The oxygen areal density of the first material, the oxygen areal density of the second material, and the oxygen areal density of the third material are such that the oxygen areal density of the third material is lower than the oxygen areal density of each of the first material and the second material.
9. The semiconductor device according to claim 7, wherein: A work function of the first barrier film pattern is greater than a work function of the third barrier film pattern and is smaller than a work function of the second barrier film pattern.
10. The semiconductor device according to claim 7, wherein: The second barrier film pattern and the third barrier film pattern do not extend into the gate electrode.
11. The semiconductor device according to claim 7, wherein: The second barrier film pattern and the third barrier film pattern do not extend between the first portion of the gate electrode and the first barrier film pattern.
12. The semiconductor device according to claim 7, wherein: The second barrier film pattern extends between a first portion of the gate electrode and a second portion of the gate electrode.
13. The semiconductor device according to claim 7, wherein: The third barrier film pattern extends between the second portion of the gate electrode and the third portion of the gate electrode.
14. A semiconductor device comprising: a substrate having an active region; a gate electrode buried in the active region; A gate insulating film, disposed between the gate electrode and the active region of the substrate; A first material barrier film, interposed between a lower portion of the gate electrode and the gate insulating film; a second material barrier film, interposed between the middle portion of the gate electrode and the gate insulating film, and disposed above the first material barrier film in the semiconductor device; as well as a third material barrier film, interposed between the upper portion of the gate electrode and the gate insulating film, and disposed above the second material barrier film in the semiconductor device, wherein the first material barrier film comprises a material selected from the group consisting of TiN, TaN, Ti, Ta, Mo and Al, The second material barrier film has a material selected from the group consisting of aluminum oxide, titanium oxide, hafnium oxide, zirconium oxide, and magnesium oxide, and The third material barrier film has a material selected from the group consisting of yttrium oxide, lanthanum oxide, germanium oxide, lutetium oxide, and strontium oxide.
15. The semiconductor device according to claim 14, wherein: A work function of the first material barrier film is greater than a work function of the third material barrier film and is smaller than a work function of the second material barrier film.
16. The semiconductor device according to claim 14, wherein A lower portion of the gate electrode, a middle portion of the gate electrode, and an upper portion of the gate electrode are contiguous.
17. The semiconductor device according to claim 14, wherein: A lower portion of the gate electrode, a middle portion of the gate electrode, and an upper portion of the gate electrode have different materials from each other. 18 . The semiconductor device according to claim 14 , further comprising an interface film separating two vertically adjacent portions of the portions of the gate electrode from each other.
19. The semiconductor device according to claim 14, wherein: The oxygen surface density of the second material barrier film is greater than the oxygen surface density of the first material barrier film.
20. The semiconductor device according to claim 14, wherein The gate electrode is recessed below the upper surface of the substrate, and further includes a capping layer covering the gate electrode.
Citation Information
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