A piezoresistive dual-axis motion sensor and a manufacturing method thereof

By adopting a piezoresistive dual-axis motion sensor design in the sensor, including SOI silicon wafers and isolation slots, the problems of large area, high cost and high stress and temperature coefficient caused by packaging in the prior art are solved, and more efficient production and lower costs are achieved.

CN110002395BActive Publication Date: 2025-03-25BEIJING SHINTON CO LTD
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Patent Information

Application Number
CN201910286325.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-04-10
Publication Date
2025-03-25
Estimated Expiration
2039-04-10

AI Technical Summary

Technical Problem

Existing sensor devices occupy a large plane area, and the total number of chips that can be manufactured on a single crystal cell is small, resulting in high costs; device design makes the device itself greatly affected by the packaging, has a large residual stress, and has a high temperature coefficient; process manufacturing is complex, with low yield and long cycles.

Method used

A piezoresistive dual-axis motion sensor is used, including SOI silicon wafers, etching grooves, mass blocks, doped layers, second silicon oxide layer, welding layer and isolation groove. By making the mass blocks, the isolation design is realized to reduce the residual stress and temperature coefficient caused by the packaging.

Benefits of technology

It effectively reduces the residual stress and temperature coefficient caused by packaging, simplifies the process flow, improves product yield and production efficiency, and reduces costs.

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Abstract

The present application provides a piezoresistive dual-axis motion sensor and a manufacturing method thereof, wherein the piezoresistive dual-axis motion sensor comprises an SOI silicon wafer, comprising a first single crystal silicon layer, a first silicon oxide layer, and a second single crystal silicon layer; a first etching groove and a second etching groove are formed on a side of the second single crystal silicon layer close to the first silicon oxide layer; a mass block is formed on the second single crystal silicon layer and between the first etching groove and the second etching groove; a doping layer is formed on a side of the second single crystal silicon layer away from the first silicon oxide layer; a second silicon oxide layer is formed on the second single crystal silicon layer and the doping layer; a welding layer is formed on the second single crystal silicon layer and the doping layer and in the second silicon oxide layer; an isolation groove is formed on a side of the second etching groove away from the mass block; wherein the isolation groove is formed simultaneously with the mass block, the first etching groove, and the second etching groove. By the above method, the residual stress and temperature coefficient caused by packaging can be reduced.
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Description

Technical Field

[0001] The present application relates to the technical field of micro-electromechanical systems, and in particular to a piezoresistive dual-axis motion sensor and a manufacturing method thereof. Background Art

[0002] Micro-Electro-Mechanical System (MEMS), also known as micro-electro-mechanical system, microsystem, micro-machine, etc., refers to high-tech devices with a size of several millimeters or even smaller. MEMS is developed on the basis of microelectronics technology (semiconductor manufacturing technology), and is a high-tech electronic mechanical device made by integrating lithography, corrosion, thin film, LIGA, silicon micromachining, non-silicon micromachining and precision machining technologies.

[0003] Micro-electromechanical systems are micro devices or systems that integrate micro sensors, micro actuators, micro mechanical structures, micro power sources, micro energy, signal processing and control circuits, high-performance electronic integrated devices, interfaces, and communications.

[0004] The inventors of the present application discovered during long-term research and development that existing sensor devices occupy a large planar area, and the total number of chips that can be manufactured on a single wafer is small, resulting in high costs; the design of the device makes the device itself greatly affected by the packaging, resulting in large residual stress and high temperature coefficient; the process manufacturing method of existing cases makes its process implementation relatively complex, with low yield and long cycle. Summary of the invention

[0005] The present application provides a piezoresistive dual-axis motion sensor and a manufacturing method thereof, so as to solve the problems of large residual stress and high temperature coefficient caused by packaging in the prior art.

[0006] In order to solve the above technical problems, a technical solution adopted in the present application is: to provide a piezoresistive dual-axis motion sensor, wherein the piezoresistive dual-axis motion sensor includes: an SOI silicon wafer, including a first single crystal silicon layer, a first silicon oxide layer and a second single crystal silicon layer, wherein the first silicon oxide layer is arranged between the first single crystal silicon layer and the second single crystal silicon layer; a first etching groove and a second etching groove are formed on a side of the second single crystal silicon layer close to the first silicon oxide layer; a mass block is formed on the second single crystal silicon layer and is formed between the first etching groove and the second etching groove; a doped layer is formed on a side of the second single crystal silicon layer away from the first silicon oxide layer; a second silicon oxide layer is formed on the second single crystal silicon layer and the doped layer; a welding layer is formed on the second single crystal silicon layer and the doped layer and is formed in the second silicon oxide layer; an isolation groove is formed on a side of the second etching groove away from the mass block; wherein the isolation groove is formed simultaneously with the mass block, the first etching groove and the second etching groove.

[0007] To solve the above technical problems, another technical solution adopted in the present application is: to provide a method for manufacturing a piezoresistive dual-axis motion sensor, wherein the piezoresistive dual-axis motion sensor includes an SOI silicon wafer, the SOI silicon wafer includes a first single crystal silicon layer, a first silicon oxide layer and a second single crystal silicon layer, wherein the first silicon oxide layer is arranged between the first single crystal silicon layer and the second single crystal silicon layer; the method includes arranging a doping layer on the side of the second single crystal silicon layer away from the first silicon oxide layer; arranging a second silicon oxide layer on the second single crystal silicon layer and the doping layer; arranging a welding layer on the second single crystal silicon layer and the doping layer and in the second silicon oxide layer; and simultaneously arranging a mass block, a first etching groove, a second etching groove and an isolation groove on the side of the second single crystal silicon layer close to the first silicon oxide layer, the mass block is formed between the first etching groove and the second etching groove, and the isolation groove is arranged on the side of the second etching groove away from the mass block.

[0008] The beneficial effects of the present application are as follows: Different from the prior art, the present application provides a piezoresistive dual-axis motion sensor and a method for manufacturing the same, the piezoresistive dual-axis motion sensor comprising an SOI silicon wafer, comprising a first single-crystal silicon layer, a first silicon oxide layer and a second single-crystal silicon layer; a first etching groove and a second etching groove are formed on a side of the second single-crystal silicon layer close to the first silicon oxide layer; a mass block is formed on the second single-crystal silicon layer and between the first etching groove and the second etching groove; a doped layer is formed on a side of the second single-crystal silicon layer away from the first silicon oxide layer; a second silicon oxide layer is formed on the second single-crystal silicon layer and the doped layer; a welding layer is formed on the second single-crystal silicon layer and the doped layer and in the second silicon oxide layer; an isolation groove is formed on a side of the second etching groove away from the mass block; wherein the isolation groove is formed simultaneously with the mass block, the first etching groove and the second etching groove. By making the isolation groove while making the mass block, an isolation design is realized, which solves the problems of large residual stress and high temperature coefficient caused by packaging in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions in the embodiments of the application, the drawings required for use in the description of the embodiments are briefly introduced below. Obviously, the drawings described below are only some embodiments of the application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0010] Figure 1 It is a schematic cross-sectional structure diagram of an embodiment of a piezoresistive dual-axis motion sensor of the present application;

[0011] Figure 2 yes Figure 1 A schematic structural diagram of an embodiment of a piezoresistive dual-axis motion sensor is shown;

[0012] Figure 3 yes Figure 2 The structural schematic diagram of the piezoresistive dual-axis motion sensor shown moves on the first coordinate axis;

[0013] Figure 4 yes Figure 2 The schematic diagram of the structure of the piezoresistive dual-axis motion sensor shown moves on the second coordinate axis;

[0014] Figure 5 yes Figure 2 The circuit structure diagram of the piezoresistive dual-axis motion sensor shown;

[0015] Figure 6 It is a flow chart of an embodiment of a method for manufacturing a motion sensor of the present application;

[0016] Figure 7 yes Figure 6 The structural schematic diagram of the piezoresistive dual-axis motion sensor formed after step S14 is shown;

[0017] Figure 8 It is a flow chart of another embodiment of a method for manufacturing a piezoresistive dual-axis motion sensor of the present application;

[0018] Fig. 9 yes Figure 8 A schematic structural diagram of an embodiment of a sensitive resistor formed in step S22 is shown;

[0019] Fig.10 yes Figure 8 FIG. 1 is a schematic structural diagram of the piezoresistive dual-axis motion sensor formed in step S27 . DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0021] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back...), the directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0022] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present application, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be in a manner that can be understood by ordinary technicians in this field.

[0023] When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0024] See also Figure 1 and Figure 2 , Figure 1 is a schematic cross-sectional structure diagram of an embodiment of a piezoresistive dual-axis motion sensor of the present application, Figure 2 yes Figure 1 The structure diagram of an embodiment of a piezoresistive dual-axis motion sensor is shown. The piezoresistive dual-axis motion sensor 100 disclosed in this embodiment includes an SOI silicon wafer 11, an etched groove 12, a mass block 13, a doping layer 14, a second silicon oxide layer 15, a welding layer 16 and an isolation groove 17. The following is an example of a motion sensor on one axis.

[0025] Specifically, the SOI silicon wafer 11 is used as a substrate for manufacturing the piezoresistive dual-axis motion sensor 100. The SOI silicon wafer 11 includes a first single crystal silicon layer 111, a first silicon oxide layer 112 and a second single crystal silicon layer 113, wherein the first silicon oxide layer 112 is disposed between the first single crystal silicon layer 111 and the second single crystal silicon layer 113.

[0026] The etching groove 12 and the mass block 13 can be formed at the same time. In this embodiment, the etching groove 12 includes a first etching groove 121 and a second etching groove 122, which are formed on a side of the second single crystal silicon layer 113 close to the first silicon oxide layer 112; the mass block 13 is formed on the second single crystal silicon layer 113 and formed between the first etching groove 121 and the second etching groove 122.

[0027] The doping layer 14 is formed on the side of the second single crystal silicon layer 113 away from the first silicon oxide layer 112. The second silicon oxide layer 15 is formed on the second single crystal silicon layer 113 and the doping layer 14. The welding layer 16 is formed on the second single crystal silicon layer 113 and the doping layer 14 and in the second silicon oxide layer 15.

[0028] The isolation groove 17 is formed on a side of the second etched groove 122 away from the mass block 13. In this embodiment, the etched groove 12, the mass block 13 and the isolation groove 17 can be formed at the same time.

[0029] In a specific embodiment, the piezoresistive dual-axis motion sensor 100 may further include a cantilever beam 18. The cantilever beam 18 includes a first cantilever beam 181 and a second cantilever beam 182, which are formed on both sides of the mass block 13, the first cantilever beam 181 matches the first etched groove 121, and the second cantilever beam 182 matches the second etched groove 122. In this embodiment, the etched groove 12, the mass block 13, the isolation groove 17 and the cantilever beam 18 can be formed at the same time. The doping layer 14 is also provided on the side of the first cantilever beam 181 away from the mass block 13.

[0030] In a specific embodiment, at least a portion of the doped layer 14 is formed on the first cantilever beam 181. The doped layer 14 includes a heavily doped layer 141 and a lightly doped layer 142, and a portion of the heavily doped layer 141 is formed on the lightly doped layer 142.

[0031] In this embodiment, the doping layer 14 is a sensitive resistor, and the piezoresistive dual-axis motion sensor 100 may include a plurality of sensitive resistors, which are distributed on the first cantilever beam 181 and the second cantilever beam 182. For example, the piezoresistive dual-axis motion sensor 100 includes 8 sensitive resistors, 4 of which are disposed on the first cantilever beam 181, and the other 4 are disposed on the second cantilever beam 182.

[0032] In one specific embodiment, a portion of the welding layer 16 is also formed on the heavily doped layer 141 .

[0033] In a specific embodiment, the piezoresistive dual-axis motion sensor 100 further includes a cover plate 19, and the cover plate 19 includes a first cover plate 191 and a second cover plate 192. The first cover plate 191 is bonded and packaged on a side of the first single crystal silicon layer 111 away from the first silicon oxide layer 112; the second cover plate 192 is bonded and packaged on a side of the second silicon oxide layer 15 away from the second single crystal silicon layer 113; and the welding layer 16 is further exposed at one end of the second cover plate 192.

[0034] In a specific embodiment, the first cover plate 191 includes a first bonding portion 1911 and a second bonding portion 1912 . The first bonding portion 1911 is disposed at one end of the first etched groove 121 away from the mass block 13 , and the second bonding portion 1912 is disposed at one end of the isolation groove 17 away from the mass block 13 .

[0035] In a specific embodiment, the second cover plate 192 includes a third bonding portion 1921 and a fourth bonding portion 1922, which are arranged side by side, and the third bonding portion 1921 is arranged on a side of the welding layer 16 close to the first etching groove 121, and is arranged opposite to the first bonding portion 1911; the fourth bonding portion 1922 is arranged opposite to the second bonding portion 1912. In a specific embodiment, the second cover plate 192 also includes a welding window (not shown), and the welding window is used to expose the welding layer 16. The third bonding portion 1921 is arranged between the welding window and the fourth bonding portion 1922, and the third bonding portion 1921 is adjacent to the welding window.

[0036] In a specific embodiment, the first cover plate 191 is packaged on the side of the first single crystal silicon layer 111 away from the first silicon oxide layer 112 through benzocyclobutene (BCB) bonding; the second cover plate 192 is packaged on the side of the second silicon oxide layer 15 away from the second single crystal silicon layer 113 through benzocyclobutene bonding.

[0037] Please also read Figure 3 to Figure 5 , Figure 3 yes Figure 2 The schematic diagram of the structure of the piezoresistive dual-axis motion sensor moving on the first coordinate axis is shown. Figure 4 yes Figure 2 The schematic diagram of the structure of the piezoresistive dual-axis motion sensor moving on the second coordinate axis is shown. Figure 5 yes Figure 2 Schematic diagram of the circuit structure of the piezoresistive dual-axis motion sensor shown.

[0038] In a specific embodiment, a three-axis coordinate system is established, including a first coordinate axis x, a second coordinate axis y, and a third coordinate axis z that are perpendicular to each other. The piezoresistive dual-axis motion sensor 100 includes a first resistor RX1, a second resistor RX2, a third resistor RX3, and a fourth resistor RX4, as well as a fifth resistor RZ1, a sixth resistor RZ2, a seventh resistor RZ3, and an eighth resistor RZ4, which are arranged in the direction of the first coordinate axis. When the piezoresistive dual-axis motion sensor 100 moves in the direction of the first coordinate axis x and the direction of the third coordinate axis z, the resistance value changes of the eight resistors are shown in Table 1, wherein the horizontal title indicates the coordinate axis where the resistor is located, the vertical title indicates the movement direction of the dual-axis motion sensor, "+" indicates increase, and "-" indicates decrease.

[0039] Table 1

[0040]

[0041]

[0042] The present application provides a piezoresistive dual-axis motion sensor 100, which includes an SOI silicon wafer 11, including a first single crystal silicon layer 111, a first silicon oxide layer 112, and a second single crystal silicon layer 113, wherein the first silicon oxide layer 112 is disposed between the first single crystal silicon layer 111 and the second single crystal silicon layer 113; a first etching groove 121 and a second etching groove 122 are formed on a side of the second single crystal silicon layer 113 close to the first silicon oxide layer 112; a mass block 13 is formed on the second single crystal silicon layer 113 and formed on the first between the etching groove 121 and the second etching groove 122; the doping layer 14 is formed on the side of the second single crystal silicon layer 113 away from the first silicon oxide layer 112; the second silicon oxide layer 15 is formed on the second single crystal silicon layer 113 and the doping layer 14; the welding layer 16 is formed on the second single crystal silicon layer 113 and the doping layer 14, and is formed in the second silicon oxide layer 15; the isolation groove 17 is formed on the side of the second etching groove 122 away from the mass block 13; wherein the isolation groove 17 is formed simultaneously with the mass block 13, the first etching groove 121, and the second etching groove 122. By making the isolation groove 17 while etching the mass block 13, the isolation design is realized, which can reduce the residual stress and temperature coefficient caused by the package.

[0043] Corresponding to the above-mentioned piezoresistive dual-axis motion sensor, the present application further proposes a method for manufacturing a piezoresistive dual-axis motion sensor, please refer to Figure 6 , Figure 6 It is a flow chart of an embodiment of a method for manufacturing a piezoresistive dual-axis motion sensor of the present application. The piezoresistive dual-axis motion sensor includes an SOI silicon wafer, and the SOI silicon wafer includes a first single crystal silicon layer, a first silicon oxide layer, and a second single crystal silicon layer, wherein the first silicon oxide layer is arranged between the first single crystal silicon layer and the second single crystal silicon layer. In this embodiment, the SOI silicon wafer is used as a substrate. For example, a 4-inch SOI wafer and a 4-inch silicon wafer are selected, the thickness of the SOI wafer device layer is 15μm, the thickness of the buried oxide layer is 500nm, and the thickness of the handle layer is 380μm. The method disclosed in this embodiment includes the following steps:

[0044] S11: Disposing a doping layer on a side of the second single crystal silicon layer away from the first silicon oxide layer.

[0045] On the side of the second single crystal silicon layer away from the first silicon oxide layer, a doping layer may be formed by oxidation, photolithography, ion implantation and other processes.

[0046] S12: Disposing a second silicon oxide layer on the second single crystal silicon layer and the doping layer.

[0047] The second single crystal silicon layer and the doped layer are processed according to a preset process to form a second silicon oxide layer, thereby completing the manufacturing of the sensitive resistor. In a specific embodiment, multiple sensitive resistors can be formed simultaneously or sequentially.

[0048] S13: Disposing a welding layer on the second single crystal silicon layer and the doping layer and in the second silicon oxide layer.

[0049] The second single crystal silicon layer and the doped layer and the second silicon oxide layer can be processed by photolithography, etching, ion sputtering and other processes to form a welding layer, thereby completing the lead.

[0050] S14: A mass block, a first etching groove, a second etching groove and an isolation groove are simultaneously arranged on a side of the second single crystal silicon layer close to the first silicon oxide layer, the mass block is formed between the first etching groove and the second etching groove, and the isolation groove is arranged on a side of the second etching groove away from the mass block.

[0051] Photolithography, etching and other processes are performed on the side of the second single crystal silicon layer close to the first silicon oxide layer, and the first etching groove, the second etching groove and the isolation groove are etched at the same time, that is, the required first etching groove, the second etching groove and the isolation groove are formed by photoresist, and a mass block is formed between the first etching groove and the second etching groove. The depth and width of the mass block, the first etching groove, the second etching groove and the isolation groove can be made according to the preset data, which is not limited here. The piezoresistive dual-axis motion sensor formed at this time is as follows: Figure 7 As shown, Figure 7 yes Figure 6 The schematic diagram of the structure of the piezoresistive dual-axis motion sensor formed after step S14 is shown. The piezoresistive dual-axis motion sensor 100 includes an SOI silicon wafer 11, an etching groove 12, a mass block 13, a doping layer 14, a second silicon oxide layer 15, a welding layer 16 and an isolation groove 17. The SOI silicon wafer 11 includes a first single crystal silicon layer 111, a first silicon oxide layer 112 and a second single crystal silicon layer 113, and the etching groove 12 includes a first etching groove 121 and a second etching groove 122.

[0052] The present application provides a method for manufacturing a piezoresistive dual-axis motion sensor, the piezoresistive dual-axis motion sensor comprising an SOI silicon wafer, the SOI silicon wafer comprising a first single-crystal silicon layer, a first silicon oxide layer, and a second single-crystal silicon layer, wherein the first silicon oxide layer is arranged between the first single-crystal silicon layer and the second single-crystal silicon layer; the method comprises: arranging a doping layer on the side of the second single-crystal silicon layer away from the first silicon oxide layer; arranging a second silicon oxide layer on the second single-crystal silicon layer and the doping layer; arranging a welding layer on the second single-crystal silicon layer and the doping layer and in the second silicon oxide layer; arranging a mass block, a first etching groove, a second etching groove, and an isolation groove on the side of the second single-crystal silicon layer close to the first silicon oxide layer at the same time, the mass block being formed between the first etching groove and the second etching groove, and the isolation groove being arranged on the side of the second etching groove away from the mass block. By making the isolation groove while making the mass block, an isolation design is realized, and the residual stress and temperature coefficient caused by packaging can be reduced.

[0053] Based on the above implementation, the present application further proposes a method for manufacturing a piezoresistive dual-axis motion sensor. Figure 8 , Figure 8 1 is a flow chart of another embodiment of a method for manufacturing a piezoresistive dual-axis motion sensor of the present application. The same parts as the above-mentioned embodiments are not described in detail here. The method disclosed in this embodiment may include the following steps:

[0054] S21: Disposing a doping layer on a side of the second single crystal silicon layer away from the first silicon oxide layer.

[0055] In a specific embodiment, a thermal oxidation process is performed on the second single crystal silicon layer to obtain a first barrier layer, which may include silicon oxide and is used to block etching. A photoresist is placed on the first barrier layer and a first photolithography process is performed.

[0056] The first barrier layer may further include photoresist. A first ion implantation process is performed on the second single crystal silicon layer. In this embodiment, boron ions of a first concentration are implanted to obtain a lightly doped layer.

[0057] The first barrier layer is subjected to a photoresist removal process and a first annealing process. In this embodiment, the photoresist is removed by an ashing process; the first annealing process is performed by a nitrogen annealing process, and the annealing temperature is 900°C to 1200°C, for example, 900°C, 950°C, 1000°C, 1050°C, 1100°C, 1150°C, and 1200°C.

[0058] Removing the first barrier layer: In this embodiment, the oxide layer portion of the first barrier layer may be removed by using hydrofluoric acid.

[0059] A first oxidation treatment is performed to obtain a second barrier layer, a photoresist is disposed on the second barrier layer, and a second photolithography treatment is performed. A second concentration of boron ions is injected into the second single crystal silicon layer and the lightly doped layer to obtain a heavily doped layer, wherein the second concentration is greater than the first concentration, that is, the second concentration of boron ions is a high concentration of boron ions.

[0060] S22: Disposing a second silicon oxide layer on the second single crystal silicon layer and the doping layer.

[0061] The doped layer includes a lightly doped layer and a heavily doped layer. When the second silicon oxide layer is provided, the photoresist removal process and the second annealing process are performed on the second single crystal silicon layer, the lightly doped layer and the heavily doped layer to obtain the second silicon oxide layer to form a sensitive resistor. The sensitive resistor formed at this time can be as follows Fig. 9 As shown, Fig. 9 yes Figure 8 A structural schematic diagram of an embodiment of a sensitive resistor formed in step S22 is shown.

[0062] S23: Disposing a welding layer on the second single crystal silicon layer and the doping layer and in the second silicon oxide layer.

[0063] The lead wire is formed on the formed sensitive resistor. Specifically, a photoresist is placed on the second silicon oxide layer, and a third photolithography process is performed. An etching process, such as a hydrofluoric acid wet etching process, is performed on the second silicon oxide layer to expose the second single crystal silicon layer and the heavily doped layer to obtain a lead wire hole.

[0064] The photoresist is removed from the second silicon oxide layer, and metal aluminum and silicon are sputtered in the lead holes to obtain a metal layer. Photoresist is placed on the second silicon oxide layer, and a fourth photolithography process is performed to etch the metal layer to remove the metal aluminum outside the lead holes, thereby obtaining a welding layer.

[0065] S24: A mass block, a first etching groove, a second etching groove and an isolation groove are simultaneously arranged on a side of the second single crystal silicon layer close to the first silicon oxide layer, the mass block is formed between the first etching groove and the second etching groove, and the isolation groove is arranged on a side of the second etching groove away from the mass block.

[0066] This step S24 is used to make a mass block, and an isolation groove is formed while making the mass block. Specifically, a photoresist is disposed on the side of the first single crystal silicon layer away from the first silicon oxide layer, and a fifth photolithography process is performed. A deep reactive ion etching is performed on the side of the first single crystal silicon layer away from the first silicon oxide layer to expose the first silicon oxide layer. The first silicon oxide layer is subjected to reactive ion etching to expose the second single crystal silicon layer.

[0067] The photoresist is removed from the side of the second single crystal silicon layer away from the first silicon oxide layer to obtain a mass block, a first etching groove, a second etching groove, an isolation groove, a first cantilever beam, a second cantilever beam and a third cantilever beam. The mass block is formed between the first etching groove and the second etching groove. The isolation groove is set on the side of the second etching groove away from the mass block. The first cantilever beam and the second cantilever beam are formed on both sides of the mass block. The first cantilever beam matches the first etching groove, the second cantilever beam matches the second etching groove; and the third cantilever beam matches the isolation groove. The piezoresistive dual-axis motion sensor formed at this time can be referred to Figure 7 .

[0068] It should be noted that, in this embodiment, a sensitive resistor is formed on the first cantilever beam as an example for explanation, and in other embodiments, multiple sensitive resistors may be formed, and the multiple sensitive resistors may be distributed on the first cantilever beam and the second cantilever beam. For example, in this embodiment, 8 sensitive resistors may be formed, of which 4 sensitive resistors are arranged on the first cantilever beam, and the other 4 sensitive resistors are arranged on the second cantilever beam.

[0069] S25: Release the third cantilever beam.

[0070] In this step S25, the third cantilever beam is released to isolate the movable part of the piezoresistive dual-axis motion sensor. A photoresist is provided on the side of the second silicon oxide layer away from the second single-crystalline silicon layer; and a sixth photolithography process is performed. A reactive ion etching process is performed on the side of the second silicon oxide layer away from the second single-crystalline silicon layer to expose the second single-crystalline silicon layer. A reactive ion etching process is performed on the second single-crystalline silicon layer to release the third cantilever beam, thereby isolating the movable part of the piezoresistive dual-axis motion sensor.

[0071] S26: Bonding and packaging a first cover plate on a side of the first single crystal silicon layer away from the first silicon oxide layer.

[0072] Specifically, the first single crystal silicon wafer is used as the first cover plate, and a photoresist is set on one side of the first single crystal silicon wafer for the seventh photolithography process to obtain the first bonding portion and the second bonding portion; on the side of the first single crystal silicon layer away from the first silicon oxide layer, the first bonding portion and the second bonding portion are bonded and packaged with the first single crystal silicon layer. In this embodiment, an organic bonding with a smaller bonding ring width is adopted, and the bonding ring width is between 50um and 100um, such as 50um, 60um, 70um, 80um, and 100um, which greatly reduces the planar size of the chip compared to 150um to 250um of the ordinary bonding process, thereby reducing the cost.

[0073] S27: Bonding and encapsulating a second cover plate on a side of the second silicon oxide layer away from the second single crystal silicon layer.

[0074] The second single crystal silicon wafer is used as the second cover plate, and ethyl silicate is deposited on one side of the second single crystal silicon wafer; a photoresist is disposed on the ethyl silicate, and an eighth photolithography process is performed to expose part of the ethyl silicate.

[0075] The exposed part of the ethyl silicate is subjected to a first ethyl silicate etching process to expose the photoresist; the photoresist is removed and silicon etching is performed; a second ethyl silicate etching process is performed to obtain a welding window; spraying, exposure and development processes are performed to form a third bonding part and a fourth bonding part, wherein the third bonding part is adjacent to the welding window; the third bonding part and the fourth bonding part are bonded to the side of the second silicon oxide layer away from the second single crystal silicon layer, wherein the welding window is set corresponding to the welding layer. The piezoresistive dual-axis motion sensor formed at this time is as follows Fig.10 As shown, Fig.10 yes Figure 8 The schematic diagram of the structure of the piezoresistive dual-axis motion sensor formed in step S27 is shown, wherein the second cover plate 192 includes a welding window 1923 .

[0076] In this embodiment, organic bonding with a smaller bonding ring width is also used, and the bonding ring width is between 50um and 100um, for example, 50um, 60um, 70um, 80um, and 100um. Compared with the 150um to 250um of the ordinary bonding process, the planar size of the chip is greatly reduced, thereby reducing the cost.

[0077] After the step S27 is completed, the welding layer is not opened, so the following step S28 needs to be performed.

[0078] S28: performing a thinning process on the second cover plate and the first cover plate, wherein the second cover plate exposes a welding window.

[0079] In general processes, the soldering layer area must be opened by cutting, which is a complex process. In this case, the soldering pad area is passively opened by thinning, such as by grinding. In this embodiment, the second cover plate and the first cover plate are thinned, and the soldering layer is opened while the second cover plate is thinned, which simplifies the process flow. The piezoresistive dual-axis motion sensor formed at this time can be referred to Figure 1 .

[0080] It should be noted that, in the present embodiment, the specific processes used by the treatment methods with the same name may be the same, for example, the annealing treatment may be a nitrogen annealing treatment, and the photoresist removal treatment may be an ashing process.

[0081] The present application provides a method for manufacturing a piezoresistive dual-axis motion sensor, wherein the piezoresistive dual-axis motion sensor comprises an SOI silicon wafer, wherein the SOI silicon wafer comprises a first single crystal silicon layer, a first silicon oxide layer, and a second single crystal silicon layer, wherein the first silicon oxide layer is arranged between the first single crystal silicon layer and the second single crystal silicon layer; the method comprises: arranging a doping layer on a side of the second single crystal silicon layer away from the first silicon oxide layer; arranging a second silicon oxide layer on the second single crystal silicon layer and the doping layer; arranging a welding layer on the second single crystal silicon layer and the doping layer and in the second silicon oxide layer; and simultaneously arranging a mass block, a first etching groove, a second etching groove, and an isolation groove on a side of the first single crystal silicon layer close to the first silicon oxide layer, wherein the mass block is formed between the first etching groove and the second etching groove, and the isolation groove is arranged on a side of the second etching groove away from the mass block. By using organic photoresist bonding, the photoresist serves as both a structural layer and a sacrificial layer. After the photoresist in the unnecessary area is exposed and cleaned, it is directly bonded to the upper first cover plate, which simplifies the process flow and thus improves product yield and production efficiency. When opening a window in the pad area, the required area is directly opened by thinning. When making the mass block and the isolation groove at the same time, the isolation design is realized, and the movable part of the piezoresistive dual-axis motion sensor is isolated, which can reduce the residual stress and temperature coefficient caused by the package.

[0082] The above are only implementation methods of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A piezoresistive dual-axis motion sensor, characterized in that: The piezoresistive dual-axis motion sensor comprises: The SOI silicon wafer comprises a first single crystal silicon layer, a first silicon oxide layer and a second single crystal silicon layer, wherein the first silicon oxide layer is arranged between the first single crystal silicon layer and the second single crystal silicon layer; A first etching groove and a second etching groove are formed on a side of the second single crystal silicon layer close to the first silicon oxide layer; A mass block is formed on the second single crystal silicon layer and between the first etching groove and the second etching groove; a doping layer formed on a side of the second single crystal silicon layer away from the first silicon oxide layer; a second silicon oxide layer, formed on the second single crystal silicon layer and the doped layer; a welding layer formed on the second single crystal silicon layer and the doping layer, and formed in the second silicon oxide layer; An isolation groove is formed on a side of the second etched groove away from the mass block; wherein the isolation groove is formed simultaneously with the mass block, the first etched groove, and the second etched groove; The piezoresistive dual-axis motion sensor also includes: A first cantilever beam and a second cantilever beam are formed on both sides of the mass block, the first cantilever beam matches the first etched groove, and the second cantilever beam matches the second etched groove; the doping layer is also arranged on a side of the first cantilever beam away from the mass block; a first cover plate, wherein the first cover plate is bonded and packaged on a side of the first single crystal silicon layer away from the first silicon oxide layer; A second cover plate is bonded and packaged on a side of the second silicon oxide layer away from the second single crystal silicon layer; the welding layer is further exposed at one end of the second cover plate.

2. A method for manufacturing a piezoresistive dual-axis motion sensor, characterized in that: The piezoresistive dual-axis motion sensor comprises an SOI silicon wafer, wherein the SOI silicon wafer comprises a first single crystal silicon layer, a first silicon oxide layer, and a second single crystal silicon layer, wherein the first silicon oxide layer is disposed between the first single crystal silicon layer and the second single crystal silicon layer; and the method comprises: Disposing a doping layer on a side of the second single crystal silicon layer away from the first silicon oxide layer; Disposing a second silicon oxide layer on the second single crystal silicon layer and the doped layer; Disposing a welding layer on the second single crystal silicon layer and the doped layer and in the second silicon oxide layer; A mass block, a first etching groove, a second etching groove and an isolation groove are simultaneously arranged on a side of the second single crystal silicon layer close to the first silicon oxide layer, wherein the mass block is formed between the first etching groove and the second etching groove, and the isolation groove is arranged on a side of the second etching groove away from the mass block; The step of providing a doping layer on a side of the second single crystal silicon layer away from the first silicon oxide layer comprises: Performing thermal oxidation on the second single crystal silicon layer to obtain a first barrier layer; Disposing a photoresist on the first barrier layer and performing a first photolithography process; implanting boron ions of a first concentration into the second single crystal silicon layer to obtain a lightly doped layer; Performing a photoresist removal process and a first annealing process on the first barrier layer; removing the first barrier layer; Performing a first oxidation treatment to obtain a second barrier layer; Disposing a photoresist on the second barrier layer and performing a second photolithography process; Implanting boron ions of a second concentration into the second single crystal silicon layer and the lightly doped layer to obtain a heavily doped layer; the second concentration is greater than the first concentration; The step of providing a second silicon oxide layer on the second single crystal silicon layer and the doped layer comprises: Performing a photoresist removal process and a second annealing process on the second single crystal silicon layer, the lightly doped layer and the heavily doped layer to obtain the second silicon oxide layer to form a sensitive resistor; The step of providing a welding layer on the second single crystal silicon layer and the doped layer and in the second silicon oxide layer comprises: Disposing a photoresist on the second silicon oxide layer and performing a third photolithography process; Performing etching on the second silicon oxide layer to expose the second single crystal silicon layer and the heavily doped layer to obtain lead holes; performing a photoresist removal process on the second silicon oxide layer; sputtering metal aluminum and silicon in the lead hole to obtain a metal layer; Disposing a photoresist on the second silicon oxide layer and performing a fourth photolithography process; Etching the metal layer to obtain the welding layer; The step of simultaneously providing a mass block, a first etching groove and a second etching groove on a side of the second single crystal silicon layer close to the first silicon oxide layer, wherein the mass block is formed between the first etching groove and the second etching groove comprises: Disposing a photoresist on a side of the first single crystal silicon layer away from the first silicon oxide layer, and performing a fifth photolithography process; Performing deep reactive ion etching on a side of the first single crystal silicon layer away from the first silicon oxide layer to expose the first silicon oxide layer; Performing reactive ion etching on the first silicon oxide layer to expose the second single crystal silicon layer; Removing photoresist on a side of the first single crystal silicon layer away from the first silicon oxide layer to obtain a mass block, a first etching groove, a second etching groove, an isolation groove, a first cantilever beam, a second cantilever beam and a third cantilever beam, wherein the mass block is formed between the first etching groove and the second etching groove; The method further comprises: Bonding and packaging a first cover plate on a side of the first single crystal silicon layer away from the first silicon oxide layer; Bonding and packaging a second cover plate on a side of the second silicon oxide layer away from the second single crystal silicon layer; Before the step of bonding and packaging a first cover plate on a side of the first single crystal silicon layer away from the first silicon oxide layer, the step includes: Disposing a photoresist on a side of the second silicon oxide layer away from the second single crystal silicon layer, and performing a sixth photolithography process; Performing reactive ion etching on a side of the second silicon oxide layer facing away from the second single crystal silicon layer to expose the second single crystal silicon layer; Performing reactive ion etching on the second single crystal silicon layer to release the third cantilever beam; The step of bonding and packaging a first cover plate on a side of the first single crystal silicon layer away from the first silicon oxide layer comprises: Using a first single crystal silicon wafer as the first cover plate, disposing a photoresist on one side of the first single crystal silicon wafer and performing a seventh photolithography process to obtain a first bonding portion and a second bonding portion; On a side of the first single crystal silicon layer away from the first silicon oxide layer, bonding and packaging the first bonding portion and the second bonding portion with the first single crystal silicon layer; The step of bonding and packaging the second cover plate on the side of the second silicon oxide layer away from the second single crystal silicon layer comprises: Using a second single crystal silicon wafer as the second cover plate, and performing ethyl silicate deposition treatment on one side of the second single crystal silicon wafer; Disposing a photoresist on the ethyl silicate, and performing an eighth photolithography process to expose a portion of the ethyl silicate; Performing a first ethyl silicate etching treatment on the exposed portion of the ethyl silicate to expose the photoresist; removing the photoresist and performing silicon etching; Perform a second ethyl silicate etching process to obtain a welding window; Performing glue spraying, exposure and development processes to form a third bonding portion and a fourth bonding portion, wherein the third bonding portion is adjacent to the welding window; Bonding the third bonding portion and the fourth bonding portion to a side of the second silicon oxide layer away from the second single crystal silicon layer, wherein the welding window is provided corresponding to the welding layer; After the step of bonding and packaging a second cover plate on a side of the second silicon oxide layer away from the second single crystal silicon layer, the step further includes: The second cover plate and the first cover plate are thinned, wherein the second cover plate exposes the welding window.

Citation Information

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