Display Devices
By setting electrically connected crack detection lines in the non-display area of the display device, the crack problems that may occur during the cutting and bending of the display device panel are solved, effectively detecting cracks and preventing moisture from penetrating, and improving the reliability of the equipment.
Patent Information
- Application Number
- CN201910022793.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-01-10
- Filing Date
- 2019-01-10
- Publication Date
- 2025-04-04
- Estimated Expiration
- 2039-01-10
AI Technical Summary
Existing display equipment may have cracks around the panel during cutting the mother substrate, and the substrate may break when bending, causing moisture to penetrate, affecting the reliability and operation of the equipment.
A display device is designed, including a substrate, a plurality of pixels, a data line, a first crack detection line and a second crack detection line. These detection lines are arranged in non-display areas and are electrically connected to data lines for detecting cracks on the substrate.
By detecting the resistance changes of the detection line, cracks in the display device panel can be effectively identified to prevent moisture from penetrating, thereby improving the reliability of the equipment and extending its service life.
Smart Images

Figure CN110021641B_ABST
Abstract
Description
Technical Field
[0001] Exemplary embodiments of the present invention relate to a display device, and more particularly, exemplary embodiments of the present invention relate to a display device capable of detecting a crack in a panel of the display device. Background Art
[0002] Portable electronic devices (such as mobile phones, navigation devices, digital cameras, e-books, portable game consoles, or various types of terminals) generally use liquid crystal displays (LCDs) or organic light emitting diode (OLED) displays. Display devices used in portable electronic devices have been developed to be flexible to improve the portability of the display devices.
[0003] Generally, a panel of a display device is formed on a mother substrate, and the mother substrate is scribed to be divided into a plurality of panels. However, in the process of cutting the mother substrate, the periphery of the panel may be cracked. Therefore, a method for detecting cracks in a panel of a display device is needed.
[0004] In addition, a flexible display device can be realized by manufacturing a flat display device (or a flat panel display device) and then bending it. In this case, when the flat panel display is being bent, the substrate of the flat panel display may be broken. When a small-sized crack (or a small-sized crack) appears in the substrate, the crack may not be detected in the early stages of manufacturing, and the crack may not significantly affect the operation of the display device. However, as the size of the crack increases over time, moisture may be infiltrated into the interior of the display device through the portion where the crack appears. When moisture is infiltrated into the display device, the reliability of the device may decrease and may also affect the operation of the display device.
[0005] The above information disclosed in this Background section is only for understanding the background of the present inventive concept and therefore it may contain information that does not constitute prior art. Summary of the invention
[0006] An apparatus constructed according to an exemplary embodiment of the present invention is capable of detecting cracks in a panel of a display apparatus.
[0007] Additional features of the present inventive concept will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the present inventive concept.
[0008] A display device according to an exemplary embodiment includes: a substrate including a display area and a non-display area outside the display area; a plurality of pixels arranged in the display area on the substrate; a plurality of data lines connected to the pixels; a first crack detection line arranged in the non-display area on the substrate, the first crack detection line being electrically connected to at least one of the plurality of data lines; and a second crack detection line arranged in the non-display area outside the first crack detection line, the second crack detection line being electrically connected to at least one of the plurality of data lines.
[0009] A first distance between the first crack detection line and the display area may be smaller than a second distance between the second crack detection line and the display area.
[0010] The first crack detection line and the second crack detection line may substantially surround at least three sides of the display area.
[0011] The length of the second crack detection line may be greater than the length of the first crack detection line.
[0012] The first crack detection line and the second crack detection line may be provided on the same layer.
[0013] The first crack detection line and the second crack detection line may be disposed at different layers from each other.
[0014] Each of the plurality of pixels may include: a transistor including a semiconductor layer, a gate insulating layer, a gate electrode, and an insulating interlayer sequentially disposed on a substrate; and a capacitor including a lower electrode disposed on the same layer as the gate electrode and an upper electrode disposed on the insulating interlayer.
[0015] The first crack detection line and the second crack detection line may be disposed on the same layer as one of the gate electrode and the upper electrode.
[0016] The first crack detection line may be disposed on the same layer as one of the gate electrode and the upper electrode, and the second crack detection line may be disposed on the same layer as the other of the gate electrode and the upper electrode.
[0017] The data line may include a first data line electrically connected to a first pixel among the plurality of pixels and the first crack detection line; and a second data line electrically connected to a second pixel among the plurality of pixels and the second crack detection line.
[0018] The first pixel and the second pixel may emit light of different colors from each other.
[0019] The first pixel may emit one of red and blue, and the second pixel may emit the other of red and blue.
[0020] The display device may further include a matching resistor disposed in the non-display area, the matching resistor being electrically connected to a third data line adjacent to the first data line or the second data line.
[0021] The first crack detection line, the second crack detection line, and the matching resistor may be configured to be applied with voltages having the same magnitude.
[0022] The resistance of the matching resistor may be greater than the resistance of the first crack detection line and the resistance of the second crack detection line.
[0023] The display device may further include: a first matching resistor disposed in the non-display area, the first matching resistor being electrically connected to a third data line adjacent to the first data line; and a second matching resistor disposed in the non-display area, the second matching resistor being electrically connected to a fourth data line adjacent to the second data line.
[0024] The resistance of the first matching resistor may be greater than the resistance of the first crack detection line, and the resistance of the second matching resistor may be greater than the resistance of the second crack detection line.
[0025] The resistance of the second matching resistor may be greater than the resistance of the first matching resistor.
[0026] The display device may further include a first switching element connecting the first data line to the first crack detection line and a second switching element connecting the second data line to the second crack detection line.
[0027] At least one of the first crack detection line and the second crack detection line may form a closed loop along a plurality of side surfaces of the non-display area.
[0028] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept.
[0030] Figure 1 is a plan view of a display apparatus according to an exemplary embodiment.
[0031] Figure 2 It is cut along line I-I' and line II-II' Figure 1 A cross-sectional view of a display device.
[0032] Figure 3 yes Figure 1 Layout diagram of the display device.
[0033] Figure 4 Is shown driving Figure 3 A diagram of a method of displaying a device.
[0034] Figure 5 is a plan view of a display device according to another exemplary embodiment.
[0035] Figure 6 Cut along line III-III' and line IV-IV' Figure 5 A cross-sectional view of a display device.
[0036] Figure 7 is a layout diagram of a display device according to still another exemplary embodiment.
[0037] Figure 8 Is shown driving Figure 7 A diagram of a method of displaying a device. DETAILED DESCRIPTION
[0038] In the following description, for the purpose of explanation, many specific details are set forth in order to provide a thorough understanding of various exemplary embodiments or implementations of the present invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of devices or methods using one or more of the present inventions disclosed herein. However, it is apparent that various exemplary embodiments may be practiced without these specific details or using one or more equivalent arrangements. In other cases, known structures and devices are shown in block diagram form to avoid unnecessary obscurity of various exemplary embodiments. In addition, various exemplary embodiments may be different, but not necessarily exclusive. For example, without departing from the present invention, the specific shape, configuration and characteristics of the exemplary embodiment may be used or implemented in another exemplary embodiment.
[0039] Unless otherwise specified, the exemplary embodiments shown should be understood as providing exemplary features of different details of some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter individually or collectively referred to as "elements") of various embodiments may be combined, separated, interchanged and / or rearranged in other ways without departing from the inventive concept.
[0040] The use of cross hatching and / or shading in the drawings is generally provided to make the boundaries between adjacent elements clear. Therefore, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for a particular material, material properties, size, ratio, commonality between illustrated elements, and / or any other features, attributes, characteristics, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the exemplary embodiments can be implemented differently, a specific processing sequence may be performed differently from the described sequence. For example, two consecutively described processes may be performed substantially simultaneously or in an order opposite to the described sequence. Moreover, similar reference numerals represent similar elements.
[0041] When an element such as a layer is referred to as being "on", "connected to" or "coupled to" another element or layer, the element may be directly on, directly connected to or directly coupled to another element or layer, or there may be an intermediate element or layer. However, when an element or layer is referred to as being "directly on", "directly connected to" or "directly coupled to" another element or layer, there are no intermediate elements or layers. For this reason, the term "connection" may refer to physical, electrical and / or fluid connections, with or without intermediate elements. In addition, the D1 axis, the D2 axis, and the D3 axis are not limited to the three axes of a rectangular coordinate system, such as the x-axis, the y-axis, and the z-axis, and may be interpreted in a broader sense. For example, the D1 axis, the D2 axis, and the D3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0042] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element.
[0043] Spatially relative terms, such as "under," "beneath," "below," "down," "above," "upper," "above," "higher," "side" (e.g., as in "sidewall"), and the like, may be used herein for descriptive purposes, and thereby to describe the relationship of one element to another or other elements shown in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, elements described as "under" or "beneath" other elements or features would be oriented "above" the other elements or features. Thus, the exemplary term "under" may encompass both above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and thus, the spatially relative descriptors used herein are interpreted accordingly.
[0044] The terms used herein are for the purpose of describing a particular embodiment and are not intended to be restrictive. As used herein, the singular "one" and "the" are also intended to include plural forms, unless the context clearly indicates otherwise. In addition, the terms "include" and / or "comprise" specify the existence of the features, integers, steps, operations, elements, components and / or their groups when used in this specification, but do not exclude the existence or addition of one or more other features, integers, steps, operations, elements, components and / or their groups. It should also be noted that, as used herein, the terms "substantially", "approximately" and other similar terms are used as approximate terms rather than terms of degree, and are therefore used to explain the measured values, calculated values and / or the inherent deviation of the provided values that those of ordinary skill in the art will recognize.
[0045] Various exemplary embodiments are described herein with reference to cross-sections and / or exploded illustrations, which are schematic illustrations of idealized exemplary embodiments and / or intermediate structures. Therefore, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, the exemplary embodiments disclosed herein are not necessarily to be construed as limited to the shapes of the regions shown specifically, but rather include shape deviations due to, for example, manufacturing. In this way, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and are therefore not necessarily intended to be restrictive.
[0046] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.
[0047] Figure 1 is a plan view of a display apparatus according to an exemplary embodiment.
[0048] refer to Figure 1 , a display device 100 according to an exemplary embodiment may include a substrate 110, a plurality of pixels PX, a first crack detection line CD1, and a second crack detection line CD2.
[0049] The substrate 110 may include a display area DA and a non-display area NDA. An image may be displayed at the display area DA. The display area DA may be disposed at the center of the substrate 110. For example, the display area DA may have a substantially rectangular shape in a plan view. The non-display area NDA may be disposed outside the display area DA. For example, the non-display area NDA may substantially surround the side of the display area DA.
[0050] The pixels PX may be disposed in the display area DA of the substrate 110. For example, the pixels PX may be arranged in a substantially matrix form. The display area DA may display an image by combining light emitted from the pixels PX.
[0051] The first crack detection line CD1 and the second crack detection line CD2 may be disposed in the non-display area NDA of the substrate 110. When the non-display area NDA is cracked, the first crack detection line CD1 and / or the second crack detection line CD2 may be damaged. The display device 100 according to the illustrated exemplary embodiment may determine whether a crack occurs by detecting damage in the first crack detection line CD1 and / or the second crack detection line CD2. The first crack detection line CD1 may be disposed outside the display area DA, and the second crack detection line CD2 may be disposed outside the first crack detection line CD1.
[0052] The first distance between the first crack detection line CD1 and the display area DA may be smaller than the second distance between the second crack detection line CD2 and the display area DA. For example, the first distance may be the distance from the side of the display area DA to the first crack detection line CD1, and the second distance may be the distance from the side of the display area DA to the second crack detection line CD2. Therefore, the first crack detection line CD1 may be disposed between the display area DA and the second crack detection line CD2. The display device 100 according to the illustrated exemplary embodiment may determine whether a crack occurs by detecting damage to the first crack detection line CD1 and / or the second crack detection line CD2, and may identify the relative position of the crack relative to the display area DA.
[0053] The first crack detection line CD1 and the second crack detection line CD2 may substantially surround at least three sides of the display area DA. In an exemplary embodiment, the display area DA may have an upper side, a lower side, a left side, and a right side. Figure 1As shown. The first crack detection line CD1 and the second crack detection line CD2 may substantially surround the top, left side, and right side of the display area DA. For example, the first crack detection line CD1 may extend from the lower right side of the non-display area NDA along the right side, top, and left side of the display area DA in a counterclockwise direction, and then may change direction and extend along the left side, top, and right side of the display area DA in a clockwise direction. In particular, the first crack detection line CD1 may form a closed loop along the side of the non-display area NDA. In addition, the second crack detection line CD2 may extend from the lower left side of the non-display area NDA along the left side, top, and right side of the display area DA in a clockwise direction, and then may change direction and extend along the right side, top, and left side of the display area DA in a counterclockwise direction. In particular, the second crack detection line CD2 may form a closed loop along the side of the non-display area NDA.
[0054] The length of the second crack detection line CD2 may be greater than the length of the first crack detection line CD1. As used herein, the length of each of the first crack detection line CD1 and the second crack detection line CD2 may be the length in a direction substantially parallel to the direction in which the first crack detection line CD1 and the second crack detection line CD2 are extended. The second crack detection line CD2 may be disposed outside the first crack detection line CD1, and the second crack detection line CD2 may surround the first crack detection line CD1 surrounding the display area DA. Therefore, the second crack detection line CD2 may be formed to be longer than the first crack detection line CD1. In addition, the width of the first crack detection line CD1 may be substantially the same as the width of the second crack detection line CD2. As used herein, the width of each of the first crack detection line CD1 and the second crack detection line CD2 may be the length in a direction perpendicular to the direction in which the first crack detection line CD1 and the second crack detection line CD2 are extended.
[0055] Figure 2 It is cut along line I-I' and line II-II' Figure 1 A cross-sectional view of a display device.
[0056] refer to Figure 2 , the display device 100 may include a substrate 110, a transistor TR, a capacitor CAP, and an organic light emitting element OLED. The substrate 110 may be formed of glass, quartz, plastic, or the like.
[0057] The buffer layer 115 may be disposed on the substrate 110. The buffer layer 115 may prevent impurities from penetrating through the substrate 110. In addition, the buffer layer 115 may provide a planarized surface thereon. Alternatively, according to an exemplary embodiment, the buffer layer 115 may be omitted.
[0058] The transistor TR may be disposed on the buffer layer 115 in the display area DA. The transistor TR may apply current to the organic light emitting element OLED. Figure 2 The transistor TR is shown to have a top gate structure, however, the inventive concept is not limited thereto and the display device 100 may include, for example, a transistor having a bottom gate structure. The transistor TR may include a semiconductor layer 120 , a gate electrode 131 , a source electrode 151 , and a drain electrode 152 .
[0059] The capacitor CAP may be disposed on the buffer layer 115 in the display area DA. The capacitor CAP may maintain a voltage of the transistor TR. The capacitor CAP may include a lower electrode 132 and an upper electrode 140.
[0060] The semiconductor layer 120 may be disposed on the buffer layer 115. The semiconductor layer 120 may include amorphous silicon, polycrystalline silicon, etc. Alternatively, the semiconductor layer 120 may include an oxide semiconductor.
[0061] A gate insulating layer 125 covering the semiconductor layer 120 may be disposed on the buffer layer 115. The gate insulating layer 125 may insulate the gate electrode 131 from the semiconductor layer 120. The gate insulating layer 125 may include silicon nitride (SiN x ), silicon oxide (SiO x )wait.
[0062] The gate electrode 131 and the lower electrode 132 may be disposed on the gate insulating layer 125. The gate electrode 131 may overlap the semiconductor layer 120. The lower electrode 132 may be spaced apart from the gate electrode 131. The gate electrode 131 and the lower electrode 132 may include gold (Au), silver (Ag), copper (Cu), nickel (Ni), platinum (Pt), palladium (Pa), aluminum (Al), molybdenum (Mo), or titanium (Ti).
[0063] In an exemplary embodiment, the gate electrode 131 and the lower electrode 132 may be formed on the same layer. The gate electrode 131 and the lower electrode 132 may include substantially the same material.
[0064] A first insulating interlayer 135 covering the gate electrode 131 and the lower electrode 132 may be disposed on the gate insulating layer 125. The first insulating interlayer 135 may insulate the upper electrode 140 from the lower electrode 132. The first insulating interlayer 135 may include silicon nitride (SiN x ), silicon oxide (SiO x )wait.
[0065] The upper electrode 140 may be disposed on the first insulating interlayer 135. The upper electrode 140 may overlap the lower electrode 132. The upper electrode 140 may include Au, Ag, Cu, Ni, Pt, Pa, Al, Mo, or Ti.
[0066] The second insulating interlayer 145 covering the upper electrode 140 may be disposed on the first insulating interlayer 135. The first insulating interlayer 135 and the second insulating interlayer 145 may insulate the source electrode 151 and the drain electrode 152 from the gate electrode 131. The second insulating interlayer 145 may include silicon nitride (SiN x ), silicon oxide (SiO x )wait.
[0067] The source electrode 151 and the drain electrode 152 may be disposed on the second insulating interlayer 145. The source electrode 151 and the drain electrode 152 may contact the semiconductor layer 120. For example, the source electrode 151 and the drain electrode 152 may contact the semiconductor layer 120 through contact holes formed in the gate insulating layer 125, the first insulating interlayer 135, and the second insulating interlayer 145, respectively. The source electrode 151 and the drain electrode 152 may include Au, Ag, Cu, Ni, Pt, Pa, Al, Mo, or Ti. For example, the source electrode 151 and the drain electrode 152 may have a multilayer structure such as Mo / Al / Mo or Ti / Al / Ti.
[0068] A planarization layer 155 covering the transistor TR may be disposed on the second insulating interlayer 145. The planarization layer 155 may provide a planarized surface thereon. The planarization layer 155 may include a photosensitive organic material such as a photoresist, a polyacrylate resin, a polyimide resin, a siloxane resin, an acrylic resin, an epoxy resin, etc.
[0069] The organic light emitting element OLED may be disposed on the planarization layer 155 in the display area DA. The organic light emitting element OLED may emit light based on current applied from the transistor TR. The organic light emitting element OLED may include a first electrode 160, an organic light emitting layer 170, and a second electrode 180.
[0070] The first electrode 160 may be disposed on the planarization layer 155 in the display area DA. The first electrode 160 may be patterned per pixel. The first electrode 160 may contact the drain electrode 152. For example, the first electrode 160 may contact the drain electrode 152 through a contact hole formed in the planarization layer 155. The first electrode 160 may be a reflective electrode. The first electrode 160 may include a reflective layer formed of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pa), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), etc., and a reflective layer formed of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ) is formed. For example, the first electrode 160 may have a multi-layer structure, such as ITO / Ag / ITO.
[0071] A pixel defining layer 165 covering the first electrode 160 may be disposed on the planarization layer 155. The pixel defining layer 165 may include an opening exposing a central portion of the first electrode 160 by covering an edge of the first electrode 160. The pixel defining layer 165 may include a photosensitive organic material such as a photoresist, a polyacrylate resin, a polyimide resin, a siloxane resin, an acrylic resin, an epoxy resin, and the like.
[0072] The organic light emitting layer 170 may be disposed on the first electrode 160. The organic light emitting layer 170 may be disposed within the opening of the pixel defining layer 165.
[0073] The second electrode 180 may be disposed on the organic light emitting layer 170. The second electrode 180 may be provided commonly for the pixel. The second electrode 180 may be a transmissive electrode. For example, the second electrode 180 may be formed of a metal, a metal mixture, a metal nitride, a conductive metal oxide, a transparent conductive material, etc.
[0074] The first crack detection line CD1 and the second crack detection line CD2 may be disposed on the substrate 110 in the non-display area NDA. The first crack detection line CD1 may be disposed outside the display area DA, and the second crack detection line CD2 may be disposed outside the first crack detection line CD1.
[0075] The first crack detection line CD1 and the second crack detection line CD2 may be disposed on the same layer. In an exemplary embodiment, the first crack detection line CD1 and the second crack detection line CD2 may be disposed on the same layer as one of the gate electrode 131 of the transistor TR and the upper electrode 140 of the capacitor CAP. Figure 2 As shown, the first crack detection line CD1 and the second crack detection line CD2 may be disposed on the same layer as the upper electrode 140 disposed on the first insulating interlayer 135. However, the inventive concept is not limited thereto, and the first crack detection line CD1 and the second crack detection line CD2 may be disposed on the same layer as the gate electrode 131 disposed on the gate insulating layer 125.
[0076] Figure 3 yes Figure 1 Layout diagram of the display device.
[0077] refer to Figure 3 , the display device 100 may include a pixel PX, a plurality of data lines DT, a driver DVR, a first crack detection line CD1, a second crack detection line CD2, a matching resistor MR, an external circuit EC, and a switching element SW.
[0078] The pixels PX may include a plurality of red pixels R, a plurality of green pixels G, and a plurality of blue pixels B. The red pixels R, the green pixels G, and the blue pixels B may emit red light, green light, and blue light, respectively. Figure 3 It is shown that the pixels PX are arranged in a stripe form, in which red pixels R, green pixels G, and blue pixels B are sequentially arranged in a row direction. However, the inventive concept is not limited thereto, and the pixels PX may be arranged in various forms.
[0079] The data lines DT may be connected to the pixels PX. The data lines DT may extend in the column direction and may be sequentially arranged in the row direction. Each of the data lines DT may be connected to a corresponding pixel PX. For example, each of the data lines DT may be connected to a corresponding pixel column including the pixel PX.
[0080] The data lines DT may include a first data line DT1 electrically connected to a pixel column including the first pixel PX1 , and a second data line DT2 electrically connected to a pixel column including the second pixel PX2 .
[0081] In an exemplary embodiment, the first pixel PX1 and the second pixel PX2 may emit light of different colors from each other. For example, the first pixel PX1 may emit one of red and blue, and the second pixel PX2 may emit the other of red and blue. Figure 3 It is shown that the first pixel PX1 and the second pixel PX2 are respectively a blue pixel B and a red pixel R. However, the inventive concept is not limited thereto, and the first pixel PX1 may be one of the red pixel R, the green pixel G, and the blue pixel B, and the second pixel PX2 may be another of the remaining red pixel R, the green pixel G, and the blue pixel B.
[0082] The data line DT may be connected to a driver DVR. The data line DT may transmit a data voltage received from the driver DVR to the pixel PX. The pixel PX may emit light based on the data voltage received from the data line DT. In an exemplary embodiment, the transistor included in the pixel PX may be a p-channel MOSFET (PMOS). In this case, when a data voltage having a smaller magnitude is applied to the pixel PX, the pixel PX may emit relatively bright light. In addition, when a data voltage having a larger magnitude is applied to the pixel PX, the pixel PX may emit relatively dark light. However, the inventive concept is not limited thereto, and in another exemplary embodiment, the transistor included in the pixel PX may be an n-channel MOSFET (NMOS).
[0083] The first crack detection line CD1 may be electrically connected to one of the data lines DT. For example, the first crack detection line CD1 may be electrically connected to the first data line DT1 of the data lines DT. The first crack detection line CD1 may be electrically connected to the first data line DT1 through the second connection portion C1b. For example, the first crack detection line CD1 may extend from the first connection portion C1a along the non-display area NDA adjacent to the edge of the display area DA in the first direction R1, the second direction R2 perpendicular to the first direction R1, and the third direction R3 opposite to the first direction R1, and then may change direction and extend in the first direction R1, the fourth direction R4 opposite to the second direction R2, and the third direction R3, thereby being electrically connected to the first data line DT1 through the second connection portion C1b.
[0084] The second crack detection line CD2 may be electrically connected to one of the data lines DT. For example, the second crack detection line CD2 may be electrically connected to the second data line DT2 of the data lines DT. The second crack detection line CD2 may be electrically connected to the second data line DT2 through the fourth connection portion C2b. For example, the second crack detection line CD2 may extend from the third connection portion C2a along the non-display area NDA adjacent to the edge of the display area DA in the first direction R1, the fourth direction R4, and the third direction R3, and then may change direction and extend in the first direction R1, the second direction R2, and the third direction R3, thereby being electrically connected to the second data line DT2 through the fourth connection portion C2b.
[0085] The matching resistor MR may be disposed in the non-display area NDA. One end of the matching resistor MR may be electrically connected to a third data line DT3 adjacent to the first data line DT1 or the second data line DT2 among the data lines DT. For example, the third data line DT3 may be a remaining data line other than the first data line DT1 and the second data line DT2. The matching resistor MR may compensate for a resistance difference between the first data line DT1 and the second data line DT2 connected to the first crack detection line CD1 and the second crack detection line CD2, respectively, and the third data line DT3 not connected to the first crack detection line CD1 and the second crack detection line CD2. Therefore, the resistance of the matching resistor MR may be determined in consideration of the resistance of the first crack detection line CD1 and the resistance of the second crack detection line CD2.
[0086] The first crack detection line CD1, the second crack detection line CD2, and the matching resistor MR may be electrically connected to the external circuit EC. The first crack detection line CD1 may be electrically connected to the external circuit EC through the first connection portion C1a, and the second crack detection line CD2 may be electrically connected to the external circuit EC through the third connection portion C2a. In addition, the other end of the matching resistor MR may be electrically connected to the external circuit EC. The data line DT may transmit a test voltage received from the external circuit EC to the pixel PX through the first crack detection line CD1, the second crack detection line CD2, and the matching resistor MR. The pixel PX may emit light based on the test voltage received from the data line DT.
[0087] The switch element SW may selectively connect the data line DT to the first crack detection line CD1, the second crack detection line CD2, and the matching resistor MR. The switch element SW may include a first switch element SW1 connecting the first data line DT1 to the first crack detection line CD1, and a second switch element SW2 connecting the second data line DT2 to the second crack detection line CD2.
[0088] In the following, reference will be made to Figure 4 A method of driving a display device according to an exemplary embodiment is described.
[0089] Figure 4 Is shown driving Figure 3 A diagram of a method of displaying a device.
[0090] refer to Figure 4 , first, the driver DVR may be deactivated. In this case, the data voltage may not be applied from the driver DVR to the data line DT.
[0091] Then, it may be determined whether a crack occurs in the non-display area NDA. More specifically, the data line DT may be connected to the first crack detection line CD1, the second crack detection line CD2, and the matching resistor MR by turning on the switching element SW. Then, a test voltage V0 may be applied from the external circuit EC to the first crack detection line CD1, the second crack detection line CD2, and the matching resistor MR. Here, the test voltage V0 applied to the first crack detection line CD1, the second crack detection line CD2, and the matching resistor MR may have the same voltage magnitude.
[0092] The test voltage V0 transmitted through the first crack detection line CD1 may drop through the resistance of the first crack detection line CD1, and the first test voltage V1 having a magnitude smaller than the test voltage V0 may be applied to the first data line DT1. The test voltage V0 transmitted through the second crack detection line CD2 may drop through the resistance of the second crack detection line CD2, and the second test voltage V2 having a magnitude smaller than the test voltage V0 may be applied to the second data line DT2. In addition, the test voltage V0 transmitted through the matching resistor MR may drop through the resistance of the matching resistor MR, and the third test voltage V3 having a magnitude smaller than the test voltage V0 may be applied to the third data line DT3.
[0093] If the first crack detection line CD1 and the second crack detection line CD2 are not cracked, the resistance of the matching resistor MR may be greater than the resistance of the first crack detection line CD1 and the resistance of the second crack detection line CD2. In this case, the third test voltage V3 may have a magnitude smaller than the magnitudes of the first test voltage V1 and the second test voltage V2. For example, when a test voltage V0 having a magnitude of about 10V is applied from the external circuit EC, each of the first test voltage V1 and the second test voltage V2 may have a magnitude of about 8V, and the third test voltage V3 may have a magnitude of about 7.5V. Therefore, a voltage having a magnitude greater than that of the third data line DT3 may be applied to the first data line DT1 and the second data line DT2, and the first pixel PX1 and the second pixel PX2 may emit darker light than those pixels PX in other pixel columns.
[0094] If the first crack detection line CD1 and the second crack detection line CD2 are broken, the resistance of the first crack detection line CD1 and the second crack detection line CD2 may increase, and the resistance of the matching resistor MR may be smaller than the resistance of the first crack detection line CD1 and the resistance of the second crack detection line CD2. In this case, the magnitude of the third test voltage V3 may be greater than the magnitudes of the first test voltage V1 and the second test voltage V2. For example, when a test voltage V0 having a magnitude of about 10V is applied from the external circuit EC, each of the first test voltage V1 and the second test voltage V2 may have a magnitude of about 6V, and the third test voltage V3 may have a magnitude of about 7.5V. Therefore, a voltage having a magnitude smaller than that of the third data line DT3 may be applied to the first data line DT1 and the second data line DT2, and the first pixel PX1 and the second pixel PX2 may emit brighter light than those pixels PX in other pixel columns.
[0095] When the first crack detection line CD1 is broken, the first pixel PX1 may emit brighter light than those pixels PX in other pixel columns. Therefore, when the pixel column including the first pixel PX1 emits brighter light than other pixel columns in response to the test voltage V0 applied from the external circuit EC, it may be determined that a crack occurs inside the non-display area NDA. For example, when a blue bright line is observed when the external circuit EC applies the test voltage V0, it may be determined that a crack occurs inside the non-display area NDA.
[0096] When the second crack detection line CD2 is broken, the second pixel PX2 may emit brighter light than those pixels PX in other pixel columns. Therefore, when the pixel column including the second pixel PX2 emits brighter light than other pixel columns in response to the test voltage V0 applied from the external circuit EC, it may be determined that a crack occurs outside the non-display area NDA. For example, when a red bright line is observed when the external circuit EC applies the test voltage V0, it may be determined that a crack occurs outside the non-display area NDA.
[0097] The display device 100 according to an exemplary embodiment may include a first crack detection line CD1 and a second crack detection line CD2 disposed outside the first crack detection line CD1, thereby determining whether a crack occurs and identifying a relative position of the crack with respect to the display area DA.
[0098] The influence on the pixel PX arranged in the display area DA may be different according to the distance from the display area DA to the position where the crack occurs. For example, the influence of the crack occurring inside the non-display area NDA on the pixel PX may be greater than the influence of the crack occurring outside the non-display area NDA on the pixel PX. In the display device 100 according to the illustrated exemplary embodiment, the relative position of the crack to the display area DA and whether the crack occurs may be determined, so that the yield of the display device may be improved.
[0099] In the following, reference will be made to Figure 5 and Figure 6 Elements of a display device according to another exemplary embodiment are described.
[0100] Figure 5 is a plan view of a display device according to another exemplary embodiment. Figure 6 Cut along line III-III' and line IV-IV' Figure 5 A cross-sectional view of a display device.
[0101] refer to Figure 5 and Figure 6According to another exemplary embodiment, a display device 200 may include a substrate 210, a plurality of pixels PX, a first crack detection line CD1, and a second crack detection line CD2. Each of the pixels PX may include a transistor TR, a capacitor CAP, and an organic light emitting element OLED. The display device 200 may include Figure 1 and Figure 2 The elements of the display device 100 are shown to be substantially the same elements, and thus, a detailed description of the substantially the same elements will be omitted to avoid redundancy.
[0102] The first crack detection line CD1 and the second crack detection line CD2 may be disposed in the non-display area NDA of the substrate 210. The first crack detection line CD1 may be disposed outside the display area DA, and the second crack detection line CD2 may be disposed outside the first crack detection line CD1.
[0103] The first crack detection line CD1 and the second crack detection line CD2 may be disposed on different layers from each other. In an exemplary embodiment, the first crack detection line CD1 may be disposed on the same layer as one of the gate electrode 231 of the transistor TR and the upper electrode 240 of the capacitor CAP, and the second crack detection line CD2 may be disposed on the same layer as the other of the gate electrode 231 of the transistor TR and the upper electrode 240 of the capacitor CAP. For example, Figure 6 As shown, the first crack detection line CD1 may be disposed on the same layer as the upper electrode 240 disposed on the first insulating interlayer 235, and the second crack detection line CD2 may be disposed on the same layer as the gate electrode 231 disposed on the gate insulating layer 225. However, the inventive concept is not limited thereto, and the first crack detection line CD1 may be disposed on the same layer as the gate electrode 231, and the second crack detection line CD2 may be disposed on the same layer as the upper electrode 240.
[0104] The display device 200 according to another exemplary embodiment may include a first crack detection line CD1 and a second crack detection line CD2 disposed outside the first crack detection line CD1, and the first crack detection line CD1 and the second crack detection line CD2 may be disposed on different layers from each other. Therefore, it is possible to determine whether a crack occurs, a relative position of the crack to the display area DA, and a relative position of a layer where the crack occurs to the substrate 210.
[0105] In the following, reference will be made to Figure 7 Elements of a display device according to still another exemplary embodiment are described.
[0106] Figure 7 is a plan view showing a display device according to still another exemplary embodiment.
[0107] refer to Figure 7According to yet another exemplary embodiment, a display device 300 may include a pixel PX, a plurality of data lines DT, a driver DVR, a first crack detection line CD1, a second crack detection line CD2, a first matching resistor MR1, a second matching resistor MR2, an external circuit EC, and a switching element SW. The display device 300 may include Figure 3 The elements of the display device 100 are shown to be substantially the same elements, and thus, a detailed description of the substantially the same elements will be omitted to avoid redundancy.
[0108] The first matching resistor MR1 and the second matching resistor MR2 may be disposed in the non-display area NDA. One end of the first matching resistor MR1 may be electrically connected to the third data line DT3 adjacent to the first data line DT1 among the data lines DT, and one end of the second matching resistor MR2 may be electrically connected to the fourth data line DT4 adjacent to the second data line DT2 among the data lines DT. For example, the third data line DT3 and the fourth data line DT4 may be the remaining data lines except the first data line DT1 and the second data line DT2. The number of the third data lines DT3 and the number of the fourth data lines DT4 may be substantially the same. The first matching resistor MR1 may compensate for the resistance difference between the first data line DT1 connected to the first crack detection line CD1 and the third data line DT3 not connected to the first crack detection line CD1. In addition, the second matching resistor MR2 may compensate for the resistance difference between the second data line DT2 connected to the second crack detection line CD2 and the fourth data line DT4 not connected to the second crack detection line CD2. Therefore, the resistance of the first matching resistor MR1 and the resistance of the second matching resistor MR2 may be determined in consideration of the resistance of the first crack detection line CD1 and the resistance of the second crack detection line CD2, respectively.
[0109] The first crack detection line CD1, the second crack detection line CD2, the first matching resistor MR1, and the second matching resistor MR2 may be electrically connected to the external circuit EC. The other end of the first matching resistor MR1 and the other end of the second matching resistor MR2 may be electrically connected to the external circuit EC. The data line DT may transmit a test voltage received from the external circuit EC to the pixel PX through the first crack detection line CD1, the second crack detection line CD2, the first matching resistor MR1, and the second matching resistor MR2. The pixel PX may emit light based on the test voltage received from the data line DT.
[0110] The switch element SW may selectively connect the data line DT to the first crack detection line CD1 , the second crack detection line CD2 , the first matching resistor MR1 , and the second matching resistor MR2 .
[0111] In the following, reference will be made to Figure 8 A method of driving a display device according to still another exemplary embodiment is described.
[0112] Figure 8 Is shown driving Figure 7 A diagram of a method of displaying a device.
[0113] refer to Figure 8 , first, the driver DVR may be deactivated. In this case, the data voltage may not be applied from the driver DVR to the data line DT.
[0114] Then, it may be determined whether a crack occurs in the non-display area NDA. More specifically, the data line DT may be connected to the first crack detection line CD1, the second crack detection line CD2, the first matching resistor MR1, and the second matching resistor MR2 by turning on the switching element SW. Then, a test voltage V0 may be applied from the external circuit EC to the first crack detection line CD1, the second crack detection line CD2, the first matching resistor MR1, and the second matching resistor MR2. Here, the test voltage V0 applied to the first crack detection line CD1, the second crack detection line CD2, the first matching resistor MR1, and the second matching resistor MR2 may have the same voltage magnitude.
[0115] The test voltage V0 transmitted through the first crack detection line CD1 may drop through the resistance of the first crack detection line CD1, and the first test voltage V1 having a magnitude smaller than the test voltage V0 may be applied to the first data line DT1. The test voltage V0 transmitted through the second crack detection line CD2 may drop through the resistance of the second crack detection line CD2, and the second test voltage V2 having a magnitude smaller than the test voltage V0 may be applied to the second data line DT2. In addition, the test voltage V0 transmitted through the first matching resistor MR1 may drop through the resistance of the first matching resistor MR1, and the third test voltage V3 having a magnitude smaller than the test voltage V0 may be applied to the third data line DT3. The test voltage V0 transmitted through the second matching resistor MR2 may drop through the resistance of the second matching resistor MR2, and the fourth test voltage V4 having a magnitude smaller than the test voltage V0 may be applied to the fourth data line DT4.
[0116] If the first crack detection line CD1 and the second crack detection line CD2 are not broken, the resistance of the first matching resistor MR1 may be greater than the resistance of the first crack detection line CD1, and the resistance of the second matching resistor MR2 may be greater than the resistance of the second crack detection line CD2. In this case, the third test voltage V3 may have a magnitude smaller than that of the first test voltage V1, and the fourth test voltage V4 may have a magnitude smaller than that of the second test voltage V2. Therefore, voltages having magnitudes greater than those of the third data line DT3 and the fourth data line DT4 may be applied to the first data line DT1 and the second data line DT2, respectively, and the first pixel PX1 and the second pixel PX2 may emit darker light than those pixels PX in other pixel columns.
[0117] If the first crack detection line CD1 and the second crack detection line CD2 are broken, the resistance of the first crack detection line CD1 and the second crack detection line CD2 may increase. In this way, the resistance of the first matching resistor MR1 may be smaller than the resistance of the first crack detection line CD1, and the resistance of the second matching resistor MR2 may be smaller than the resistance of the second crack detection line CD2. In this case, the magnitude of the third test voltage V3 may be greater than the magnitude of the first test voltage V1, and the magnitude of the fourth test voltage V4 may be greater than the magnitude of the second test voltage V2. Therefore, voltages having magnitudes smaller than the voltages of the third data line DT3 and the fourth data line DT4 may be applied to the first data line DT1 and the second data line DT2, respectively. In this way, the first pixel PX1 and the second pixel PX2 may emit brighter light than those pixels PX in other pixel columns.
[0118] In an exemplary embodiment, the resistance of the second matching resistor MR2 may be greater than the resistance of the first matching resistor MR1. When the first crack detection line CD1 and the second crack detection line CD2 are not cracked, the resistance of the first matching resistor MR1 may be greater than the resistance of the first crack detection line CD1, and the resistance of the second matching resistor MR2 may be greater than the resistance of the second crack detection line CD2. In addition, since the length of the second crack detection line CD2 may be greater than the length of the first crack detection line CD1, the resistance of the second crack detection line CD2 may be greater than the resistance of the first crack detection line CD1. Therefore, the resistance of the second matching resistor MR2 may be greater than the resistance of the first matching resistor MR1, the second matching resistor MR2 is connected to the fourth data line DT4 adjacent to the second data line DT2 connected to the second crack detection line CD2 having a larger length, and the first matching resistor MR1 is connected to the third data line DT3 adjacent to the first data line DT1 connected to the first crack detection line CD1 having a shorter length.
[0119] When the first crack detection line CD1 is broken, the first pixel PX1 may emit brighter light than those pixels PX in other pixel columns connected to the third data line DT3. Therefore, when the pixel column including the first pixel PX1 emits brighter light than other pixel columns connected to the third data line DT3 in response to the test voltage V0 applied from the external circuit EC, it may be determined that a crack occurs inside the non-display area NDA. For example, when a blue bright line is observed in response to the test voltage V0 applied from the external circuit EC, it may be determined that a crack occurs inside the non-display area NDA.
[0120] When the second crack detection line CD2 is broken, the second pixel PX2 may emit brighter light than those pixels PX in other pixel columns connected to the fourth data line DT4. Therefore, when the pixel column including the second pixel PX2 emits brighter light than other pixel columns connected to the fourth data line DT4 in response to the test voltage V0 applied from the external circuit EC, it may be determined that a crack occurs outside the non-display area NDA. For example, when a red bright line is observed in response to the test voltage V0 applied from the external circuit EC, it may be determined that a crack occurs outside the non-display area NDA.
[0121] The display device according to an exemplary embodiment of the present invention may be applied to display devices included in computers, notebook computers, mobile phones, smart phones, smart tablets, PMPs, PDAs, MP3 players, and the like.
[0122] A display device according to an exemplary embodiment may include a first crack detection line disposed in a non-display area and a second crack detection line disposed outside the first crack detection line. Therefore, it is possible to determine whether a crack occurs in the display device and identify a relative position of the crack.
[0123] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but rather to the broader scope of the appended claims and to various obvious modifications and equivalent arrangements apparent to those of ordinary skill in the art.
Claims
1. A display device, comprising: A substrate, comprising a display area and a non-display area outside the display area; A plurality of pixels are arranged in the display area on the substrate; A plurality of data lines connected to the pixels; a first crack detection line disposed in the non-display area on the substrate, the first crack detection line being electrically connected to at least one data line among the plurality of data lines; and a second crack detection line disposed in the non-display area and surrounding at least a portion of the first crack detection line, the second crack detection line being electrically connected to at least one data line among the plurality of data lines; The first crack detection line and the second crack detection line each completely surround at least three sides of the display area. 2 . The display device according to claim 1 , wherein the second crack detection line is outside the first crack detection line. 3 . The display device according to claim 1 , wherein the first crack detection line and the second crack detection line are provided at different layers from each other.
4. The display device according to claim 1, wherein each pixel of the plurality of pixels comprises: A transistor comprising a semiconductor layer, a gate insulating layer, a gate electrode and an insulating interlayer sequentially disposed on the substrate; and a capacitor including a lower electrode disposed on the same layer as the gate electrode and an upper electrode disposed on the insulating interlayer, and The first crack detection line and the second crack detection line are both disposed on the same layer as one of the gate electrode and the upper electrode.
5. The display device according to claim 1, wherein the data line comprises: a first data line electrically connected to a first pixel among the plurality of pixels and the first crack detection line; and A second data line is electrically connected to a second pixel among the plurality of pixels and the second crack detection line. 6 . The display device according to claim 5 , wherein the first pixel and the second pixel emit light of different colors from each other.
7. The display device according to claim 5, further comprising a matching resistor disposed in the non-display area, The matching resistor is electrically connected to a third data line adjacent to the first data line or the second data line. 8 . The display device of claim 7 , wherein a resistance of the matching resistor is greater than a resistance of the first crack detection line and a resistance of the second crack detection line.
9. The display device according to claim 5, further comprising: a first matching resistor disposed in the non-display area, wherein the first matching resistor is electrically connected to a third data line adjacent to the first data line; and a second matching resistor disposed in the non-display area, the second matching resistor being electrically connected to a fourth data line adjacent to the second data line, in: The resistance of the first matching resistor is greater than the resistance of the first crack detection line; and The resistance of the second matching resistor is greater than the resistance of the second crack detection line.
Citation Information
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