Method for operating a voltage-controlled oscillator, voltage-controlled oscillator and integrated circuit

Abstract

A method of operating a voltage controlled oscillator (VCO) having a VCO core coupled to a filter current source, a VCO and an integrated circuit are disclosed. The method includes: setting an oscillation frequency of the VCO core based on a tuning signal received at a tuning signal input terminal; and using a tuning circuit having an input terminal directly connected to the tuning signal input terminal, setting a resonant frequency of the filter current source based on the received tuning signal.

Description

Technical Field

[0001] The present invention relates generally to electronic devices and, in particular embodiments, to systems and methods for voltage controlled oscillators (VCOs). Background Art

[0002] Applications in the millimeter wave frequency domain have attracted great interest in the past few years due to the rapid development of low-cost semiconductor technologies such as silicon germanium (SiGe) and fine geometry complementary metal oxide semiconductor (CMOS) processes. The availability of high-speed bipolar and metal oxide semiconductor (MOS) transistors has led to a growing demand for integrated circuits for millimeter wave applications at 60 GHz, 77 GHz, and 80 GHz and beyond 100 GHz. Such applications include, for example, motor vehicle radar and multi-gigabit communication systems.

[0003] In some radar systems, the distance between the radar and the target is determined by transmitting a frequency modulated signal, receiving reflections of the frequency modulated signal, and determining the distance based on a time delay and / or frequency difference between the transmission and reception of the frequency modulated signal. The resolution, accuracy, and sensitivity of the radar system may depend in part on the phase noise performance and frequency agility of the radar frequency generation circuit, which typically includes an RF oscillator and circuitry to control the frequency of the RF oscillator.

[0004] However, as the operating frequencies of RF systems continue to increase, generating signals at such high frequencies becomes a major challenge. Oscillators operating at high frequencies may suffer from poor phase noise performance caused by 1 / f and thermal noise in the device including the VCO. Summary of the invention

[0005] According to one embodiment, a method of operating a voltage controlled oscillator (VCO) having a VCO core coupled to a filtered current source includes: setting an oscillation frequency of the VCO core based on a tuning signal received at a tuning signal input terminal; and setting a resonant frequency of the filtered current source based on the received tuning signal using a tuning circuit having an input terminal directly connected to the tuning signal input terminal. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] For a more complete understanding of the present invention and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:

[0007] Figure 1A An example gesture recognition system is shown;

[0008] Figure 1B Shown by Figure 1A Example gestures that can be recognized by the gesture recognition system;

[0009] Figure 1C shows a block diagram of a gesture recognition system;

[0010] Figure 1D shows a top view of a circuit board including an antenna arrangement that can be used to implement a gesture recognition circuit according to an embodiment;

[0011] Figure 2A An example radar scenario involving large and small objects is shown;

[0012] Figure 2B Shown for Figure 2A a graph of received signal level versus received frequency for a scenario;

[0013] Figure 2C shows a graph of phase noise versus frequency for a typical RF VCO;

[0014] Figure 2D shows a schematic diagram of an exemplary VCO;

[0015] Figure 2E shows a waveform diagram demonstrating the effect of VCO frequency on the phase noise of an FMCW radar signal;

[0016] FIG. 3A to FIG. 3E shows a schematic diagram of a VCO according to an embodiment;

[0017] FIG. 4A to FIG. 4D shows a schematic diagram of a VCO according to another embodiment;

[0018] Figure 5A and Figure 5B shows a plan view of a transformer according to an embodiment;

[0019] Figure 5C shows a schematic diagram of a varactor diode according to an embodiment;

[0020] Fig. 6A A system for calibrating the phase noise of a VCO according to an embodiment is shown;

[0021] Figure 6B A block diagram showing a method for calibrating a VCO according to an embodiment;

[0022] Figure 7 A single-chip radar transmitter system utilizing a VCO according to an embodiment is shown; and

[0023] Figure 8 A block diagram of a method according to an embodiment of operating a VCO according to an embodiment is shown.

[0024] Corresponding numbers and symbols in the various drawings generally refer to corresponding parts unless otherwise indicated. The drawings are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale. To more clearly illustrate certain embodiments, letters indicating variations of the same structure, material, or process step may follow the figure number. DETAILED DESCRIPTION

[0025] The manufacture and use of the currently preferred embodiments are discussed in detail below. However, it should be understood that the present invention provides many applicable inventive concepts that can be implemented in a wide variety of specific contexts. The specific embodiments discussed only illustrate the specific ways to manufacture and use the present invention and do not limit the scope of the present invention.

[0026] The present invention will be described with reference to preferred embodiments in a specific context, systems and methods for voltage controlled oscillators. The present invention can be applied to various systems utilizing voltage controlled oscillators including radar systems, such as gesture recognition and automotive radar systems, wireless communication systems, and other types of RF systems.

[0027] In embodiments of the invention, the phase noise of an RF VCO is reduced by tuning a resonant filter of a bias circuit of the VCO to the second harmonic of the VCO frequency. Low phase noise is achieved over a wide tuning range by tuning the resonant filter of the bias circuit according to the same tuning signal used to tune the VCO frequency. For example, a VCO according to embodiments can be used in a FMCW radar system where the transmit frequency is rapidly swept over a wide frequency range. In some embodiments, the resonant filter of the bias circuit is tuned by adjusting the capacitance of a capacitor magnetically coupled to the bias path of the VCO.

[0028] Figure 1A An example gesture recognition application is shown in which various gestures are used to control a smart watch 100. As shown, the smart watch 100 includes a display element 102 that is physically coupled to a gesture recognition radar system 104. During operation, the gesture recognition radar system 104 transmits an RF signal 110 to a target 114, which may be a human hand, and receives a reflected RF signal 112 that is reflected by the target 114. These reflected RF signals 112 are processed by the gesture recognition system to determine the position and movement of the target 114 and / or to determine whether the target 114 is providing a specific gesture. In some embodiments, the gesture recognition radar system 104 may include a gesture recognition circuit 108 disposed within a housing 106. At least a portion of the housing 106 is transparent or partially transparent to the RF signals transmitted and received by the gesture recognition circuit 108. It should be understood that the gesture recognition circuit 108 may also be disposed within the body of the display element 102.

[0029] In alternative embodiments, the gesture recognition circuit 108 may be embedded in other devices, including but not limited to car keys, smart phones, tablet computers, audio / video equipment, kitchen appliances, HVAC controls, and motor vehicles. In some applications, such as motor vehicle applications, the gesture recognition circuit 108 may be embedded in a mobile device such as a car key or a smart phone, which in turn communicates with a remote device to be controlled, such as a motor vehicle or a kitchen appliance. Data transmission between the mobile device and the remote device may include any of a variety of communication technologies, including, for example, Bluetooth, V2X, etc.

[0030] For example, in Figure 1B 100. The example gestures shown in 100 may include a "thumbs-up" gesture 122, a "fist" gesture 124, a "thumb-to-finger" gesture 126, or a "button press" gesture 128. Each of these example gestures may be used to control a function of the smart watch 100 or some other device or system. For example, the "thumbs-up" gesture 122 may be used to open a smart watch application, the "fist" gesture 124 may be used to close a smart watch application, the "thumb-to-finger" gesture 126 combined with movement between the thumb and index finger may be used to virtually rotate the hands on the clock display of the smart watch 100, and the "button press" gesture 128 may be used to start and stop the stopwatch feature of the smart watch 100. In various embodiments, the recognized gestures may be static or dynamic. Static gestures may be made by holding the hand in a fixed position, such as gestures 122, 124, and 128, and dynamic gestures may be made by moving the hand or a portion of the hand, such as moving the index finger relative to the thumb, such as including gesture 126. It should be understood that the above-described gestures are merely a few examples of many possible gestures that may be recognized by a gesture recognition system according to embodiments.

[0031] Figure 1C 1 shows a block diagram of a gesture recognition system 130 including a radar front-end circuit 132 and a processing circuit 134. During operation, the position and posture of the target 114 can be detected by the gesture recognition system 130. For example, a gesture of tapping two fingers against each other can be interpreted as "pressing a button", or a gesture of rotating a thumb and finger can be interpreted as turning a dial. Figure 1C114, but the gesture recognition system 130 can also be configured to determine the posture and position of other types of targets such as humans, machines, and other types of animate or inanimate objects. For example, the gesture recognition system 130 can be implemented using a two-dimensional millimeter wave phased array radar that measures the position and relative velocity of the target 114. The millimeter wave phased array radar transmits and receives signals in the range of 57 GHz to 64 GHz. Alternatively, frequencies outside this range can also be used. In some embodiments, the radar front end circuit 132 operates as a frequency modulated continuous wave (FMCW) radar sensor with multiple transmit and receive channels. Alternatively, other types of radar systems such as pulse modulation radar systems can be used to implement the radar front end circuit 132.

[0032] The radar front end circuit 132 transmits and receives radio signals for detecting the target 114 in the three-dimensional space. For example, the radar front end circuit 132 transmits an incident RF signal and receives an RF signal that is a reflection of the incident RF signal from the target 114. The received reflected RF signal is down-converted by the radar front end circuit 132 to determine a beat frequency signal. These beat frequency signals can be used to determine information such as the position, velocity, angle, etc. of the target 114 in the three-dimensional space.

[0033] In various embodiments, radar front end circuit 132 is configured to transmit incident RF signals toward target 114 via transmit antenna 142 and receive reflected RF signals from target 114 via receive antenna 144. Radar front end circuit 132 includes transmitter front end circuit TX 138 coupled to transmit antenna 142 and receiver front end circuit RX 140 coupled to receive antenna 144.

[0034] During operation, the transmitter front end circuit 138 may transmit RF signals toward the target 114 one at a time or simultaneously. Figure 1C 1 , two transmitter front end circuits 138 are depicted, but it should be understood that the radar front end circuit 132 may include fewer than or more than two transmitter front end circuits 138. Each transmitter front end circuit 138 includes circuitry configured to generate an incident RF signal. Such circuitry may include, for example, RF oscillators, up-conversion mixers, RF amplifiers, variable gain amplifiers, filters, transformers, power dividers, and other types of circuitry.

[0035] Receiver front end circuit 140 receives and processes the reflected RF signal from target 114. Figure 1CAs shown, the receiver front end circuit 140 is configured to couple to four receive antennas 144 that may be configured as a 2×2 antenna array. In alternative embodiments, the receiver front end circuit 140 may be configured to couple to more or less than four antennas, resulting in an antenna array having various n×m dimensions depending on the particular embodiment and its specifications. The receiver front end circuit 140 may include, for example, RF oscillators, up-conversion mixers, RF amplifiers, variable gain amplifiers, filters, transformers, power combiners, and other types of circuits.

[0036] Radar circuitry 136 provides signals to be transmitted to transmitter front end circuitry 138, receives signals from receiver front end circuitry 140, and may be configured to control the operation of radar front end circuitry 132. In some embodiments, radar circuitry 136 includes, but is not limited to, frequency synthesis circuitry, up-conversion and down-conversion circuitry, variable gain amplifiers, analog-to-digital converters, digital-to-analog converters, digital signal processing circuitry for baseband signals, bias generation circuitry, and voltage regulators.

[0037] Radar circuit 136 can receive a baseband radar signal from processing circuit 134 and control the frequency of the RF oscillator based on the received baseband signal. In some embodiments, this received baseband signal can represent the FMCW frequency chip to be transmitted. Radar circuit 136 can adjust the frequency of the RF oscillator by applying a signal proportional to the received baseband signal to the frequency control input of the phase-locked loop. Alternatively, one or more mixers can be used to up-convert the baseband signal received from processing circuit 134. Radar circuit 136 can transmit and digitize baseband signals via a digital bus (e.g., a USB bus), transmit and receive analog signals via an analog signal path, and / or transmit and / or receive a combination of analog and digital signals to processing circuit 134.

[0038] Processing circuit 134 acquires the baseband signal provided by radar circuit 136 and performs one or more signal processing steps to evaluate the baseband signal. In an embodiment, processing circuit 134 acquires the baseband signal representing the beat frequency signal. The signal processing steps may include performing a fast Fourier transform (FFT), a short-time Fourier transform (STFT), target classification, machine learning, etc. The results of the signal processing steps are used to determine and perform such as Figure 1A In addition to processing the acquired baseband signals, the processing circuit 134 may also control various aspects of the radar front-end circuit 132, such as the transmissions generated by the radar front-end circuit 132.

[0039] The various components of gesture recognition system 130 may be distinguished in various ways. For example, radar front-end circuit 132 may be implemented on one or more RF integrated circuits (RFICs), antennas 142 and 144 may be disposed on a circuit board, and processing circuit 134 may be implemented using a processor, a microprocessor, a digital signal processor, and / or custom logic circuits disposed on one or more integrated circuits / semiconductor substrates. Processing circuit 134 may include a processor that executes instructions stored in a non-transitory memory to perform the functions of processing circuit 134. However, in some embodiments, all or part of the functions of processing circuit 134 may be incorporated on the same integrated circuit / semiconductor substrate on which radar front-end circuit 132 is disposed.

[0040] In some embodiments, some or all of the radar front-end circuit 132 may be implemented in a package that includes a transmit antenna 142, a receive antenna 144, a transmitter front-end circuit 138, a receiver front-end circuit 140, and / or a radar circuit 136. In some embodiments, the radar front-end circuit 132 may be implemented as one or more integrated circuits disposed on a circuit board, and the transmit antenna 142 and the receive antenna 144 may be implemented on a circuit board adjacent to the integrated circuit. In some embodiments, the transmitter front-end circuit 138, the receiver front-end circuit 140, and the radar circuit 136 are formed on the same radar front-end integrated circuit (IC) die. The transmit antenna 142 and the receive antenna 144 may be part of the radar front-end IC die, or may be separate antennas above or adjacent to the radar front-end IC die. The radar front-end IC die may also include a conductive layer, such as a redistribution layer (RDL), for routing and / or for implementing various passive or active devices of the radar front-end circuit 132. In an embodiment, the transmit antenna 142 and the receive antenna 144 may be implemented using the RDL of the radar front-end IC die.

[0041] Figure 1D A top view of gesture recognition circuit 108 is shown, which includes radar front-end circuit 132 implemented as an RFIC coupled to transmit antenna 142 and receive antenna 144, which are implemented as patch antennas disposed on or within substrate 152. In some embodiments, substrate 152 can be implemented using a circuit board, on which radar front-end circuit 132 is disposed, and transmit antenna 142 and receive antenna 144 are implemented on the circuit board using a conductive layer of the circuit board. Alternatively, substrate 152 represents a wafer substrate, on which one or more RDLs are disposed, and transmit antenna 142 and receive antenna 144 are implemented on the wafer substrate using a conductive layer on one or more RDLs. It should be understood that Figure 1DThe implementation of is only one of many ways in which a gesture recognition system according to an embodiment may be implemented.

[0042] Figure 2A An example radar scene 200 is shown in which a radar system 204 transmits and receives, for example, a frequency modulated continuous wave (FMCW) signal and detects reflections of the transmitted signal to determine the distance between the radar system 204 and other objects within range of the radar system 204. In the illustrated scene 200, a large object 206 is closer to the radar system 204 than a small object 208. The radar system 204 may represent, for example, a gesture recognition radar, in which case the large object 206 may represent a large portion of a user's hand that is directly adjacent to the radar system 204, while the small object 208 may represent the tip of the user's finger that is spaced farther from the radar system 204. In another example, the radar system 204 may represent a motor vehicle radar, in which case the large object 206 may represent a large vehicle such as a truck that is traveling near the radar system 204, while the small object 208 may represent a small vehicle such as a motorcycle that is traveling at a greater distance from the radar system 204 than the large object 206. Under normal operating conditions, the echo or reflection off large object 206 has a greater amplitude than the reflection off small object 208 because large object 206 is larger and closer to radar system 204 than small object 208 .

[0043] Figure 2B Shown for Figure 2A 2. A graph 220 of received signal level versus received frequency for a scene of FIG. 220. A graph 222 of signal level versus frequency corresponds to a reflection received from large object 206, and a frequency f1 of a signal level peak 230 corresponds to a distance between radar system 204 and large object 206. Similarly, a graph 226 of signal level versus frequency corresponds to a reflection received from small object 208, and a frequency f2 of a signal level peak 232 corresponds to a distance between radar system 204 and small object 208. Thus, the distance between large object 206 and small object 208 is proportional to the separation between frequencies f1 and f2.

[0044] Along with the desired output signal, the phase noise of the radar transmitter is also transmitted and reflected. The phase noise 224 reflected by the large object 206 is represented as a dashed line. As shown in the graph 220, the phase noise 224 affects the ability of the radar to receive the signal reflected by the small object 208. The signal-to-noise ratio between the signal level peak 232 caused by the small object 208 and the corresponding noise floor due to the phase noise reflected by the large object 206 is represented as length 234. Figure 2BAs can be seen from the graph of , phase noise affects the ability of radar system 204 to distinguish small and distant objects. The higher the phase noise of the radar transmitter, the less capable the radar system is of distinguishing small and distant objects.

[0045] One type of noise that can excite phase noise to degrade the ability of a radar system to detect closely spaced objects is device flicker noise. In fact, in radar-based sensor systems operating at very low intermediate frequencies (IF), the absolute value of the phase noise is often dominated by the flicker noise. The magnitude of the flicker noise often depends on the choice of technology. For example, MOS transistors can exhibit a higher flicker noise corner frequency (several MHz) compared to bipolar transistors (several kHz). As a result, CMOS millimeter-wave VCOs exhibit about 10 dB of flicker noise compared to bipolar implementations. Although the phase noise of the VCO can be reduced relative to the thermal noise base by increasing the voltage swing or providing a higher tank quality factor, flicker noise cannot be easily reduced.

[0046] LC tank-based VCOs are widely used in mmWave systems because of their much lower phase noise compared to ring VCO implementations. The portion of the phase noise “skirt” spectrum associated with thermal noise can be reduced by increasing the voltage swing or providing a higher tank quality factor. The portion associated with flicker noise cannot be easily reduced because it is highly technology dependent.

[0047] Figure 2C A graph of phase noise versus frequency offset from the carrier is shown, which shows how various noise sources contribute to the total phase noise of a typical RF VCO. As shown, for frequencies below the flicker noise corner frequency Δf 1 / Δf 3 The phase noise is approximately 1 / Δf 3 Therefore, at these low frequencies, the phase noise spectrum is dominated by the flicker noise. Above the flicker noise corner frequency Δf 1 / Δf 3 At frequencies where the phase noise is approximately 1 / Δf 2 is proportional to and is dominated by thermal noise. Ultimately, at higher frequencies, the noise of the RF VCO is dominated by the thermal noise of the amplifier that buffers the output of the RF VCO and appears flat over frequency.

[0048] Figure 2D FIG. 2 shows a schematic diagram of an exemplary VCO 250 including a VCO core 251 including cross-coupled transistors M1 and M2 and a tank circuit 252 including a tunable capacitor C1 and an inductor L1. As shown, the inductor L1 has a center tap connected to a power supply terminal V DDTo provide power to VCO 250. A bias current is provided to VCO core 251 via current source 256. During operation, transistors M1 and M2 provide energy to tank circuit 252, which causes tank circuit 252 to resonate and oscillate. The positive feedback caused by the cross-coupling of transistors M1 and M2 maintains the oscillation. The oscillation frequency f0 of VCO 250 is approximately:

[0049]

[0050] The oscillation frequency f0 of the VCO 250 can be tuned or adjusted by changing the capacitance of the capacitor C1.

[0051] The flicker noise related portion of the VCO phase noise "skirt" generated by VCO 250 includes noise contributed by directly coupling the flicker noise of the cross-coupled transistor pair M1 and M2 to the output. This noise is most dominant when transistors M1 and M2 conduct equal currents, which occurs at each zero crossing, which occurs every half cycle at twice the oscillation frequency 2f0. In addition, the switching of transistors M1 and M2 commutates the noise generated by current source 256, like a single balanced mixer. Thus, the noise generated by current source 256 at twice the oscillation frequency 2f0 is mixed with the fundamental f0 produced by VCO core 251 and converted directly to phase noise. Nonlinear tank capacitance (Groszkowski effect) and varactor AM-PM conversion also play a role in converting thermal and flicker noise to phase noise.

[0052] In an embodiment, the effect of the noise injected from the current source 256 can be reduced or minimized by implementing a noise filter 254 coupled between the VCO core 251 and the current source 256, the noise filter 254 having a resonance at the second harmonic 2f0 of the oscillation frequency of the VCO 250. The noise filter 254, also referred to as an "H2 filter", includes a parallel resonant LC circuit including an inductor L2 and a parallel combination of a capacitor C2 and a capacitor C par , capacitor C par represents the parasitic capacitance seen at the sources of transistors M1 and M2.

[0053] In various embodiments, when the resonant frequency of the noise filter 254 is changed to the second harmonic 2f0 of the oscillation frequency of the VCO 250, the VCO 250 achieves reduced phase noise. Figure 2D As shown in FIG, the noise filter 254 uses fixed components and is therefore only tunable to a single frequency. Therefore, the phase noise of the VCO 250 degrades as its operating frequency changes. This effect is Figure 2E, which shows the frequency 262 and phase noise 264 of the VCO with respect to time for a frequency "chirp" that may be used in an FMCW radar system. Its performance is shown in Figure 2E The VCO shown has a frequency tuned to f H2 The noise filter, as mentioned above Figure 2D As shown in the figure, the frequency 262 changes from f at time t0 to min Increase to f at time t2 min +BW. The corresponding phase noise 264 has a maximum PM at the edge of the frequency chirp. max , and has a minimum value PM in the middle of the frequency chirp at time t1 min , at this time the chirp frequency 262 is at f H2 / 2, which is the resonant frequency f of the noise filter H2 In a gesture recognition radar system, which may have a tuning range of, for example, 6 GHz, the effect of varying phase noise over frequency can be very significant.

[0054] In an embodiment of the present invention, the resonant frequencies of both the VCO tank and the noise filter are tuned to the operating frequency of the VCO. Figure 3A An example implementation VCO 300 is shown in FIG. 3 that includes a tunable filter current source 306 in addition to a tunable resonator 302 , such that during operation, both the tunable resonator 302 and the tunable filter 304 are tuned according to a VCO tuning signal Vmod.

[0055] As shown, VCO 300 includes a VCO core 301 having cross-coupled transistors M1 and M2 and a tunable resonator 302 having a variable capacitor C1 coupled in parallel with an inductor L1 to form a parallel resonant tank circuit. As shown, the center tap of inductor L1 is connected to a power supply node V DD , in order to provide power to VCO 300. A bias current is provided to VCO core 301 via current source 358, which includes a current mirror transistor M C1 and M C2 and current source 356. During operation, the current generated by current source 358 flows from diode-connected transistor M C1 Mirrored to transistor M C2 The resistor R and capacitor C form a filter to filter out the C2 and the low pass filter of the noise generated by the current source 356. Capacitor C tail Represents transistor M C2 The parasitic capacitance of the drain.

[0056] In various embodiments, the VCO 300 and other VCO structures disclosed herein can be implemented on a semiconductor substrate such as a silicon substrate, and can be implemented on the same semiconductor substrate as other RF circuits. For example, the VCO 300 and other VCO structures disclosed herein can be arranged on a semiconductor substrate such as a silicon substrate. Figure 1C and Figure 1D The radar front end circuit 132 is depicted on the same semiconductor substrate.

[0057] The tunable filter 304 includes a tunable resonant circuit implemented as an LC tank formed by a variable capacitor C2 coupled in parallel with an inductor L2. Alternatively, other types of tunable resonant circuits or resonators may be used to implement the tunable filter 304. In various embodiments, the capacitor C1 and inductor L1, the variable capacitors C1 and C2 of the tunable resonator 302 may be implemented using, for example, one or more varactor diodes, digitally selectable capacitors, other variable capacitance structures known in the art, or combinations thereof. In some embodiments, the variable capacitors C1 and C2 may be implemented using a semiconductor process using a MOM / MIM capacitor, a MOS capacitor, a pn junction capacitor, or a POLY-POLY capacitor, or other semiconductor-based capacitor structures known in the art. For example, the inductors L1 and L2 may be implemented using an on-chip spiral inductor, a transmission line element, or other inductor structures known in the art.

[0058] During operation, the tuning circuit 303 coupled to the VCO tuning signal Vmod provides a filtered current source tuning signal to the variable capacitor C2 of the tunable filter 304. Figure 3A , the tuning circuit 303 includes an amplifier 310 with a gain g1. In various embodiments, the values ​​of capacitor C2, inductor L2, gain g1, and bias conditions of amplifier 310 are adjusted so that the tunable filter 304 is tuned to the second harmonic of the oscillation frequency of VCO 300. Therefore, the resonant frequency of the LC tank circuit of the tunable filter 304 can be tuned to twice the resonant frequency of the tunable resonator 302. Therefore,

[0059]

[0060] Among them, f T2 is the resonant frequency of the tunable filter 304, f0 is the resonant frequency of the tunable resonator 302, and C par is the parasitic capacitance seen at the drain of transistors M1 and M2. In one embodiment for a gesture recognition system, f0 is about 60 GHz, f T2is about 120 GHz, and the sweep frequency range of f0 is between about 6 GHz and about 7 GHz. Alternatively, other frequencies and sweep frequency ranges may be used depending on the specific system and its specifications. For example, in a motor vehicle radar system, f0 is about 80 GHz, f T2 is about 160 GHz, and the sweep frequency range of f0 is between about 76 GHz and about 81 GHz.

[0061] The variable capacitor C1 may be implemented using, for example, one or more varactor diodes, digitally selectable capacitors, or other variable capacitance structures known in the art. As shown, the center tap of the inductor L1 is connected to the power supply node V DD , in order to provide power to VCO 300. Inductor L1 may be implemented using an on-chip spiral inductor, a transmission line element, or other inductor structures known in the art.

[0062] Figure 3B An embodiment VCO 320 is shown according to a digital tuning implementation. VCO 320 is similar to the above reference Figure 3A VCO 300 is described, except that the VCO tuning signal mod[k] is a k-bit digital signal representing the desired tuning frequency of VCO 320. As shown, tuning circuit 323 includes a digital multiplier 322 that scales the VCO tuning signal mod[k] by a factor g1 before being applied to variable capacitor C2 of tunable filter 304. Figure 3B In an embodiment, for example, a plurality of digitally selectable capacitors or a digitally selectable capacitor array may be used to implement the variable capacitor C1 of the tunable resonator 302 and the variable capacitor C2 of the tunable filter 304 .

[0063] Figure 3C FIG. 3 shows a VCO 330 according to an embodiment according to an alternative digital tuning implementation. The VCO 330 is similar to the VCO 330 described above with reference to FIG. Figure 3BThe VCO 320 described, in addition to the tuning circuit 333, also includes digital-to-analog converters (DACs) 332 and 334 in addition to the digital multiplier 322. The digital multiplier 322 multiplies the digital VCO tuning signal by a gain factor g1 before converting it to an analog signal via the DAC 334. As shown, the output of the DAC 332 is coupled to the variable capacitor C1 of the tunable resonator 302 and the output of the DAC 334 is coupled to the capacitor C2 of the tunable filter 304. Therefore, the variable capacitors C1 and C2 can be implemented using a variable capacitor structure, such as a varactor diode, which has a capacitance that changes according to an applied voltage. DAC 332 and DAC 334 can be implemented using DAC architectures known in the art, including but not limited to ΔΣ (delta-sigma) DACs and binary weighted DACs using switched resistors, switched current sources, or switched capacitors. In one embodiment, both DACs 332 and 334 have a 10-bit resolution. Alternatively, other resolutions can be used.

[0064] Figure 3D FIG. 3 shows a VCO 340 according to an embodiment according to an additional digital tuning implementation. The VCO 340 is similar to the VCO 340 described above with reference to FIG. Figure 3B The VCO 320 described above has summing circuits 342 and 344 added to the tuning circuit 343, which apply an offset value b1 to the tunable resonator 302 and an offset value b2 to the tunable filter 304, respectively. These offset values ​​combined with the gain g1 can be used to calibrate the VCO 340 so that the resonant frequency of the tunable filter 304 is tuned to the second harmonic of the resonant frequency of the tunable resonator 302. The summing circuits 342 and 344 can be implemented using digital summing circuits such as adders known in the art. As shown in the figure, the tuning circuit 343 applies a digital signal to the capacitors C1 and C2, so that the capacitors C1 and C2 can be implemented using digital programmable capacitor circuits. In an alternative embodiment, the tuning circuit 343 applies a digital signal to the capacitors C1 and C2, so that the capacitors C1 and C2 can be implemented using digital programmable capacitor circuits. Figure 3D In a similar manner to the embodiment of the present invention, a first DAC may be coupled between the output of the summing circuit 342 and the capacitor C1 and a second DAC may be coupled between the output of the summing circuit 344 and the capacitor C2 to implement control of a voltage (or current) controlled capacitor circuit.

[0065] Figure 3E A VCO 350 according to an embodiment is shown according to another analog tuning implementation. The VCO 350 is similar to the VCO 350 described above with reference to FIG. Figure 3AThe VCO 300 described above has summing circuits 352 and 354 added to the tuning circuit 353, which respectively apply the offset value b1 to the tunable resonator 302 and the offset value b2 to the tunable filter 304. For example, the summing circuits 352 and 354 can be implemented using summing circuits known in the art. In some embodiments, an OPAMP-based summing circuit and / or a current summing circuit can be used.

[0066] In some embodiments, the tunable current source filter can be implemented in such a way that the variable capacitor C2 is not directly connected to the bias path of the VCO. Figure 4A An example of such an implementation is shown in FIG. 4 , which shows a VCO 400 including a VCO core 301 having a tunable resonator 302 and cross-coupled transistors M1 and M2 as described above. A filter current source 402 provides bias current to the VCO core 301 and includes a tunable filter 404 and a current source 408. The current source 408 may be coupled to a VCO core 301 and may be coupled to a VCO core 301. Figure 3A The current source 358 shown in FIG. 1 may be implemented in a similar manner, or may be implemented using other current source circuits and systems known in the art.

[0067] The tuning circuit 401 provides a tuning signal to the tunable resonator 302 and the filter current source 402 based on an analog tuning signal Vmod or a digital tuning signal mod[k] connected to the tuning signal input of the tuning circuit 401. In some embodiments, the tuning signal Vmod or mod[k] is directly connected to the tuning circuit 401. In various embodiments, for example, using the above reference FIG. 3A to FIG. 3E The described tuning circuit 303 , 323 , 333 , 343 or 353 implements the tuning circuit 401 .

[0068] As shown, the tunable filter 404 includes a variable capacitor C2 coupled in parallel with a first winding 407 of a transformer 406. However, the variable capacitor C2 and the first winding 407 of the transformer 406 are not directly connected to the current source 408. Instead, these components are magnetically coupled to a second winding 409 of the transformer 406, which is connected between the current source 408 and the cross-coupled transistors M1 and M2. In some cases, the voltage across the tunable filter 404 can depend on the bias current, the VCO frequency, and the VCO amplitude, so that the voltage across the tunable filter 404 changes with operating conditions. In embodiments using varactor diodes, these changing operating conditions may cause the tuning characteristics of the resonant tank circuit placed directly in the bias current path of the VCO 400 to be non-linear. By magnetically coupling capacitor C2 and first winding 407 of transformer 406 to current source 408 and VCO core 301, the voltage across variable capacitor C2 can be kept relatively constant over the operating range of VCO 400, allowing a wider, more linear tuning range that is less dependent on operating conditions in some embodiments.

[0069] In an embodiment, the capacitance C seen at the second winding 409 of the transformer 406 second Transformed by the turns ratio n of transformer 406:

[0070] C second =C2n 2 .

[0071] Utilizing the transformer 406, the range of capacitance seen at the second winding 409 of the transformer 406 can be extended. For example, in one embodiment, a variable capacitor C2 having a capacitance range between 10 fF and 100 fF and a transformer 406 having a 2:1 turns ratio are used to produce a capacitance between about 40 fF and about 400 fF seen at the second winding 409 of the transformer 406. Alternatively, other capacitance ranges and turns ratios can be used depending on the particular embodiment and its specifications.

[0072] Figure 4B FIG. 4 shows a VCO 420 according to another embodiment of the present invention. The VCO 420 is similar to the VCO 420 described above with reference to FIG. Figure 4A The VCO 400 is described in which a buffer 428 is added that can be used to amplify the second harmonic 2f0 of the oscillation frequency of the VCO 420. As shown, the transformer 426 of the tunable filter 424 included in the filter current source 422 includes a third winding 411, which acts as a common mode sensor and allows the second harmonic 2f0 of the oscillation frequency of the VCO 420 to be buffered by the buffer 428. In various embodiments, the buffer 428 can be implemented using a high frequency VCO buffer circuit known in the art.

[0073] Figure 4C FIG. 4 shows a VCO 440 according to another embodiment of the present invention. The VCO 440 is similar to the VCO 440 described above with reference to FIG. Figure 4B The VCO 420 is depicted except that the tunable filter 444 of the filter current source 442 includes a resonant LC circuit coupled in series with the first winding 407 of the transformer 426. As shown, the LC circuit includes a tunable capacitor C2 coupled in parallel with the inductor L2. By using this structure, the frequency tuning range can be increased.

[0074] Figure 4D FIG. 4 shows a VCO 460 according to another embodiment of the present invention. VCO 460 is similar to the VCO 460 described above with reference to FIG. Figure 4A The VCO 400 is described except that the VCO core 461 uses cross-coupled bipolar transistors Q1 and Q2, such as heterojunction bipolar transistors (HBTs), instead of Figure 4A . It should be understood that the embodiments disclosed in other figures herein may also be implemented using transistors of other types in addition to NMOS or MOS transistors. For example, transistor types including but not limited to PMOS, HEMP and / or HBT devices may be used in all embodiments disclosed herein.

[0075] In some embodiments, FIG. 4A to FIG. 4D The transformers 406 and 426 shown in FIG. 4 can be implemented using symmetrical transformers, where the electrical characteristics of each winding are closely matched. Figure 5A The layout of the integrated symmetrical transformer 500 is shown, which can be used to implement transformers 406 and 426 with a 1:1 turns ratio. As shown, the transformer 500 includes a first winding 510 and a second winding 520 symmetrically adjacent to the first winding 510, and the first winding 510 and the second winding 520 are arranged on, for example, a substrate 517. In various embodiments, the first winding 510 and the second winding 520 have closely matched and / or identical geometries. The first winding 510 includes winding terminals 512 and 514 on one side of the first winding and a center tap terminal 516 on the other side of the first winding. Similarly, the second winding 520 includes winding terminals 522 and 524 on one side of the second winding and a center tap terminal 526 on the other side of the second winding. The two windings are arranged such that the center tap terminal 526 of the second winding is disposed between the winding terminals 512 and 514 of the first winding, and the center tap terminal 516 of the first winding is disposed between the winding terminals 522 and 524 of the second winding.

[0076] Each winding has a corresponding cross-under portion: the first winding crosses under the second winding via the lower cross-under portion 518 and the second winding crosses under the first winding via the lower cross-under portion 528, so that the main portion of the winding is on the first conductive layer and the lower cross-under portion is on the second conductive layer. Alternatively, the lower cross-under portions 518 and 528 may be upper cross-under portions. As shown, the lower cross-under portions 518 and 528 are symmetrically arranged relative to each other in the layout of transformers 406 and 426. These conductive layers may be metallization layers made of, for example, copper, aluminum or other conductive materials used in the manufacture of semiconductor circuits. Such metallization layers may be manufactured during the back-end of line (BEOL) process of the semiconductor circuit. Alternatively, the metallization layer may be manufactured on a redistribution layer RDL in the package after the integrated circuit is manufactured. The substrate 517 may be a semiconductor substrate such as a silicon substrate, or may be another type of substrate, including but not limited to an insulating substrate, a ceramic substrate or a molded substrate, depending on the specific manufacturing technology used. It should be understood that the symmetrical transformer 500 is only one example of many possible embodiments of a symmetrical transformer. In alternative embodiments of the present invention, it may be implemented with Figure 5A Symmetrical transformers of different shapes and sizes as shown in FIG.

[0077] Figure 5B The layout of an integrated symmetrical transformer 550 that can be used to implement transformers 406 and 426 with a 1:1 turns ratio is shown. As shown, transformer 550 includes a first winding connected between terminals 554 and 556, and a second winding connected between terminals 570 and 574. The first winding includes portions 552 and 560 implemented using a first conductive layer, and a second portion 562 implemented using a second conductive layer that crosses below the first portion 552 and connects the first portions 552 and 560. A center tap terminal 558 is disposed between terminals 554 and 556 and contacts portion 560 of the first winding.

[0078] Transformer 550 also includes a second winding having sections 576, 580, and 584 on the first conductive layer. Sections 576 and 584 are connected via section 582 on the third conductive layer and sections 576 and 580 are connected via section 578 on the second conductive layer. End terminals 570 and 574 of the second winding are connected to respective sections 576 and 584 via the third conductive layer, and center tap terminal 572 is connected to section 580 via the third conductive layer. Figure 5B As shown, the third conductive layer is below the second conductive layer and disposed above the substrate 517, and the second conductive layer is below the first conductive layer. In alternative embodiments of the present invention, the order of the first conductive layer, the second conductive layer, and the third conductive layer may be different. It should also be understood that Figure 5A and 5BTransformers 500 and 550 shown in FIG. 5 are two examples of many possible implementations of transformers that may be used with the embodiment VCOs disclosed herein.

[0079] Figure 5C An embodiment varactor circuit 590 is shown that can be used to implement a tunable capacitance such as variable capacitors C1 and C2 of various disclosed embodiment VCOs. As shown, the varactor circuit 590 includes a pair of varactor diodes D connected in series. V In various embodiments, the capacitance applied to the varactor diode D V The cathode voltage V tune To adjust the varactor diode D V The capacitance of tune Increase, varactor diode D V The capacitance of diode D V The decrease in capacitance leads to a corresponding increase in the resonant frequency of the VCO tank. tune Reduce, varactor diode D V The capacitance of diode D V The width of the depletion region of the junction decreases and increases. This increase in capacitance results in a corresponding decrease in the resonant frequency of the VCO tank circuit. In an alternative embodiment, the varactor diode D V The polarity of can be reversed so that the resonant frequency of the VCO tank decreases as the voltage increases.

[0080] Fig. 6A A system 600 for calibrating an RFIC 602 including a VCO 608 is shown in accordance with various embodiments disclosed herein. The RFIC also includes: a tuning circuit 606 in accordance with an embodiment, as described with reference to the embodiments described herein; and a digital controller that controls the oscillation frequency of the VCO 608 via a VCO control signal Vmod / Mod[k] and provides calibration values ​​g1, b1, and b2. The signal Vmod / Mod[k] can be a k-bit digital signal or an analog signal generated by a DAC within the digital controller 604. A memory 610 can be used to store the calibration values ​​g1, b1, and b2. An RF circuit 612 coupled to the VCO 608 can be configured to provide RF functionality such as a gesture recognition radar, a motor vehicle radar, or other RF functionality.

[0081] The digital controller 604 is coupled to the interface pins 620 and may include a digital interface through which external digital circuits may communicate with the RFIC 602. The digital interface may be a serial or parallel interface and may utilize a method such as I 2C, SPI or other protocols. The digital controller 604 can be implemented, for example, using a microcontroller, a microprocessor, programmable logic, custom logic, or any other type of logic known in the art that can implement the embodiment tuning and control method. In some embodiments, the digital controller 604 utilizes a processor that executes instructions that perform the embodiment tuning and control method.

[0082] The memory 610 can be used to store executable code for use by the digital controller 604, and can also be used to store calibration constants g1, b1, and b2. In some embodiments, the memory 610 includes a table of values ​​of g1, b1, and b2 that can be selected based on a particular value of the VCO control signal Vmod / Mod[k] applied to the VCO 608. For example, a lookup table can be used to implement this functionality.

[0083] In an embodiment, the test equipment 614 may be used to calibrate the phase noise performance of the VCO 608 by determining values ​​of g1, b1, and b2 that provide a low or minimal amount of phase noise generated by the VCO 608. For example, the test equipment may include a phase noise measurement device, such as a spectrum analyzer, that may be used to measure the phase noise generated by the VCO 608. During calibration, the test equipment 614 selects a value for the VCO tuning signal Vmod / Mod[k] and the calibration values ​​g1, b1, and b2 via the digital interface of the digital controller 604. For a given value of the VCO tuning signal Vmod / Mod[k], the test equipment determines a set of calibration values ​​g1, b1, and b2 that reduce or minimize the measured phase noise of the VCO 608. In an embodiment where g1 is the gain applied to the VCO tuning signal Vmod / Mod[k] before the tunable current source, b1 is the offset applied to the VCO tuning signal Vmod / Mod[k] before the tunable resonator of the VCO, and b2 is the offset applied before the tunable current source.

[0084] Figure 6B A block diagram of a method 650 for calibrating an embodiment VCO is shown. In step 652, the frequency of the VCO core is swept, and in step 654, the resonant frequency of the filter current source is swept. For example, the frequencies of the VCO core and the filter current source can be swept by sweeping applicable tuning voltages and / or applicable tuning settings associated with a particular VCO core or filter current source. Steps 652 and 654 can be performed sequentially and / or simultaneously. For example, in some embodiments, the frequency of the VCO core can remain stable as the frequency of the tunable current source is swept, while in other embodiments, the frequency of the tunable current source can remain stable as the frequency of the VCO tank is swept. During these sweeps, the test equipment 614 measures the phase noise of the VCO 608.

[0085] In step 656, a filter current source setting that provides a double frequency is determined for one or more VCO core frequency settings based on phase noise measurements made by the test equipment 614. In some embodiments, this is accomplished by finding the filter current source setting that corresponds to the minimum measured phase noise for each VCO core frequency setting. In step 658, calibration values ​​g1, b1, and b2 are determined by determining a fit using a polynomial function.

[0086] Figure 7 A single chip radar transmitter system 700 is shown, which includes an up-converter 702, a power amplifier 704, and a frequency generation circuit 706. As shown, the up-converter 702 up-converts the baseband signal BB to a higher frequency signal, which is then amplified by the power amplifier 704 and output on the pin OUT. In some embodiments, the baseband signal BB can be a swept frequency or other signal type used in a radar system. The frequency generation circuit 706 generates a local oscillator signal LO based on a reference frequency on the pin REF, which can be generated using, for example, a crystal oscillator. In an embodiment, the frequency generation circuit 706 is implemented using a phase-locked loop (PLL) having a phase detector 712, a loop filter 710, a VCO 708, and a frequency divider 714. The VCO 708 can be implemented using the embodiment VCO described herein. In some embodiments, the functions of the phase detector 712 and the loop filter 710 can be performed digitally using digital circuits and systems known in the art and performed using analog circuits. For example, custom digital logic, standard cell digital logic can be used to implement these functions, and / or these functions can be implemented with software running on a processor, microcontroller or digital signal processor. For example, such a processor may include a processor core, and a memory coupled to the processor core and one or more input / output ports. Alternatively, other circuits and systems known in the art can be used to implement these functions. It should be understood that system 700 is only one of many examples of implementation system that can utilize implementation oscillators. Alternative systems can include, for example, wireless and wired communication systems, and other systems using VCOs.

[0087] Figure 8 A block diagram of an embodiment VCO operating method 800 that may be applied to various embodiments VCOs described herein including a VCO core coupled to a filter current source is shown. For example, the operating method 800 may be applied to FIG. 3A to FIG. 3E and FIG. 4A to FIG. 4DEmbodiments of the VCO, and various systems utilizing the embodiment VCO disclosed herein. In step 802, the oscillation frequency of the VCO core is set according to a tuning signal received at a tuning signal input. In step 804, the resonant frequency of the filter current source is set based on the received tuning signal. In some embodiments, a tuning circuit is used to set the resonant frequency of the filter current source, and the tuning circuit includes an input directly connected to the tuning signal input. It should be understood that in some embodiments, steps 802 and 804 can be performed in a Figure 8 The order shown in the figure can be executed with Figure 8 Alternatively, steps 802 and 804 may be performed simultaneously.

[0088] Herein, exemplary embodiments of the present invention are summarized. Other embodiments may also be understood based on the entire content of this application.

[0089] Example 1: A method of operating a voltage controlled oscillator (VCO) having a VCO core coupled to a filtered current source, comprising: setting an oscillation frequency of the VCO core based on a tuning signal received at a tuning signal input terminal; and setting a resonant frequency of the filtered current source based on the received tuning signal using a tuning circuit having an input terminal directly connected to the tuning signal input terminal.

[0090] Example 2: The method of Example 1, wherein the filtering current source comprises a current source and a tunable filter coupled between the VCO core and the current source.

[0091] Example 3: The method of Example 2, wherein the tunable filter includes a parallel resonant LC circuit, and setting the resonant frequency of the filtering current source includes adjusting a capacitance of the parallel resonant LC circuit.

[0092] Example 4: A method according to Example 2, wherein: the tunable filter includes a variable capacitor and a transformer, the transformer having a first winding coupled to the variable capacitor and a second winding coupled to the VCO core; and setting the resonant frequency of the filter current source includes adjusting the capacitance of the variable capacitor.

[0093] Example 5: The method of Example 4, wherein the transformer is a symmetrical transformer.

[0094] Example 6: The method according to one of Examples 4 and 5, wherein the current source is coupled in series with the second winding.

[0095] Example 7: The method according to one of Examples 4 to 6, wherein the variable capacitor is coupled in parallel with the first winding.

[0096] Example 8: The method according to one of Examples 4 to 6, wherein the variable capacitor is coupled in parallel with the first inductor to form a first parallel circuit, and the first parallel circuit is coupled in series with the first winding.

[0097] Example 9: The method according to one of Examples 2 to 9, wherein setting the resonant frequency of the filtering current source includes multiplying the tuning signal by a first factor to form a first multiplied signal.

[0098] Example 10: The method of Example 9, wherein setting the resonant frequency of the filtering current source comprises amplifying a tuning signal and applying the amplified tuning signal to the tunable filter.

[0099] Example 11: The method of Example 10, wherein setting the resonant frequency of the filter current source further comprises adding a first offset to the first multiplied signal.

[0100] Example 12: The method of Example 11, wherein setting the oscillation frequency of the VCO core comprises adding a second offset to the tuning signal.

[0101] Example 13: A method according to one of Examples 1 to 12, wherein the tuning signal comprises a digital signal.

[0102] Example 14: The method of Example 13, wherein: setting the oscillation frequency of the VCO core comprises performing a first digital-to-analog conversion of a tuning signal; and setting the resonant frequency of the filter current source comprises performing a second digital-to-analog conversion of the tuning signal.

[0103] Example 15: The method of Example 14, wherein setting the resonant frequency of the filtering current source comprises multiplying the tuning signal by a first gain before performing the second digital-to-analog conversion.

[0104] Example 16: A method according to one of Examples 1 to 15, wherein the tuning signal includes a frequency chirp.

[0105] Example 17: The method according to one of Examples 1 to 16 further includes calibrating the VCO, wherein calibrating the VCO includes setting the oscillation frequency of the VCO core to multiple frequency settings; and determining multiple corresponding settings for a filtering current source corresponding to each of the multiple frequency settings, wherein each of the multiple corresponding settings for the filtering current source provides a resonant frequency that is twice the oscillation frequency of the VCO core, or provides minimum phase noise of the VCO.

[0106] Example 18: The method of Example 17, further comprising determining a set of calibration values ​​based on a plurality of frequency settings and a plurality of corresponding settings for a filtering current source, wherein the calibration values ​​represent adjustable circuit parameters of the VCO or the filtering current source.

[0107] Example 19: The method of Example 18, wherein determining a set of calibration values ​​comprises determining a fit using a polynomial function.

[0108] Example 20: A voltage-controlled oscillator (VCO) includes: a VCO core; a filtered current source coupled to the VCO core; and a tuning circuit directly connected to a tuning signal input, the tuning circuit being configured to set an oscillation frequency of the VCO core based on a tuning signal received at the tuning signal input, and to set a resonant frequency of the filtered current source based on the tuning signal.

[0109] Example 21: The VCO of Example 20, wherein the filtering current source comprises a first current source, and a tunable filter coupled between the VCO core and the first current source.

[0110] Example 22: The VCO of Example 21, wherein the tunable filter comprises a parallel resonant LC circuit, and the tuning circuit is configured to set the resonant frequency of the filtering current source by adjusting a capacitance of the parallel resonant LC circuit.

[0111] Example 23: A VCO according to Example 21, wherein: the tunable filter includes a variable capacitor, and a transformer having a first winding coupled to the variable capacitor and a second winding coupled to the VCO core; and the tuning circuit is configured to set the resonant frequency of the filter current source by adjusting the capacitance of the variable capacitor.

[0112] Example 24: A VCO according to Example 23, wherein the transformer is a symmetrical transformer.

[0113] Example 25: The VCO of one of Examples 21 to 24, wherein the first current source is coupled in series with the second winding.

[0114] Example 26: The VCO of Example 23, wherein the variable capacitor is coupled in parallel with the first winding.

[0115] Example 27: The VCO of Example 23, wherein the variable capacitor is coupled in parallel with the first inductor to form a first parallel circuit, and the first parallel circuit is coupled in series with the first winding.

[0116] Example 28: The VCO of one of Examples 20 to 27, wherein the tuning circuit includes a multiplier coupled between the tuning signal input and the filter current source.

[0117] Example 29: The VCO of Example 28, wherein the multiplier comprises an amplifier coupled between the tuning signal input and the filter current source.

[0118] Example 30: The VCO of one of Examples 28 or 29, further comprising a first summing circuit configured to add a first offset to the output of the multiplier.

[0119] Example 31 The VCO of Example 30, further comprising a second summing circuit configured to add a second offset to the tuning signal.

[0120] Example 32: A VCO according to one of Examples 20 to 31, wherein the tuning signal comprises a digital signal.

[0121] Example 33: The VCO according to Example 32 further includes: a first digital-to-analog converter coupled between the tuning signal input terminal and the VCO core; and a second digital-to-analog converter coupled between the tuning signal input terminal and the filter current source.

[0122] Example 34: The VCO of Example 33, further comprising a multiplier coupled between the tuning signal input and the input of the second digital-to-analog converter.

[0123] Example 35: An integrated circuit comprising: a semiconductor substrate; a voltage-controlled oscillator (VCO) core disposed on the semiconductor substrate, the VCO core comprising a first transistor, a second transistor, and a first tunable resonator coupled between the first transistor and the second transistor; a filter current source disposed on the semiconductor substrate, the filter current source comprising a tunable filter coupled to the first transistor and the second transistor of the VCO core and a current source coupled to the tunable filter, wherein the tunable filter comprises a resonant circuit; and a tuning circuit having a tuning input terminal, the tuning circuit being configured to provide a VCO tuning signal to the first tunable resonator based on a tuning signal at the tuning input terminal, and to provide a filter current source tuning signal to the tunable filter based on the tuning signal at the tuning input terminal.

[0124] Example 36: An integrated circuit according to Example 35, wherein: the tuning signal includes a digital signal; and the tuning circuit includes a first digital-to-analog converter coupled between the tuning input and the first tunable resonator, and a second digital-to-analog converter coupled between the tuning input and the tunable filter.

[0125] Example 37: The integrated circuit of Example 35, wherein the tuning circuit comprises an amplifier coupled between the tuning input and the tunable filter.

[0126] Example 38: The integrated circuit of one of Examples 35 to 37, wherein the first tunable resonator comprises a first varactor coupled to the first inductor.

[0127] Example 39: An integrated circuit according to one of Examples 35 to 38, wherein the tunable filter includes a second varactor and a transformer disposed on a semiconductor substrate, wherein the second varactor is coupled in parallel with a first winding of the transformer, and the second winding of the transformer has a first end coupled to a current source and a second end coupled to the first transistor and the second transistor.

[0128] Example 40: The integrated circuit of Example 39, wherein the transformer comprises a symmetrical transformer.

[0129] Example 41: An integrated circuit according to one of Examples 35 to 38, wherein the tunable filter includes: a varactor diode coupled in parallel with the inductor; and a transformer including a first winding and a second winding, the first winding being coupled in series with the LC tank circuit, the second winding having a first end coupled to a current source and a second end coupled to the first transistor and the second transistor.

[0130] Example 42: An integrated circuit according to one of Examples 35 to 41, wherein the first transistor and the second transistor are MOS transistors.

[0131] Example 43: An integrated circuit includes: a semiconductor substrate; a voltage-controlled oscillator (VCO) disposed on the semiconductor substrate, the VCO including a cross-coupled transistor pair, a first tunable resonator coupled to the cross-coupled transistor pair, a current source coupled to the cross-coupled transistor pair, and a second tunable resonator coupled between the cross-coupled transistor pair and the current source; and a tuning circuit including a tuning input terminal, a first tuning output terminal coupled to the first tuning input terminal of the first tunable resonator, and a second tuning output terminal coupled to the second tuning input terminal of the second tunable resonator.

[0132] Example 44: An integrated circuit according to Example 43, wherein the tuning input terminal is configured to receive a digital signal; and the tuning circuit includes a first digital-to-analog converter coupled between the tuning input terminal and the first tuning output terminal, and a second digital-to-analog converter coupled between the tuning input terminal and the second tuning output terminal.

[0133] Example 45: An integrated circuit according to one of Example 43 or Example 44, wherein the tuning circuit includes an amplifier coupled between a tuning input terminal and a second tuning output terminal; the first tunable resonator includes a first varactor coupled to a first inductor; and the second tunable resonator includes a second varactor and a transformer disposed on a semiconductor substrate, wherein the second varactor is coupled in parallel with a first winding of the transformer, and the second winding of the transformer has a first end coupled to a current source and a second end coupled to a cross-coupled transistor pair.

[0134] Example 46: An integrated circuit according to one of Examples 44 or 45, wherein the second tunable resonator includes: a varactor diode coupled in parallel with the inductor; and a transformer comprising a first winding and a second winding, the first winding being coupled in series with the LC tank circuit, the second winding having a first end coupled to the current source and a second end coupled to the cross-coupled transistor pair.

[0135] Advantages of various embodiments include the ability of a single RF VCO to generate a low phase noise signal over a wide range of output frequencies. Another advantage includes the ability to generate a swept VCO signal having low phase noise at a minimum output frequency and a maximum output frequency and a swept frequency between the minimum output frequency and the maximum output frequency.

[0136] Although the present invention has been described with reference to illustrative embodiments, the description is not intended to be interpreted in a limiting sense. Various modifications and combinations of the illustrative embodiments and other embodiments of the present invention will be apparent to those skilled in the art with reference to the specification. Therefore, the appended claims are intended to cover any such modifications or embodiments.

Claims

1. A method of operating a voltage controlled oscillator (VCO), the voltage controlled oscillator comprising a VCO core coupled to a filtered current source, wherein: The filter current source includes a current source and a tunable filter coupled between the VCO core and the current source, and the tunable filter includes an LC tank circuit and a transformer, the LC tank circuit includes an inductor and a varactor diode coupled in parallel with the inductor, the transformer includes a first winding and a second winding, the first winding is the inductor of the LC tank circuit or is coupled in series with the LC tank circuit, and the second winding has a first end coupled to the filter current source and a second end coupled to the VCO core, The method comprises: setting an oscillation frequency of the VCO core based on a tuning signal received at a tuning signal input; and The resonant frequency of the filtered current source is set based on the received tuning signal using a tuning circuit having an input directly connected to the tuning signal input.

2. The method according to claim 1, wherein: Setting the resonant frequency of the filter current source includes adjusting the capacitance of the LC tank circuit.

3. The method according to claim 1, wherein: Setting the resonant frequency of the filtering current source includes multiplying the tuning signal by a first factor to form a first multiplied signal.

4. The method according to claim 3, wherein: Setting the resonant frequency of the filtering current source includes amplifying the tuning signal and applying the amplified tuning signal to the tunable filter.

5. The method according to claim 3, wherein: Setting the resonant frequency of the filter current source further comprises adding a first offset to the first multiplied signal; and Setting the oscillation frequency of the VCO core includes adding a second offset to the tuning signal.

6. The method according to claim 1, wherein: The tuning signal comprises a frequency chirp.

7. The method of claim 1, further comprising calibrating the VCO, wherein: Calibrating the VCO involves: setting the oscillation frequency of the VCO core to a plurality of frequency settings; and A plurality of corresponding settings for the filtering current source corresponding to each of the plurality of frequency settings are determined, wherein each of the plurality of corresponding settings for the filtering current source provides a resonant frequency that is twice the oscillation frequency of the VCO core or provides a minimum phase noise of the VCO.

8. The method of claim 7, further comprising determining a set of calibration values ​​based on the plurality of frequency settings and the plurality of corresponding settings for the filtering current source, wherein: The calibration value represents an adjustable circuit parameter of the VCO or the filter current source.

9. A voltage controlled oscillator (VCO) comprising: VCO core; a filter current source coupled to the VCO core, wherein the filter current source comprises a first current source and a tunable filter coupled between the VCO core and the first current source, wherein the tunable filter comprises an LC tank circuit and a transformer, the LC tank circuit comprising an inductor and a varactor diode coupled in parallel with the inductor, the transformer comprising a first winding and a second winding, the first winding being the inductor of the LC tank circuit or coupled in series with the LC tank circuit, the second winding having a first end coupled to the filter current source and a second end coupled to the VCO core; and A tuning circuit directly connected to the tuning signal input, the tuning circuit being configured to: setting an oscillation frequency of the VCO core based on a tuning signal received at the tuning signal input, and A resonant frequency of the filtered current source is set based on the tuning signal.

10. The VCO of claim 9, wherein: The tuning circuit is configured to set a resonant frequency of the filtering current source by adjusting a capacitance of the LC tank.

11. The VCO of claim 9, wherein: The tuning circuit is configured to set a resonant frequency of the filtering current source by adjusting a capacitance of the varactor diode.

12. The VCO of claim 11, wherein: The first current source is coupled in series with the second winding.

13. The VCO of claim 11, wherein: The varactor diode is coupled in parallel with the first winding.

14. The VCO of claim 11, wherein: The varactor is coupled in parallel with a first inductor to form a first parallel circuit, and the first parallel circuit is coupled in series with the first winding.

15. The VCO of claim 9, wherein: The tuning circuit includes a multiplier coupled between the tuning signal input terminal and the filter current source; The multiplier includes an amplifier coupled between the tuning signal input and the filter current source; as well as The VCO further comprises: a first summing circuit configured to add a first offset to an output of the multiplier, and A second summing circuit is configured to add a second offset to the tuning signal.

16. The VCO of claim 9, further comprising: A first digital-to-analog converter coupled between the tuning signal input terminal and the VCO core; as well as A second digital-to-analog converter is coupled between the tuning signal input terminal and the filter current source, wherein the tuning signal comprises a digital signal.

17. An integrated circuit comprising: Semiconductor substrates; A voltage controlled oscillator VCO is arranged on the semiconductor substrate, the VCO comprises a VCO core and a filter current source, the VCO core comprises a cross-coupled transistor pair and a first tunable resonator coupled to the cross-coupled transistor pair, the filter current source comprises a first current source and a second tunable resonator coupled between the cross-coupled transistor pair and the first current source; as well as a tuning circuit comprising a tuning input, a first tuning output coupled to the first tuning input of the first tunable resonator, and a second tuning output coupled to the second tuning input of the second tunable resonator, Wherein, the second tunable resonator comprises: an LC tank circuit, the LC tank circuit comprising an inductor and a second varactor diode coupled in parallel with the inductor, and A transformer comprising a first winding which is an inductor of the LC tank or is coupled in series with the LC tank, and a second winding which has a first end coupled to the filter current source and a second end coupled to the cross-coupled transistor pair.

18. The integrated circuit of claim 17, wherein: The tuning input is configured to receive a digital signal; as well as The tuning circuit includes a first digital-to-analog converter coupled between the tuning input and the first tuning output, and a second digital-to-analog converter coupled between the tuning input and the second tuning output.

19. The integrated circuit of claim 17, wherein The tuning circuit includes an amplifier coupled between the tuning input and the second tuning output; The first tunable resonator includes a first varactor coupled to a first inductor; and The second varactor diode is coupled in parallel with the first winding of the transformer.

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