A current sampling circuit

Abstract

The present invention discloses a current sampling circuit, comprising an induction winding, a current outflow circuit, a mirror current source, and a sampling capacitor. The induction winding is coupled with an inductor or a flyback transformer in the circuit to generate an induced voltage. The current outflow circuit is connected to one end of the induction winding to convert the induced induced voltage into an induced current. The mirror current source mirrors the induced current and charges the sampling capacitor. The voltage generated by the sampling capacitor after charging is the current sampling signal output by the current sampling circuit. The current sampling circuit of the present invention is lossless current sampling, which improves the efficiency of the whole machine.

Description

Technical Field

[0001] The present invention relates to current sampling technology, and in particular to a lossless current sampling circuit. Background Art

[0002] In switching power supplies, many controllers use peak current control or protect the circuit through peak current, so it is necessary to sample the current in the inductor or MOS tube in the circuit. Common current sampling methods include: resistor sampling method and current transformer sampling method.

[0003] The resistance sampling method, such as Figure 1 As shown, a flyback conversion circuit needs to sample the current Id in the primary winding N1 of the isolation transformer T, and a sampling resistor Rcs is used to be connected in series at the current sampling point. The current Id at the sampling point flows through the sampling resistor Rcs, and a voltage Vcs is generated on the sampling resistor Rcs. This voltage Vcs is proportional to the actual current Id, Vcs=Id*Rcs. The voltage Vcs on the sampling resistor Rcs represents the signal of the actual current Id, and the amplitude is proportional to Id. The proportionality coefficient is the resistance value of the sampling resistor Rcs.

[0004] The disadvantage of the resistance sampling method is that it will cause losses, which will cause the efficiency of the whole machine to lose 0.3%-0.5%. The lost efficiency will not only be converted into heat and dissipated in the sampling resistor Rcs, but also cause the temperature of the surrounding environment and other devices to rise, which will have an adverse effect on the overall heat dissipation and temperature rise, and additional heat dissipation measures will be required.

[0005] Compared with the resistor sampling method, the loss of the current transformer sampling method is almost negligible, but the disadvantage of the current transformer sampling method is that the current transformer used requires a magnetic core, and two coils are wound on the magnetic core to complete the coupling of the sampling side and the power side. Generally, the size of this current transformer is relatively large, it takes up more volume, and the cost is much higher than the resistor sampling method. Summary of the invention

[0006] The present invention provides a lossless current sampling circuit, which uses an induction winding to sense the current in the circuit, reduces the loss of the circuit compared with a resistor sampling method, and reduces the cost of the circuit compared with a transformer sampling method. The lossless current sampling circuit of the present invention makes the circuit more efficient.

[0007] A current sampling circuit comprises an induction winding, a current outflow circuit, a mirror current source, and a sampling capacitor. The induction winding senses the current at a current sampling point and generates an induced voltage. The current outflow circuit is connected to one end of the induction winding to convert the induced voltage into an induced current. The mirror current source mirrors the induced current and charges the sampling capacitor. The voltage generated by the sampling capacitor after charging is the current sampling signal output by the current sampling circuit.

[0008] One end of the induction winding is connected to the ground, the other end of the induction winding is connected to the first end of the first resistor, the second end of the first resistor is connected to the first end of the second resistor and the input end of the current outflow circuit, and the second end of the second resistor is connected to the ground.

[0009] A first switch is connected in parallel at both ends of the sampling capacitor, and the first switch provides a reset discharge loop for the sampling capacitor. When the current at the current sampling point is zero, the first switch is closed to provide a reset discharge loop for the sampling capacitor.

[0010] The above-mentioned current outflow circuit includes a first operational amplifier and a fourth switch, the same-direction end of the first operational amplifier is clamped at a voltage level of 0V, the reverse end of the first operational amplifier is connected in parallel with the drain of the fourth switch to serve as the input end of the current outflow circuit, the output end of the first operational amplifier is connected to the gate of the fourth switch, and the source of the fourth switch is the output end of the current outflow circuit.

[0011] The mirror current source includes a second switch and a third switch, the gates of the second switch and the third switch are connected in parallel, the sources of the second switch and the third switch are connected in parallel and then connected to an auxiliary power supply, the drain of the second switch is connected to the gate of the second switch and then connected to the output end of the current outflow circuit, the drain of the third switch is the output end of the mirror current source, and is connected in series with the first end of the sampling capacitor, the second end of the sampling capacitor is connected to the ground, and the first end of the sampling capacitor is the output end of the current sampling circuit.

[0012] The present invention also provides a power converter, which includes a primary circuit, an isolation transformer, and a secondary circuit. The primary circuit is connected in parallel with the primary winding of the isolation transformer, the secondary circuit is connected in parallel with the secondary winding of the isolation transformer, and the induction winding is coupled with the winding of the isolation transformer to sense the voltage of the primary winding.

[0013] The above-mentioned power converter is a flyback converter. The current sampling circuit senses the current in the primary winding and forms a current sampling signal to provide to the drive control circuit of the flyback converter. The drive control circuit generates a drive signal for driving and controlling the primary main control switch in the flyback converter according to the current sampling signal.

[0014] The present invention further provides a power converter, the power converter comprising an inductor, the inductive winding being coupled to the inductive winding to sense the voltage across the inductive winding.

[0015] The above-mentioned power converter includes a main control switch, the inductor, and a drive control circuit. The drive control circuit generates a drive signal for driving the main control switch according to the current sampling signal. The main control switch controls the energy flow in the inductor. The power converter is a buck conversion circuit or a boost conversion circuit or a buck-boost conversion circuit.

[0016] The above-mentioned current outflow circuit and the mirror current source are integrated in a control chip, and the output end of the current outflow circuit and the output end of the mirror current source are arranged outside the control chip, the input end of the current outflow circuit is connected to the induction winding, the output end of the mirror current source is connected to the sampling capacitor, and is also connected to the drive control circuit to provide a current sampling signal therefor, and the other end of the sampling capacitor is connected to the ground.

[0017] Beneficial effect: the lossless current sampling circuit of the present invention reduces circuit loss and has the characteristics of small size and low cost.

[0018] In order to make the above features and advantages of the invention more obvious and easy to understand, embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a structural diagram of a resistance sampling method in the known technology.

[0020] Figure 2 The figure is a schematic diagram of the structure of the current sampling circuit of the present invention applied to a transformer.

[0021] Figure 3 This is the first specific embodiment of the current sampling circuit of the present invention applied to a transformer.

[0022] Figure 4 This is the second specific embodiment of the current sampling circuit of the present invention applied to a transformer.

[0023] Figure 5 This is the third specific embodiment of the current sampling circuit of the present invention applied to a transformer.

[0024] Figure 6This is the fourth specific embodiment of the current sampling circuit of the present invention applied to a transformer.

[0025] Figure 7 It is a structural schematic diagram of the current sampling circuit of the present invention applied to an inductor.

[0026] Figure 8 This is the first specific embodiment of the current sampling circuit of the present invention applied to an inductor. DETAILED DESCRIPTION

[0027] In order to make the purpose and technical solution of the embodiment of the present invention clearer, the technical solution of the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings of the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all of the embodiments. Based on the described embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] like Figure 2 As shown, the current sampling circuit 2 of the present invention is applied to the current in the primary winding of the sampling transformer, a power converter 1, the power converter 1 includes a primary circuit 11, an isolation transformer T and a secondary circuit 12, the primary circuit 11 and the primary winding N1 of the isolation transformer T are connected in parallel, and the secondary winding N2 of the isolation transformer T is connected in parallel with the secondary circuit 12. The current sampling circuit 2 includes an induction winding Nf, which is coupled to the magnetic core of the transformer T. A voltage Vf proportional to the voltage V1 of the primary winding N1 is generated on the induction winding Nf. A current outflow circuit 21 is used to connect the induction winding Nf. Specifically, the input end of the current outflow circuit 21 is connected in parallel between the output end of the induction winding Nf and the ground. More specifically, one end of the induction winding Nf is connected to the ground, and the other end is the output end, which is connected to one end of the resistor R1. The other end of the resistor R1 is connected in parallel with the input end 2114 of the current outflow circuit 21, and is connected in series with the resistor R2 and then connected to the ground. The output end 2115 of the current outflow circuit 21 generates a current Ic, which is output to the mirror current source 22. The mirror current source 22 generates a current Ic equal to the current Ic to charge the capacitor Cs. The voltage waveform on the capacitor Cs is proportional to the current wave on the primary winding N1. The drive control circuit 13 controls the inductor current or the current of the MOS tube in the primary circuit by sampling the voltage Vcs of the capacitor Cs.

[0029] A switch S1 is connected in parallel between two ends of the capacitor Cs. The switch S1 is turned on when the primary circuit is turned off to discharge the capacitor Cs.

[0030] Np is the number of turns of the primary winding N1, Na is the number of turns of the inductive winding Nf, Lm is the inductance of the primary circuit, Rcs is the sampling resistor, Cs is the sampling capacitor, t is the time, when the primary circuit 11 is turned on, the primary circuit current Id, Id(t)=(V1 / Lm)*t, if the sampling resistor is used for current sampling, the voltage on the sampling resistor is:

[0031] VRcs(t)=(Rcs*V1 / Lm)*t.

[0032] The voltage on the induction winding Nf is Vaux=-V1*Na / Np, and the current flows out of the output terminal current Ic of the circuit 21.

[0033] Ic=Vaux / RDET=(V1*Na) / (Np*RDET).

[0034] RDET is the bias resistor of R1 and R2 connected in series. The mirror current source 22 generates a current Ic which is the same as Ic. The sampling capacitor Cs is charged with this current Ic.

[0035] VCs(t)=((V1*Na) / (Np*RDET*Cs))*t=((Na*Lm) / (Np*RDET*Cs)*Id.

[0036] So it can be seen that the difference between VCs and actual ID is only a proportional relationship, (Na*Lm) / (Np*RDET*Cs).

[0037] In addition, when Rcs*V1 / Lm=((V1*Na) / (Np*RDET*Cs)), that is,

[0038] When Cs=Lm*Na / (Rcs*Np*RDET), VCs(t)=VRcs(t)

[0039] In other words, when the circuit parameters Lm, Na, Np, and Rcs are all known, by reasonably selecting Cs, the voltage on the Cs capacitor can be made completely equal to the voltage on Rcs. In other words, this new current sampling method can achieve the same effect as the sampling resistor.

[0040] like Figure 3The figure shows a specific implementation of the current outflow circuit 21 of the present invention. The current outflow circuit 21 includes an operational amplifier 211. The same direction end 2111 of the operational amplifier is connected to the ground end. The voltage amplitude of the ground end is 0V, or a voltage level approximately equal to 0, such as 0.3V. The reverse end 2112 of the operational amplifier is connected in parallel with the drain of the controllable switch S2. The parallel connection end is the input end 2114 of the current outflow circuit 21. The gate of the controllable switch S2 is connected to the output end 2113 of the operational amplifier. The source of the controllable switch S2 is the output end 2115 of the current outflow circuit 21. The two ends of the induction winding Nf are connected in parallel with the resistors R1 and R2 in series, and the voltage Vf at the two ends of the induction winding Nf is divided. The input end 2114 of the current outflow circuit 21 is connected to the middle series end 201 of the resistors R1 and R2.

[0041] like Figure 4 for Figure 3 A specific implementation of the mirror current source 22, the mirror current source 22 includes switch tubes S5 and S6, the gate of the switch tube S5 is connected to the gate of the switch tube S6, the drain of the switch tube S5 is connected to the gate of the switch tube S5, and the source of the switch tube S5 is connected in parallel with the source of the switch tube S6 and then connected to the auxiliary power supply VDD. Figure 4 In the embodiment shown, the gate of the switch tube S5 is the input terminal 221 of the mirror current source 22, and the output terminal of the current outflow circuit is connected. The drain of the switch tube S6 is the output terminal 222 of the mirror current source 22, connected to the first terminal of the sampling capacitor Cs, the second terminal of the sampling capacitor Cs is connected to the ground terminal, and the switch S1 connected in parallel at both ends of the sampling capacitor Cs provides a discharge path for the sampling capacitor Cs. The first terminal of the capacitor Cs is connected to the drive control circuit 13 to provide it with a current sampling signal VCs. The switch tubes S5 and S6 are a pair of symmetrical PMOS, and the switch tube S2 is an NMOS.

[0042] Figure 5 This is a specific embodiment of the power converter 1 of the present invention. The power converter 1 is a flyback converter including an isolation transformer T. The primary circuit 11 includes an input voltage Vin and a switch S3. The primary winding N1 is connected in series with the switch S3 and in parallel with the input voltage Vin. Both ends of the secondary winding N2 are connected in parallel with the secondary circuit. The secondary circuit 12 is a rectifier and filter circuit, including a rectifier diode D1 and a filter capacitor Cf. The rectifier diode D1 and the filter capacitor Cf are connected in series with the secondary winding N2. The voltage across the filter capacitor Cf is the output voltage of the power converter 1.

[0043] The current sampling circuit 2 samples the current flowing through the switch S3 and generates a current sampling signal VCs, which is provided to the drive control circuit 13. The drive control circuit 13 is connected to the gate of the switch S3 to generate a control signal Vdr for driving the switch S3 to turn on or off.

[0044] like Figure 6 As shown, the current output circuit 21 and the mirror current source 22 are integrated in a current sampling chip 23, and the current sampling chip 23 is provided with an output terminal 231 of the current output circuit 21 and an output terminal 232 of the mirror current source 22. The output terminal 231 is connected to the auxiliary winding Nf, and the output terminal 232 is connected to the sampling capacitor Cs to charge the sampling point Cs. The output terminal 232 is also connected to the drive control circuit 13 to provide the voltage of the sampling capacitor Cs, that is, the current sampling signal VCs.

[0045] like Figure 7 The block diagram of the invention technical solution applied to the current sampling in the inductor is shown, the power converter 3 includes a switch circuit 31, a drive control circuit 32 and an inductor L, the switch circuit 31 is connected to the inductor L, the switch circuit 31 controls the energy flow in the inductor L, and the drive control circuit 32 drives and controls the switch circuit 31. The current sampling circuit 2 includes an induction winding Nf, the induction winding Nf is coupled with the magnetic core of the inductor L, and a voltage Vf proportional to the current Id of the inductor L is generated on the induction winding Nf, and a current outflow circuit 21 is used to connect with the induction winding Nf. Specifically, the output end of the current outflow circuit 21 is connected in parallel to one end of the induction winding Nf and connected to the ground, and the other end is connected to one end of the resistor R1, and the other end of the resistor R1 is connected in parallel with the current outflow circuit 21 and the output end, and is connected in series with the resistor R2 and connected to the ground. A current Ic is generated at the output end of the current outflow circuit 21, and a mirror current source 22 is used to generate a current Ic equal to the current Ic to charge the capacitor Cs. The voltage waveform on the capacitor Cs is proportional to the current wave on the primary winding N1. The drive control circuit 13 controls the current of the inductor L by sampling the voltage Vcs of the capacitor Cs.

[0046] A switch S1 is connected in parallel at both ends of the capacitor Cs. The switch S1 is turned on when the switch circuit 31 is turned off to discharge the capacitor Cs.

[0047] Please refer to Figure 8 , for the present invention Figure 7In a specific embodiment, the current sampling circuit 2 samples the inductor current in a BUCK circuit, but the present invention is not limited thereto, and other circuits containing an inductor, such as BOOST and BUCK-BOOST circuits, can also use the current sampling circuit of the present invention.

[0048] The BUCK circuit includes a main control switch S4, an inductor L, a freewheeling diode D2 and an output filter capacitor Co. The main control switch S4 and the inductor L are connected in series, and the freewheeling diode D2 and the output filter capacitor Co are connected in series and then connected in parallel with the inductor L. When the main control switch S4 is closed, the input power supply Vin provides electrical energy to the inductor L. When the main control switch S4 is turned off, the inductor L freewheels through the diode D2 to provide electrical energy to the load.

[0049] The inductive winding in the current sampling circuit 2 is coupled with the magnetic core of the inductor L, and the inductive winding Nf is coupled with the magnetic core of the inductor L. A voltage Vf proportional to the current Id of the inductor L is generated on the inductive winding Nf. A current outflow circuit 21 is used to connect with the inductive winding Nf, and a current Ic is generated at the output end of the current outflow circuit 21. A mirror current source 22 is used to generate a current Ic equal to the current Ic to charge the capacitor Cs. The voltage waveform on the capacitor Cs is proportional to the current waveform on the primary winding N1. The drive control circuit 13 generates a drive control signal of the main control switch S4 by sampling the voltage Vcs of the capacitor Cs, so as to control the current of the inductor L.

[0050] The beneficial effects of the new lossless current sampling method proposed in this case are:

[0051] The loss generated is much smaller than that of resistor sampling. The loss of resistor sampling is Idrms^2*Rcs. Take a 65W adapter as an example. When the input is 90Vac, the effective value of the primary MOS tube current is about 1A. Assuming Rcs=0.3ohm, a loss of 300mW will be generated, accounting for 0.46% of the output power. The sampling method proposed in this case loses the energy of charging and discharging the sampling capacitor in each cycle. The energy of charging and discharging is twice the energy storage of the sampling capacitor. According to the above Ccs calculation, assuming Lm=280UH, Np=30, Na=12, Rcs=0.3, R1=90k, the switching frequency is 100kHz, and the sampling capacitor capacitance that can sample the equivalent voltage amplitude with Rcs is calculated to be: Cs=4.15nF, and the highest voltage on Ccs is 0.8V, so the loss generated by charging and discharging the sampling capacitor Cs is:

[0052] PCs=Cs*Vcspk^2*fs=0.265mW, and the loss is less than one thousandth of the resistance sampling. Therefore, the current sampling method proposed in this case saves the sampling resistor, reduces the cost, and improves the efficiency of the whole machine.

[0053] Compared with the current transformer, the current sampling scheme proposed in this case also produces almost negligible losses. However, the present invention only requires a very small capacitor, usually 0603 or 0402 package. Compared with the current transformer, the volume and cost occupied are almost negligible.

[0054] The switch mentioned in the present invention, especially the controllable switch, does not limit the type of the controllable switch. Any applicable controllable switch can be used as an embodiment of the present invention, such as a triode, an insulated gate bipolar transistor, etc.

[0055] A new sampling method proposed in this case can be applied to current sampling in quasi-resonant working mode QRM, critical current continuous mode CRM, and discontinuous current working mode DCM.

[0056] Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. Any person having ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the attached patent application.

Claims

1. A current sampling circuit, characterized in that: The invention comprises an induction winding, a current outflow circuit, a mirror current source, and a sampling capacitor. The induction winding senses the current at the current sampling point and generates an induced voltage. The current outflow circuit is connected to one end of the induction winding to convert the induced voltage into an induced current. The mirror current source mirrors the induced current and charges the sampling capacitor. The voltage generated by the sampling capacitor after charging is the current sampling signal output by the current sampling circuit. One end of the induction winding is connected to the ground, the other end of the induction winding is connected to the first end of the first resistor, the second end of the first resistor is directly connected to the first end of the second resistor and the input end of the current outflow circuit, and the second end of the second resistor is connected to the ground; The current outflow circuit includes a first operational amplifier and a fourth switch, the non-inverting end of the first operational amplifier is clamped at a voltage level of 0V, the reverse end of the first operational amplifier and the drain of the fourth switch are connected in parallel to serve as the input end of the current outflow circuit, the output end of the first operational amplifier is directly connected to the gate of the fourth switch, and the source of the fourth switch is the output end of the current outflow circuit; There is a proportional relationship between the sampling capacitor voltage VCs of the current sampling circuit and the primary circuit current Id: VCs(t)=((V1*Na) / (Np*RDET*Cs))*t=((Na*Lm) / (Np*RDET*Cs)*Id, V1 is the voltage of the primary winding N1 connected to the primary circuit, Np is the number of turns of the primary winding N1 connected to the primary circuit, Na is the number of turns of the induction winding Nf, Lm is the inductance of the primary circuit, RDET is the upper bias resistance after R1 and R2 are connected in series, Cs is the sampling capacitor, and t is time.

2. A current sampling circuit as claimed in claim 1, characterized in that: A first switch is connected in parallel at both ends of the sampling capacitor, and the first switch provides a reset discharge loop for the sampling capacitor. When the current at the current sampling point is zero, the first switch is closed to provide a reset discharge loop for the sampling capacitor.

3. A current sampling circuit as claimed in claim 2, characterized in that: The mirror current source includes a second switch and a third switch, the gates of the second switch and the third switch are connected in parallel, the sources of the second switch and the third switch are connected in parallel and then connected to an auxiliary power supply, the drain of the second switch is connected to the gate of the second switch and then connected to the output end of the current outflow circuit, the drain of the third switch is the output end of the mirror current source, and is connected in series with the first end of the sampling capacitor, the second end of the sampling capacitor is connected to the ground, and the first end of the sampling capacitor is the output end of the current sampling circuit.

4. A current sampling circuit as claimed in claim 1, characterized in that: Applied to a power converter, the power converter comprises a primary circuit, an isolation transformer, and a secondary circuit. The primary circuit is connected in parallel with the primary winding of the isolation transformer, the secondary circuit is connected in parallel with the secondary winding of the isolation transformer, and the induction winding is coupled with the winding of the isolation transformer to sense the voltage of the primary winding.

5. A current sampling circuit as claimed in claim 4, characterized in that: The power converter is a flyback converter. The current sampling circuit senses the current in the primary winding and forms a current sampling signal to provide to the drive control circuit of the flyback converter. The drive control circuit generates a drive signal for driving and controlling the primary main control switch in the flyback converter according to the current sampling signal.

6. A current sampling circuit as claimed in claim 1, characterized in that: The invention is applied to a power converter, wherein the power converter comprises an inductor, and the inductive winding is coupled with the inductive winding to sense the voltage at both ends of the inductive winding.

7. A current sampling circuit as claimed in claim 6, characterized in that: The power converter includes a main control switch, the inductor, and a drive control circuit. The drive control circuit generates a drive signal for driving the main control switch according to the current sampling signal. The main control switch controls the energy flow in the inductor. The power converter is a buck conversion circuit or a boost conversion circuit or a buck-boost conversion circuit.

8. A current sampling circuit as claimed in claim 1, characterized in that: The current outflow circuit and the mirror current source are integrated in a control chip, and the output end of the current outflow circuit and the output end of the mirror current source are arranged outside the control chip, the input end of the current outflow circuit is connected to the induction winding, the output end of the mirror current source is connected to the sampling capacitor, and is also connected to the drive control circuit to provide a current sampling signal therefor, and the other end of the sampling capacitor is connected to the ground.

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