Method for activating a computing unit by means of a circuit arrangement as a response to an activation signal

Abstract

The invention relates to a method for activating a computing unit by means of a circuit arrangement as a reaction to an activation signal. The invention relates to a method for activating a computing unit (231) by means of a circuit arrangement (200) according to an activation signal, wherein when the activation signal exceeds a switching threshold, a reference voltage source (203) is connected to a supply voltage source (240), the reference voltage source (203) provides a first reference voltage at a first comparator (204) and a second reference voltage at a second comparator (212), the first comparator (204) performs a comparison with the first reference voltage in order to detect a high level of the activation signal, and the second comparator (212) performs a comparison with the second reference voltage, and when the high level of the activation signal is detected, the voltage supply device (232) is activated with a time delay with a particularly small deviation from a desired delay time with respect to changes in the supply voltage and temperature.

Description

Technical Field

[0001] The invention relates to a method for activating a computing unit by means of a circuit arrangement as a function of an activation signal, and to a circuit arrangement for activating a computing unit as a function of an activation signal. Background Art

[0002] During a wake-up request (Wake-Up), a computing unit that is in a sleep mode or in an idle state with a deactivated or minimal current or voltage supply can be activated again, i.e., woken up. Such a computer unit can be woken up via a communication system such as Ethernet or CAN, or via a dedicated control signal on a line or wake-up line (Wake-Up line, hereinafter "WUL") that does not directly belong to the bus system.

[0003] Control devices in motor vehicles can often be connected directly to the motor vehicle battery, so that when the motor vehicle is not in operation and, for example, parked, the control device is then also connected to the motor vehicle battery and draws energy from it. In order that the motor vehicle battery is not excessively drained by such control devices when the motor vehicle is stationary, it is therefore important to put such control devices into a rest mode with low energy consumption when the motor vehicle is stationary. The control device can be activated again from its rest mode by means of a wake-up signal or activation signal, which can be received, for example, via a WUL that does not directly belong to the bus system. Summary of the invention

[0004] According to the invention, a method for activating a computing unit by means of a circuit arrangement as a function of an activation signal and a circuit arrangement for activating a computing unit as a function of an activation signal are proposed, having the features of the independent claims. Advantageous embodiments are the subject matter of the dependent claims and the following description. Advantages and preferred embodiments of the method according to the invention and of the circuit arrangement according to the invention are derived in a similar manner from the following description.

[0005] The activation signal is in particular a signal, in particular a dedicated control signal, which, in view of which the computing unit is awakened or activated again from a deactivated state or a dormant mode. The activation signal can be outputted expediently by an external source and received by the circuit arrangement (passive mode). In particular, the activation signal can be received by the circuit arrangement via a line or bus that does not directly belong to the bus system. Alternatively or additionally, the activation signal can also be generated internally in the circuit arrangement itself (active mode) and in particular outputted by the circuit arrangement via a wake-up line to other computing units in order to activate the other computing units from their corresponding dormant modes.

[0006] The circuit arrangement can be expediently realized as part of the computing unit itself or can also be designed as an additional circuit connected to the computing unit.

[0007] When the activation signal exceeds the switching threshold, the reference voltage source is connected to the supply voltage source.

[0008] The supply voltage source is particularly provided for supplying energy to the computing unit. The supply voltage terminal is expediently connectable to the reference voltage source via a switch, wherein the circuit arrangement is designed to close the switch and thereby connect the reference voltage source to the supply voltage terminal in response to receipt of an activation signal that exceeds a switching threshold. The switch is particularly to be considered a high-side switch and is expediently designed as a MOSFET or a bipolar transistor.

[0009] The reference voltage source is designed to provide a first reference voltage at the first comparator and a second reference voltage at the second comparator when it is connected to the supply voltage source. The first comparator performs a comparison with the first reference voltage in order to detect a high level of the activation signal. The second comparator performs a comparison with the second reference voltage, in particular in order to represent a desired time delay as a function of a charging curve on the capacitor.

[0010] Furthermore, the circuit arrangement is configured to activate the voltage supply device, in particular the voltage supply device of the reference voltage source and / or the comparator, when the high level of the activation signal is detected. In particular, the voltage supply device can be directly or indirectly connected to the supply voltage terminal. When the comparator does not detect the high level of the activation signal, the voltage supply devices of the reference voltage source, the comparator and the calculation unit are preferably not activated.

[0011] Advantageously, the voltage supply is activated in a time-delayed manner with particularly small deviations from the desired delay time as a function of changes in the supply voltage and temperature. In particular, cost-effective components can be used and, even with extreme quiescent current and impedance requirements, in particular with extreme WUL input impedance requirements, a precise time delay can still be achieved. The microcontroller can thus be started as soon as possible after a minimum hysteresis time and the maximum permissible startup time can be adhered to and not violated.

[0012] The method or the circuit arrangement has great advantages over conventional possibilities for activating a computing unit. Conventionally, two different reference voltage sources are usually used, as well as an input voltage divider. Conventionally, the comparator and the two reference voltage sources cannot usually be operated from the supply voltage source. The first reference voltage source is therefore usually operated from the activation signal, but this carries the risk of violating the requirements for the input impedance of the activation signal. The comparator and the second reference voltage source are usually supplied with a continuous supply, which is complex and expensive.

[0013] Different from this, within the scope of the present invention, two different reference voltage sources are not used, but only a single reference voltage source is preferably used, which supplies two reference voltages to the comparator. The reference voltage source and at least one of the comparators are preferably supplied directly from the supply voltage source, and in particular only when the activation signal exceeds the switching threshold, which is preferably predetermined by a switch or a high-side switch. The continuous supply of the reference voltage source and the comparator is therefore preferably not necessary. The circuit arrangement can be realized with ease and at low cost. The reference voltage source can be implemented as a Zener diode at low cost, for example. The comparator can be implemented on a low-cost integrated circuit, for example.

[0014] In particular, within the scope of the present invention, it can be achieved that a signal with a pulse or with a pulse duration of less than 10 ms does not activate the corresponding voltage regulator of the voltage supply device or the computing unit, and therefore no unintended activation of the computing unit occurs according to such a signal. In the case of a signal with a pulse duration of more than 10 ms, the voltage supply device or the voltage regulator is appropriately activated. Since it can be predefined in particular that a signal or an activation signal with a pulse duration of more than 20 ms should lead to the activation of the computing unit, it is ensured by suitable wiring that a pulse length of up to 10 ms and a pulse length of more than 20 ms can be distinguished. According to such an activation signal, the computing unit is appropriately started so that the computing unit can keep the voltage supply device or the voltage regulator itself activated.

[0015] Advantageously, in the case of a detected high level of the activation signal, the voltage supply of the computing unit is activated after a time delay of a predetermined time interval of, for example, 10 ms. In particular, a capacitor is used for this purpose. After reaching the comparison threshold of the first comparator, the current from the reference voltage source is expediently released into the capacitor via a current limiting device, preferably a resistor, for the time delay. This occurs in particular by the first comparator ending the short circuit of the capacitor.

[0016] The first comparator is preferably designed to compare the activation signal with the first reference voltage in order to detect a high level of the activation signal. In particular, the first comparator is designed to reliably distinguish between a high level of the activation signal (i.e., the lowest voltage that should lead to activation of the computing unit) and a low level (i.e., the highest voltage that should not lead to activation). The switching threshold of the switch for switching the reference voltage source and the comparator is in particular selected such that the switching threshold is reliably reached before the activation line reaches the voltage of the first reference voltage to be activated.

[0017] The second comparator is preferably configured to compare the charging voltage of the charging current from the reference voltage source released by the first comparator on the capacitor with the second reference voltage in order to achieve the desired time delay. In particular, the comparator is configured to generate a suitable output signal for further processing when a certain voltage is reached on the capacitor.

[0018] Advantageously, in particular when a high level of the activation signal is detected, one of the two reference voltages provided by the reference voltage source is read in by the calculation unit. Preferably, the reference voltage source is connected to a terminal of the calculation unit for this purpose. This ensures, in particular, that the calculation unit can also read in the state of the activation signal without time delay. In conventional manner, signal conditioning and signal protection are usually required for such reading in, for example, by means of additional transistors. In contrast, the corresponding reference voltage can be read in directly by the calculation unit, in particular without the need for signal conditioning and signal protection, and the corresponding transistor can be saved.

[0019] According to a preferred embodiment, a reference voltage source provides a first reference voltage, and a second reference voltage is derived from the first reference voltage via a voltage divider, for example in a ratio of 1:1, for example when a resistor voltage divider is used. Purely by way of example, the resistor voltage divider can have 27 kiloohms to 27 kiloohms. Tolerances in the first reference voltage do not lead in particular to a significantly inaccurate time delay. By selecting a voltage divider that deviates from a ratio of 1:1, in particular a time delay of starting the calculation unit that is delayed by a predetermined time interval can be selected independently of the capacitor used for the time delay.

[0020] Preferably, in the case of a detected high level of the activation signal and in particular after a signal delay of ideally 10 ms has been achieved, a pulse extension of the activation signal is performed. For this purpose, in particular a pulse extension device is provided in the circuit arrangement, which advantageously has a diode and a capacitor. The pulse duration of the activation signal can thus be extended sufficiently expediently with the aid of the pulse extension device. In particular, the calculation unit can be started based on the activation signal extended in this way, so that the calculation unit can keep the voltage supply device or the voltage regulator itself activated. The pulse extension device extends the pulse at least so long that the calculation unit can keep the voltage supply device activated.

[0021] Advantageously, a pulse extension device for pulse extension of the activation signal is provided with one of two reference voltages provided by a reference voltage source. For this purpose, the reference voltage source is preferably connected to the pulse extension device accordingly. The reference voltage is therefore preferably used not only for the comparator, but is also preferably used again for generating the pulse extension.

[0022] Preferably, the reference voltage source is connected to the pulse stretching device via a resistor or a pull-up resistor. A regulated input voltage is therefore expediently provided for the pulse stretching device, so that the pulse stretching device can be designed in a simple manner, preferably by means of a diode and a capacitor. In particular, the regulated input voltage for the pulse stretching device enables an approximately constant pulse stretching time despite the simple design and in particular despite fluctuations in parameters such as temperature and operating voltage.

[0023] Advantageously, the first comparator can be designed by a MOSFET or as a bipolar transistor or as a combination of transistors, in particular as a combination of a MOSFET and / or a bipolar transistor, in particular in order to distinguish between a maximum value (“high level”) and a minimum value (“low level”) of the activation signal. Suitably low accuracy requirements for the switching threshold make such a simple design of the first comparator possible in particular.

[0024] According to a preferred embodiment, the activation signal is received via an interface, for example via a bidirectional single-wire interface. The interface in particular does not directly belong to a communication system such as CAN, Ethernet, etc. In particular, the circuit arrangement is connected to the WUL via the interface.

[0025] Alternatively or additionally, an activation signal can be generated in the circuit arrangement by a control element and transmitted via the interface and the WUL to one or more further computing units which are activated by their respective circuit arrangement according to the above explanations in response to receipt of the activation signal.

[0026] Advantageously, an EMC (electromagnetic compatibility) filter is provided, which is suitably connected to the interface and / or the control element. Before a signal received via the interface or received by the control element is forwarded to a component of the circuit arrangement, the signal can be filtered by the EMC filter. Suitably, the EMC filter is connected to the switch or high-side switch and, in addition, in particular, to the comparator.

[0027] The present invention is particularly suitable for use in motor vehicles. The computing unit is preferably a control device of a motor vehicle, or a microcontroller of such a control device, and the supply voltage source is preferably a motor vehicle battery. The circuit device can be implemented as part of the control device, and is connected, for example, between a voltage supply device and a microcontroller of the control device on the one hand and a motor vehicle battery on the other hand. For example, the control device can be permanently connected to the motor vehicle battery via the KI30 terminal (Klemme) of the motor vehicle. In the parked, deactivated state of the motor vehicle, the control device can be placed in a dormant mode and awakened or activated again according to a wake-up signal by means of the circuit device. In this case, the communication system is preferably a bus system of the motor vehicle, other control devices are appropriately connected to the bus system, and the bus system is configured as an Ethernet system, for example. In addition to the bus system, a WUL is preferably provided for transmitting an activation signal.

[0028] Further advantages and embodiments of the invention are apparent from the description and the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The invention is schematically illustrated by means of embodiments in the drawings and is described hereinafter with reference to the drawings.

[0030] Figure 1 A circuit arrangement not according to the invention for activating a computing unit is schematically shown.

[0031] Figure 2 A preferred embodiment of a circuit arrangement according to the invention for activating a computing unit is schematically shown, which circuit arrangement is designed to carry out a preferred specific embodiment of the method according to the invention. DETAILED DESCRIPTION

[0032] exist Figure 1 1 shows a circuit arrangement 100 for activating a computing unit that is not in accordance with the invention. For example, computing unit 130 is designed as a control unit of a motor vehicle and has a microcontroller 131 and a voltage supply 132. Control unit 130 is permanently connected to a supply voltage source 140, such as a motor vehicle battery.

[0033] By means of circuit arrangement 100 , voltage supply 132 of control unit 130 can be activated and deactivated, so that until activation a very low quiescent current is drawn, in particular less than 100 μA. Circuit arrangement 100 can be implemented as part of control unit 130 .

[0034] With the aid of an activation signal or wake-up signal, which can be received via a communication system 150 of the motor vehicle, in particular WUL 150 which is not directly part of the bus system, control device 130 can be reactivated from the idle mode and again use supply voltage source 140 to provide an internal voltage.

[0035] For this purpose, the circuit arrangement 100 has a supply voltage terminal 121, for example terminal KI30, via which the circuit arrangement 100 is connected to a supply voltage source 140. The circuit arrangement 100 is connected to a communication system 150 via an interface 122, for example a bidirectional single-wire interface.

[0036] The EMV filter 105 is connected to the interface 122, to which the control element 101 can also be connected. If no wake-up of the further control unit is provided, the control element 101 can also be omitted.

[0037] The voltage divider 111 is connected to the terminal 123 of the EMC filter. The voltage divider 111 is connected to the comparator 104, to which the second reference voltage source 110 is also connected. The comparator 104 is designed as a double comparator 104, 112, which can perform two comparisons. The reference voltage source 110 is integrated in the comparators 104, 112.

[0038] The first reference voltage source 103 is used to charge the capacitor 199 for the desired delay represented by, for example, 10 ms. The comparator 104 prevents the charging of the capacitor 199 until the communication system 150 indicates a low level.

[0039] The comparator 112 compares the voltage at the capacitor 199 with the reference voltage 110 and controls its output 125 when the voltage at the capacitor 199 becomes equal to the reference voltage 110 .

[0040] Comparator 112 is connected to a voltage supply 132 of control device 130 via a control output 125 of circuit arrangement 100 .

[0041] Furthermore, terminal 123 is connected to transistor 109 , which is connected to microcontroller 131 via microcontroller terminal 124 of circuit arrangement 100 .

[0042] A switch 108, in particular a high-side switch, is connected to the terminal 123. The high-side switch 108 is also connected to a resistor 107, which is connected to a voltage supply 132 via a voltage supply terminal 125 of the circuit arrangement 100. The resistor 107 limits the current at the control output 125. The supply voltage at the supply voltage terminal 121 determines the voltage at the control output 125. Therefore, the input of the voltage supply 132 must be protected over the entire supply voltage range at the supply voltage terminal 121.

[0043] To activate the control device 130, the reference voltage source 103 is operated directly by the EMC filter 105 with the activation signal or wake-up signal. As soon as the activation signal has an effective activation threshold (high level) at the comparator 104, the reference voltage source 103 charges the capacitor 199. The threshold is defined via the voltage divider 111 and the second reference voltage source 110. When the voltage at the capacitor exceeds the reference voltage of the reference voltage source 110, the comparator 112 activates the voltage supply 132 of the control device 130 by means of the resistor 107. The resistor 107 is connected here via the high-side switch 108.

[0044] Via the WUL 150, a further control device 130' can also be connected, in particular to an intervening circuit arrangement 100', which can be designed in particular similarly to the control device 130 and the circuit arrangement 100. For example, an activation signal can be generated by the circuit arrangement 100 in order to activate the further control device 130', in particular to activate the further control device 130' with the intervening circuit arrangement 100'. For this purpose, for example, a corresponding activation signal or wake-up signal can be actively generated by the control element 101 (active mode) and transmitted to the further control device 130' or its circuit arrangement 100' via the WUL 150. The control signal can act on the terminal 123 in a similar manner as in 100' and 130'. The actuation element 101 can have a suitable actuation device with a current limiting device, for example a high-side switch with a current limiting device.

[0045] In such a circuit arrangement 100, an additional transistor 109 is therefore required in order to read the activation signal into the microcontroller 131 for signal conditioning and protection. In this case, the transistor 109 has a temperature-dependent switching threshold.

[0046] The dual comparators 104 and 112 and the reference voltage source 110 are often designed in such a circuit arrangement 100 and implemented, for example, as an integrated circuit, so that they cannot be operated directly at the supply source terminal 121 (i.e., at the KI30 terminal). The dual comparator 104 and the reference voltage source 110 are therefore often supplied with a continuous supply that is limited to 16 V, for example, via a protective wiring 180, which is expensive and complex, and also unnecessarily increases the current demand of the device in the quiescent mode.

[0047] Furthermore, in such a circuit arrangement 100 there is the risk that the required input impedance of the WUL of, for example, 10 kΩ at the interface 122 is violated when the reference voltage source 103 is supplied directly from the communication system 150 via the EMC filter 105. Furthermore, the PMOS transistor used in the control element 101 is relatively expensive and requires additional protection against overvoltage at its gate terminal, since the operating voltage is too high for a conventional gate.

[0048] Compared with such a circuit arrangement 100, Figure 2 A preferred embodiment of a circuit arrangement according to the invention is schematically shown in FIG. 2 and denoted by 200 .

[0049] Circuit arrangement 200 is provided for activating a computer unit 230 which is expediently designed as a control unit of a motor vehicle and has a microcontroller 231 and a voltage supply 232. Voltage supply 232 can be activated in control unit 230 by means of circuit arrangement 200 in a similar manner to the above explanations.

[0050] By means of an activation signal which can be received via a communication system 250 of the motor vehicle, in particular a WUL which is not directly associated with the bus system, control device 230 can be activated from the idle mode by means of circuit arrangement 200 .

[0051] For this purpose, the circuit arrangement 200 has a supply voltage terminal 221, for example a KI30 terminal, via which the circuit arrangement 200 is connected to a supply voltage source 240. The circuit arrangement 200 is connected to a communication system 250, in particular a WUL 250, via an interface 222, for example a bidirectional single-wire interface. The EMV filter 205 is connected to the interface 222, and the control element 201 is also connected to the EMV filter 205.

[0052] Different from Figure 1In a circuit arrangement of the present invention, the switching device 200 does not have two independent reference voltage sources 103, 110. Instead, the circuit arrangement 200 has a single reference voltage source 203, which is connectable to the supply voltage terminal 221 and thus to the supply voltage source 240 via a switch (usually implemented as a high-side switch) 208. The switch 208 is designed, for example, as a bipolar transistor.

[0053] The other reference voltage is advantageously derived from a reference voltage source 203, in particular via a resistor divider 260, for example in a ratio of 1:1. The reference voltage source 203 is connected to a first comparator 204 and provides a comparison value for the comparator 204. Furthermore, the reference voltage source 203 is connected to a second comparator 212 and can supply the second comparator 212 with a second reference voltage.

[0054] The first comparator 204 is configured to carry out a comparison with a first reference voltage in order to detect a high level of the activation signal. The second comparator 212 is configured to carry out a comparison with a second reference voltage in order to achieve a desired switch-on delay.

[0055] Likewise, the reference voltage source 203 is connected to the charging capacitor 299 and is therefore used to provide the charging current as soon as the comparator 204 allows the charging current. Likewise, the reference voltage source 203 is connected to the second comparator 212 via the voltage divider 260. The output of the voltage divider 260 is used in this case as a comparison value for comparison with the voltage of the capacitor 299. The output of the comparator 212 is used to control the pulse extension circuit 214. The comparators 204 and 212 can be implemented as dual comparators.

[0056] Furthermore, the EMC filter 205 is also connected to the comparator 204 and the switch 208. The switch 208 is used in particular to supply the comparators 204, 212 and the reference voltage source 203 in a switched manner. The reference voltage source 203 is thus fed from the supply voltage source 240 via the switch 208 and is therefore different from the reference voltage source 203. Figure 1 , without loading WUL 250 .

[0057] The reference voltage source 203 is connected directly to the microcontroller terminal 224 and thus to the microcontroller 231 without an additional intervening transistor 109 .

[0058] In contrast to the circuit arrangement 100 , the reference voltage source 203 is connected to the resistor 207 instead of the high-side switch 108 . This ensures a good repetition accuracy in the pulse stretching circuit 214 .

[0059] The resistor 207 and the comparator 212 are preferably connected to a pulse stretching device 214 , which in turn is connected to a voltage supply 232 of a control device 230 via a voltage supply enable terminal 225 .

[0060] The pulse extension device 214 can be used to extend the pulse or pulse duration of the activation signal, for example to more than 50 ms. With such an extended pulse of the activation signal, it is possible in particular to start the microcontroller 231 and keep the voltage supply device 232 or the voltage regulator itself activated.

[0061] The dual comparators 204 and 212 and the reference voltage source 203 are advantageously supplied only when an activation signal is conducted from the terminal 223 of the EMC filter 205 to the switch 208, which activation signal exceeds the switching threshold of the switch 208. Advantageously, the switching threshold of the high-side switch is between a high level, i.e. the lowest voltage that should lead to activation of the computing unit, and a low level, i.e. the highest voltage that should not lead to activation.

[0062] By using only one reference voltage source 203, tolerances in the first of the two reference voltages, from which the other reference voltage is derived, for example, in a 1:1 ratio, can advantageously not lead to significantly inaccurate time delays. The first reference voltage is used in particular directly in the comparator 204 in order to distinguish between a high level and a low level of the activation signal. In particular, inexpensive standard comparators can be used as dual comparators 204 and 212. In the case of a detected high level of the activation signal, the voltage supply device 232 and the microcontroller 231 are advantageously activated after a delay of a predetermined time interval of, for example, 10 ms.

[0063] Alternatively, comparator 204 can also be replaced by a MOSFET or a bipolar transistor or a combination thereof in order to distinguish between a maximum value (“high level”) and a minimum value (“low level”) of the activation signal and only terminate the short circuit of the capacitor when a “high level” is detected at interface 222 .

[0064] In particular, in the case of a detected high level, the first reference voltage of the reference voltage source 203 is used to supply the resistor 207 and expediently provide a regulated input voltage for the pulse extension device 214, so that the pulse extension device 214 does not have to be unnecessarily complex for precise pulse extension. The pulse extension device 214 can thus be realized cost-effectively and simply, for example using diodes and capacitors.

[0065] Furthermore, the first reference voltage of reference voltage source 203 is read directly into microcontroller 231 via microcontroller terminal 224 , wherein in particular no further signal conditioning and no signal protection is required.

[0066] In particular, there is no risk that the required input impedance of, for example, 10 kΩ at 122 cannot be maintained because the reference voltage source 203 is supplied from the supply voltage terminal 221 via the switch 208 .

[0067] Different from Figure 1 In the circuit arrangement 100 shown in FIG. 1 , in the circuit arrangement 200 within the scope of the present invention, two different, differently drifting reference voltage sources 103, 110 are therefore not used, but a further reference voltage is derived from the reference voltage source 203 in a voltage divider 260. In this case, the same voltage reference is used, in particular, not only for charging the timing element but also for generating the comparison value; tolerances of the reference voltage 203 are thus largely compensated. In addition, the voltage reference is also used again for generating the pulse extension.

[0068] Comparators 204 and 212 and reference voltage source 203 can be operated directly on supply source terminal 221 and thus directly on KI30 via switch 208. No expensive, laborious continuous supply is required. Comparators 204 and 212 can be implemented with cost-effective integrated circuits. Reference voltage source 203 can be implemented cost-effectively as a Zener diode, for example.

[0069] Analogously to the above explanations, a further control device 230′ can also be connected to the communication system 250 or the WUL 250, in particular to an intervening circuit arrangement 200′, which can be designed in particular similarly to the control device 230 and the circuit arrangement 200. To activate the external control device 230′, for example, an activation signal can be actively generated by the actuation element 201 (active mode) and transmitted to the further control device 230′ or its circuit arrangement 200′ via the WUL 250.

Claims

1. A method for activating a calculation unit (230) by means of a circuit arrangement (200) in response to an activation signal, wherein the circuit arrangement (200) comprises: a supply voltage terminal (221) for connecting the circuit arrangement (200) to a supply voltage source (240); a reference voltage source (203); a first comparator (204); and a second comparator (212), wherein: When the activation signal exceeds the switch threshold of the switch (208), the reference voltage source (203) is connected to the supply voltage source (240) through the closed switch (208), The reference voltage source (203) provides a first reference voltage on the first comparator (204), and provides a second reference voltage on the second comparator (212), The first comparator (204) performs a comparison between the activation signal and the first reference voltage in order to identify a high level of the activation signal, and the second comparator (212) performs a comparison between a charging voltage of a charging current from the reference voltage source (203) released by the first comparator (204) on a capacitor (299) and the second reference voltage in order to achieve a desired time delay, and When it is detected that the activation signal has a high level, a voltage supply (232) of the computing unit (230) is activated after a time delay of a predefined time interval.

2. The method according to claim 1, wherein: One of the two reference voltages provided by the reference voltage source (203) is read in by the calculation unit (230).

3. The method according to claim 1, wherein: The reference voltage source (203) provides the first reference voltage, and the second reference voltage is derived from the first reference voltage via a voltage divider (260).

4. The method according to claim 1, wherein: In case it is recognized that the activation signal has a high level, pulse extension of the activation signal is performed.

5. The method according to claim 4, wherein: When it is detected that the activation signal has a high level, a pulse extension of the activation signal is performed by means of a diode and a capacitor.

6. The method according to claim 4, wherein: One of the two reference voltages provided by the reference voltage source (203) is provided to a pulse extension device (214) for performing pulse extension on the activation signal.

7. The method according to claim 6, wherein: The reference voltage source (203) is connected to the pulse extension device (214) via a resistor (207).

8. A circuit arrangement (200) for activating a calculation unit (230) in response to an activation signal, comprising: a supply voltage terminal (221) for connecting the circuit arrangement (200) to a supply voltage source (240), a reference voltage source (203), a first comparator (204), and A second comparator (212), in, The supply voltage terminal (221) can be connected to the reference voltage source (203) via a switch (208), wherein the circuit arrangement is configured to close the switch (208) upon receipt of an activation signal that exceeds a switching threshold in order to connect the reference voltage source (203) and / or the first comparator (204) and / or the second comparator (212) to the supply voltage terminal (221), wherein the reference voltage source (203) is configured to provide a first reference voltage to the first comparator and a second reference voltage to the second comparator (212) when connected to the supply voltage terminal (221), wherein the first comparator (204) is configured to compare the activation signal with the first reference voltage in order to identify a high level of the activation signal, and the second comparator (212) is configured to compare a charging voltage of a charging current from the reference voltage source (203) released by the first comparator (204) on a capacitor (299) with the second reference voltage in order to achieve a desired time delay, and The circuit arrangement is furthermore designed to activate a voltage supply (232) of the computing unit (230) after a time delay of a predefined time interval, upon detection of the activation signal having a high level.

9. The circuit arrangement (200) according to claim 8, wherein: The reference voltage source (203) is connected to a terminal (224) of the calculation unit (230) so that one of the two reference voltages provided by the reference voltage source (203) can be read in by the calculation unit (230).

10. The circuit arrangement (200) according to claim 8, wherein: The reference voltage source (203) is configured to provide the first reference voltage and to derive the second reference voltage from the first reference voltage via a voltage divider (260).

11. The circuit arrangement (200) as claimed in claim 8, further comprising a pulse stretching device (214) which is designed to pulse stretch the activation signal.

12. The circuit arrangement (200) as claimed in claim 11, wherein the pulse stretching device (214) comprises a diode and a capacitor.

13. The circuit arrangement (200) according to claim 11, wherein: The reference voltage source (203) is connected to the pulse extension device (214) so ​​as to be able to provide the pulse extension device (214) with one of the two reference voltages provided by the reference voltage source (203).

14. The circuit arrangement (200) according to claim 13, wherein: The reference voltage source (203) is connected to the pulse extension device (214) via a resistor (207).

15. The circuit arrangement (200) according to claim 8, wherein: The first comparator (204) is designed as a MOSFET, or as a bipolar transistor, or as a combination of transistors.

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