Semiconductor light emitting device
By adopting a multi-layer structure and optimized electrode design in semiconductor light emitting devices, the problem of insufficient light extraction efficiency and electrode adhesion performance is solved, and the luminous flux and reliability are significantly improved.
Patent Information
- Application Number
- CN201910155558.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-03-02
- Filing Date
- 2019-03-01
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2039-03-01
AI Technical Summary
The existing semiconductor light emitting devices have shortcomings in light extraction efficiency and electrode structure design, resulting in problems with luminous flux and reliability.
By adopting a structure including a semiconductor layer of the first and second conductive type, a transparent electrode layer, a first insulating layer and a reflective electrode layer, a plurality of holes and openings are formed on the electrode layer, combining a multi-quantum well structure and DBR reflection. Structure, optimize the electrode design to improve light extraction efficiency and electrode adhesion performance.
The light extraction efficiency of light emission is significantly improved, the light absorption in the package is reduced, the adhesion performance between the electrode and the insulating layer is enhanced, and the luminous flux and reliability of the semiconductor light emitting device are improved.
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Figure CN110224050B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] Korean Patent Application No. 10-2018-0025090, titled “Semiconductor Light Emitting Device”, filed on March 2, 2018 in the Korean Intellectual Property Office, is incorporated herein by reference in its entirety. Technical Field
[0003] The present disclosure relates to a semiconductor light emitting device. Background Art
[0004] Compared with light sources according to the prior art, semiconductor light emitting devices are considered to be next-generation light sources having many positive attributes, such as relatively long life, low power consumption, fast response rate, environmentally friendly characteristics, etc. Semiconductor light emitting devices have been used as important light sources in various products, such as lighting devices, backlight units of display devices, etc. Summary of the invention
[0005] According to one aspect of the embodiment, a semiconductor light emitting device includes: a light emitting structure including a semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type; a transparent electrode layer arranged on the semiconductor layer of the second conductivity type, the transparent electrode layer being spaced apart from an edge of the semiconductor layer of the second conductivity type; a first insulating layer arranged on the light emitting structure to cover the transparent electrode layer, the first insulating layer including a plurality of holes connected to the transparent electrode layer; and a reflective electrode layer arranged on the first insulating layer and connected to the transparent electrode layer through the plurality of holes.
[0006] According to an embodiment, a semiconductor light emitting device includes: a light emitting structure including a semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type; a transparent electrode layer arranged on the semiconductor layer of the second conductivity type; a first insulating layer arranged on the light emitting structure to cover the transparent electrode layer and including a plurality of holes connected to the transparent electrode layer; and a reflective electrode layer arranged on the first insulating layer and connected to the transparent electrode layer through the plurality of holes; a second insulating layer arranged on the first insulating layer to cover the reflective electrode layer and including at least one opening; and a connecting electrode arranged on the second insulating layer and connected to the reflective electrode layer through the at least one opening. The connecting electrode includes: a first electrode layer including an edge region and an inner region surrounded by the edge region; and a second electrode layer arranged on the inner region of the first electrode layer, and the thickness of the edge region is less than the thickness of the inner region.
[0007] According to an embodiment, a semiconductor light emitting device includes: a light emitting structure including a semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type; and an electrode structure arranged on an upper surface of the semiconductor layer of the second conductivity type. The electrode structure includes: a first electrode layer having an edge region and an inner region surrounded by the edge region; and a second electrode layer arranged on the inner region of the first electrode layer, and the thickness of the edge region is less than the thickness of the inner region. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Features will become apparent to those skilled in the art by describing in detail exemplary embodiments with reference to the accompanying drawings, in which:
[0009] Figure 1 shows a schematic side cross-sectional view of a semiconductor light emitting device according to an example embodiment;
[0010] FIG. 2A to FIG. 2C Shows the formation Figure 1 Cross-sectional views of various stages in the electrode method;
[0011] Figure 3 shows a schematic plan view of a semiconductor light emitting device according to an example embodiment;
[0012] Figure 4 Shown along Figure 3 A side sectional view taken along line II' of FIG.
[0013] Figure 5 Shows Figure 4 A partially enlarged cross-sectional view of a portion A2;
[0014] Fig. 6A and Figure 6B A schematic diagram showing the light extraction effect of the connection electrode structure;
[0015] Figure 7 , Fig. 9 , Fig.11 , Fig.13 , Fig.15 , Fig.17 and Fig.19 A plan view showing various stages in a method of manufacturing a semiconductor light emitting device according to an example embodiment;
[0016] Figure 8 , Fig.10 , Fig.12 , Fig.14 , Fig.16 , Fig.18 and Fig. 20 cross-sectional views showing stages in a method of manufacturing a semiconductor light emitting device according to example embodiments; and
[0017] Fig.21 A schematic cross-sectional view of a semiconductor light emitting device according to example embodiments applied to a package is shown. DETAILED DESCRIPTION
[0018] Hereinafter, example embodiments will be described in detail with reference to the accompanying drawings.
[0019] Figure 1 is a schematic side-sectional view of a semiconductor light emitting device according to example embodiments.
[0020] Reference Figure 1 According to the example embodiment, the semiconductor light emitting device 20 (i.e., the semiconductor light emitting diode chip 20) may include a substrate 21, a first conductive type semiconductor layer 24, an active layer 25, and a second conductive type semiconductor layer 26 sequentially stacked on the substrate 21 along a stacking direction. The buffer layer 22 may be disposed between the substrate 21 and the first conductive type semiconductor layer 24.
[0021] The substrate 21 may be an insulating substrate, such as a sapphire substrate, but is not limited thereto. In addition to an insulating substrate, the substrate 21 may be a conductive substrate or a semiconductor substrate. For example, in addition to sapphire, the substrate 21 may be made of SiC, Si, MgAl, or a combination thereof. 2 O 4 、MgO、LiAlO 2 、LiGaO 2 Or GaN is formed. A concavo-convex portion C may be formed on the upper surface of the substrate 21. The concavo-convex portion C may improve the quality of the grown single crystal while improving light extraction efficiency.
[0022] The buffer layer 22 may be In x Al y Ga 1-x-y N (0≤x≤1, 0≤y≤1) layers. For example, the buffer layer 22 may be a GaN layer, an AlN layer, an AlGaN layer, or an InGaN layer. In addition, the buffer layer 22 may be used by combining a plurality of layers as needed or gradually changing its composition.
[0023] The first conductive type semiconductor layer 24 may be an n-type In x Al y Ga 1-x-y N (0≤x<1, 0≤y<1, 0≤x+y<1) nitride semiconductor, and its n-type impurity may be Si. For example, the first conductive type semiconductor layer 24 may include n-type GaN. The second conductive type semiconductor layer 26 may be p-type In x Al y Ga 1-x-yThe second conductive type semiconductor layer 26 may be a nitride semiconductor layer of N (0≤x<1, 0≤y<1, 0≤x+y<1), and its p-type impurity may be Mg. For example, although the second conductive type semiconductor layer 26 may be implemented as a single-layer structure, the second conductive type semiconductor layer 26 may also include a multi-layer structure with different compositions.
[0024] The active layer 25 may have a multi-quantum well (MQW) structure in which quantum well layers and quantum barrier layers are alternately stacked. For example, the quantum well layers and the quantum barrier layers may be In layers having different compositions. x Al y Ga 1-x-y N (0≤x≤1, 0≤y≤1, 0≤x+y≤1) layers. In a specific example, the quantum well layer may be In x Ga 1-x N (0<x≤1) layer, and the quantum barrier layer can be a GaN layer or an AlGaN layer. The thickness of the quantum well layer and the quantum barrier layer can be in the range of about 1nm to about 50nm respectively. The active layer 25 is not limited to having a multi-quantum well structure, but can have a single quantum well structure.
[0025] The first electrode structure 28 and the second electrode structure 29 may be arranged in the mesa-etched region of the first conductivity type semiconductor layer 24 and on the second conductivity type semiconductor layer 26, respectively, so that the first electrode structure 28 and the second electrode structure 29 may be located on the same surface, for example, on the first surface. Figure 1 As shown, both the first electrode structure 28 and the second electrode structure 29 may be located on a surface of the buffer layer 22 facing away from the substrate 21 .
[0026] The first electrode structure 28 may include, for example, at least one of aluminum (Al), gold (Au), chromium (Cr), nickel (Ni), titanium (Ti), and tin (Sn), and may be formed of a single layer or multiple layers. The first electrode structure 28 may be directly located on the mesa-etched region of the first conductive type semiconductor layer 24.
[0027] The second electrode structure 29 may include at least a first electrode layer 29a and a second electrode layer 29b. For example, the first electrode layer 29a may be located between the second conductive type semiconductor layer 26 and the second electrode layer 29b. The thickness of the second electrode layer 29b along the stacking direction may be greater than the thickness of the first electrode layer 29a along the stacking direction.
[0028] In detail, the first electrode layer 29a may have an edge region E1 and an inner region E2 surrounded by the edge region E1, and the second electrode layer 29b may be arranged on the inner region E2 of the first electrode layer 29a. In addition, the edge region E1 of the first electrode layer 29a may have a thickness less than that of the inner region E2. In example embodiments, the edge region E1 of the first electrode layer 29a may have a thickness that decreases outward, for example, the thickness of the edge region E1 of the first electrode layer 29a may gradually decrease as the distance relative to the inner region E2 increases.
[0029] The first electrode layer 29a may be provided as a reflective electrode and may be used as an electrode for distributing current. For example, the first electrode layer 29a may include at least one of silver (Ag), chromium (Cr), nickel (Ni), titanium (Ti), aluminum (Al), rhodium (Rh), ruthenium (Ru), palladium (Pd), gold (Au), copper (Cu), and combinations thereof, and the second electrode layer 29b may include at least one of Au and Cu. Each of the first electrode layer 29a and the second electrode layer 29b may include layers having different materials.
[0030] The second electrode structure 29 employed in the exemplary embodiment can be obtained by depositing the first electrode layer 29a and the second electrode layer 29b using different processes while using a single photoresist pattern. FIG. 2A to FIG. 2C The formation of the second electrode structure 29 is described in more detail.
[0031] FIG. 2A to FIG. 2C 2 is a cross-sectional view showing various stages in the method of forming the second electrode structure 29. Note that FIG. 2A to FIG. 2C Corresponds to Figure 1 An enlarged cross-sectional view of portion A1.
[0032] Reference Figure 2A , a photoresist pattern PR may be formed on the second conductive type semiconductor layer 26 using a photolithography process. The photoresist pattern PR employed in example embodiments may be a negative pattern having an undercut structure UC, for example, the undercut structure UC of the photoresist pattern PR may include inclined sidewalls facing each other and inclined toward each other so as to overhang portions of the second conductive type semiconductor layer 26.
[0033] On the lower region of the undercut structure UC, no metal deposition may be formed appropriately. Therefore, for example, in the case of electron beam evaporation, the metal deposition may be formed along the dotted line VM ( Figure 2B The dotted line in the figure) performs deposition, which will be referred to below Figure 2C Describe in more detail.
[0034] Reference Figure 2B, metal deposition may be performed on the region of the second conductive type semiconductor layer 26. For example, the first electrode layer 29a may be formed using a radially uniform deposition process (e.g., sputtering) so as to extend to the lower region of the undercut structure UC, for example, the undercut structure UC of the photoresist pattern PR may be overhung on the edge of the resulting first electrode layer 29a. The first electrode layer 29a may be formed of a reflective metal and may extend to the lower region of the undercut structure UC, thereby ensuring a relatively wide reflective region and obtaining a sufficient contact area with the lower layer (e.g., with the second conductive type semiconductor layer 26).
[0035] Then, if Figure 2C As shown, the second electrode layer 29b can be formed on the first electrode layer 29a using the photoresist pattern PR. The second electrode layer 29b can be formed using other deposition processes (such as electron beam evaporation) and can be deposited along the above-mentioned dotted line VM. Figure 2C As shown, the second electrode layer 29b can be formed in the opening defined by the undercut structure UC of the photoresist pattern PR, for example, the maximum width of the second electrode layer 29b (for example, the bottom width directly located on the first electrode layer 29a) can be smaller than the minimum width of the opening defined by the undercut structure UC of the photoresist pattern PR along a direction perpendicular to the stacking direction (for example, the top width of the photoresist pattern PR).
[0036] As a result, the area of the first electrode layer 29a (ie, the reflective electrode) may be larger than the area of the second electrode layer 29b. For example, the second electrode layer 29b may be located only on the first electrode layer 29a (ie, the reflective electrode) exposed by the undercut structure UC of the photoresist pattern PR. Figure 1 ), wherein the edge region E1 of the first electrode layer 29a surrounds the second electrode layer 29b. For example, the edge region E1 of the first electrode layer 29a may have a tail shape whose cross section decreases outward when viewed in a cross-sectional view.
[0037] like Figure 2C As shown, the inclination angle θ1 of the first electrode layer 29a may be relatively gentle (or smaller) than the inclination angle θ2 of the second electrode layer 29b. In detail, when viewed in a cross-sectional view, the edge region E1 of the first electrode layer 29a may have an inclination angle θ1 of about 30° or less. Fig. 6A and Figure 6B The light extraction efficiency and light flux improvement effects based on the electrode structure in the example embodiments are described in further detail.
[0038] Figure 3 is a schematic plan view of an example of a semiconductor light emitting device 10 according to an example embodiment, Figure 4 It is along Figure 3 A schematic cross-sectional view taken along line II'.
[0039] Reference Figure 3 and Figure 4 The semiconductor light emitting device 10 according to the example embodiment may include a substrate 105, a light emitting structure 110, a transparent electrode layer 140, a first insulating layer 130 also referred to as an insulating layer hereinafter, and a reflective electrode layer 144. In addition, the semiconductor light emitting device 10 according to the example embodiment may further include a second insulating layer 150, a third insulating layer 160, a first connection electrode 155n, a second connection electrode 155p which may be referred to as a connection electrode hereinafter, a first electrode pad 165n, a second electrode pad 165p, a first solder column 170n, and a second solder column 170p.
[0040] The substrate 105 may have a front surface 105s1 and a rear surface 105s2 opposite to the front surface 105s1. The substrate 105 may be a semiconductor growth substrate and may be made of, for example, sapphire, Si, SiC, MgAl 2 O 4 、MgO、LiAlO 2 、LiGaO 2 Sapphire can be formed of an insulating material, a conductive material, or a semiconductor material such as GaN, etc. Sapphire can be a crystal having hexagonal prism (Hexa-Rhombo R3c) symmetry, while having electrical insulation properties, and can be used as a substrate for growing nitride semiconductors.
[0041] Throughout the specification, terms such as 'front surface', 'rear surface', etc. are used to distinguish relative positions in components, and the present disclosure is not limited by these terms. Terms such as 'front surface', 'rear surface', etc. can be used to describe components in example embodiments by replacing them with other terms such as 'first surface', 'second surface', etc. or terms such as 'upper surface' and 'lower surface', etc. Therefore, the use of the front surface 105s1 and the rear surface 105s2 of the substrate 105 can be replaced by the upper surface 105s1 and the lower surface 105s2 of the substrate 105, or the first surface 105s1 and the second surface 105s2 of the substrate 105, respectively.
[0042] The light emitting structure 110 may be arranged on the front surface 105s1 of the substrate 105. In the example, the front surface 105s1 of the substrate 105 may have a concavo-convex structure, and the concavo-convex structure may improve the crystallization characteristics and light emitting efficiency of the semiconductor layer constituting the light emitting structure 110. Although the example embodiment shows an example in which the concavo-convex structure of the front surface 105s1 of the substrate 105 is shown as having a dome convex shape, the example embodiment thereof is not limited thereto. For example, the concavo-convex structure of the front surface 105s1 of the substrate 105 may be formed to have various shapes such as a quadrilateral, a triangle, and the like. In addition, the concavo-convex structure of the front surface 105s1 of the substrate 105 may be selectively formed, and the concavo-convex structure of the front surface 105s1 of the substrate 105 may also be omitted.
[0043] In an example, the substrate 105 may also be removed later according to an example embodiment. For example, the substrate 105 may be provided as a growth substrate for growing the light emitting structure 110, and may be removed later by a separation process. The substrate 105 may be separated from the light emitting structure 110 by a laser lift-off (LLO) process, a chemical lift-off (CLO) process, or the like.
[0044] A buffer layer may also be provided on the front surface 105s1 of the substrate 105. The buffer layer may be provided to alleviate lattice defects of the semiconductor layer grown on the substrate 105, and it may be formed of an undoped semiconductor layer formed of nitride or the like. As a material for the buffer layer, undoped GaN, AlN, InGaN, etc. may be used, and the buffer layer may be formed by growing at a low temperature of about 500° C. to a thickness of several tens to several hundreds of angstroms at about 500° C. to 600° C. In this case, the term “undoped” means that the semiconductor layer is not additionally subjected to a doping process. According to example embodiments, such a buffer layer is not necessary and may be omitted.
[0045] The light emitting structure 110 may include a first conductive type semiconductor layer 115 , an active layer 120 , and a second conductive type semiconductor layer 125 .
[0046] The first conductive type semiconductor layer 115 may be formed by growing from the front surface 105s1 of the substrate 105. The first conductive type semiconductor layer 115 may include a semiconductor doped with n-type impurities, and may be an n-type nitride semiconductor layer.
[0047] like Figure 3 As shown, the first conductive type semiconductor layer 115 may have a first edge S1, a second edge S2, a third edge S3, and a fourth edge S4. The first edge S1 and the third edge S3 may be opposite to each other, and the second edge S2 and the fourth edge S4 may be opposite to each other.
[0048] The second conductive type semiconductor layer 125 may include a semiconductor doped with p-type impurities and may be provided as a p-type nitride semiconductor layer. In another exemplary embodiment, the positions of the first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125 may be changed to be stacked on each other. The first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125 may be formed by the experimental formula Al x In y Ga (1-x-y) N (0≤x<1, 0≤y<1, 0≤x+y<1) indicates that it may correspond to materials such as GaN, AlGaN, InGaN, AlInGaN, etc.
[0049] The active layer 120 may be interposed between the semiconductor layer 115 of the first conductivity type and the semiconductor layer 125 of the second conductivity type. The active layer 120 may emit light having a predetermined energy level by recombination of electrons and holes when the semiconductor light emitting device 10 operates. The active layer 120 may include a material having a narrower energy band gap than the energy band gaps of the semiconductor layer 115 of the first conductivity type and the semiconductor layer 125 of the second conductivity type. For example, when the semiconductor layer 115 of the first conductivity type and the semiconductor layer 125 of the second conductivity type are formed of GaN compound semiconductors, the active layer 120 may include an InGaN compound semiconductor having a narrower energy band gap than the energy band gap of GaN. In addition, the active layer 120 may have a multiple quantum well (MQW) structure in which quantum well layers and quantum barrier layers are alternately stacked, for example, an InGaN / GaN structure. However, example embodiments thereof are not limited thereto, and the active layer 120 may have a single quantum well (SQW) structure.
[0050] The light emitting structure 110 may include a recessed area (E) and a mesa area (M) around the recessed area (E), wherein the recessed area (E) is obtained by etching some parts of the second conductive type semiconductor layer 125, the active layer 120, and the first conductive type semiconductor layer 115. In the figure, reference numeral 'B' may refer to a boundary (B) between the recessed area (E) and the mesa area (M). The upper surface of the mesa area (M) may be higher than the upper surface of the recessed area (E). In the example, the mesa area (M) may have a shape that gradually narrows from the bottom to the top. Therefore, the mesa area (M) may have an inclined side surface.
[0051] In an example, a portion of an upper surface of the recessed region (E) may be defined as a first contact region CT1. In an example, at least a portion of an upper surface of the mesa region (M) may be defined as a second contact region CT2.
[0052] The mesa region (M) may be spaced apart from the first to fourth edges S1 to S4, and the recessed region (E) may be disposed between the mesa region (M) and the first to fourth edges S1 to S4. In addition, the recessed regions (E) having a circular shape and spaced apart from each other may be disposed in the central portion of the light emitting structure 110.
[0053] The transparent electrode layer 140 may be disposed on the second conductive type semiconductor layer 125 of the light emitting structure 110. The transparent electrode layer 140 may be disposed on the second contact region CT2 of the second conductive type semiconductor layer 125 to be connected thereto.
[0054] In example embodiments, the transparent electrode layer 140 may be arranged to be spaced apart from the edge of the second conductive type semiconductor layer 125 by a predetermined distance. Figure 4As shown, the outermost edge of the transparent electrode layer 140 may be horizontally spaced apart from the outermost edge of the second conductive type semiconductor layer 125 , so that a portion of the upper surface of the second conductive type semiconductor layer 125 at its edge is exposed, for example, directly contacting the first insulating layer 130 .
[0055] As the transparent electrode layer 140 is spaced apart from the mesa region (M), that is, the edge region of the second conductive type semiconductor layer 125, problems due to light absorption of the transparent electrode layer in the edge region of the mesa region (M) can be prevented, and light flux in the edge region associated therewith can be improved by the first insulating layer having a DBR structure or the ODR structure of the first insulating layer 130 and the reflective electrode layer 144. In order to obtain sufficient effects, the spacing distance "d" of the transparent electrode layer 140 relative to the edge of the second conductive type semiconductor layer 125 may be about 2 μm or more.
[0056] The first insulating layer 130 may be arranged on the transparent electrode layer 140. The first insulating layer 130 may cover a portion of the first conductive type semiconductor layer 115 and a portion of the second conductive type semiconductor layer 125. The first insulating layer 130 may include a plurality of holes PD located in the mesa region (M). The first insulating layer 130 may partially cover the transparent electrode layer 140 in the mesa region (M), for example, the first insulating layer 130 may partially cover the exposed edges of the transparent electrode layer 140 and the second conductive type semiconductor layer 125. Although the example embodiment shows that the plurality of holes PD are arranged in a dense hexagonal lattice pattern, the example embodiment thereof is not limited thereto. For example, the plurality of holes PD may be arranged in various forms such as a quadrilateral grid shape, etc. Although the plurality of holes PD are shown as having a circular cross section, the example embodiment thereof is not limited thereto. For example, the plurality of holes PD may have a polygonal or annular cross section.
[0057] For example, the transparent electrode layer 140 may include indium tin oxide (ITO), zinc-doped indium tin oxide (ZITO), zinc indium oxide (ZIO), gallium indium oxide (GIO), zinc tin oxide (ZTO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), gallium-doped zinc oxide (GZO), In 4 Sn 3 O 12 and Zn (1-x) Mg x O (zinc magnesium oxide, 0≤x≤1). The thickness of the transparent electrode layer 140 may be in the range of about 1 nm to 5 nm, but is not limited thereto.
[0058] For example, the first insulating layer 130 may include SiO 2 、SiN、SiO x N y 、TiO2 、Si 3 N 4 、Al 2 O 3 、TiN、AlN、ZrO 2 、TiAlN、TiSiN、HfO、TaO 2 and MgF 2 In example embodiments, the first insulating layer 130 may have a multilayer film structure in which insulating films having different refractive indices are alternately stacked, and may be provided as a distributed Bragg reflector (DBR). The multilayer film structure may be a structure in which a first insulating film and a second insulating film having a first refractive index and a second refractive index (as different refractive indices) are alternately stacked.
[0059] In another example embodiment, the first insulating layer 130 may be formed of a material having a refractive index lower than that of the second conductive type semiconductor layer 125. The first insulating layer 130 may constitute an omnidirectional reflector (ODR) together with a reflective electrode layer 144 disposed in contact with an upper portion of the first insulating layer 130. In this way, the first insulating layer 130 may be used alone or in combination with the reflective electrode layer 144 as a reflective structure that increases the reflectivity of light emitted from the active layer 120, and thus, light extraction efficiency may be significantly improved.
[0060] The reflective electrode layer 144 may be disposed on the first insulating layer 130 to be electrically connected to the transparent electrode layer 140 through the plurality of holes PD. For example, the reflective electrode layer 144 may include Ag, Cr, Ni, Ti, Al, Rh, Ru, or a combination thereof.
[0061] In addition, the bonding electrode layer 142 may be disposed between the first insulating layer 130 and the reflective electrode layer 144. The bonding electrode layer 142 may contact the transparent electrode layer 140 through the plurality of holes PD. The bonding electrode layer 142 may improve the adhesion between the reflective electrode layer 144 and the first insulating layer 130.
[0062] The bonding electrode layer 142 may be formed of a material similar to that of the transparent electrode layer 140. For example, the bonding electrode layer 142 may include ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In 4 Sn 3 O 12 and Zn (1-x) Mg x At least one of O(0≤x≤1).
[0063] The transparent protective layer 138 may protect the reflective electrode layer 144 while covering the upper surface and the side surface of the reflective electrode layer 144. The transparent protective layer 138 may cover the side surface of the bonding electrode layer 142. The transparent protective layer 138 may include an upper surface portion R1 having a convex surface while covering the upper surface of the reflective electrode layer 144 and a side surface portion R2 having an inclined surface while covering the side surface of the reflective electrode layer 144 and the side surface of the bonding electrode layer 142. By forming the transparent protective layer 138, the adhesive property of the reflective electrode layer 144 may be improved, and the migration of the metal element forming the reflective electrode layer 144 may be suppressed.
[0064] The transparent protective layer 138 may be formed of a transparent conductive material or a transparent insulating material. The transparent conductive material may include ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In 4 Sn 3 O 12 and Zn (1-x) Mg x O (0≤x≤1) or a conductive polymer. The transparent insulating material may include SiO 2 、SiN、TiO 2 、HfO、TaO 2 and MgF 2 The second insulating layer 150 may be disposed on the transparent protection layer 138 and the first insulating layer 130 .
[0065] For example, referring to Figure 5 When the transparent protective layer 138 is formed of a transparent insulating material, a first opening OPa exposing the first contact region CT1 and a second opening OPb exposing the third contact region CT3 may be formed through the first insulating layer 130 and the second insulating layer 150. The first opening OPa may be located in the recessed region (E), and the second opening OPb may be located in the mesa region (M).
[0066] The first connection electrode 155n may be disposed on the second insulating layer 150, and may extend through the first opening OPa onto the first contact region CT1 of the first conductive type semiconductor layer 115 to be electrically connected to the first conductive type semiconductor layer 115. The first connection electrode 155n may contact the first contact region CT1 of the first conductive type semiconductor layer 115. In an example, a buffer layer may be disposed between the first connection electrode 155n and the first contact region CT1 of the first conductive type semiconductor layer 115 to improve contact resistance characteristics between the first connection electrode 155n and the first contact region CT1 of the first conductive type semiconductor layer 115.
[0067] The second connection electrode 155p may be disposed on the second insulating layer 150 and may extend to an upper portion of the third contact region CT3 of the reflective electrode layer 144 through the second opening OPb to be electrically connected to the reflective electrode layer 144. Therefore, the second connection electrode 155p may be electrically connected to the second conductive type semiconductor layer 125 through the reflective electrode layer 144.
[0068] Alternatively, for example, when the transparent protection layer 138 is formed of a transparent conductive material, the second opening OPb may be formed through the second insulating layer 150 to expose the contact region of the transparent protection layer 138. The second connection electrode 155p may be disposed on the second insulating layer 150 and may be connected to the transparent protection layer 138 through the second opening OPb to be electrically connected to the reflective electrode layer 144 and the second conductive type semiconductor layer 125.
[0069] The first connection electrode 155n and the second connection electrode 155p may be configured to be disposed on the second insulating layer 150, may be formed of the same material, and may be separated from each other. When viewed from above, the first connection electrode 155n may contact the first edge S1, and the second connection electrode 155p, which may be referred to as a 'connection electrode', may contact the third edge S3.
[0070] The third insulating layer 160 may be disposed on the first connection electrode 155n and the second connection electrode 155p, and may have a third opening 160a exposing the fourth contact region CT4 of the first connection electrode 155n and a fourth opening 160b exposing the fifth contact region CT5 of the second connection electrode 155p. For example, the first connection electrode 155n and the second connection electrode 155p may be formed of a material including one or more of Al, Au, W, Pt, Si, Ir, Ag, Cu, Ni, Ti, Cr and alloys thereof.
[0071] like Figure 5 As shown, each of the first connection electrode 155n and the second connection electrode 155p employed in the example embodiment may have a first electrode layer 155a including an edge region E1 and an inner region E2 surrounded by the edge region E1, and a second electrode layer 155b disposed on the inner region E2 of the first electrode layer 155a. The first electrode layer 155a and the second electrode layer 155b may be respectively Figures 1 to 2C The described first electrode layer 29a and second electrode layer 29b are the same.
[0072] That is, the edge region E1 of the first electrode layer 155a may have a thickness less than the thickness of the inner region E2 of the first electrode layer 155a. The edge region E1 of the first electrode layer 155a may have a thickness that gradually decreases toward the outside. In this way, the first electrode layer 155a may be formed to be wider than the second electrode layer 155b, and may protrude to the outside of the second electrode layer 155b (for example, may protrude beyond the second electrode layer 155b) to have a tail shape. The inclination angle of the tail in the cross section in the thickness direction may be about 30 degrees or less.
[0073] In example embodiments, the first electrode layer 155a and the second electrode layer 155b may be functionally separated layers. For example, the first electrode layer 155a may include a reflective layer, and the second electrode layer 155b may be provided as a current distribution layer. For example, the first electrode layer 155a may include at least one of Ag, Cr, Ni, Ti, Al, Rh, Ru, Pd, Au, Cu, and combinations thereof, for example, at least one of Ag and Al. The second electrode layer 155b may include at least one of Au and Cu. The second electrode layer 155b may have a thickness greater than that of the first electrode layer 155a to exhibit a sufficient current distribution function.
[0074] Fig. 6A and Figure 6B 2 is a diagram showing the light extraction effect of the connection electrode structure. Fig. 6A shows a connection electrode structure according to a comparative embodiment, and Figure 6B A connection electrode structure according to example embodiments is shown.
[0075] Reference Fig. 6A and Figure 6B In the case of the connection electrode 155 according to the example embodiment, since the area of the first electrode layer 155a (serving as a reflective layer) is Fig. 6A The area of the first electrode layer 155a of the connecting electrode 155' of the comparative example is increased compared to that of the MQW structure, so the light emitted by the MQW structure (see ①) can be more effectively reflected toward the substrate. In addition, the amount of light (see ②) that is re-reflected from the package and then absorbed by the metal area of the device can be reduced, thereby significantly improving the luminous flux characteristics of the device. In addition, in the connecting electrode 155 according to the example embodiment, since the area of the first electrode layer 155a is increased, the adhesion performance of the first electrode layer 155a and the second insulating layer 150 as the underlying film can be improved, thereby improving product reliability.
[0076] According to the previous discussion, the above FIG. 2A to FIG. 2CThe process shown forms the connection electrode 155 employed in the example embodiment. In detail, the connection electrode 155 can be implemented by performing different deposition processes with respect to the first electrode layer 155a and the second electrode layer 155b using a negative photoresist pattern having an undercut structure. For example, the first electrode layer 155a can be formed using a sputtering process that provides relatively high radial and angular uniformity, and the second electrode layer 155b can be formed on the first electrode layer 155a through an opening having an undercut structure by electron beam evaporation.
[0077] In example embodiments, the first connection electrode 155n and the second connection electrode 155p may further include a conductive bonding layer disposed between the first electrode layer 155a and the second insulating layer 150, or a conductive barrier layer disposed between the first electrode layer 155a and the second electrode layer 155b. The conductive bonding layer and the conductive barrier layer may include at least one of Cr, Ti, and Ni, or include a transparent electrode material such as ITO. The conductive bonding layer and the conductive barrier layer may be formed by continuously performing a deposition process such as sputtering that is the same as the deposition process of the first electrode layer 155a. Therefore, the conductive bonding layer and the conductive barrier layer may be formed to have an area similar to that of the first electrode layer 155a. The first electrode layer 155a may be formed by a plurality of pairs together with the conductive barrier layer (e.g., a Cr layer).
[0078] The first electrode pad 165n may be arranged on the fourth contact region CT4 of the first connection electrode 155n, and the second electrode pad 165p may be arranged on the fifth contact region CT5 of the second connection electrode 155p. The first solder column 170n may be arranged on the first electrode pad 165n, and the second solder column 170p may be arranged on the second electrode pad 165p. The first solder column 170n and the second solder column 170p may be formed of a conductive material such as Sn, AuSn, etc.
[0079] The first solder pillar 170n and the second solder pillar 170p may be provided with a molding portion 172 covering the side surfaces of the first solder pillar 170n and the second solder pillar 170p. The molding portion 172 may include reflective powder particles, such as TiO 2 、Al 2 O 3 The upper surface of the molding portion 172 may be lower than the upper surfaces of the first and second solder pillars 170n and 170p.
[0080] The semiconductor light emitting device may include a reflective electrode layer 144 directly on the first insulating layer 130 without the bonding electrode layer 142. Figure 5, the transparent protective layer 138 may also be omitted as needed. In another exemplary embodiment, the semiconductor light emitting device may further include a capping electrode layer disposed on the reflective electrode layer 144. The capping electrode layer may have, for example, a multilayer structure in which titanium (Ti) and nickel (Ni) are alternately stacked.
[0081] In the following, reference will be made to Figures 7 to 20 An example of a method of manufacturing the semiconductor light emitting device 10 according to example embodiments is described. Figure 7 , Fig. 9 , Fig.11 , Fig.13 , Fig.15 , Fig.17 and Fig.19 are schematic plan views of stages in a method of manufacturing a semiconductor light emitting device 10 according to an example embodiment. Figure 8 , Fig.10 , Fig.12 , Fig.14 , Fig.16 , Fig.18 and Fig. 20 Along the Figure 7 , Fig. 9 , Fig.11 , Fig.13 , Fig.15 , Fig.17 and Fig.19 A schematic cross-sectional view taken along line II'.
[0082] Reference Figure 7 and Figure 8 , the light emitting structure 110 may be formed on the substrate 105. The substrate 105 may have a front surface 105s1 and a rear surface 105s2 opposite to the front surface 105s1.
[0083] In an example, a concavo-convex structure may be formed on the front surface 105s1 of the substrate 105. According to example embodiments, the step of forming the concavo-convex structure on the front surface 105s1 of the substrate 105 may be omitted.
[0084] The light emitting structure 110 may be formed on the front surface 105s1 of the substrate 105. The light emitting structure 110 may be formed of a plurality of layers, which may be formed using processes such as metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), molecular beam epitaxy (MBE), etc. For example, the light emitting structure 110 may include a first conductive type semiconductor layer 115, an active layer 120, and a second conductive type semiconductor layer 125 formed in sequence on the front surface 105s1 of the substrate 105. The first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125 may have different conductive types. For example, the first conductive type semiconductor layer 115 may have n-type conductivity, and the second conductive type semiconductor layer 125 may have p-type conductivity. In addition, a transparent electrode layer 140 may be formed on the light emitting structure 110.
[0085] Reference Fig. 9 and Fig.10 , the transparent electrode layer 140, the second conductive type semiconductor layer 125, the active layer 120, and some portions of the first conductive type semiconductor layer 115 may be etched using a photolithography process. In the photolithography process, etching (e.g., wet etching) of the transparent electrode layer 140 and etching (e.g., dry etching) of the light emitting structure 110 may be performed in sequence.
[0086] The light emitting structure 110 may include a recessed region E obtained by removing some portions of the second conductive type semiconductor layer 125, the active layer 120, and the first conductive type semiconductor layer 115, and a mesa region M therearound. The mesa region M may be defined as a region in which the second conductive type semiconductor layer 125, the active layer 120, and the first conductive type semiconductor layer 115 are not etched. The mesa region M may have a relatively protruding shape compared to the shape of the recessed region E. The recessed region E may also be referred to as an etching region.
[0087] The transparent electrode layer 140 may be arranged to be spaced apart from the edge of the second conductive type semiconductor layer 125 by a predetermined interval. Fig. 9 As shown, the spacing distance d of the edge of the transparent electrode layer 140 based on the shortest distance relative to the edge of the second conductive type semiconductor layer 125 can be set to about 2 μm or more. The spacing distance d can be obtained by over-etching the transparent electrode layer 140 (etching time).
[0088] As described above, the transparent electrode layer 140 may be spaced apart from the edge region of the second conductive type semiconductor layer 125 , thereby preventing problems occurring due to light absorption by the transparent electrode layer 140 in the edge region and improving light flux.
[0089] Reference Fig.11 and Fig.12, a first insulating layer 130 including a plurality of holes PD may be formed on the light emitting structure 110. A first transparent protective layer and the first insulating layer 130 may be sequentially formed on the transparent electrode layer 140, and the plurality of holes PD may pass through the first insulating layer 130 to expose a portion of the transparent electrode layer 140. The plurality of holes PD may be arranged in the mesa region M.
[0090] Reference Fig.13 and Fig.14 , the bonding electrode layer 142 and the reflective electrode layer 144 may be formed on the first insulating layer 130. The bonding electrode layer 142 and the reflective electrode layer 144 may be formed on the mesa region M, and may be formed on a portion of the first insulating layer 130.
[0091] Reference Fig.15 and Fig.16 , a transparent protective layer 138 may be formed on the reflective electrode layer 144. The transparent protective layer 138 may cover the upper surface and the side surface of the reflective electrode layer 144 and the side surface of the bonding electrode layer 142. The transparent protective layer 138 may cover a portion of the first insulating layer 130 adjacent to the reflective electrode layer 144. For example, the transparent protective layer 138 may be formed by forming a photoresist pattern exposing a region where the transparent protective layer 138 is to be formed, and then by performing a physical deposition process such as sputtering.
[0092] Reference Fig.17 and Fig.18 , a second insulating layer 150 may be formed on the first insulating layer 130 and the transparent protective layer 138. A first opening OPa may be formed through the first insulating layer 130 and the second insulating layer 150 and formed to expose a portion of the first conductive type semiconductor layer 115 of the recessed region E. A second opening OPb may be formed through the transparent protective layer 138 and the second insulating layer 150 and formed to expose a portion of the reflective electrode layer 144 of the mesa region M. A surface of the first conductive type semiconductor layer 115 exposed through the first opening OPa may be referred to as a first contact region CT1, and a surface of the reflective electrode layer 144 exposed through the second opening OPb may be referred to as a third contact region CT3.
[0093] Reference Fig.19 and Fig. 20 , the first connection electrode 155n and the second connection electrode 155p may be formed on the substrate 105 including the second insulating layer 150. The first connection electrode 155n and the second connection electrode 155p may be formed by forming a negative photoresist pattern using a photolithography process and then depositing and stripping a conductive material layer. The first connection electrode 155n and the second connection electrode 155p are formed by the same process, and thus may be formed of the same material. The first connection electrode 155n and the second connection electrode 155p may have the same thickness.
[0094] In an exemplary embodiment, the FIG. 2A to FIG. 2C ) is formed by performing different deposition processes relative to the first electrode layer 155a and the second electrode layer 155b to realize the first connection electrode 155n and the second connection electrode 155p. For example, the first electrode layer 155a can be formed by a sputtering process that provides relatively high radial and angular uniformity, and the second electrode layer 155b can be formed by electron beam evaporation.
[0095] Each of the first connection electrode 155n and the second connection electrode 155p may include: a first electrode layer 155a including an edge area E1 and an inner area E2 surrounded by the edge area E1; and a second electrode layer 155b arranged on the inner area E2 of the first electrode layer 155a. The first electrode layer 155a may be formed to be wider than the second electrode layer 155b, and may protrude beyond the second electrode layer 155b to have a tail shape. In a cross section in the thickness direction thereof, the inclination angle of the tail may be 30 degrees or less.
[0096] The first electrode layer 155a and the second electrode layer 155b employed in the example embodiment may be functionally divided into a reflective layer and a current distribution layer, respectively. For example, the first electrode layer 155a may include at least one of Ag, Cr, Ni, Ti, Al, Rh, Ru, Pd, Au, Cu, and combinations thereof, for example, at least one of Ag and Al. In addition, the second electrode layer 155b may include at least one of Au and Cu.
[0097] Since the area of the first electrode layer 155a used as a reflective layer is increased, the light extraction efficiency can be improved, and the amount of light re-reflected from the package and then re-absorbed by the device can be reduced, thereby significantly improving the light flux characteristics. In addition, the adhesion performance of the first electrode layer 155a and the second insulating layer 150 as an underlying film can be improved.
[0098] The first connection electrode 155n may be electrically connected to the first contact region CT1 of the first conductive type semiconductor layer 115. The second connection electrode 155p may be electrically connected to the third contact region CT3 of the reflective electrode layer 144.
[0099] In addition, refer to Figure 3 and Figure 4, a third insulating layer 160 including a third opening 160a and a fourth opening 160b may be formed on the substrate 105 including the first connection electrode 155n and the second connection electrode 155p. The third opening 160a of the third insulating layer 160 may expose a portion of the first connection electrode 155n, and the fourth opening 160b of the third insulating layer 160 may expose a portion of the second connection electrode 155p. A portion of the first connection electrode 155n exposed by the third opening 160a of the third insulating layer 160 may be referred to as a fourth contact region CT4, and a portion of the second connection electrode 155p exposed by the fourth opening 160b may be referred to as a fifth contact region CT5.
[0100] The first electrode pad 165n and the second electrode pad 165p may be formed on the substrate 105 including the third insulating layer 160. The first electrode pad 165n may be formed on the fourth contact region CT4 of the first connection electrode 155n, and the second electrode pad 165p may be formed on the fifth contact region CT5 of the second connection electrode 155p. The first electrode pad 165n and the second electrode pad 165p may be under bump metal (UBM) pads. In an example, the number and arrangement of the first electrode pad 165n and the second electrode pad 165p may be modified differently.
[0101] The first solder pillar 170n and the second solder pillar 170p may be formed on the substrate 105 including the first electrode pad 165n and the second electrode pad 165p. The first solder pillar 170n may be formed on the first electrode pad 165n, and the second solder pillar 170p may be formed on the second electrode pad 165p. The molding portion 172 may be formed to cover the side surfaces of the first solder pillar 170n and the second solder pillar 170p.
[0102] The semiconductor light emitting device 10 can be commercialized as a package. Fig.21 An example in which the above-described semiconductor light emitting device 10 is applied to a package is described. Fig.21 is a schematic cross-sectional view illustrating an example in which a semiconductor light emitting device according to example embodiments is applied to a package.
[0103] Reference Fig.21 , the semiconductor light emitting device package 1000 may include a semiconductor light emitting device 1001, a package body 1002, a pair of lead frames 1010, and a packaging portion 1005. In this case, the semiconductor light emitting device 1001 may be Figure 1 and FIG. 2A to FIG. 2C The semiconductor light emitting device 10 , and the description of the semiconductor light emitting device 10 will be omitted.
[0104] The semiconductor light emitting device 1001 may be mounted on a lead frame 1010 and may be electrically connected to the lead frame 1010. The pair of lead frames 1010 may include a first lead frame 1012 and a second lead frame 1014. The semiconductor light emitting device 1001 may be mounted on a lead frame 1010 and may be electrically connected to the lead frame 1010. Figure 4 The first solder pillar 170 n and the second solder pillar 170 p are connected to the first lead frame 1012 and the second lead frame 1014 .
[0105] The package body 1002 may include a reflective cup to improve light reflection efficiency and light extraction efficiency. In the reflective cup, a package portion 1005 formed of a light-transmitting material may be formed to encapsulate the semiconductor light emitting device 1001. The package portion 1005 may include a wavelength conversion material such as a phosphor, quantum dots, etc.
[0106] As described above, according to example embodiments, a semiconductor light emitting device having improved luminous flux and reliability can be provided. That is, according to embodiments, the semiconductor light emitting device may include a connecting electrode having a first functional layer (reflective layer) that is larger than a second functional layer (current distribution layer) thereon, thereby more efficiently reflecting light from the larger reflective layer (extending beyond the second layer thereon) toward the substrate and re-reflecting light from the package, thereby reducing the amount of light entering the device.
[0107] In addition, the bonding characteristics of the lower insulating layer can be improved. By using the same photoresist mask in the process of forming the connecting electrode, a first functional layer (e.g., an Al layer or an Ag layer) can be formed using a radioactive deposition process such as sputtering, and a second functional layer can be formed using another deposition process such as electron beam evaporation through the same photoresist mask. In addition, a transparent electrode such as ITO can be spaced about 2 μm or more from the edge of the mesa region. Therefore, the ODR reflection can be improved without losing the operating voltage, thereby increasing the luminous flux.
[0108] Example embodiments are disclosed herein, and although specific terms are used, they are used and interpreted only in a general and descriptive sense rather than for the purpose of limitation. In some cases, as will be apparent to those of ordinary skill in the art, unless otherwise noted, the features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in conjunction with the features, characteristics, and / or elements described in conjunction with other embodiments as the application is submitted. Therefore, it should be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the invention as set forth in the appended claims.
Claims
1. A semiconductor light emitting device, comprising: A light emitting structure comprising a semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type; a transparent electrode layer, which is located on the semiconductor layer of the second conductivity type, and the transparent electrode layer is spaced apart from an edge of the semiconductor layer of the second conductivity type; a first insulating layer, which is located on the light emitting structure to cover the transparent electrode layer, the first insulating layer comprising a plurality of holes connected to the transparent electrode layer; a reflective electrode layer, which is located on the first insulating layer and connected to the transparent electrode layer through the plurality of holes; a second insulating layer, which is located on the first insulating layer to cover the reflective electrode layer, wherein the second insulating layer comprises at least one first opening and at least one second opening; a first connecting electrode, which is located on the second insulating layer and connected to the reflective electrode layer through the at least one first opening; a second connecting electrode, which is located on the second insulating layer and connected to the first conductive type semiconductor layer through the at least one second opening; a third insulating layer located on the second insulating layer and including a third opening exposing a portion of the first connecting electrode and a fourth opening exposing a portion of the second connecting electrode; a first electrode pad contacting the first connection electrode through the third opening; as well as a second electrode pad contacting the second connection electrode through the fourth opening, wherein each of the first connecting electrode and the second connecting electrode comprises a first electrode layer, a second electrode layer, and at least one of a conductive bonding layer and a conductive barrier layer disposed between the first electrode layer and the second electrode layer, When viewed in a cross section in the thickness direction, the inclination angle of the first electrode layer is smaller than the inclination angle of the second electrode layer.
2. The semiconductor light emitting device according to claim 1, wherein: The thickness of the edge region of the first electrode layer decreases outwards.
3. The semiconductor light emitting device according to claim 1, wherein: The thickness of the second electrode layer is greater than that of the first electrode layer.
4. The semiconductor light emitting device according to claim 1, wherein: The first electrode layer includes at least one of silver (Ag), chromium (Cr), nickel (Ni), titanium (Ti), aluminum (Al), rhodium (Rh), ruthenium (Ru), palladium (Pd), gold (Au), copper (Cu) and combinations thereof. 5 . The semiconductor light emitting device according to claim 1 , further comprising a transparent protection layer located on the first insulating layer to cover the reflective electrode layer.
6. The semiconductor light emitting device according to claim 5, wherein: The transparent protection layer includes a transparent insulating material, and the at least one opening extends to the transparent protection layer to be connected to the reflective electrode layer.
7. The semiconductor light emitting device according to claim 6, wherein: The transparent protective layer includes at least one of SiO2, SiN, TiO2, HfO and MgF2.
8. The semiconductor light emitting device according to claim 5, wherein: The transparent protection layer includes a transparent conductive material, and the connection electrode is electrically connected to the reflective electrode layer through the transparent protection layer.
9. The semiconductor light emitting device according to claim 1, wherein: At least one of the first insulating layer and the second insulating layer includes at least one of SiO 2 , SiN, TiO 2 , HfO, TaO 2 , and MgF 2 .
10. The semiconductor light emitting device according to claim 1, wherein: The transparent electrode layer includes indium tin oxide (ITO), zinc-doped indium tin oxide (ZITO), zinc indium oxide (ZIO), gallium indium oxide (GIO), zinc tin oxide (ZTO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), gallium-doped zinc oxide (GZO), In4Sn3O 12 and zinc magnesium oxide Zn (1-x) Mg x At least one of O, where 0≤x≤1.
11. The semiconductor light emitting device according to claim 1, wherein: The reflective electrode layer includes at least one of Ag, Cr, Ni, Ti, Al, Rh, Ru, Pd, Au, Cu and combinations thereof.
12. The semiconductor light emitting device according to claim 1, wherein: The first insulating layer has a distributed Bragg reflector structure including alternately stacked insulating films having different refractive indices.
13. The semiconductor light emitting device according to claim 1, wherein: The first insulating layer and the reflective electrode layer have an omnidirectional reflector structure. 14 . The semiconductor light emitting device according to claim 1 , further comprising a bonding electrode layer between the first insulating layer and the reflective electrode layer.
15. The semiconductor light emitting device according to claim 14, wherein: The bonding electrode layer includes ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In4Sn3O 12 and Zn (1-x) Mg x At least one of O, where 0≤x≤1.
16. A semiconductor light emitting device, comprising: A light emitting structure comprising a semiconductor layer of a first conductivity type, an active layer, and a semiconductor layer of a second conductivity type; a transparent electrode layer, which is located on the semiconductor layer of the second conductivity type; a first insulating layer, which is located on the light emitting structure to cover the transparent electrode layer, the first insulating layer comprising a plurality of holes connected to the transparent electrode layer; a reflective electrode layer, which is located on the first insulating layer and connected to the transparent electrode layer through the plurality of holes; a second insulating layer, located on the first insulating layer to cover the reflective electrode layer, wherein the second insulating layer comprises at least one opening; as well as a connecting electrode, which is located on the second insulating layer and connected to the reflective electrode layer through the at least one opening, The connecting electrode comprises: a first electrode layer having an edge region and an inner region surrounded by the edge region; and a second electrode layer located on the inner region of the first electrode layer, wherein the thickness of the edge region is smaller than the thickness of the inner region. When viewed in a cross section in the thickness direction, the inclination angle of the first electrode layer is smaller than the inclination angle of the second electrode layer.
17. The semiconductor light emitting device according to claim 16, wherein: The thickness of the edge region of the first electrode layer decreases outward.
18. The semiconductor light emitting device according to claim 17, wherein: When viewed in cross section in the thickness direction, the edge region of the first electrode layer has an inclination angle of 30 degrees or less.
19. The semiconductor light emitting device according to claim 16, wherein: The thickness of the second electrode layer is greater than that of the first electrode layer.
20. The semiconductor light emitting device according to claim 16, wherein: The first electrode layer includes at least one of Ag and Al, and the second electrode layer includes at least one of Au and Cu.
21. The semiconductor light emitting device according to claim 16, further comprising: a third insulating layer, which is located on the second insulating layer and includes an opening exposing a portion of the connecting electrode; as well as Bonding An electrode is located on the portion of the connecting electrode.