Hybrid switched capacitor converter with zero voltage switching

Abstract

The voltage converter circuit includes a charge pump circuit, a switching converter circuit, and a control circuit. The charge pump circuit includes a plurality of switch circuits connected in series. The switching converter circuit includes a first inductor coupled to an output node of the voltage converter circuit and a second inductor coupled to the series connection of the plurality of switch circuits. The control circuit is configured to control activation of the plurality of switch circuits to produce a regulated voltage at an output node, and to activate each of the plurality of switch circuits when a drain-source voltage of the switch circuit is zero volts.

Description

Technical Field

[0001] This document relates to integrated circuits and, more particularly, to power converter circuits for providing a regulated voltage from an input voltage. Background Art

[0002] Electronic systems may include devices that require a regulated voltage supply. Switching power converter circuits may be used to provide a regulated voltage to the load. However, the power levels of electrical loads continue to increase. As the required power levels increase, switching losses can significantly reduce the efficiency of the power converter circuit. SUMMARY OF THE INVENTION

[0003] The document generally relates to power converter circuits and methods of operating the same. In certain aspects, a voltage converter circuit includes a charge pump circuit, a switching converter circuit, and a control circuit. The charge pump circuit includes a plurality of switch circuits connected in series. The switching converter circuit includes a first inductor coupled to an output node of the voltage converter circuit and a second inductor coupled to the series connection of the plurality of switch circuits. The control circuit is configured to control activation of the plurality of switch circuits to produce a regulated voltage at an output node, and to activate each of the plurality of switch circuits when a drain-source voltage of the switch circuit is zero volts.

[0004] In certain aspects, a method of operating a voltage converter circuit includes: charging a first inductor of a switching converter circuit of the voltage converter circuit and a second inductor of the voltage converter circuit using energy provided by a charge pump circuit of the voltage converter circuit, the charge pump circuit comprising multiple switch circuits connected in series; and activating the multiple switch circuits in a prescribed sequence to produce a regulated voltage at an output node of the voltage converter circuit, wherein each multiple switch circuit is activated when a drain-source voltage of the switch circuit is zero volts.

[0005] In certain aspects, a power supply circuit includes a charge pump circuit, a buck switching converter circuit, and a control circuit. The charge pump circuit includes a plurality of switch circuits connected in series. The buck switching converter circuit includes a first inductor coupled to an output node of the power supply circuit; and a second inductor coupled to the series connection of the plurality of switch circuits. The control circuit controls activation of the plurality of switch circuits according to a duty cycle to produce a regulated voltage at the output node, and activates each of the plurality of switch circuits when the drain-source voltage of the switch circuit is zero volts.

[0006] This section is intended to provide an overview of the subject matter of this patent application. Its purpose is not to provide an exclusive or exhaustive explanation of the present invention. A detailed description is included to provide further information about this patent application. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In the drawings, which are not necessarily drawn to scale, the same numerals may describe similar components in different views. The same numerals with different letter suffixes may represent different instances of similar components. The drawings illustrate various embodiments discussed in this document by way of example and not by way of limitation.

[0008] Figure 1A is an example of a portion of a divide-by-two charge pump circuit of one aspect.

[0009] Figure 1B is an example of a portion of a buck converter circuit of one aspect.

[0010] Figure 2 is an example of a portion of a hybrid switched capacitor converter circuit of one aspect.

[0011] Figure 3A is a graphical representation of waveforms associated with hard switching of a field effect transistor.

[0012] Figure 3B is a graphical representation of waveforms associated with zero voltage switching of a field effect transistor in one aspect.

[0013] Figure 4 is a circuit diagram of an example of a zero voltage switching hybrid switched capacitor voltage converter circuit of one aspect.

[0014] Figure 5 is a flow chart of a method of operating a voltage converter circuit in one aspect.

[0015] Figure 6 is a timing diagram of example waveforms for activating a switching circuit with zero voltage switching in one aspect.

[0016] Figures 7A-7E Shows the use of Figure 6 The signal waveform activates the operation of the voltage converter circuit.

[0017] Figure 8-12 Additional examples of hybrid switched capacitor voltage converter circuits according to some aspects are shown. DETAILED DESCRIPTION OF THE INVENTION

[0018] Power converter circuits can be used to provide a regulated voltage, which is a circuit power supply for an electronic system. Some power converter circuits are switching power converter circuits that convert an input voltage to a regulated output voltage. As the power level of electrical loads continues to increase, system designers of electronic systems tend to reduce the operating or supply voltage from a higher voltage bus. For a step-down or buck power converter, a regulated voltage conversion can provide a regulated output voltage that is lower than the input voltage of the power converter circuit. However, converting a high bus voltage to a lower output voltage results in high switching losses. In order to maintain reasonable conversion efficiency, converters typically operate at a low switching frequency. However, converters operating at low frequencies typically have bulky magnetic components (e.g., large inductors) and slow transient response.

[0019] Figure 1A is an example of a portion of a binary charge pump circuit. In operation, switches Q1-Q4 are activated in pairs using gate connections G1-G4. The switches are n-type field effect transistors (NFETs). Simultaneous activation of switches Q1 and Q3 and deactivation of switches Q2 and Q4 have a negative effect on V IN The flying capacitor (C FLY ) and the midpoint capacitor (C MID ) to charge. The voltage at the circuit output drops by twice the voltage at the input, or V OUT =V IN / 2. Activate switches Q2 and Q4 together and deactivate switches Q1 and Q3 in parallel arrangement C FLY and C MID and drives the output. Figure 1B is an example of a portion of a buck converter circuit including a magnetic assembly - inductor L.

[0020] Figure 2 is an example of a portion of a hybrid switched capacitor converter circuit for high voltage input step-down conversion. The hybrid converter is Figure 1A The charge pump and Figure 1B The combination of switches Q3 and Q4, the inductor and Figure 2 The capacitor within the dashed line comprises the buck converter. The buck converter consists of V IN / 2 instead of V IN power supply. The switching losses in a buck converter are a function of the square of the power supply. By reducing the supply voltage, the switching losses are significantly reduced. Dividing the voltage also allows the size of the inductor to be reduced and allows the switching frequency of the converter to be increased.

[0021] The efficiency of the hybrid converter circuit can be further improved if zero voltage switching (ZVS) action of the switches is used in the circuit operation. In ZVS, the FET is DS) is not activated until it approaches zero volts. ZVS is sometimes referred to as soft switching, and typical operation of a switching converter involves hard switching.

[0022] Figure 3A is an illustration of the waveforms associated with hard switching of a FET. The waveform shows the gate-source voltage (V GS ) at the FET's V DS The waveform also shows that V GS When applied to the FET to activate the gate, the drain-source current (I DS ) first ramps up to its DC value, then the FET’s V DS begins to decrease. The FET overlap I DS and V DS Contributes to switching losses of converter circuits including hybrid converter circuits. Figure 3B is a graphical representation of the waveforms associated with ZVS of a FET. The waveform shows that at the V DS Do not apply V before it approaches zero. GS to activate the FET. This minimizes the FET’s V DS and I DS overlap.

[0023] In order to reduce conduction loss, the on-resistance (R DSON ) is chosen to be as small as possible, but this comes at the expense of increased switching losses. With ZVS switching, the tradeoff between conduction losses and switching losses can be eliminated. In addition, since switching losses are a function of frequency, minimizing switching losses through ZVS allows the converter to switch at higher frequencies while maintaining good efficiency; further reducing the size of the magnetic components.

[0024] exist Figure 2 In the hybrid converter circuit, the circuit can be designed so that FETs Q1 and Q3 are turned on at the same time. However, the V DS When turned on, it will be close to V IN / 2, and they will be hard switched during circuit operation.

[0025] Figure 4 4 is a circuit diagram of an example of a zero voltage switching hybrid switched capacitor voltage converter circuit. The hybrid converter circuit 400 includes a charge pump circuit and a switching converter circuit. The charge pump circuit may have a bisection circuit topology. The charge pump circuit includes a V IN and circuit ground, and includes four switching circuits (Q1-Q4) connected in series between the capacitor C FLY and C MID .exist Figure 4 In the example above, the switch circuit is an NFET. The body diode of the NFET is also Figure 4The switching converter circuit includes switching circuits Q3 and Q4, an output capacitor C O 、Inductor L S and auxiliary inductor L AUX . Inductor L S is coupled to the output node of the voltage converter circuit. AUX is coupled to circuit node SW2, which is the junction of switches Q2 and Q3 and C MID The hybrid converter circuit 400 also includes a control circuit 405 that controls the activation of the multi-switch circuit. In some aspects, the control unit may include one or both of a programmable delay circuit and a zero voltage comparator circuit across the drain and source of the FET to control the timing of the conduction of the switches Q1-Q4.

[0026] Figure 5 Yes Operation Figure 4 At 505, the inductor L of the switching converter circuit is switched using energy provided by the charge pump circuit. S and inductor L AUX At 510, the switch circuits Q1-Q4 are activated by the control circuit 405 to produce a regulated voltage at the output node. Each switch circuit Q1-Q4 is activated when the drain-source voltage of the switch circuit is zero volts, that is, each switch is activated with ZVS.

[0027] Figure 6 is a timing diagram of example waveforms for activating switch circuits Q1-Q4 with ZVS. The waveforms may be implemented using circuits included in control unit 450. The control circuit controls Q1 and Q3 to be activated or "turned on" as a pair and controls Q2 and Q4 together as a pair, although there is a difference in the rising edge of the on-time between the switches of the switch pair. The Q2, Q4 switch pair is a complementary switch to the Q1, Q3 switch pair, and the on-time of Q1, Q3 does not overlap with the on-time of Q2, Q4. The Q1, Q3 on-time and the duty cycle of the switching cycle determine the output voltage V O The control circuit 405 may use feedback of the output voltage to vary the duty cycle to produce a regulated output voltage.

[0028] Figures 7A-7E Shows when using Figure 6 The signal waveform activates the operation of the voltage converter circuit. Fig. 7A Shows Figure 6 Operations before time t0 in . Figure 6 As shown, before time t0, if V GS (Q2) and V GS (Q4) is high, Q2 and Q4 are turned on. Flying capacitor C FLYConnected in parallel to the midpoint capacitor C through switches Q2 and Q4 MID There is a redistribution of charge between the two capacitors, causing current to flow through L in the direction shown by the arrows as a dotted line. AUX When current flows through the inductor L AUX When the current flows through the inductor L S The current is indicated by the solid arrow. During this period, the drain and source (C DS ) makes the drain voltage of Q3 higher than the source voltage of Q3, which is approximately V IN / 2.

[0029] Figure 7B shows the voltage converter circuit in Figure 6 In the operation from time t0 to time t1. At time t0, switches Q2 and Q4 are turned off by the control circuit. The L AUX The energy in will now be released and the current will continue to flow in the same direction (given by Figure 7B However, since Q2 and Q4 are turned off, the current will flow through the body diodes of switches Q3 and Q4 to complete the path. When the current flows through the body diode of Q3, the parasitic capacitance C of Q3 DS will be discharged, and if Figure 6 As shown, the drain-source voltage (V DS (Q3)) will decrease towards zero. Then switch Q3 is turned on at time t1. Because when Q3 is turned on, V DS (Q3) is zero or close to zero, so soft switching of Q3 is effectively achieved.

[0030] Figure 7C shows a voltage converter circuit from Figure 6 The operation from time t1 to time t2 in FIG. 1 is performed. Starting from t1, the current in switch Q3 increases. The circuit node labeled SW3 remains at a diode voltage below ground until the current in Q3 is higher than the current flowing to inductor L. S The current I LS Once the Q3 current exceeds I LS , the extra current will charge the output capacitance of switch Q4 and discharge the parasitic capacitance C of Q1. DS During this period, energy is again stored in the inductor L AUX At t2, the circuit node labeled SW2 is charged to approximately V IN / 2, and V DS (Q1) is zero volts. At time t2, Q1 is then turned on. Because when Q1 is turned on, V DS (Q1) is zero voltage, so soft switching of Q1 is effectively achieved.

[0031] Fig.7D shows a voltage converter circuit from Figure 6 The operation from time t2 to time t3 in FIG. Fig.7D As shown, switches Q1 and Q3 are turned on, and switches Q2 and Q4 are turned off from time t2 to time t3. AUX (I LAUX ) the current from C MID Flows to circuit node SW2. The parasitic capacitance C of Q2 DS There will be a voltage at circuit node SW1 that is greater than circuit node SW2.

[0032] Fig. 7E shows a voltage converter circuit from Figure 6 The operation from time t3 to time t4. At time t3, Q1 and Q3 are disconnected. The L AUX The energy in is now released, and the current I LAUX flows through the body diode of Q2 and releases Q2's C DS At this time, the inductor current I LS The current is freewheeling through the body diode of switch Q4. Fig. 7E As shown, when switch Q2 is turned on at time t4, V DS (Q2) is zero volts. When switch Q4 is turned on at time t4, V DS (Q4) is also zero volts. Therefore, soft switching of Q2 and Q4 is effectively achieved. Figure 6 The time t5 in is the beginning of the next switching cycle. Therefore, Figure 4 All switches of the circuit are operated in ZVS, and the efficiency is improved by reducing the switching loss.

[0033] The concepts previously described here can be extended to other circuit implementations. Figure 4 In the case of auxiliary inductor L AUX Coupled to the midpoint capacitor C MID and a circuit node labeled SW2 which is the series connection between switches Q2 and Q3. Figure 8 and 9 Another example of a hybrid switched capacitor voltage converter circuit is shown. Figure 8 In, L AUX coupled to circuit node SW2 and to midpoint capacitor C MID1 and C MID2 When switches Q1 and Q3 are in Figure 8 When the capacitor C MID2 will be connected with capacitor C FLY and C MID1 In parallel. Fig. 9 In, L AUX coupled to circuit node SW2 and midpoint capacitor CMID2 When switches Q1 and Q3 are in Fig. 9 When the capacitor C FLY and C MID2 in parallel.

[0034] Fig.10 is another example of a hybrid switched capacitor voltage converter circuit. In this example, the auxiliary inductor L AUX Flying capacitor C coupled to the charge pump circuit FLY The auxiliary inductor is also coupled to circuit node SW3, which is the series connection between switches Q3 and Q4. When switches Q2 and Q4 are turned on, the flying capacitor C FLY Through Q2 to the midpoint capacitor C MID When switch Q2 is turned off, the FLY The auxiliary inductor I flows to the circuit node SW1 LAUX The current is transferred from switch Q2 to the body diode of switch Q1. For ZVS of Q1, when V DS When (Q1) drops to zero volts, switch Q1 can be turned on. After Q1 is turned on, the current I flowing to the circuit node SW3 LAUX will increase, and then charge the output capacitance of Q4 to V MID When V DS When (Q3) drops to zero volts of Q3's ZVS, switch Q3 turns on.

[0035] Fig.11 Similar to Fig.10 , except that circuit node SW2 is coupled to the midpoint capacitor C MID1 and C MID2 The midpoint connection. Fig.12 Similar to Fig.10 , except for the midpoint capacitor C MID2 Coupled to V IN The circuits and methods described herein provide a control scheme for ZVS of all switches in a hybrid switched capacitor voltage converter circuit. The ZVS control scheme minimizes switching losses and allows for smaller magnetic components and faster response times.

[0036] Other descriptions and aspects

[0037] Aspect 1 may include subject matter, such as a voltage converter, including a charge pump circuit, a switching converter circuit, and a control circuit. The charge pump circuit includes a plurality of switch circuits connected in series. The switching converter circuit includes a first inductor coupled to an output node of the voltage converter circuit and a second inductor coupled to the series connection of the plurality of switch circuits. The control circuit is configured to control activation of the plurality of switch circuits to produce a regulated voltage at an output node, and to activate each of the plurality of switch circuits when a drain-source voltage of the switch circuit is zero volts.

[0038] In aspect 2, the subject matter of aspect 1 may optionally include: a charge pump circuit including a divide-by-two circuit topology, and the second inductor is coupled to a midpoint capacitor of the charge pump circuit.

[0039] In aspect 3, the subject matter of aspect 2 may optionally include four switching circuits connected in series between an input voltage node and a circuit ground node, and the second inductor is connected to the midpoint capacitor and a series connection between a second switching circuit and a third switching circuit of the four switching circuits connected in series.

[0040] In aspect 4, the subject matter of aspect 1 can optionally include: the second inductor is coupled to a flying capacitor of the charge pump circuit.

[0041] In aspect 5, the subject matter of aspect 4 may optionally include four switching circuits connected in series, including a first switching circuit coupled to an input voltage node and a fourth switching circuit coupled to a circuit ground node, and the second inductor is connected to the series connection between a third switching circuit and a fourth switching circuit of the four switching circuits connected in series.

[0042] In aspect 6, the subject matter of one or any combination of aspects 1-5 optionally includes four switching circuits connected in series, including a first switching circuit connected to an input voltage node and a fourth switching circuit connected to a circuit ground node, and wherein the control circuit is configured to control the first switching circuit and the third switching circuit to be activated as a pair and to control the second switching circuit and the fourth switching circuit to be activated as a pair, wherein the turn-off time of the first and third switching circuits does not overlap with the turn-on time of the second and fourth switching circuits.

[0043] In aspect 7, the subject matter of aspect 6 optionally includes: turning on the third switch circuit after the second and fourth switch circuits are turned off and the drain-source voltage of the third switch circuit is zero volts, and turning on the first switch circuit after the third switch circuit is turned on.

[0044] In aspect 8, the subject matter of aspect 6 optionally includes: turning on the fourth switch circuit after the first switch circuit and the third switch circuit are turned off and the drain-source voltage of the fourth switch circuit is zero volts, and turning on the second switch circuit after the fourth switch circuit is turned on.

[0045] Aspect 9 may include subject matter (such as a method including actions, or a computer-readable storage medium including instructions that, when executed by a circuit (e.g., a processor) of a power management unit, cause the power management unit to perform actions), or may optionally be combined with one or any combination of Aspects 1-8 to include such subject matter, including: using energy provided by a charge pump circuit of a voltage converter circuit to charge a first inductor of a switching converter circuit of the voltage converter circuit and a second inductor of the voltage converter circuit, the charge pump circuit comprising a plurality of switch circuits connected in series; and activating the plurality of switch circuits in a prescribed sequence to produce a regulated voltage at an output node of the voltage converter circuit, wherein each plurality of switch circuits is activated when a drain-source voltage of the switch circuit is zero volts.

[0046] In aspect 10, the subject matter of aspect 9 optionally includes: the multi-switch circuit includes four switch circuits connected in series, including a first switch circuit connected to an input voltage node and a fourth switch circuit connected to a circuit ground node, and wherein activating the multi-switch circuits in a prescribed sequence to generate a regulated voltage at an output node includes activating the first switch circuit and the third switch circuit together and activating the second switch circuit and the fourth switch circuit together to generate a regulated voltage at the output node, wherein the turn-off time of the first and third switch circuits does not overlap with the turn-on time of the second and fourth switch circuits.

[0047] In aspect 11, the subject matter of aspect 10 optionally includes: activating multiple switch circuits in a prescribed order includes activating the third switch circuit after the second and fourth switch circuits are disconnected and the drain-source voltage of the third switch circuit is zero volts; and activating the first switch circuit after the third switch circuit is activated.

[0048] In aspect 12, the subject matter of aspect 11 optionally includes: activating the third switch circuit when the second and fourth switch circuits are disconnected and the drain-source voltage of the third switch circuit is zero volts includes discharging after the second and fourth switch circuits are disconnected to reduce the drain-source voltage of the third switch circuit to zero volts before the third switch is turned on.

[0049] In aspect 13, the subject matter of aspect 11 optionally includes: activating the multiple switch circuits in a specified order includes activating the third switch to reduce the drain-source voltage of the first switch circuit to zero volts before turning on the first switch.

[0050] In aspect 14, the subject matter of aspect 10 optionally includes: activating multiple switch circuits in a prescribed order includes activating the fourth switch circuit after the first switch circuit and the third switch circuit are disconnected and the drain-source voltage of the fourth switch circuit is zero volts; and activating the second switch circuit after the fourth switch circuit is activated.

[0051] In aspect 15, the subject matter of aspect 14 optionally includes: activating the fourth switch circuit after the first and third switch circuits are disconnected and the drain-source voltage of the fourth switch circuit is zero volts includes discharging after the first and third switch circuits are disconnected to reduce the drain-source voltage of the fourth switch circuit to zero volts before the fourth switch is turned on.

[0052] In aspect 16, the subject matter of one or both of aspects 14 and 15 optionally includes: activating the second switching circuit includes discharging the second inductor after the first and third switching circuits are disconnected to reduce the drain-source voltage of the second switching circuit to zero volts before the second switch is turned on.

[0053] In aspect 17, the subject matter of one or any combination of aspects 9-16 optionally includes: charging the first inductor and the second inductor includes charging the first inductor and the second inductor using a charge pump circuit that reduces the input voltage by two times.

[0054] Aspect 18 may include a subject matter (e.g., a power supply circuit) or may optionally combine one or any combination of Aspects 1-17 to include such subject matter, including: a charge pump circuit comprising multiple switch circuits connected in series; a step-down switching converter circuit comprising a first inductor coupled to an output node of the power supply circuit; and a second inductor coupled to the series connection of the multiple switch circuits; and a control circuit configured to control activation of the multiple switch circuits according to a duty cycle to produce a regulated voltage at the output node, and to activate each of the multiple switch circuits when the drain-source voltage of the switch circuit is zero volts.

[0055] In aspect 19, the subject matter of aspect 18 optionally includes: the charge pump circuit is a binary charge pump circuit and includes a midpoint capacitor; the multi-switch circuit includes four switch circuits connected in series between an input voltage node and a circuit ground node; and the second inductor is coupled to the midpoint capacitor of the charge pump circuit and a series connection between a second switch circuit and a third switch circuit of the four switch circuits connected in series.

[0056] In aspect 20, the subject matter of aspect 19 optionally includes: the charge pump circuit also includes a flying capacitor; the multi-switch circuit includes four switch circuits connected in series, including a first switch circuit connected to an input voltage node and a fourth switch circuit connected to a circuit ground node; and the second inductor is connected to a series connection between the flying capacitor and a third switch circuit and a fourth switch circuit of the four switch circuits connected in series.

[0057] These non-limiting aspects may be combined in any arrangement or combination. The above detailed description includes references to the accompanying drawings, which form a part of the detailed description. The accompanying drawings illustrate specific embodiments in which the invention may be implemented. These embodiments are also referred to herein as "embodiments" or "aspects". All publications, patents, and patent documents mentioned in this document are incorporated herein by reference in their entirety, as if individually incorporated by reference. If there is an inconsistency in usage between this document and those documents incorporated by reference, the usage in the cited references should be considered to supplement the usage of this document; for irreconcilable inconsistencies, the usage in this document controls.

[0058] In this document, the terms "one" or "an" are common in patent documents and include one or more than one, independent of any other instances or usages of "at least one" or "one or more". In this document, the term "or" is used to indicate non-exclusivity, for example, "A or B" includes "A but not B", "B but not A", and "A and B", unless otherwise indicated. In the appended claims, the terms "including" and "wherein" are used as equivalents of the corresponding terms "including" and "wherein". In addition, in the following claims, the terms "including" and "comprising" are open-ended, that is, systems, devices, articles, or processes other than the elements listed after this term in the claim are still considered to fall within the scope of the claim. In addition, in the following claims, the terms "first", "second", and "third", etc. are used merely as labels and are not intended to impose numerical requirements on their targets. The method examples described herein may be at least partially machine or computer-implemented.

[0059] The above description is intended to be illustrative rather than restrictive. For example, the above examples (or one or more aspects thereof) may be used in combination with each other. After reading the above description, other embodiments may be used by a person of ordinary skill in the art, for example. The abstract is provided to comply with 37 C.FR § 1.72 (b), allowing the reader to quickly determine the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Moreover, in the above detailed description, various features may be combined together to simplify the disclosure. This should not be interpreted as intending that unclaimed public features are essential to any claim. On the contrary, the subject matter of the invention may be less than all the features of a particular disclosed embodiment. Therefore, the following claims are incorporated herein into the specific embodiments, and each claim itself is a separate embodiment. The scope of the present invention should be determined with reference to the appended claims and the full scope of equivalents given by these claims.

Claims

1. A voltage converter circuit, comprising: a charge pump circuit comprising at least four switch circuits connected in series, a flying capacitor coupled to the series connection between a first switch circuit and a second switch circuit of the at least four switch circuits, and a midpoint capacitor directly coupled to circuit ground; a switching converter circuit comprising a first inductor coupled to an output node of the voltage converter circuit and to a node between a third switching circuit and a fourth switching circuit of the at least four switching circuits; a second inductor including a first terminal coupled to the series connection of the at least four switch circuits and a second terminal coupled in series with the midpoint capacitor or the flying capacitor; and The control circuit is configured as follows: turning on the third switch circuit after the second switch circuit and the fourth switch circuit are turned off and the drain-source voltage of the third switch circuit is zero volts, and turning on the first switch circuit after the third switch circuit is turned on; as well as The fourth switch circuit is turned on after the first switch circuit and the third switch circuit are turned off and the drain-source voltage of the fourth switch circuit is zero volts, and the second switch circuit is turned on after the fourth switch circuit is turned on. 2 . The voltage converter circuit of claim 1 , wherein the charge pump circuit comprises a divide-by-two circuit topology and the second inductor is coupled to the midpoint capacitor of the charge pump circuit. 3 . The voltage converter circuit according to claim 2 , wherein the second inductor is connected to the midpoint capacitor and a series connection between a second switch circuit and a third switch circuit among the at least four switch circuits connected in series.

4. The voltage converter circuit of claim 1 , wherein the at least four switch circuits include the first switch circuit coupled to an input voltage node and the fourth switch circuit coupled to a circuit ground node, and the second inductor is connected to the flying capacitor and a series connection between a third switch circuit and a fourth switch circuit of the at least four switch circuits connected in series.

5. The voltage converter circuit of claim 1 , wherein the at least four switch circuits include the first switch circuit connected to an input voltage node and the fourth switch circuit connected to a circuit ground node, and The control circuit is configured to control the at least four switch circuits so that the turn-on time of the first switch circuit and the third switch circuit does not overlap with the turn-on time of the second switch circuit and the fourth switch circuit.

6. A method of operating a voltage converter circuit, the method comprising: charging a first inductor of a switching converter circuit of the voltage converter circuit and a second inductor of the voltage converter circuit using energy provided by a charge pump circuit of the voltage converter circuit, the charge pump circuit comprising at least four switching circuits connected in series, a flying capacitor coupled to the series connection between a first switching circuit and a second switching circuit of the at least four switching circuits, and a midpoint capacitor coupled directly to circuit ground, wherein the first inductor is coupled to a node between a third switching circuit and a fourth switching circuit of the at least four switching circuits, and wherein the second inductor comprises a first terminal coupled to the series connection of the at least four switching circuits and a second terminal coupled in series with the midpoint capacitor; activating the at least four switching circuits in a predetermined sequence to produce a regulated voltage at an output node of the voltage converter circuit, the predetermined sequence comprising: turning on the third switch circuit after the second switch circuit and the fourth switch circuit are turned off and the drain-source voltage of the third switch circuit is zero volts, and turning on the first switch circuit after the third switch circuit is turned on; as well as The fourth switch circuit is turned on after the first switch circuit and the third switch circuit are turned off and the drain-source voltage of the fourth switch circuit is zero volts, and the second switch circuit is turned on after the fourth switch circuit is turned on.

7. The method of claim 6, wherein the at least four switch circuits include the first switch circuit connected to an input voltage node and the fourth switch circuit connected to a circuit ground node, and Wherein activating the at least four switch circuits in a predetermined order comprises: The on-time of the first switch circuit and the third switch circuit is made not to overlap with the on-time of the second switch circuit and the fourth switch circuit.

8. The method of claim 7, wherein activating the at least four switching circuits in a predetermined sequence comprises: The third switch circuit is activated to reduce the drain-source voltage of the first switch circuit to zero volts before turning on the first switch circuit.

9. The method of claim 7, wherein activating the at least four switching circuits in a predetermined sequence comprises: After the first switch circuit and the third switch circuit are disconnected and the drain-source voltage of the fourth switch circuit is zero volts, activating the fourth switch circuit; as well as After the fourth switch circuit is activated, the second switch circuit is activated.

10. The method of claim 9, wherein activating the fourth switch circuit after the first switch circuit and the third switch circuit are turned off and a drain-source voltage of the fourth switch circuit is zero volts comprises: The first inductor is discharged after the first and third switch circuits are turned off to reduce the drain-source voltage of the fourth switch circuit to zero volts before the fourth switch circuit is turned on.

11. The method of claim 9, wherein activating the second switching circuit comprises: The second inductor is discharged after the first and third switching circuits are turned off to reduce the drain-source voltage of the second switching circuit to zero volts before the second switching circuit is turned on.

12. The method of claim 6, wherein charging the first inductor and the second inductor comprises: The first inductor and the second inductor are charged using a charge pump circuit that reduces an input voltage by half.

13. A power supply circuit, comprising: a charge pump circuit comprising at least four switch circuits connected in series, a midpoint capacitor directly coupled to circuit ground, and a flying capacitor coupled to the series connection between a first switch circuit and a second switch circuit of the at least four switch circuits; a step-down switching converter circuit, the step-down switching converter circuit comprising a first inductor coupled to an output node of the power supply circuit and to a node between a third switch circuit and a fourth switch circuit of the at least four switch circuits; a second inductor including a first terminal coupled directly in series with the flying capacitor or the midpoint capacitor and a second terminal coupled to a second series connection of the at least four switching circuits; and A control circuit, the control circuit being configured to: turning on the third switch circuit after the second switch circuit and the fourth switch circuit are turned off and the drain-source voltage of the third switch circuit is zero volts, and turning on the first switch circuit after the third switch circuit is turned on; as well as The fourth switch circuit is turned on after the first switch circuit and the third switch circuit are turned off and the drain-source voltage of the fourth switch circuit is zero volts, and the second switch circuit is turned on after the fourth switch circuit is turned on.

14. The power supply circuit according to claim 13, wherein: The charge pump circuit is a binary charge pump circuit; The at least four switch circuits are connected in series between an input voltage node and a circuit ground node; and The second inductor is coupled to a midpoint capacitor of the charge pump circuit and a series connection between the second switch circuit and a third switch circuit of the at least four switch circuits connected in series.

15. The power supply circuit according to claim 13, wherein: The at least four switch circuits include the first switch circuit coupled to an input voltage node and the fourth switch circuit coupled to a circuit ground node; and The second inductor is connected to the flying capacitor and a series connection between the third and fourth switch circuits of the at least four switch circuits connected in series.

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