A load current detection method and circuit thereof

Abstract

A load current detection method for a BOOST boost DC / DC conversion system in a DCM working mode, detecting the zero-crossing point of the inductor current of an external inductor and generating a first digital comparison signal; comparing the duty cycle of the first digital comparison signal with the duty cycle of the second digital comparison signal; wherein the duty cycle of the second digital comparison signal represents the magnitude of the load current detection threshold; when the duty cycle of the first digital comparison signal is greater than the duty cycle of the second digital comparison signal, the second load state signal is output as a periodic pulse digital signal; when the duty cycle of the first digital comparison signal is less than or equal to the duty cycle of the second digital comparison signal, the second load state signal is output as a continuous level signal. Low load current state detection can be obtained by comparing the duty cycle of the digital signal, the circuit is simple, and light load detection can be achieved without using a high-precision comparator.

Description

Technical Field

[0001] The present invention relates to a load current detection method and a detection circuit of a DC / DC switching power supply, belonging to the technical field of integrated circuits, and in particular to a load current detection circuit of a BOOST boost DC / DC conversion system in a DCM (Discontinous Conduction Mode) asynchronous mode. Background Art

[0002] DC / DC switching power supply circuits are used in various fields, among which the BOOST boost DC / DC conversion system is an important part of the DC / DC switching power supply. With the development of technology, the output power of the system is getting larger and larger. In some applications, such as mobile power supplies, when the external device is discharged, under normal circumstances, the discharge current is large. The BOOST boost DC / DC conversion system works in the CCM (Continuous Conduction Mode) mode. As the external device is close to full or the load becomes smaller, the discharge load current will gradually decrease, and the CCM working mode will gradually enter the DCM (Discontinous Conduction Mode) working mode until the discharge current is small enough to fully charge the external device. At this time, the DC / DC switching power supply circuit is usually required to detect the change of load current. When the load current becomes small enough, the system can automatically enter the sleep state; therefore, a load current detection circuit that can detect light load current is required.

[0003] The load current detection circuit in the prior art usually samples the peak voltage drop when the N-type power tube is turned on, and the peak voltage drop corresponds to the inductor current value; in a high-power DC / DC switching power supply chip, because the power tube on-resistance is very small, the sampled N-type power tube on-peak voltage drop will also be very small; especially to detect the tiny current of light load, the sampled N-type power tube on-peak voltage drop will be even smaller, and it is relatively difficult to sample and compare such a small voltage.

[0004] DCDC is the abbreviation of Direct current in English, which means direct current voltage is converted into direct current voltage in Chinese;

[0005] The meaning of BOOST mode switching regulator in this application is a boost DC / DC conversion system using BOOST REGULATOR mode;

[0006] PWM is the abbreviation of Pulse Width Modulation, which means pulse width modulation in Chinese. The pulse width modulation (PWM) switching voltage regulator circuit achieves the purpose of stabilizing the output voltage by adjusting the duty cycle of the control circuit while keeping the output frequency unchanged.

[0007] CCM is the abbreviation of Continuous Conduction Mode in English, which means continuous conduction mode in Chinese. It refers to the working mode in which the power tube in the BOOST boost circuit is alternately and continuously turned on so that the current in the inductor changes continuously.

[0008] DCM: It is the abbreviation of Discontinous Conducion Mode in English. Its Chinese meaning is discontinuous conduction mode. It means that in the BOOST boost circuit, one of the power tubes is alternately turned off, so that the current in the inductor changes discontinuously. Summary of the invention

[0009] The technical problem to be solved by the present invention is to avoid the use of complex high-precision and fast-response comparators for light-load current detection in the prior art, and to provide a simple load current detection method and circuit for light-load current detection in the DCM working mode of a BOOST boost DC / DC conversion system.

[0010] The solution of the present invention to solve the above technical problems is a load current detection method for a BOOST boost DC / DC conversion system in a DCM working mode, comprising: step 10: detecting the zero-crossing point of the inductor current of an external inductor of the BOOST boost DC / DC conversion system and generating a first digital comparison signal (WK_D), wherein the duty cycle of the first digital comparison signal (WK_D) represents the ratio of the non-zero time period of the inductor current to the entire switching cycle; step 20: using a second digital comparison signal (CLK_D) whose duty cycle represents the size of a load detection current detection threshold value to perform digital comparison with the first digital comparison signal (WK_D) to generate a second load state signal (LL_PULSE 2); the duty cycle of the second digital comparison signal represents the size of the load current detection threshold value; when the duty cycle of the first digital comparison signal (WK_D) is greater than the duty cycle of the second digital comparison signal (CLK_D), the output second load state signal (LL_PULSE2) is a periodic pulse digital signal, and the duty cycle of the periodic pulse digital signal represents the size of the difference between the duty cycle of the first digital comparison signal (WK_D) and the duty cycle of the second digital comparison signal (CLK_D); when the duty cycle of the first digital comparison signal (WK_D) is less than or equal to the duty cycle of the second digital comparison signal (CLK_D), the output second load state signal (LL_PULSE2) is a continuous level signal.

[0011] When the levels of the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) are different, the second load state signal (LL_PULSE2) outputs a low level; when the levels of the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) are the same, the second load state signal (LL_PULSE2) outputs a high level.

[0012] The load current detection method further includes step 30: a second load state signal (LL_PULSE2) and a first clock signal (CLK) are subjected to digital logic operation to generate a second external control signal (LL_DEC2) for controlling the BOOST boost DC / DC conversion system; when the second load state signal (LL_PULSE2) is a periodic pulse digital signal, the logic operation of the first clock signal (CLK) and the second load state signal (LL_PULSE2) causes the low level start time of the second external control signal (LL_DEC2) to be equal to the second load state signal The low level start time of the second external control signal (LL_PULSE2) is the same, and the low level of the second external control signal (LL_DEC2) is continued until the next rising edge of the first clock signal (CLK), so that the period of the second external control signal (LL_DEC2) is the same as the period of the first clock signal (CLK); when the second load state signal (LL_PULSE2) is a continuous level signal, the logical operation of the first clock signal (CLK) and the second load state signal (LL_PULSE2) makes the second external control signal (LL_DEC2) also a continuous level signal.

[0013] The duty cycle of the second digital comparison signal is fixed or variable; the duty cycle of the second digital comparison signal can be variable according to the input voltage and output voltage of the BOOST boost DC / DC conversion system.

[0014] The solution to the above technical problem of the present invention can also be a load current detection circuit for a BOOST boost DC / DC conversion system in a DCM working mode, comprising: a digital comparison module and an inductor current duty cycle detection module; the inductor current duty cycle detection module is used for detecting the zero-crossing point of the inductor current of an external inductor of the BOOST boost DC / DC conversion system and generating a first digital comparison signal (WK_D); the first digital comparison signal (WK_D) has a signal duty cycle representing the ratio of the non-zero time period of the inductor current to the entire switching cycle; the inductor current duty cycle detection module is electrically connected to the digital comparison module, and the first digital comparison signal (WK_D) is input into the digital comparison module; the second digital comparison signal (CLK_D) representing the load current detection threshold size by the duty cycle D) and the first digital comparison signal (WK_D) are input into the digital comparison module, and a second load state signal (LL_PULSE2) is generated after digital comparison; when the duty cycle of the first digital comparison signal (WK_D) is greater than the duty cycle of the second digital comparison signal (CLK_D), the output second load state signal (LL_PULSE2) is a periodic pulse digital signal, and the duty cycle of the periodic pulse digital signal represents the size of the difference between the duty cycle of the first digital comparison signal (WK_D) and the duty cycle of the second digital comparison signal (CLK_D); when the duty cycle of the first digital comparison signal (WK_D) is less than or equal to the duty cycle of the second digital comparison signal (CLK_D), the output second load state signal (LL_PULSE2) is a continuous level signal.

[0015] The digital comparison operation performed by the digital comparison module on the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) includes: when the levels of the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) are different, the second load state signal (LL_PULSE2) outputs a low level; when the levels of the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) are the same, the second load state signal (LL_PULSE2) outputs a high level.

[0016] The load current detection circuit also includes a digital logic processing module; the digital logic processing module is electrically connected to the digital comparison module; the second load state signal (LL_PULSE2) and the first clock signal (CLK) are input into the digital logic processing module, and after digital logic operation, a second external control signal (LL_DEC2) is generated for controlling the BOOST boost DC / DC conversion system; when the second load state signal (LL_PULSE2) is a periodic pulse digital signal, the logic operation of the first clock signal (CLK) and the second load state signal (LL_PULSE2) causes the second external control signal (LL_DEC2) to be ) is the same as the low level start time of the second load state signal (LL_PULSE2), and the low level of the second external control signal (LL_DEC2) is maintained until the next rising edge of the first clock signal (CLK), so that the period of the second external control signal (LL_DEC2) is the same as the period of the first clock signal (CLK); when the second load state signal (LL_PULSE2) is a continuous level signal, the logical operation of the first clock signal (CLK) and the second load state signal (LL_PULSE2) makes the second external control signal (LL_DEC2) also a continuous level signal.

[0017] The load current detection circuit further includes a second oscillator for generating a second digital comparison signal (CLK_D) and a first clock signal (CLK), and inputting the second digital comparison signal (CLK_D) and the first clock signal (CLK) into the digital comparison module.

[0018] The duty cycle of the second digital comparison signal is fixed or variable; the duty cycle of the second digital comparison signal can be variable according to the input voltage and output voltage of the BOOST boost DC / DC conversion system.

[0019] The load current detection circuit also includes a working mode conversion module, which is used to control the working mode of the BOOST boost DC / DC conversion system to be in a synchronous working mode or an asynchronous working mode; the working mode conversion module determines that the inductor current is less than or equal to the set intermediate load current, and outputs a working mode control signal (DTC), and the working mode control signal (DTC) is used to switch the synchronous working mode of the BOOST boost DC / DC conversion system to an asynchronous working mode.

[0020] The inductor current duty cycle detection module comprises a first PMOS tube (MP1), a second PMOS tube (MP2), a comparator (95) and a third PMOS tube (MP3); the gate of the first PMOS tube (MP1) is used to access the reverse signal of the first control signal (GN), and the source of the first PMOS tube (MP1) is connected to the voltage output terminal (VOUT) of the BOOST boost DC / DC conversion system; the gate of the second PMOS tube (MP2) is used to access the first control signal (GN) input from the outside, and the drain of the second PMOS tube (MP2) is used to access the external inductor current detection signal (U LX ); the source of the second PMOS tube (MP2) is electrically connected to the drain of the first PMOS tube (MP1), and outputs a second comparison voltage signal (V_SEL) to the negative input terminal of the comparator (95); the negative input terminal of the comparator (95) is electrically connected to the source of the second PMOS tube (MP2) for receiving the second comparison voltage signal (V_SEL); the positive input terminal of the comparator (95) is electrically connected to the voltage output terminal (VOUT) of the BOOST boost DC / DC conversion system; the gate of the third PMOS tube (MP3) is used to access the reverse signal of the first control signal (GN); the source of the third PMOS tube (MP3) is connected to the digital power supply (VDD); the drain of the third PMOS tube (MP3) is electrically connected to the output terminal of the comparator (95) and serves as the output terminal of the inductor current duty cycle detection module, and is used to output the first digital comparison signal (WK_D). The reverse signal of the first control signal (GN) is also the logical negation signal of the first control signal (GN).

[0021] The inductor current duty cycle detection module further comprises a first inverter (91); an input end of the first inverter (91) is used to receive a first control signal (GN) input from the outside, an output end of the first inverter (91) is electrically connected to a gate of a first PMOS tube (MP1); and an output end of the first inverter (91) is electrically connected to a gate of a third PMOS tube (MP3).

[0022] The digital comparison module comprises an AND gate (92); the inverse signals of the first digital comparison signal (WK_D) and the second digital comparison signal (CLK_D) are input into the AND gate (92) for operation; the output terminal of the AND gate (92) outputs the second load state signal (LL_PULSE2). The inverse signal of the second digital comparison signal (CLK_D) is the logical negation signal of the second digital comparison signal (CLK_D).

[0023] The digital comparison module further comprises a second inverter (93); the second digital comparison signal (CLK_D) is inverted by the second inverter (93) and then input into the AND gate (92).

[0024] The digital logic processing module comprises a D flip-flop (94); the clock signal of the D flip-flop (94) is a first clock signal (CLK); the input end of the D flip-flop (94) is used to access the second load state signal (LL_PULSE2); the output end of the D flip-flop (94) is used to output a second external control signal (LL_DEC2); the first clock signal (CLK) and the second load state signal (LL_PULSE2) are input to the D flip-flop (94), and after a logic operation of the D flip-flop (94), the second external control signal (LL_DEC2) is output.

[0025] The solution to the above technical problem of the present invention can also be a BOOST step-up DC / DC conversion system including the load current detection circuit, comprising a logic control module, a first power tube (Q1) and a second power tube (Q2); the logic control module outputs a second control signal (GP) to the gate of the first power tube (Q1); the drain of the second power tube (Q2) is electrically connected to the drain of the first power tube (Q1) and is used to be electrically connected to an external inductor L1; the source of the first power tube (Q1) is connected to a voltage output terminal (VOUT); the logic control module outputs a first control signal (GN) to the gate of the second power tube (Q2); and the source of the second power tube (Q2) is grounded.

[0026] The BOOST boost DC / DC conversion system also includes a working mode conversion module; the working mode conversion module is used to control whether the working mode of the BOOST boost DC / DC conversion system is in a synchronous working mode or an asynchronous working mode; the working mode conversion module determines that the inductor current is less than or equal to the set intermediate load current, and outputs a working mode control signal (DTC), and the working mode control signal (DTC) is used to switch the synchronous working mode of the BOOST boost DC / DC conversion system to an asynchronous working mode; the logic control module is electrically connected to the working mode conversion module, and the working mode conversion module outputs the working mode control signal (DTC) to the logic control module, and controls the working state of the first power tube (Q1) or the second power tube (Q2) through the logic control module.

[0027] The beneficial technical effects of the present invention are: 1. By comparing the duty cycle or level time of a digital signal, it is possible to obtain a state detection in which the load current is less than or equal to a low load current threshold value. In a load current detection circuit that performs a digital signal duty cycle or level time comparison, a conventional circuit can be used to implement light load detection, and light load detection can be implemented without using a high-precision comparator; compared with the low load current detection of the prior art, the circuit structure is simple; 2. The voltage of the light load current detection point, i.e., the low load current threshold, follows the input voltage change less; 3. The light load detection current point has good discreteness, and is only related to the inductance value and the frequency of the switching signal PWM in the DC / DC switching power supply circuit, and is not greatly affected by changes in the on-resistance of the internal power tube or changes in temperature. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 Schematic diagram of the structure of the BOOST boost DC / DC conversion system and its load current detection circuit in the prior art;

[0029] Figure 2 A schematic diagram of the structure of a load current detection circuit according to one preferred embodiment of the present invention;

[0030] Figure 3 A schematic diagram of the structure of a load current detection circuit according to a second preferred embodiment of the present invention;

[0031] Figure 4 It adopts Figure 3 The circuit structure diagram of the BOOST boost DC / DC conversion system of the load current detection circuit shown;

[0032] Figure 5 and Figure 6 is a signal timing diagram of an implementation scheme of the present invention;

[0033] Figure 7 A schematic diagram of a specific implementation circuit of the inductor current duty cycle detection module and the digital comparison module of the present invention. DETAILED DESCRIPTION

[0034] Any feature disclosed in this specification, unless otherwise stated, can be replaced by other equivalent or alternative features with similar purposes. That is, unless otherwise stated, each feature is only an example of a series of equivalent or similar features.

[0035] like Figure 1 As shown, it is a schematic diagram of the structure of a BOOST boost DC / DC conversion system and its load current detection circuit in the prior art, which includes an output voltage sampling circuit 21, an error amplifier 22, a PWM comparator 23, a logic control drive circuit 24, a first oscillator 28, a first power tube Q1, a second power tube Q2 and an external inductor L1.

[0036] like Figure 1 As shown, the load current detection circuit in the prior art is composed of a high-precision comparator 26 and a digital logic processing circuit 27; the input signal of the high-precision comparator 26 includes the ground potential signal of the circuit node LX and the reference ground potential signal VREF; wherein the reference ground potential signal VREF is a reference ground potential corresponding to a light load set in advance; the high-precision comparator 26 outputs a first load state signal LL_PULSE1 to the digital logic module 27; the first clock signal CLK output by the first oscillator 28 is also output to the digital logic module 27; the digital logic module processes the first load state signal LL_PULSE1 and the first clock signal CLK to obtain a first external control signal LL_DEC1, and different states of the first external control signal LL_DEC1 represent different load states, and the BOOST boost DC / DC conversion system performs on-off control of related circuit modules according to the first external control signal LL_DEC1.

[0037] like Figure 1 In the prior art solution shown, taking the BOOST boost DC / DC conversion system used in a 10W mobile power supply as an example, assuming that the on-resistance RDSON of the second power tube Q2 is 20mohm, the peak current IL_PEAK of the external inductor L1 is 200mA, the reference ground potential signal VREF of the high-precision comparator 26, i.e., the reference voltage VREF, needs to be set at about 4mV. In practice, under low load current conditions, the input voltage to be compared is usually less than 4mV. For the high-precision comparator 26, there are two high requirements for the comparison of two such small voltages: 1. The voltage needs to be compared in each switching cycle of the BOOST step-up DC / DC conversion system, and the speed of the comparator must be as fast as 10ns. According to design experience, the comparison voltage error of the comparator at this speed is usually about 10mV, that is, the voltage level to be compared input by the high-precision comparator must be 10mV higher than the reference voltage value before it can be compared. Obviously, general comparators cannot meet the requirements; 2. The offset voltage of the high-precision comparator 26 must be uV level or close to 0V, and the amplification factor and static current of the high-precision comparator must be very large to control the offset voltage within 1mV~2mV. In the prior art, a high-precision comparator 26 that can meet the above requirements requires at least dozens to hundreds of MOS tubes to be implemented, and the design of the comparator is complicated, and the area cost is increased.

[0038] The load current detection method and circuit of this patent are applicable to the BOOST boost DC / DC conversion system, and can only play its role when the BOOST boost DC / DC conversion system operates in the DCM asynchronous mode with a fixed switching cycle and the duty cycle of the working switch signal is stable.

[0039] There are two situations when the BOOST boost DC / DC conversion system works in DCM mode. In one situation, the system works in asynchronous mode over the entire current range. When the load is light, the system works in DCM mode without any switching. In the other situation, the DC / DC conversion system works in CCM synchronous mode when the load is heavy, and enters DCM asynchronous mode when the load is light. In this case, a working mode conversion circuit is required to switch the synchronous mode to the asynchronous mode. When the DC / DC conversion system is below the set intermediate load current, the DC / DC conversion system will work in asynchronous mode. In this way, under light load, the system has entered DCM asynchronous mode.

[0040] When the output current of the BOOST DC / DC conversion system is less than the set intermediate load current value I set , the working mode control signal DTC changes state from low to high, turns off the first power tube Q1, and makes the BOOST boost DC / DC conversion system work in DCM asynchronous mode. It should be noted that: synchronous mode refers to a switching power supply with DC output, and the conduction and cutoff of its rectifying element, i.e., the external inductor, are synchronized with the power switch tube, i.e., the conduction and cutoff of the rectifying element are controlled by the power switch tube circuit; while in the asynchronous mode or asynchronous mode, the conduction and cutoff of the switching power supply with DC output, i.e., the rectifying element, i.e., the external inductor, are not synchronized with the power switch tube, i.e., the current of the rectifying element, i.e., the external inductor, is not synchronized with the switching of the power switch tube.

[0041] Figure 2 As shown, a load current detection circuit of a BOOST boost DC / DC conversion system in a DCM asynchronous working mode includes an inductor current duty cycle detection module 63, a second oscillator 62, a digital comparison module 64 and a digital logic processing module 65. Under light load, the BOOST boost DC / DC conversion system has entered the DCM asynchronous working mode, the second oscillator 62 generates a second digital comparison signal CLK_D and a first clock signal CLK, the duty cycle of the second digital comparison signal CLK_D is greater than the duty cycle of the first clock signal CLK; the duty cycle of the second digital comparison signal CLK_D represents the value of the load current detection threshold; that is, the larger the threshold value of the load current detection, the larger the duty cycle of the second digital comparison signal CLK_D, the smaller the threshold value of the load current detection, and the larger the duty cycle of the second digital comparison signal CLK_D. The function of the inductor current duty cycle detection module 63 is to determine the time when the external inductor current drops to 0, that is, to find the time point when the inductor current drops to 0, and to record and characterize the time point through the level change of the digital signal, thereby converting the original required high-precision voltage signal comparison into a duty cycle comparison of the digital signal, and completing the current state detection under light load.

[0042] In the DCM asynchronous mode, the time point when the inductor current drops to 0 is the time point when the level of the first digital comparison signal WK_D changes, and this time point is detected by judging the ground potential of the circuit node LX relative to the ground potential signal on the voltage output terminal VOUT; that is, when the ground potential of the circuit node LX is equal to the ground potential on the voltage output terminal VOUT, it is also the time point when the inductor current drops to 0, and at this time, the first digital comparison signal WK_D output by the inductor current duty cycle detection module 63 will change in level; that is, the external inductor current detection signal U LX When the level is equal to the level at the voltage output terminal VOUT, the level of the first digital comparison signal WK_D output by the inductor current duty cycle detection module 63 will change.

[0043] The second digital comparison signal CLK_D and the first digital comparison signal WK_D are input to the digital comparison module, and the digital comparison module compares the duty cycle of the first digital comparison signal WK_D with the duty cycle of the second digital comparison signal CLK_D to obtain the second load state signal LL_PULSE2; the second load state signal LL_PULSE2 generates a second external control signal LL_DEC2 after passing through the digital logic processing module, and the second external control signal LL_DEC2 is used to control the opening or closing of each module in the system.

[0044] When the second digital comparison signal CLK_D and the first digital comparison signal WK_D are input to the digital comparison module to perform duty cycle comparison operation, the first clock signal CLK may also be input, but inputting the first clock signal is not essential.

[0045] When the duty cycle of the first digital comparison signal WK_D is less than or equal to the duty cycle of the second digital comparison signal CLK_D, the second load state signal LL_PULSE2 is a continuous high level signal; when the duty cycle of the first digital comparison signal WK_D is greater than the duty cycle of the second digital comparison signal CLK_D, the second load state signal LL_PULSE2 is a periodic pulse signal, and the pulse low level time in each cycle of the second load state signal LL_PULSE2 is the time occupied by the duty cycle of the first digital comparison signal WK_D minus the time occupied by the duty cycle of the second digital comparison signal CLK_D.

[0046] The second load state signal LL_PULSE2 is a periodic pulse signal or a continuous high level signal. The two signal states of the second load state signal LL_PULSE2 represent two states of the load current. When the second load state signal LL_PULSE2 is a periodic pulse signal, it indicates that the load current is not less than the set value, and the BOOST boost DC / DC conversion system can continue to work according to the signal; when the second load state signal LL_PULSE2 is a continuous high level signal, it indicates that the load current is less than or equal to the set value, and the BOOST boost DC / DC conversion system can shut down the relevant circuits according to the signal to save the power consumption of the BOOST boost DC / DC conversion system.

[0047] Figure 3 and Figure 2 The difference is that Figure 3 The system also includes a working mode conversion module, i.e., a synchronous mode-to-nonsynchronous mode judgment module 61. The synchronous mode-to-nonsynchronous mode judgment module 61 generates a working mode control signal DTC for intermediate load current detection. The working mode control signal DTC is used to control the shutdown of the first power tube Q1. Assuming that the intermediate load current threshold value is set to Iset, when the load current is greater than Iset, the working mode control signal DTC is low level, the first power tube Q1 is not controlled by the working mode control signal DTC, and the BOOST boost DC / DC conversion system works in synchronous mode; when the load current is less than the intermediate load current threshold value Iset, the working mode control signal DTC is high level, the gate level of the first power tube Q1 is always high, Q1 is always in a closed state, and the system switches to the nonsynchronous mode. Figure 4 It adopts Figure 3 The circuit structure diagram of the BOOST boost DC / DC conversion system of the load current detection circuit shown; Figure 4 Except for the load current detection circuit, the other circuits and Figure 1 The BOOST circuits in the prior art are the same.

[0048] like Figure 7As shown in the specific implementation circuit diagram of the inductor current duty cycle detection module and the digital comparison module of the present invention, the inductor current duty cycle detection module 63 includes a first inverter 91, a first PMOS tube MP1, a second PMOS tube MP2, a comparator 95 and a third PMOS tube MP3; the input end of the first inverter 91 is used to receive the first control signal GN input from the outside, the output end of the first inverter 91 is electrically connected to the gate of the first PMOS tube MP1; the output end of the first inverter 91 is electrically connected to the gate of the third PMOS tube MP3; the gate of the first PMOS tube MP1 is used to receive the inverse signal of the first control signal GN, and the source of the first PMOS tube MP1 is connected to the voltage output terminal VOUT of the BOOST boost DC / DC conversion system; the second PMOS tube MP2 The gate of the second PMOS tube MP2 is used to access the external input first control signal GN, the source of the second PMOS tube MP2 is electrically connected to the drain of the first PMOS tube MP1; the drain of the second PMOS tube MP2 is used to access the external input inductor current signal; the negative input terminal of the comparator 95 is electrically connected to the source of the second PMOS tube MP2; the positive input terminal of the comparator 95 is electrically connected to the voltage output terminal VOUT of the BOOST boost DC / DC conversion system; the gate of the third PMOS tube MP3 is used to access the inverse signal of the first control signal GN; the source of the third PMOS tube MP3 is connected to the digital power supply VDD; the drain of the third PMOS tube MP3 is electrically connected to the output terminal of the comparator 95 as the output terminal of the inductor current duty cycle detection module, which is used to output the first digital comparison signal WK_D.

[0049] like Figure 7 As shown, the drain of the second PMOS transistor MP2 is connected to the circuit node LX, and the source of the second PMOS transistor MP2 is connected to the negative input terminal of the comparator 95, converting the external load current signal into the second comparison voltage signal V_SEL input to the comparator 95; the positive input terminal of the comparator 95 is electrically connected to the voltage output terminal VOUT of the BOOST boost DC / DC conversion system; the comparator 95 receives the output voltage signal U out The voltage level of the second comparison voltage signal V_SEL is compared to output the first digital comparison signal WK_D. out When the voltage is equal to the second comparison voltage signal V_SEL, the level of the first digital comparison signal WK_D output by the comparator 95 changes.

[0050] like Figure 7As shown, the digital comparison module includes a second inverter 93 and an AND gate 92; the digital logic processing module includes a D flip-flop 94; the second digital comparison signal CLK_D is inverted by the second inverter 93 and input into the AND gate 92 and the first digital comparison signal WK_D for AND operation; the output terminal of the AND gate 92 outputs the second load state signal LL_PULSE2 to the input end of the D flip-flop 94; the clock signal of the D flip-flop 94 is the first clock signal CLK; the D flip-flop 94 outputs the second external control signal LL_DEC2.

[0051] like Figure 7 As shown, the digital comparison operation performed by the second digital comparison signal CLK_D and the first digital comparison signal WK_D input into the digital comparison module includes: when the level of the second digital comparison signal CLK_D is low and the level of the first digital comparison signal WK_D is high, the second load state signal LL_PULSE2 outputs a low level; when the levels of the second digital comparison signal CLK_D and the first digital comparison signal WK_D are the same or the level of the second digital comparison signal CLK_D is high and the level of the first digital comparison signal WK_D is low, the second load state signal LL_PULSE2 outputs a high level. When the duty cycle of the first digital comparison signal WK_D is less than or equal to the duty cycle of the second digital comparison signal CLK_D, the second load state signal LL_PULSE2 is a continuous high level signal.

[0052] like Figure 7 As shown, the digital logic processing module is a D flip-flop 94, the second load state signal LL_PULSE2 and the first clock signal CLK are input to the digital logic processing module, and after digital logic operation, the second external control signal LL_DEC2 is generated for controlling the BOOST step-up DC / DC conversion system; when the second load state signal LL_PULSE2 is a periodic pulse digital signal, the logic operation of the first clock signal CLK and the second load state signal LL_PULSE2 makes the low level start time of the second external control signal LL_DEC2 and the low level start time of the second load state signal LL_PULSE2 the same, but the low level duration of the second external control signal LL_DEC2 is longer than the low level duration of the second load state signal LL_PULSE2, and the low level of the second external control signal LL_DEC2 continues until the next rising edge of the first clock signal CLK, so that the period of the second external control signal LL_DEC2 is the same as the period of the first clock signal CLK; when the second load state signal LL_PULSE2 is a continuous level signal, the second external control signal LL_DEC2 is also a continuous level signal.

[0053] like Figure 5 and 6The figure is a schematic diagram of the working signal waveform timing of the load current detection circuit of the present invention. Figure 1 and Figure 4 The loop signal of the BOOST boost DC / DC conversion system in Figure 5 In the figure, IL and IL' are the current signals flowing through the inductor L1, U LX and U LX ' is the voltage signal of the circuit node LX, and the GN signal is Figure 1 The gate drive signal of the second power tube Q2, the working mode control signal DTC is used to control the signal for turning off the first power tube Q1, that is, the working mode control signal DTC is an enable signal for controlling whether the first power tube Q1 is effective; WK_D and WK_D' are the first digital comparison signals; CLK_D and CLK_D' are the second digital comparison signals; CLK is the first clock signal; LL_PULSE and LL_PULSE' are the second load state signals; LL_DEC and LL_DEC' are the second external control signals; V_SEL and V_SEL' are the second comparison voltage signal V_SEL.

[0054] from Figure 5 and Figure 6 As shown in the timing diagram, the BOOST boost DC / DC conversion system has two working phases or working stages. In the first stage: from t1 to t2, the second power tube Q2 is turned on, the gate drive signal GN of the second power tube Q2 is high, and the current of the external inductor increases from 0, and its increasing slope is U VIN / L1,U VIN is the input voltage of the BOOST boost DC / DC conversion system, L1 means that the external inductor is L1 Henry; at time t2, the second power tube Q2 is turned off, and the gate drive signal GN of the second power tube Q2 is at a low level, and the first power tube Q1 is also turned off.

[0055] In the second stage: from t2 to t3, because the BOOST boost DC / DC conversion system works in DCM asynchronous mode, from t2 onwards, the inductor current still flows from the circuit node LX to the voltage output terminal VOUT through the parasitic diode of the first power tube Q1, and the signal voltage on the circuit node LX is the output voltage U VOUT +U VD , where U VD is the parasitic diode voltage drop of the first power tube Q1; in the time period from t2 to t3, the inductor current decreases, and the slope of the decrease is U VOUT -U VIN / L1; At t3, the inductor current drops to 0, and the voltage at point LX drops to U VIN .

[0056] At time t3, the inductor current duty cycle detection module detects a sudden change in the signal level of the circuit node LX and determines that the inductor current drops to 0, and the level of the first digital comparison signal WK_D changes accordingly; LX The signal level will drop to the input voltage U at time t3. VIN , while in the BOOST step-up DC / DC conversion system, the output voltage U VOUT is greater than the input voltage U VIN Therefore, the voltage signal U at the node LX of the detection circuit is used LX The time point when the inductor current drops to 0 can be obtained by using the voltage mutation point, and the voltage mutation caused by the low load state can be expressed by the level of the first digital comparison signal WK_D.

[0057] At time t3, the digital comparison module compares the duty cycle of the first digital comparison signal WK_D with the duty cycle of the second digital comparison signal CLK_D; the duty cycle of the second digital comparison signal CLK_D corresponds to the set low load current threshold value; if the load current is less than or equal to the low load current threshold value, such as Figure 5 and Figure 6 In the working waveform diagram below, in the two timing diagrams below, the duty cycle of the first digital comparison signal WK_D will be equal to or less than the duty cycle of the second digital comparison signal CLK_D, the second load state signal LL_PULSE2 output by the digital comparison module will continue to be at a high level, and the second external control signal LL_DEC2 will also be at a continuous high level. The BOOST boost DC / DC conversion system believes that the load current is equal to or less than the detection current point, and according to the obtained second external control signal LL_DEC2, it will control other functional modules to shut down or shut down the entire system.

[0058] In the above process, if there is a working mode conversion module, its output working mode control signal DTC is a high level signal. The working mode control signal DTC is used to switch the synchronous working mode of the BOOST boost DC / DC conversion system to the asynchronous working mode, and is used to control the shutdown of the first power tube Q1.

[0059] If the output load current is higher than the low load current threshold value, such as Figure 5 and Figure 6In the upper middle working waveform diagram, in the two timing diagrams above, the duty cycle of the first digital comparison signal WK_D is greater than the duty cycle of the second digital comparison signal CLK_D, that is, the falling edge of the first digital comparison signal WK_D is later than the falling edge of the second digital comparison signal CLK_D, then the second load state signal LL_PULSE2 is obtained as a pulse signal, and the second load state signal LL_PULSE2 is the reset signal of the D flip-flop 94, so the second external control signal LL_DEC2 will be reset once in each cycle, and the second external control signal LL_DEC2 obtains a periodic square wave signal. At this time, the BOOST boost DC / DC conversion system believes that the load current is higher than the low load current threshold value, and the system works normally without additional operations; at this time, if there is a working mode conversion module, before detecting the low load current detection threshold point, the output working mode control signal DTC changes from low to high, that is, it first enters the asynchronous mode at an intermediate load current threshold higher than the low load current detection threshold.

[0060] The above-mentioned low-load current threshold value can be set to a required system shutdown current threshold value, or a current threshold value for shutting down some functional circuits.

[0061] In the first stage, i.e. the inductor current rising stage, the rising slope of the inductor current is:

[0062] Peak current of external inductor When t2' is later than t2, IL Peak '>IL Peak ;

[0063] In the second stage, i.e. the inductor current decreasing stage, the inductor current decreasing slope is:

[0064] Peak current of external inductor

[0065] The corresponding relationship between the inductor current peak and the load current is:

[0066] In the above formula, I load is the load current, L1 is the Henry value of the external inductor, T is the PWM signal period used for system switching power supply control, U Vout is the output voltage of the BOOST DC / DC conversion system, U Vin is the input voltage of the BOOST boost DC / DC conversion system; From the above formula, it can be seen that the load current and the peak current IL of the external inductor peak The square of the external inductor is a one-to-one correspondence; and the peak current IL peakThere is also a corresponding relationship between the size and the time occupied by the duty cycle of the first digital comparison signal WK_D, so there is also a corresponding relationship between the load current and the time occupied by the duty cycle of the first digital comparison signal WK_D; when the load current is large, the inductor current peak value is large, the inductor current lasts longer, and the duty cycle of the first digital comparison signal WK_D is also large; when the load current is small, the inductor current peak value IL peak The inductor current lasts for a shorter time, and the duty cycle of the first digital comparison signal WK_D is also smaller. Therefore, as the load current decreases, the falling edge of the first digital comparison signal WK_D will gradually advance until the duty cycle of the first digital comparison signal WK_D is the same as that of the second digital comparison signal CLK_D. At this time, the load current detection threshold value point is the detection current threshold point. There is a one-to-one correspondence between the duty cycle of the first digital comparison signal WK_D and the square of the load current.

[0067] Assume that the duty cycle of the second digital comparison signal CLK_D is D CLK_D , then D CLK_D =t2-t1+(t3-t2), then the load current detection threshold is

[0068] Where D CLK_D is the duty cycle of the second digital comparison signal CLK_D; assuming that the duty cycle of the first digital comparison signal WK_D is D WK_D , due to D WK_D There is a one-to-one correspondence between the square of the load current; when the load current decreases, the falling edge of the first digital comparison signal WK_D is detected to be gradually advanced, and the duty cycle of the first digital comparison signal WK_D is D WK_D will gradually decrease until the duty cycle D of the first digital comparison signal WK_D is WK_D and D which is equal to the duty cycle of the second digital comparison signal CLK_D CLK_D The load current at this time is the detection current threshold point.

[0069] Based on the above analysis, the load current detection threshold range applicable to the load current detection method and circuit of the present invention varies less than the working range of the entire input voltage. Vin And the output voltage U Vout The relationship between is a hyperbolic relationship: Input voltage U Vin = 0, the load current detection threshold is the minimum, which is Input voltage U Vin And the output voltage U Vout When they are equal, the load current detection threshold is maximum and is infinite.

[0070] In the present invention, the load current detection threshold and the input voltage U Vin And the output voltage U Vout The relationship between is a parabolic relationship I Load-Threshold ∝K2×U Vin 2 ×(U Vout -U Vin ).

[0071] Input voltage U Vin =0, or input voltage U Vin And the output voltage U Vout When the load current detection threshold is equal to 0, When the maximum value of the detection load is Therefore, by comparison, in general applications, U Vin The range is generally U Vout ×50%~Vout×80%, it is obvious that the load current of the present invention is relative to the entire input voltage U Vin Small variation within the working range.

[0072] For example, in a mobile power application, the input voltage U Vin The range is usually 2.9V~4.2V, the output voltage U Vout is 5.1V.

[0073] like Figure 1 In the prior art shown, the load current calculation formula is:

[0074]

[0075] The maximum load detection current in the entire input voltage operating range is:

[0076]

[0077] The minimum load detection current in the entire input voltage operating range is:

[0078]

[0079] The minimum load current is 2.44 times the maximum load current, and the difference between the minimum detection current and the maximum detection current is 1.44 times; in the mobile power application of the prior art, due to the large range of load current variation and the load current will follow the input voltage and output voltage, the load current detection is inaccurate, and the load current input voltage range varies greatly, this change will cause premature shutdown or non-shutdown in the application; in order to more accurately detect the small current of low load, the current signal threshold value representing the low load also needs to be adjusted with the change of load current. If no adjustment is made, the single low-load current signal threshold value will cause the shutdown signal to be output in some cases when it should not be shut down, and in other cases, the situation that should be shut down cannot be detected.

[0080] In the present invention, the detection current formula is:

[0081]

[0082] The minimum load detection current in the entire input voltage operating range is:

[0083]

[0084] The maximum load detection current in the entire input voltage operating range is:

[0085]

[0086] From the above calculation, it can be known that the difference between the minimum load current and the maximum load current that can be detected in the present invention is only 16%; the low load current detection capability of the present invention is significantly better than that of the prior art.

[0087] In the load current detection circuit of the technical solution of the present invention, the variation range of the detected load current is small, and the range in which the load current follows the input voltage variation is also small. Therefore, even if a single low load current signal threshold value is used, the accuracy of load state detection is greatly improved, the dead zone range of low load current detection is reduced, and the probability of false detection of low load current is reduced. In other words, in the load current of this patent, the load current detection threshold follows the change of input voltage more closely, and the load state detection result is less likely to change with the input voltage. Figure 5 and Figure 6 The difference is that Figure 5 The inductor current peaks of the upper and lower timing diagrams are different. Figure 6 In the above figure, the inductor current peak values ​​of the upper and lower timing diagrams are the same. Figure 5The comparison of the upper and lower timing diagrams in the figure is used to illustrate the influence of the peak current of the external inductor on the load current detection. Combined with the above calculation process, it can be seen that the peak current of the external inductor and the duty cycle of the first digital comparison signal WK_D involved in the low load current detection comparison have an influence. Figure 6 In the above figure, the inductor current peak values ​​of the upper and lower timing diagrams are the same. The main purpose is to Figure 6 The upper and lower timings are compared to illustrate the relationship between the duty cycle of the first digital comparison signal WK_D and the zero-crossing point of the inductor current of the external inductor of the BOOST boost DC / DC conversion system. In the present invention, according to different applications, in order to obtain better full-operating range load current detection changes, the duty cycle D of the second digital comparison signal CLK_D is CLK_D It can also be designed to be compatible with U Vin and U Vout Changes, according to the formula for detecting current

[0088] By changing this formula, we can get D CLK_D In order to obtain a better working range of the detection current error, the duty cycle D of the second digital comparison signal CLK_D can be CLK_D Follow U Vin and U Vout The formula for the change is as follows:

[0089] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of this embodiment, which should be regarded as belonging to the protection scope of the present invention.

Claims

1. A load current detection method for a BOOST boost DC / DC conversion system in DCM mode. It is characterized in that include: Step 10: Detect the zero-crossing point of the inductor current of the external inductor of the BOOST boost DC / DC conversion system and generate a first digital comparison signal (WK_D), wherein the duty cycle of the first digital comparison signal (WK_D) represents the ratio of the non-zero time period of the inductor current to the entire switching cycle; a second oscillator generates a second digital comparison signal (CLK_D); Step 20: A second load state signal (LL_PULSE2) is generated by performing digital signal comparison between the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D); the duty cycle of the second digital comparison signal (CLK_D) represents the size of the load current detection threshold value; When the duty cycle of the first digital comparison signal (WK_D) is greater than the duty cycle of the second digital comparison signal (CLK_D), the output second load state signal (LL_PULSE2) is a periodic pulse digital signal; When the duty cycle of the first digital comparison signal (WK_D) is less than or equal to the duty cycle of the second digital comparison signal (CLK_D), the output second load state signal (LL_PULSE2) is a continuous level signal.

2. The load current detection method according to claim 1, It is characterized in that When the level of the second digital comparison signal (CLK_D) is low and the level of the first digital comparison signal (WK_D) is high, the second load state signal (LL_PULSE2) outputs a high level; When the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) have the same level or the second digital comparison signal (CLK_D) is high and the first digital comparison signal (WK_D) is low, the second load state signal (LL_PULSE2) outputs a low level.

3. The load current detection method according to claim 2, It is characterized in that The method further includes step 30: performing digital logic operation on the second load state signal (LL_PULSE2) and the first clock signal (CLK) to generate a second external control signal (LL_DEC2) for controlling the BOOST boost DC / DC conversion system; When the second load state signal (LL_PULSE2) is a periodic pulse digital signal, the logic operation of the first clock signal (CLK) and the second load state signal (LL_PULSE2) makes the low level start time of the second external control signal (LL_DEC2) and the low level start time of the second load state signal (LL_PULSE2) the same, and at the same time makes the low level of the second external control signal (LL_DEC2) last until the next rising edge of the first clock signal (CLK), so that the period of the second external control signal (LL_DEC2) is the same as the period of the first clock signal (CLK); When the second load state signal (LL_PULSE2) is a continuous level signal, the logic operation of the first clock signal (CLK) and the second load state signal (LL_PULSE2) causes the second external control signal (LL_DEC2) to also be a continuous level signal.

4. The load current detection method according to claim 1, It is characterized in that The duty cycle of the second digital comparison signal is a fixed setting or a variable setting; When the duty cycle of the second digital comparison signal is variably set, the duty cycle of the second digital comparison signal is variably set according to the input voltage and output voltage of the BOOST boost DC / DC conversion system.

5. A load current detection circuit for BOOST boost DC / DC conversion system in DCM working mode, It is characterized in that include: Digital comparison module and inductor current duty cycle detection module; The inductor current duty cycle detection module is used for detecting the zero-crossing point of the inductor current of the external inductor of the BOOST boost DC / DC conversion system and generating a first digital comparison signal (WK_D); the signal duty cycle of the first digital comparison signal (WK_D) represents the ratio of the non-zero time period of the inductor current to the entire switching cycle; the inductor current duty cycle detection module is electrically connected to the digital comparison module, and the first digital comparison signal (WK_D) is input to the digital comparison module; A second oscillator generates a second digital comparison signal (CLK_D); the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) are input into a digital comparison module, and a second load state signal (LL_PULSE2) is generated after digital comparison; wherein the duty cycle of the second digital comparison signal (CLK_D) represents the size of the load current detection threshold value; When the duty cycle of the first digital comparison signal (WK_D) is greater than the duty cycle of the second digital comparison signal (CLK_D), the output second load state signal (LL_PULSE2) is a periodic pulse digital signal; When the duty cycle of the first digital comparison signal (WK_D) is less than or equal to the duty cycle of the second digital comparison signal (CLK_D), the output second load state signal (LL_PULSE2) is a continuous level signal.

6. The load current detection circuit according to claim 5, It is characterized in that The digital comparison operation performed by the digital comparison module when the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) are inputted into the digital comparison module includes: When the level of the second digital comparison signal (CLK_D) is low and the level of the first digital comparison signal (WK_D) is high, the second load state signal (LL_PULSE2) outputs a high level; When the second digital comparison signal (CLK_D) and the first digital comparison signal (WK_D) have the same level, or the second digital comparison signal (CLK_D) is high and the first digital comparison signal (WK_D) is low, the second load state signal (LL_PULSE2) outputs a low level.

7. The load current detection circuit according to claim 6, It is characterized in that Also includes digital logic processing modules; The digital logic processing module is electrically connected to the digital comparison module; The second load state signal (LL_PULSE2) and the first clock signal (CLK) are input to the digital logic processing module, and after digital logic operation, a second external control signal (LL_DEC2) is generated for controlling the BOOST boost DC / DC conversion system; When the second load state signal (LL_PULSE2) is a periodic pulse digital signal, The logic operation of the first clock signal (CLK) and the second load state signal (LL_PULSE2) makes the low level start time of the second external control signal (LL_DEC2) and the low level start time of the second load state signal (LL_PULSE2) the same, and makes the low level of the second external control signal (LL_DEC2) last until the next rising edge of the first clock signal (CLK), so that the cycle of the second external control signal (LL_DEC2) is the same as the cycle of the first clock signal (CLK); When the second load state signal (LL_PULSE2) is a continuous level signal, the logic operation of the first clock signal (CLK) and the second load state signal (LL_PULSE2) causes the second external control signal (LL_DEC2) to also be a continuous level signal.

8. The load current detection circuit according to claim 5, It is characterized in that The second oscillator (62) is further used to generate a first clock signal (CLK), and input the second digital comparison signal (CLK_D) and the first clock signal (CLK) into the digital comparison module.

9. The load current detection circuit according to claim 8, It is characterized in that The duty cycle of the second digital comparison signal is a fixed setting or a variable setting; When the duty cycle of the second digital comparison signal is variably set, the duty cycle of the second digital comparison signal can be variably set according to the input voltage and the output voltage of the BOOST step-up DC / DC conversion system.

10. The load current detection circuit according to claim 5, It is characterized in that It also includes a working mode conversion module for working mode switching control of the BOOST boost DC / DC conversion system, wherein the working mode conversion module is used to control whether the working mode of the BOOST boost DC / DC conversion system is in a synchronous working mode or an asynchronous working mode; the working mode conversion module determines that the input external inductor current is less than or equal to the set intermediate load current, and then outputs a working mode control signal (DTC), and the working mode control signal (DTC) is used to switch the synchronous working mode of the BOOST boost DC / DC conversion system to the asynchronous working mode.

11. The load current detection circuit according to claim 5, It is characterized in that The inductor current duty cycle detection module comprises a first PMOS tube (MP1), a second PMOS tube (MP2), a comparator (95) and a third PMOS tube (MP3); The gate of the first PMOS tube (MP1) is used to access the reverse signal of the first control signal (GN), and the source of the first PMOS tube (MP1) is connected to the voltage output terminal (VOUT) of the BOOST boost DC / DC conversion system; The gate of the second PMOS tube (MP2) is used to access the first control signal (GN) input externally, and the drain of the second PMOS tube (MP2) is used to access the external inductor current detection signal (ULX); The source of the second PMOS tube (MP2) is electrically connected to the drain of the first PMOS tube (MP1), and outputs a second comparison voltage signal (V_SEL) to the negative input terminal of the comparator (95); The negative input terminal of the comparator (95) is electrically connected to the source of the second PMOS tube (MP2) for receiving a second comparison voltage signal (V_SEL); the positive input terminal of the comparator (95) is electrically connected to the voltage output terminal (VOUT) of the BOOST boost DC / DC conversion system; The gate of the third PMOS tube (MP3) is used to access the reverse signal of the first control signal (GN); the source of the third PMOS tube (MP3) is connected to the digital power supply (VDD); The drain of the third PMOS tube (MP3) and the output terminal of the comparator (95) are electrically connected to serve as the output terminal of the inductor current duty cycle detection module, and are used to output a first digital comparison signal (WK_D).

12. The load current detection circuit according to claim 11, It is characterized in that The inductor current duty cycle detection module further includes a first inverter (91); The input end of the first inverter (91) is used to receive a first control signal (GN) input from the outside, the output end of the first inverter (91) is electrically connected to the gate of the first PMOS tube (MP1), and the output end of the first inverter (91) is electrically connected to the gate of the third PMOS tube (MP3).

13. The load current detection circuit according to claim 5, It is characterized in that The digital comparison module comprises an AND gate (92); the inverse signals of the first digital comparison signal (WK_D) and the second digital comparison signal (CLK_D) are input into the AND gate (92) for operation; and the output terminal of the AND gate (92) outputs a second load state signal (LL_PULSE2).

14. The load current detection circuit according to claim 13, It is characterized in that The digital comparison module further includes a second inverter (93); The second digital comparison signal (CLK_D) is inverted by the second inverter (93) and then input into the AND gate (92).

15. The load current detection circuit according to claim 7, It is characterized in that The digital logic processing module includes a D flip-flop (94); The clock signal of the D flip-flop (94) is a first clock signal (CLK); The input end of the D flip-flop (94) is used to receive the second load state signal (LL_PULSE2); The output terminal of the D flip-flop (94) is used to output a second external control signal (LL_DEC2); The first clock signal (CLK) and the second load state signal (LL_PULSE2) are input to the D flip-flop (94), and after a logic operation of the D flip-flop (94), a second external control signal (LL_DEC2) is output.

16. A DC / DC conversion system comprising the load current detection circuit according to any one of claims 5 to 9 and 11 to 15, It is characterized in that The DC / DC conversion system is a BOOST boost DC / DC conversion system; The BOOST boost DC / DC conversion system comprises a logic control module, a first power tube (Q1) and a second power tube (Q2); The logic control module outputs a second control signal (GP) to the gate of the first power tube (Q1); the drain of the second power tube (Q2) is electrically connected to the drain of the first power tube (Q1) and is used to be electrically connected to the external inductor L1; the source of the first power tube (Q1) is connected to the voltage output terminal (VOUT); The logic control module outputs a first control signal (GN) to the gate of the second power tube (Q2); the source of the second power tube (Q2) is grounded.

17. The DC / DC conversion system according to claim 16, It is characterized in that It also includes a working mode conversion module for the working mode switching control of the BOOST boost DC / DC conversion system; the working mode conversion module is used to control whether the working mode of the BOOST boost DC / DC conversion system is a synchronous working mode or an asynchronous working mode; The working mode conversion module determines that the input external inductor current is less than or equal to the set intermediate load current, and then outputs a working mode control signal (DTC). The working mode control signal (DTC) is used to switch the synchronous working mode of the BOOST boost DC / DC conversion system to the asynchronous working mode; The logic control module is electrically connected to the working mode conversion module, and the working mode conversion module outputs a working mode control signal (DTC) to the logic control module, and controls the working state of the first power tube (Q1) or the second power tube (Q2) through the logic control module.

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