Memory Cards, Memory Card Slots, and Electronics

Abstract

A memory card, a memory card slot and an electronic system can be provided, wherein the memory card includes a first main surface and a second main surface opposite to each other, and also includes: a printed circuit board (PCB) constructing the first main surface, the PCB including a plurality of first external connection terminals, the plurality of first external connection terminals being exposed on the first main surface; a plurality of memory devices stacked on the PCB; a memory controller configured to control the plurality of memory devices; a molding layer encapsulating the plurality of memory devices and the memory controller, the molding layer constructing the second main surface; one or more second external connection terminals electrically connected to the memory controller, the one or more second external connection terminals being embedded in the molding layer at the second main surface and exposed through the molding layer.

Description

[0001] This application claims the priority benefit of Korean Patent Application No. 10-2018-0081758 filed on Jul. 13, 2018 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] The inventive concept relates to a memory card and / or a memory card slot, and more particularly, to a memory card operating at a high speed and having improved reliability and stability and / or to a memory card slot accommodating the memory card. Background Art

[0003] Memory cards have become useful devices for conveniently storing and moving large amounts of information. There is a need for a memory card that not only performs high-speed input / output operations for processing large amounts of information, but also provides improved stability and reliability without errors in the input / output operations for processing data. In addition, a manufacturing method that can easily and stably manufacture such a memory card is needed. Summary of the invention

[0004] The inventive concept provides a memory card having improved reliability and stability while operating at high speeds.

[0005] The inventive concept provides a memory card slot capable of accommodating the memory card.

[0006] The inventive concept provides an electronic system including a memory card slot.

[0007] According to an example embodiment conceived by the present invention, a memory card including a first main surface and a second main surface opposite to each other includes: a printed circuit board (PCB) constructing the first main surface, the PCB including a plurality of first external connection terminals, the plurality of first external connection terminals being exposed on the first main surface; a plurality of memory devices stacked on the PCB; a memory controller configured to control the plurality of memory devices; a molding layer encapsulating the plurality of memory devices and the memory controller, the molding layer constructing the second main surface; one or more second external connection terminals electrically connected to the memory controller, the one or more second external connection terminals being embedded in the molding layer at the second main surface and exposed through the molding layer.

[0008] According to an example embodiment conceived by the present invention, a memory card includes: a printed circuit board (PCB), including a plurality of first external connection terminals, the plurality of first external connection terminals being configured to be connected to an external device; a plurality of memory devices stacked on the PCB; a memory controller located on an uppermost memory device among the plurality of memory devices; an inserter located on the uppermost memory device; one or more second external connection terminals located on the inserter, the one or more second external connection terminals being configured to be connected to the external device; and a molding layer encapsulating the plurality of memory devices and the memory controller.

[0009] According to an example embodiment conceived in the present invention, a memory card slot is configured to accommodate a memory card, the memory card includes a first main surface and a second main surface opposite to each other, the memory card slot includes: a first external connection terminal, configured to contact the first main surface, the first external connection terminal including at least one power terminal from power terminals configured to provide a power supply voltage in a range between approximately 3.3V and approximately 1.8V; a second external connection terminal, configured to contact the second main surface, the second external connection terminal including a pair of data input / output terminals and one of a group of data input / output terminals having a single-channel structure and a power terminal having a voltage of approximately 1.2V or less, in the single-channel structure, a group of data input terminals and a group of data output terminals each generate a differential signal pair; a housing, configured to accommodate the first external connection terminal and the second external connection terminal, the housing configured to accommodate the memory card.

[0010] According to an example embodiment of the present invention, an electronic system includes: a controller; an input / output device configured to input or output data; a memory device configured to store data, the memory device including the above-mentioned memory card slot; an interface configured to transmit data to an external device; and a bus configured to connect the controller, the input / output device, the memory device, and the interface for communication therebetween. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Example embodiments of the inventive concept will be more clearly understood through the following detailed description in conjunction with the accompanying drawings, in which:

[0012] Figure 1A is a plan view showing a first main surface of a memory card according to an example embodiment;

[0013] Figure 1B is a plan view showing a second main surface of a memory card according to an example embodiment;

[0014] Figure 2 is shown along Figure 1B A cross-sectional view of a section taken along line II-II';

[0015] Figure 3A is a plan view showing a second main surface of a memory card according to an example embodiment;

[0016] Figure 3B is shown along Figure 3A A cross-sectional view of a section taken along line IIIB-IIIB';

[0017] Figure 4A is a plan view showing a second main surface of a memory card according to an example embodiment;

[0018] Figure 4B is shown along Figure 4A A cross-sectional view of a section taken along line IVB-IVB';

[0019] Figure 5 is a cross-sectional view illustrating a memory card according to an example embodiment;

[0020] Fig. 6A and Figure 6B are plan views respectively illustrating a first main surface and a second main surface of a memory card according to an example embodiment;

[0021] Fig. 7A and Figure 7B are schematic plan views respectively illustrating second main surfaces of memory cards according to some example embodiments;

[0022] Figure 8 is a schematic diagram of a system including a memory card slot configured to receive a memory card according to an example embodiment;

[0023] Fig.9A The electrical connection with the memory card is shown in more detail Figure 8 A schematic diagram of a memory card slot;

[0024] Fig. 9B It is schematically shown Fig.9A A side view of a state in which a memory card slot and a memory card are connected to each other;

[0025] Fig.10 is a block diagram of an example of an electronic system including a memory card according to example embodiments; and

[0026] FIG. 11A to FIG. 11E are cross-sectional views sequentially illustrating a method of manufacturing a memory card according to example embodiments. DETAILED DESCRIPTION

[0027] Although the term "same" is used in the description of the exemplary embodiments, it should be understood that some imprecision may exist. Therefore, when one element is referred to as being the same as another element, it should be understood that one element is the same as the other element within a desired manufacturing tolerance range (e.g., ±10%).

[0028] When the terms "approximately," "substantially," or "substantially" are used in conjunction with a numerical value in this specification, the relevant numerical value is intended to include a manufacturing tolerance (e.g., ±10%) around the numerical value. In addition, when the words "substantially" and "substantially" are used in conjunction with a geometric shape, it is intended that the accuracy of the geometric shape is not required, but the margin of the shape is within the scope of the present disclosure.

[0029] Hereinafter, some example embodiments of the inventive concept will be described in detail with reference to the accompanying drawings.

[0030] Figure 1A is a plan view illustrating a first major surface 110 of a memory card 100 according to example embodiments. Figure 1B is a plan view illustrating a second major surface 112 of a memory card 100 according to example embodiments. Figure 2 is shown along Figure 1B A cross-sectional view of a section taken along line II-II'.

[0031] Reference Figure 1A , Figure 1B and Figure 2 , the memory card 100 may include a first main surface 110 and a second main surface 112 opposite to each other. Here, 'main surface' may mean each of two opposite surfaces extending to have the largest area among the respective surfaces of the memory card 100.

[0032] The first main surface 110 may be a main surface of a substrate 101 (e.g., a printed circuit board (PCB)). On the substrate 101, a plurality of memory devices 194 and a memory controller 192 configured to control the plurality of memory devices 194 may be provided. In addition, first external connection terminals (which include a first row terminal (or a plurality of first row terminals) 130 and a second row terminal (or a plurality of second row terminals) 140) may be provided on the first main surface 110 (while being exposed to the outside at the first main surface 110).

[0033] The second main surface 112 may be defined by a mold layer 162 surrounding the memory controller 192 and the plurality of memory devices 194. Second external connection terminals 150 connectable to an external device may be disposed on the second main surface 112 (while being exposed to the outside at the second main surface 112).

[0034] The plurality of memory devices 194 may include, for example, NAND flash memory devices. The plurality of memory devices 194 may be stacked to be offset from each other in any direction. In this example embodiment, the plurality of memory devices 194 are shown to include four memory devices (e.g., a first memory device 194a, a second memory device 194b, a third memory device 194c, and a fourth memory device 194d). However, the inventive concept is not limited thereto.

[0035] The memory controller 192 may be disposed on a first memory device 194a, which is an uppermost memory device among the plurality of memory devices 194. The memory controller 192 may be configured to control the memory device 194. The memory controller 192 may be electrically connected to first external connection terminals (130 and 140) exposed outwardly at the first main surface 110. In addition, the memory controller 192 may be electrically connected to second external connection terminals 150 exposed outwardly at the second main surface 112. In some example embodiments, the memory controller 192 may be electrically connected to the substrate 101 via bonding wires, and further electrically connected to the first external connection terminals (130 and 140) via wiring (not shown) disposed in the substrate 101.

[0036] In some example embodiments, the interposer 180 may be disposed on a first memory device 194a, which is the uppermost memory device among the plurality of memory devices 194. The interposer 180 may be disposed in a lateral direction relative to the memory controller 192. In other words, the interposer 180 may be spaced apart from the memory controller 192 in the lateral direction. In some example embodiments, the interposer 180 may be directly attached to the first memory device 194a. In some embodiments, the memory controller 192 may be directly attached to the first memory device 194a. The interposer 180 and the memory controller 192 may be directly attached to the first memory device 194a by using, for example, a die attach film (DAF), an adhesive, or a non-conductive film (NCF).

[0037] The insert 180 may include an insert substrate and a wire 182 and an insert terminal (not shown) disposed thereon. The insert substrate may include an insulating substrate (e.g., a silicon substrate or a glass substrate). The wire 182 may include a lead of gold (Au), aluminum (Al) and / or copper (Cu), and may include an embossed wire or a damascene wire.

[0038] The second external connection terminal 150 may be electrically connected to the wire 182 on the insert 180 via the conductor via CV. The conductor via CV may include one of copper (Cu), tungsten (W), titanium (Ti), tantalum (Ta), tin (Sn), Au, Al, nickel (Ni), cobalt (Co), or an alloy thereof. In some example embodiments, the conductor via CV may be integrally formed with the second external connection terminal 150. In some example embodiments, an interface may exist between the conductor via CV and the second external connection terminal 150.

[0039] In some example embodiments, the conductor via CV may extend in a direction substantially perpendicular (eg, vertical) to the first main surface 110 and / or the second main surface 112 .

[0040] The side surface of the second external connection terminal 150 may be surrounded by the mold layer 162. The top surface of the second external connection terminal 150 may be at least partially exposed by the mold layer 162. The portion of the bottom surface of the second external connection terminal 150 not in contact with the conductor via CV may be covered by the mold layer 162.

[0041] exist Figure 1B , the second external connection terminal 150 is illustrated as including three terminals 151, 153, and 154, but the inventive concept is not limited thereto. The second external connection terminal 150 may include one or two terminals, or four or more terminals.

[0042] In some embodiments, the second external connection terminal 150 may include a power supply terminal having a voltage of about 1.2V or less (e.g., a voltage of about 1.2V or a voltage of about 0.4V) as a power supply voltage. In some example embodiments, the second external connection terminal 150 may include a ground terminal. In some example embodiments, the second external connection terminal 150 may include at least one pair of data input / output terminals.

[0043] The memory controller 192 may be electrically connected to the wire 182 on the interposer 180 via the bonding wire BW. In other words, the memory controller 192 may be electrically connected to the second external connection terminal 150 via the wire 182 disposed on the interposer 180.

[0044] The wire 182 on the top surface of the insert 180 may not be electrically connected to active elements such as semiconductor devices (including but not limited to transistors, diodes, and operational amplifiers) and non-active elements (including but not limited to resistors, inductors, and capacitors), all of which are provided in the first memory device 194a. Therefore, the wire 182 may not be directly related to the operation of the first memory device 194a, but may be directly related to signal transmission and reception and / or power supply between the memory controller 192 and the second external connection terminal 150.

[0045] The memory card 100 may have two pairs of opposite edges (or alternatively, sides). The two pairs of opposite edges may include an insertion side edge 121 in the direction in which the memory card 100 is inserted into the memory card slot, and a second edge 127 opposite to the insertion side edge 121. The insertion side edge 121 and the second edge 127 may be parallel to each other. The memory card 100 further includes a first edge 123 connecting one end of the insertion side edge 121 with one end of the second edge 127, and a third edge 125 connecting the opposite second end of the insertion side edge 121 with the opposite end of the second edge 127.

[0046] The third edge 125 may extend in a direction substantially perpendicular (e.g., vertical) to the direction in which the insertion side edge 121 extends. In this example embodiment, the third edge 125 is shown extending in only one direction, and the first edge 123 is shown including both a portion parallel to the third edge 125 and a portion not parallel to the third edge 125.

[0047] Between each of the edges (121, 123, 125, and 127), there may be one or more corners 128 having a certain radius of curvature. In some example embodiments, the edges (121, 123, 125, and 127) may have the same radius of curvature.

[0048] The insertion side edge 121 may be an edge of a memory card slot into which the memory card 100 may be inserted. When the memory card 100 is inserted into the memory card slot, among the edges (121, 123, 135, and 127), the insertion side edge 121 may be inserted first, and when the memory card 100 is released from the memory card slot, among the edges (121, 123, 135, and 127), the insertion side edge 121 may be released last. The width of the insertion side edge 121 may be determined in consideration of a certain gap space so that the memory card 100 smoothly enters the memory card slot.

[0049] Each terminal may be arranged adjacent to the insertion side edge 121 for electrically connecting the semiconductor device in the memory card 100 to the host. The host may be, for example, a mobile phone, a desktop computer, a notebook computer, a tablet personal computer (PC), a game console, a navigation device, and a digital camera, but the inventive concept is not limited thereto. In some example embodiments, an adapter for an interface may be arranged between the memory card 100 and the host.

[0050] The first external connection terminals (130 and 140) may be arranged in two rows on the first main surface 110, as shown in FIG. Figure 1A In other words, the plurality of first row terminals 130 and the plurality of second row terminals 140 may be arranged adjacent to the insertion side edge 121 of the substrate 101 .

[0051] The first row terminal 130 may include a power supply terminal 131 configured to provide a first voltage as a power supply voltage, and the first voltage may have a value between about 3.0 V and about 3.5 V (e.g., about 3.3 V). The first voltage may be supplied to a semiconductor device that operates at a relatively low speed among semiconductor devices in the memory card 100. For example, the first voltage may be supplied to a memory device 194 in the memory card 100. The memory device 194 may be a nonvolatile memory device.

[0052] The second row terminal 140 may include a power supply terminal 141 configured to provide a second voltage as a power supply voltage, and the second voltage may have a value between about 1.5 V and about 2.2 V (e.g., about 1.8 V). The second voltage may be supplied to a semiconductor device operating at a relatively high speed among semiconductor devices in the memory card 100. For example, the second voltage may be supplied to a memory controller 192 in the memory card 100.

[0053] The first row terminals 130 may be arranged closer to the insertion side edge 121 than the second row terminals 140. In other words, the second row terminals 140 may be arranged farther from the insertion side edge 121 than the first row terminals 130.

[0054] exist Figure 1A , two terminals in the first row of terminals 130 and ten terminals in the second row of terminals 140 are shown, but the number, position, shape and size of the first row of terminals 130 and the second row of terminals 140 are not limited thereto. In some example embodiments, some terminals of the first row of terminals 130 and the second row of terminals 140 may be covered by a solder resist (SR) layer and may not be exposed to the outside. Some of the terminals not exposed may be, for example, test terminals.

[0055] The first row terminal 130 and the second row terminal 140 may each include one or more ground terminals. For example, the first row terminal 130 may include a ground terminal 133. In addition, the second row terminal 140 may include a ground terminal 144.

[0056] The second row terminal 140 may include a pair of data input terminals 145in and a pair of data output terminals 145out. Figure 1A The middle data input terminal 145in is shown to be arranged closer to the center of the memory card 100 than the pair of data output terminals 145out, but the arrangement thereof may be changed.

[0057] A pair of data input terminals 145in can generate a pair of differential signals, and a pair of data output terminals 145out can also generate a pair of differential signals. A pair of data input terminals 145in using a pair of differential signals and a pair of data output terminals 145out using a pair of differential signals can be relatively insensitive to noise or interference, thereby being able to stably transmit high-speed data. A pair of data input terminals 145in and a pair of data output terminals 145out can constitute a data input / output terminal of a one-lane structure.

[0058] The data input terminal 145in can be electrically shielded by a pair of ground terminals 144a and 144b. In addition, the data output terminal 145out can be electrically shielded by a pair of ground terminals 144b and 144c. Due to the shielding, the pair of data input terminals 145in and the pair of data output terminals 145out can respectively input and output data more reliably.

[0059] The pair of data input terminals 145in may have the same size. In addition, the pair of data output terminals 145out may have the same size. In addition, the data input terminal 145in and the data output terminal 145out may have the same size.

[0060] The second row terminals 140 may further include a card detection terminal 143 and a reference clock terminal 147 .

[0061] The first external connection terminals ( 130 and 140 ) may include external connection terminals according to one standard of a secure digital (SD) card, a micro SD card, a mini SD card, a universal flash memory (UFS) card, and a multimedia card (MMC).

[0062] In the lateral direction of the second row terminal 140, a lateral protrusion that looks like a shark fin can be provided. Passive element 170 can be arranged in the lateral protrusion. Passive element 170 can include one or more of a resistor, a capacitor, an inductor, a thermistor, an oscillator, a ferrite bead, an antenna, a varistor and / or a crystal. However, the exemplary embodiments of the inventive concept are not limited thereto. According to some exemplary embodiments, the lateral protrusion can include any other passive element.

[0063] The memory card 100 may further include an exit assisting portion 160 at the second main surface 112. The exit assisting portion 160 may allow the memory card 100 to be easily exited from the memory card slot after the memory card 100 has been inserted into the slot. The exit assisting portion 160 may protrude from the second main surface 112 of the memory card 100. In addition, the exit assisting portion 160 may be formed adjacent to the second edge 127.

[0064] Figure 3A is a plan view illustrating a second major surface 112 of a memory card 100 a according to example embodiments. Figure 3B is shown along Figure 3A A cross-sectional view of a section taken along line IIIB-IIIB'.

[0065] Figure 3A and Figure 3B The examples in Figure 1A and Figure 2 The example embodiment shown in FIG. 1 is different in that the memory controller 192 is disposed on the interposer 180 a. Therefore, repeated descriptions are omitted, and the following description focuses on the differences.

[0066] Reference Figure 3A and Figure 3B , the interposer 180a may be directly disposed on the first memory device 194a. In some example embodiments, the interposer 180a may be directly attached to the first memory device 194a by using a chip bonding film, an adhesive, or a non-conductive film.

[0067] In addition, the memory controller 192 may be directly arranged on the interposer 180a. The memory controller 192 may be directly attached to the interposer 180a by using a chip bonding film, an adhesive, or a non-conductive film. The wire 182 may be provided on the interposer 180a (e.g., provided on a portion of the top surface of the interposer 180a), and the memory controller 192 may be directly electrically connected to the wire 182 via a bonding wire BW. Here, the fact that the wire 182 and the memory controller 192 are directly electrically connected to each other may indicate that no other electronic components are arranged between the wire 182 and the memory controller 192 except for components dedicated to flowing current.

[0068] The wire 182 may be connected to the conductor via CV, and the conductor via CV may be connected to the second external connection terminal 150. In other words, the memory controller 192 may be connected to the second external connection terminal 150 via the bonding wire BW, the wire 182, and the conductor via CV.

[0069] The wire 182 on the top surface of the insert 180a may not be electrically connected to active elements such as semiconductor devices (including but not limited to transistors, diodes, and operational amplifiers) and non-active elements (including but not limited to resistors, inductors, and capacitors), all of which are provided in the first memory device 194a. Therefore, the wire 182 may not be directly related to the operation of the first memory device 194a, but may be directly related to signal transmission and reception and / or power supply between the memory controller 192 and the second external connection terminal 150.

[0070] The plan area of ​​the memory controller 192 may be substantially smaller than the plan area of ​​the interposer 180 a .

[0071] Figure 4A is a plan view illustrating a second major surface 112 of a memory card 100 b according to example embodiments. Figure 4B is shown along Figure 4A A cross-sectional view of a section taken along line IVB-IVB' in FIG.

[0072] Figure 4A and Figure 4B The example embodiments shown in Figures 1A to 2 The exemplary embodiment shown in FIG. 1 is different in that the insert 180 is omitted. Therefore, repeated descriptions are omitted, and the following description focuses on the differences.

[0073] Reference Figure 4A and Figure 4B , a conductive line (or conductive lines) 182a may be disposed on the first memory device 194a (eg, on a top surface of the first memory device 194a).

[0074] In some example embodiments, although not shown, the wire 182a may be disposed on the top surface of each of the first memory device 194a, the second memory device 194b, the third memory device 194c, and the fourth memory device 194d. In this case, the wire 182a on the top surface of the second memory device 194b, the third memory device 194c, and the fourth memory device 194d may be a dummy wire that does not participate in the operation of the memory card 100b.

[0075] The conductor vias CV connected to the second external connection terminals 150 (which includes the terminals 151 , 153 , and 154 ) may be directly connected to the wires 182 a , respectively. The conductor vias CV may extend in a direction vertical or substantially perpendicular to the second major surface 112 .

[0076] One or more of the wires 182a may be electrically connected to the memory controller 192 via the bonding wires BW. In other words, the wires 182a may be electrically and directly connected to the memory controller 192. Here, the fact that the wires 182a and the memory controller 192 are electrically and directly connected to each other may mean that no other electrical elements are arranged between the wires 182a and the memory controller 192 except for an element dedicated to flowing current.

[0077] Therefore, the memory controller 192 may be electrically connected to the one or more second external connection terminals 150 via the bonding wires BW, the wires 182 a , and the conductor vias CV.

[0078] The one or more wires 182a on the top surface of the first memory device 194a may not be electrically connected to active elements such as semiconductor devices (including but not limited to transistors, diodes, and operational amplifiers) and non-active elements (including but not limited to resistors, inductors, and capacitors), all of which are provided in the first memory device 194a. Therefore, the one or more wires 182 may not be directly related to the operation of the first memory device 194a, but may be directly related to signal transceiving and / or power supply between the memory controller 192 and the second external connection terminal 150.

[0079] A top surface of the first memory device 194a may be passivated, and the conductive line 182a may be disposed in or on the passivation layer.

[0080] Figure 5 is a cross-sectional view illustrating a memory card 100c according to example embodiments.

[0081] Figure 5 The memory card 100c and Figures 1A to 4B The memory card 100, 100a or 100b of the present invention is different in that a plurality of memory devices 195 can be stacked and not offset from each other and interconnected to each other via through silicon vias (TSVs) (195v), rather than a plurality of memory devices 194 being offset from each other and interconnected to each other via bonding wires BW. Therefore, repeated descriptions are omitted, and the following description focuses on the differences.

[0082] Reference Figure 5, the plurality of memory devices 195 may include a first memory device 195a, a second memory device 195b, a third memory device 195c, and a fourth memory device 195d. Although this example shows that the plurality of memory devices 195 include four memory devices (195a, 195b, 195c, and 195d), the inventive concept is not limited thereto.

[0083] The memory controller 192 and the interposer 180 may be disposed on a first memory device 195 a , which is an uppermost memory device among the plurality of memory devices 195 . Figure 5 An example is shown in which the interposer 180 is arranged in the lateral direction of the memory controller 192. In other words, Figure 5 An example is shown in which the interposer 180 is laterally spaced apart from the memory controller 192. However, it will be appreciated by those skilled in the art that the memory controller 192 can be arranged on top of the interposer 180 on the first memory device 195a. Figure 3A and Figure 3B as shown in .

[0084] Fig. 6A and Figure 6B 1 are plan views respectively illustrating a first main surface 110 and a second main surface 112 of a memory card 100 d according to example embodiments.

[0085] Reference Fig. 6A and Figure 6B As described above, the first external connection terminals (130 and 140) provided on the first main surface 110 may include a pair of first data input terminals 145in and a pair of first data output terminals 145out. The pair of first data input terminals 145in and the pair of first data output terminals 145out may each generate a pair of differential signals.

[0086] The signal input through the pair of first data input terminals 145in can be transmitted to the memory controller 192 via the first signal input path 261in. In addition, the signal output from the memory controller 192 can be transmitted to the pair of first data output terminals 145out via the first signal output path 261out. Figure 1A As described, a pair of first data input terminals 145in and a pair of first data output terminals 145out may constitute first data input / output terminals of a single channel structure.

[0087] The second external connection terminals 150 disposed on the second main surface 112 may include a pair of second data input terminals 155in and a pair of second data output terminals 155out. Figure 6BThe pair of second data input terminals 155in are shown to be arranged to the right side of the pair of second data output terminals 155out, but the positions of the pair of second data input terminals 155in and the pair of second data output terminals 155out may be exchanged with each other.

[0088] The second data input terminal 155in can be electrically shielded by a pair of ground terminals 244a and 244b. In addition, the second data output terminal 155out can be electrically shielded by a pair of ground terminals 244b and 244c. Due to the shielding, a pair of second data input terminals 155in and a pair of second data output terminals 155out can respectively input and output data more reliably.

[0089] A pair of second data input terminals 155in may constitute a pair of differential signals, and a pair of second data output terminals 155out may also constitute a pair of differential signals. Signals input through the pair of second data input terminals 155in may be transmitted to the memory controller 192 via the second signal input path 263in. In addition, signals output from the memory controller 192 may be transmitted to the pair of second data output terminals 155out via the second signal output path 263out.

[0090] A pair of second data input terminals 155in and a pair of second data output terminals 155out may constitute second data input / output terminals of a single channel structure.

[0091] Therefore, when viewed in a plan view, a pair of data input terminals 155in and a pair of data output terminals 155out on the second main surface 112, and a pair of data input terminals 145in and a pair of data output terminals 145out on the first main surface 110 can constitute a set of data input / output terminals of a dual-channel structure. Because the number of paths through which data is input / output is doubled, the data input / output speed can theoretically be doubled.

[0092] Such an arrangement of terminals (e.g., second data input / output terminals and ground terminals for operation of the memory card) on the second main surface 112 can allow a higher degree of freedom in the design of wiring in the substrate 101, thereby obtaining a memory card with higher reliability and stability.

[0093] Fig. 7A 1 is a plan view showing the second main surface 112 of the memory card 100e according to an example embodiment. In addition to the capacitor 184a being connected to the wire 182, Fig. 7A and Figure 1B Therefore, repeated descriptions are omitted, and the following description focuses on the differences.

[0094] Reference Fig. 7A, capacitor 184a may also be provided on insert 180. Capacitor 184a may be connected to wire 182, which is connected to any one of second external connection terminals 150 (e.g., terminal 154). When terminal 154 is a power supply terminal as a power supply voltage (e.g., a terminal supplying a voltage of about 1.2V, about 0.4V, or about 0.2V), connecting terminal 154 to a capacitor may help improve the electrical characteristics of memory card 100e. Capacitor 184a may be mounted on insert 180 and may be electrically connected to terminal 154.

[0095] One end of the capacitor 184a may be connected to the wire 182 connected to the terminal 154. In addition, the other end of the capacitor 184a may be grounded.

[0096] The capacitor 184 a may be a separate element mounted on the insert 180 , or may be an element embedded in the insert 180 , which is formed while the wire 182 is embedded in the insert 180 .

[0097] Figure 7B is a plan view illustrating a second major surface 112 of a memory card 100f according to example embodiments.

[0098] Figure 7B The memory card 100f and Fig. 7A The memory card 100e is different in that the capacitor 184b is provided in a region other than the interposer 180. Therefore, repeated descriptions are omitted, and the following description focuses on the differences.

[0099] Reference Figure 7B , capacitor 184b may be disposed at a location external to insert 180 (eg, directly on substrate 101 (see Figure 2 )). In some example embodiments, capacitor 184b may be Figure 1A The passive component 170 shown in FIG.

[0100] According to the inventive concept, a memory card having improved reliability and stability while operating at a relatively high speed and a memory card slot capable of accommodating the memory card can be obtained.

[0101] According to example embodiments, a memory card may include external connection terminals on a first main surface and a second main surface. Therefore, the freedom of wiring of a PCB of the memory card may be improved, and thus a memory card with improved reliability and stability may be obtained.

[0102] Furthermore, by providing the second external connection terminals arranged on the second main surface and arranged to have a single channel arrangement, the data input / output speed is improved.

[0103] Figure 8 is a schematic diagram of a system 200 including a memory card slot 220 configured to receive a memory card 100 according to an example embodiment.

[0104] Reference Figure 8 , the system 200 may include a memory card slot 220, the memory card 100 described with reference to the above exemplary embodiments, a card interface controller 230, and a host (or external device) 240. The memory card slot 220 may be configured to accommodate insertion and contact of the memory card 100. The memory card slot 220 may be configured to be electrically connected to, for example, Figures 1A to 6B 100, 100a, 100b, 100c, 100d, 100e, or 100f shown in the figure, and the first external connection terminal (i.e., the first row terminal 130 and the second row terminal 140) and the second external connection terminal 150. The card interface controller 230 can control data exchange with the memory card 100 via the memory card slot 220. The card interface controller 230 can also be used to store data in the memory card 100. The host 240 can control the card interface controller 230.

[0105] Fig.9A The electrical connection with the memory card 100 is shown in more detail. Figure 8 Schematic diagram of the memory card slot 220 in FIG. Fig. 9B 2 is a side view schematically showing a state in which the memory card slot 220 and the memory card 100 are connected to each other.

[0106] Reference Fig.9A and Fig. 9B The memory card slot 220 is configured to accommodate the memory card 100, 100a, 100b, 100c, 100d, 100e or 100f. Fig.9A The portion indicated by 220A may show the bottom of the memory card slot 220 and the pins contacting the bottom surface of the memory card 100, 100a, 100b, 100c, 100d, 100e or 100f, and the portion indicated by 220B may show the top of the memory card slot 220 and the pins contacting the top surface of the memory card 100.

[0107] The memory card slot 220 may include a first row corresponding slot terminal 221a corresponding to the first row terminal 130 of the memory card 100, 100a, 100b, 100c, 100d, 100e or 100f, a second row corresponding slot terminal 221b corresponding to the second row terminal 140 of the memory card 100, 100a, 100b, 100c, 100d, 100e or 100f, a third row corresponding slot terminal 221c corresponding to the second external connection terminal 150 of the memory card 100, 100a, 100b, 100c, 100d, 100e or 100f, and a shell 223 capable of accommodating the slot terminals (221a, 221b and 221c). Although in the exemplary embodiment, the specific terminals corresponding to the first row slot terminal 221a, the second row slot terminal 221b, and the third row slot terminal 221c are not described in detail, those skilled in the art should understand that the above-mentioned slot terminals (221a, 221b, and 221c) may have features corresponding to the first external connection terminal and the second external connection terminal.

[0108] The memory card 100, 100a, 100b, 100c, 100d, 100e or 100f may be operated by being inserted into the housing 223 to contact the first row corresponding slot terminal 221a, the second row corresponding slot terminal 221b and the third row corresponding slot terminal 221c.

[0109] As mentioned above Figure 8 As described, the memory card slot 220 can be electrically connected to a card interface controller 230, which is configured to control power, signals and / or data input to or output from the first row corresponding slot terminal 221a, the second row corresponding slot terminal 221b and the third row corresponding slot terminal 221c.

[0110] Among the first row corresponding to the slot terminals 221a, the second row corresponding to the slot terminals 221b and the third row corresponding to the slot terminals 221c, there are the following slot terminals, which are configured to identify the inserted memory card 100, 100a, 100b, 100c, 100d, 100e or 100f as a first type card when the specific terminal corresponding to the inserted memory card 100, 100a, 100b, 100c, 100d, 100e or 100f is a ground terminal, and to identify the inserted memory card 100, 100a, 100b, 100c, 100d, 100e or 100f as a second type card when the specific terminal is not a ground terminal.

[0111] Although the first row of terminals 130 of the memory card 100, 100a, 100b, 100c, 100d, 100e or 100f shown in the embodiments is two, more than three slot terminals may be provided so that the first row corresponding to the slot terminal 221a identifies and uses a second type of memory card. In some example embodiments, the number of slot terminals corresponding to the second row of slot terminals 221b and / or the third row of slot terminals 221c may be greater than the number of the second row of terminals 140 and / or the number of the second external connection terminals 150, so that the second row corresponding to the slot terminal 221b and / or the third row corresponding to the slot terminal 221c can identify and use different types of memory cards. It will be understood by those of ordinary skill in the art that the memory card slots according to the example embodiments conceived by the present invention are not limited to Fig.9A and Fig. 9B The number of terminals in the slot is shown.

[0112] Fig.10 is a block diagram of an example of an electronic system 4100 including a memory card according to an example embodiment of the inventive concept.

[0113] Reference Fig.10 , an electronic system 4100 according to an example embodiment may include a controller 4110, an input / output (I / O) device 4120, a memory device 4130, an interface 4140, and a bus 4150. The controller 4110, the I / O device 4120, the memory device 4130, and / or the interface 4140 may be connected to each other via the bus 4150. The bus 4150 may correspond to a path through which data moves.

[0114] The controller 4110 may include at least one of a microprocessor, a digital signal processor, a microcontroller, and / or a logic element capable of performing similar functions. The I / O device 4120 may include a keypad, a keyboard, a display device, etc. The memory device 4130 may store data and / or commands, etc. The memory device 4130 may include at least one of the memory cards disclosed in the above example embodiments. The memory device 4130 may include a reference Figure 8 , Fig.9A and Fig. 9BThe memory card slot 220 described above. In addition, the memory device 4130 may also include other types of semiconductor memory devices (e.g., non-volatile memory devices and / or static random access memory (RAM) (SRAM) devices). The interface 4140 can transmit data to a communication network or receive data from a communication network. The interface 4140 may be in a wired form or a wireless form. For example, the interface 4140 may include an antenna or a wired transceiver or a wireless transceiver, etc. Although not shown, the electronic system 4100 may include an operating memory element for improving the operation of the controller 4110, and may also include a high-speed dynamic RAM (DRAM) device and / or an SRAM device, etc.

[0115] Electronic system 4100 can be applied to cellular phones, desktop computers, notebook computers, tablet personal computers (PCs), game consoles, navigation devices, digital cameras, personal digital assistants (PDAs), wireless phones, digital music players, or any electronic product that can transmit and / or receive information in a wireless environment.

[0116] FIG. 11A to FIG. 11E 1 is a cross-sectional view sequentially illustrating a method of manufacturing the memory card 100 according to an example embodiment. Specifically, FIG. 11A to FIG. 11E The cross-sectional view can be along Figure 1B Cross-sectional view along line II-II'.

[0117] Reference Fig.11A , a memory device 194 may be mounted on the substrate 101 .

[0118] For example, the substrate 101 may be a PCB. The memory device 194 may be mounted on the top surface of the substrate 101, and the first row of terminals 130 and the second row of terminals 140 may be arranged on the bottom surface of the substrate opposite to its top surface. The memory device 194 may include a plurality of memory devices (e.g., a first memory device 194a, a second memory device 194b, a third memory device 194c, and a fourth memory device 194d). The memory device 194 may be mounted on the substrate 101 by using a chip bonding film, an adhesive, or a non-conductive film, etc. In addition, the memory device 194 may be electrically connected to the substrate 101 via a bonding wire BW.

[0119] The memory controller 192 may be disposed on the first memory device 194a (eg, the uppermost memory device among the memory devices 194). In addition, the interposer 180 may be disposed on the first memory device 194a. Figures 1A to 2 The memory device 194, the memory controller 192, and the interposer 180 are described in detail, and thus a detailed description thereof is omitted here.

[0120] In some example embodiments, the memory controller 192 and the interposer 180 may be electrically connected to each other by using bonding wires BW. In some example embodiments, the memory controller 192 may be electrically connected to the substrate 101 by using bonding wires BW. However, the bonding wires BW may interfere with films subsequently laminated thereon. Fig.11A In the embodiment, a first bonding wire including bonding wires BW between the plurality of memory devices 194 and a bonding wire BW between the fourth memory device 194d and the substrate 101 is formed. The remaining bonding wires may be formed later. However, the inventive concept is not limited thereto.

[0121] Furthermore, although interposer 180 and memory controller 192 are shown as Fig.11A , but the memory controller 192 may be mounted on the interposer 180 (eg, on the top surface of the interposer 180), as shown Figure 3A and Figure 3B In addition, the memory controller 192 may be arranged such that the memory controller 192 is connected to the conductive line 182a formed on the first memory device 194a (eg, on the top surface of the first memory device 194a) without providing the interposer 180.

[0122] Reference Fig. 11B , a photosensitive film F may be attached to the top surfaces of the memory controller 192 and the interposer 180 .

[0123] The adhesive property of the photosensitive film F may be changed by, for example, an exposure process. For example, when the photosensitive film F is exposed to ultraviolet rays UV by using an exposure mask M, the photosensitive film F may have a property of reducing or removing the adhesive force of the portion of the photosensitive film F exposed to the ultraviolet rays UV while maintaining the adhesive force of the portion of the photosensitive film F not exposed to the ultraviolet rays UV. Here, the exposure mask M may have a pattern of a transparent portion T and an opaque portion B, and the photosensitive film F may be irradiated with ultraviolet rays UV through the exposure mask M.

[0124] Then, the portion of the photosensitive film F corresponding to the opaque portion B blocking the ultraviolet rays UV can maintain the initial adhesive force of the photosensitive film F. In addition, the adhesive force of the portion of the photosensitive film F corresponding to the transparent portion T transmitting the ultraviolet rays UV can be reduced or eliminated by the ultraviolet rays UV.

[0125] Reference Fig. 11C , the film pattern FP can be obtained by peeling off or removing the denatured portion of the photosensitive film F (eg, the portion where the adhesive force is reduced or eliminated).

[0126] Furthermore, the memory controller 192 may be electrically connected to the interposer 180 by using the second bonding wires BW. Furthermore, the memory controller 192 may be electrically connected to the substrate 101 by using the third bonding wires BW. According to some example embodiments, the bonding wires BW may not interfere with a film laminated thereon (e.g., a Fig. 11B The photosensitive film F and / or Fig.11D In the case of the molding layer 162 in Fig.11A All bonding wires (eg, first bonding wires, second bonding wires, and third bonding wires) are formed in the process shown in FIG.

[0127] Reference Fig.11D , the molding layer 162 may encapsulate the memory controller 192 and the memory device 194. At this time, after the substrate 101 is fixed in the mold C, the molding layer 162 having fluidity may be injected. For example, the mold C may prevent the molding layer 162 from entering a portion where the conductor via CV will be formed later. In other words, the mold C may be configured to directly contact the film pattern FP to define the shape of the conductor via CV to be formed later.

[0128] Reference Fig.11E , after removing the mold C, the exposed film pattern FP may be removed. The film pattern FP may be removed by a wet method or a dry method. In some example embodiments, the film pattern FP may be wet removed by using a chemical agent. In some example embodiments, the film pattern FP may be dry removed by dry ashing in a thermal oxidizing atmosphere.

[0129] The conductive line 182 may be exposed by removing the film pattern FP. Figure 2 ) method to form the conductor via CV and the second external connection terminal 150 relative to the exposed conductive line 182.

[0130] When the conductor vias CV and the second external connection terminals 150 are simultaneously formed by electroplating, an interface between the conductor vias CV and the second external connection terminals 150 may not exist.

[0131] In some example embodiments, after the conductor vias CV are formed by using solder paste, the second external connection terminals 150 may be formed by electroplating a conductive layer on the conductor vias CV. When the conductor vias CV and the second external connection terminals 150 are formed as described above, an interface between the conductor vias CV and the second external connection terminals 150 may exist.

[0132] Although the present invention has been specifically shown and described with reference to some exemplary embodiments of the present invention, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined in the appended claims. Therefore, modifications to the disclosed exemplary embodiments of the present invention will not depart from the scope of the appended claims.

Claims

1. A memory card, the memory card comprising a first main surface and a second main surface opposite to each other, the memory card further comprising: A printed circuit board is constructed with a first main surface, the printed circuit board includes a plurality of first external connection terminals, and the plurality of first external connection terminals are exposed on the first main surface; a plurality of memory devices stacked on a printed circuit board; a memory controller configured to control the plurality of memory devices; A molding layer encapsulating the plurality of memory devices and the memory controller, the molding layer constructing a second main surface; one or more second external connection terminals electrically connected to the memory controller, the one or more second external connection terminals being embedded in the molding layer at the second main surface and exposed by the molding layer; an inserter positioned on an uppermost memory device of the plurality of memory devices, wherein the interposer includes conductive lines that are not directly electrically connected to elements of the uppermost memory device, Wherein the memory controller is directly electrically connected to the wires, wherein at least one of the one or more second external connection terminals is electrically connected to a wire, wherein the interposer is spaced apart from the memory controller in a lateral direction, The memory controller is located on the topmost memory device among the plurality of memory devices.

2. The memory card according to claim 1, wherein: The one or more second external connection terminals include one or more data input / output terminals, wherein the data input / output terminals include a pair of data input / output terminals having a single-channel structure, in which a group of data input terminals and a group of data output terminals each include a differential signal pair.

3. The memory card according to claim 2, in, At least one of the one or more second external connection terminals is electrically connected to the interposer.

4. The memory card according to claim 3, further comprising: a conductor through hole penetrating the molding layer and extending in a direction perpendicular to the second main surface, Wherein, at least one of the one or more second external connection terminals is electrically connected to the insert via a conductor through-hole.

5. The memory card according to claim 3, wherein: The memory controller is electrically connected to the interposer via bonding wires.

6. The memory card according to claim 5, wherein: The interposer is not directly electrically connected to the plurality of memory devices.

7. The memory card according to claim 1, wherein: The at least one second external connection terminal of the one or more second external connection terminals is electrically connected to the wire via a conductor through-hole extending in a direction perpendicular to the second main surface.

8. The memory card according to claim 7, wherein: The at least one second external connection terminal of the one or more second external connection terminals is integrated with a conductor through-hole.

9. The memory card according to claim 1, wherein: The plurality of first external connection terminals include external connection terminals according to any one standard among a secure digital card, a universal flash card, and a multimedia card, wherein the secure digital card includes a normal secure digital card, a micro secure digital card, and a mini secure digital card.

10. The memory card according to claim 1, wherein: The one or more second external connection terminals include a power supply terminal configured to supply a power supply voltage less than or equal to 1.2V.

11. The memory card according to claim 1, wherein: The plurality of first external connection terminals include: A first group of first external connection terminals, located in a first row, the first row being adjacent to an insertion side edge of the memory card, the first group of first external connection terminals comprising a power supply terminal of a first voltage and a ground terminal; The second group of first external connection terminals is located in a second row, which is spaced farther from the insertion side edge than the first row, and includes a power supply terminal of a second voltage and a data terminal.

12. A memory card, comprising: a printed circuit board including a plurality of first external connection terminals configured to be connected to an external device; a plurality of memory devices stacked on a printed circuit board; a memory controller located on an uppermost memory device among the plurality of memory devices; an insert positioned on the uppermost memory device; one or more second external connection terminals located on the insert, the one or more second external connection terminals being configured to be connected to the external device; a molding layer encapsulating the plurality of memory devices and the memory controller, wherein the interposer includes conductive lines that are not directly electrically connected to elements of the uppermost memory device, Wherein the memory controller is directly electrically connected to the wires, wherein at least one of the one or more second external connection terminals is electrically connected to a wire, The interposer is spaced apart from the memory controller in a lateral direction.

13. The memory card according to claim 12, wherein: The memory controller is located on the interposer.

14. The memory card according to claim 13, further comprising: Conductor through-holes, penetrating the molding layer to contact the insert, Wherein, at least one of the one or more second external connection terminals is electrically connected to the insert via a conductor through-hole and a wire.

15. An electronic system, comprising: Controller; Input / output devices, configured to input or output data; a memory device configured to store data, the memory device comprising the memory card of claim 1; an interface configured to transmit data to an external device; as well as The bus is configured to connect the controller, the input / output device, the memory device, and the interface for communication therebetween.

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