Packaging structure and manufacturing method thereof

Abstract

The present invention discloses a packaging structure and a manufacturing method thereof, wherein the packaging structure includes: a first electrical connection layer; a chip, located on the first electrical connection layer; at least one second electrical connection layer, located above the chip, wherein the first electrical connection layer and the first second electrical connection layer are electrically connected via conductive columns; a first type of electronic component, located above the topmost second electrical connection layer, wherein the first type of electronic component is electrically connected to the first electrical connection layer via at least one second electrical connection layer, wherein at least a second type of electronic component is arranged between the topmost second electrical connection layer and the first type of electronic component to increase the flexibility of packaging wiring and improve the integration of packaging, and the packaging structure further includes a metal column located at least between the first type of electronic component and the topmost second electrical connection layer to increase the heat dissipation of the packaging structure.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and more particularly, to a packaging structure and a manufacturing method thereof. Background Art

[0002] In IC package module power supplies, inductors are usually mounted directly on a metal frame. In order to reduce the size of the module power supply package, highly integrated package structures are gradually replacing discrete package structures. For example, Figure 1 As shown, a custom inductor 101 with specially long legs is often used, and the IC chip 103 is placed under the inductor. This can reduce the size and area of ​​the entire package. However, the legs 102 of the inductor itself are very long and thin, resulting in a large DC resistance, and the loss and heat generated when the inductor is working are not easy to dissipate. The IC chip needs to be packaged once and then packaged together with other devices such as the inductor. Since both the IC package and the inductor need to occupy the area of ​​the lead frame during mounting, the space for the integrated device will be relatively small, and the circuit routing is equivalent to a single-layer PCB, which has poor flexibility. Summary of the Invention

[0003] In view of this, the present invention provides a packaging structure and a manufacturing method thereof, so as to increase the flexibility of packaging wiring, improve the integration of packaging, and further reduce the thermal resistance of the packaging structure.

[0004] According to a first aspect of the present invention, there is provided a packaging structure, comprising:

[0005] a first electrical connection layer, wherein the outer pins of the package structure are located on a lower surface of the first electrical connection layer;

[0006] A chip is located on the upper surface of the first electrical connection layer, the upper surface of the first electrical connection layer being opposite to the lower surface;

[0007] At least one second electrical connection layer is located on the chip, and the first electrical connection layer and the first second electrical connection layer are electrically connected via conductive pillars;

[0008] A first type of electronic component is located above the second electrical connection layer on the topmost layer, and the first type of electronic component is electrically connected to the first electrical connection layer through at least one layer of the second electrical connection layer.

[0009] Wherein, at least the second type of electronic components are arranged between the second electrical connection layer at the topmost layer and the first type of electronic components.

[0010] Preferably, the packaging structure further includes a metal column, which is located at least between any two adjacent second electrical connection layers or between the first type of electronic component and the topmost second electrical connection layer to increase heat dissipation of the packaging structure.

[0011] Preferably, the metal pillar serves as a pin electrode of the first type of electronic component to reduce the DC impedance on the electrical path of the first type of electronic component.

[0012] Preferably, the metal column is located on the heat dissipation path of the first type of electronic component to reduce the thermal resistance from the first type of electronic component to the external pins of the packaging structure.

[0013] Preferably, the metal pillar is solid.

[0014] Preferably, the height of the metal pillar is not less than the height of the second type of electronic components.

[0015] Preferably, the height of the metal column is not less than 0.3 mm.

[0016] Preferably, the metal column is welded between the first type electronic component and the second electrical connection layer at the topmost layer, and the metal column contacts the pad of the first type electronic component to serve as a pin electrode of the first type electronic component.

[0017] Preferably, the conductive pillar is a solid conductive bump formed by electroplating, and the height of the conductive pillar is smaller than the height of the metal pillar.

[0018] Preferably, the packaging structure further includes a first packaging body for encapsulating the first electrical connection layer, the chip and the conductive pillar.

[0019] Preferably, the packaging structure further includes a second packaging body for encapsulating at least one second electrical connection layer, the metal pillar, and the second type of electronic components.

[0020] Preferably, the second type of electronic components are capacitors or resistors.

[0021] Preferably, the first electrical connection layer and at least one second electrical connection layer are formed by electroplating through an RDL process.

[0022] Preferably, the metal pillar is a copper pillar.

[0023] Preferably, the back surface of the chip is fixed to the first electrical connection layer by adhesive, and the pad of the chip faces the first layer and the second electrical connection layer.

[0024] Preferably, the packaging structure is configured as a packaging structure of a module power supply, and the first type of electronic component is an inductive component.

[0025] Preferably, the pads on the active surface of the chip face the first electrical connection layer, so that the pad bumps of the chip are away from the inductor element to reduce the generation of additional parasitic inductance.

[0026] According to a second aspect of the present invention, there is provided a method for manufacturing a package structure, comprising:

[0027] forming a first electrical connection layer;

[0028] Mounting a chip on the upper surface of the first electrical connection layer;

[0029] forming at least one second electrical connection layer above the chip, wherein the first electrical connection layer and the first and second electrical connection layers are electrically connected via conductive pillars;

[0030] A first type of electronic component is installed above the second electrical connection layer, and the first type of electronic component is electrically connected to the first electrical connection layer through at least one second electrical connection layer.

[0031] Wherein, at least the second type of electronic components are arranged between the second electrical connection layer at the topmost layer and the first type of electronic components.

[0032] Preferably, the method further includes forming a metal pillar between at least the second electrical connection layer on the topmost layer and the first type of electronic components.

[0033] Preferably, the metal pillar serves as a pin electrode of the first type of electronic component to reduce the DC impedance on the electrical path of the first type of electronic component.

[0034] Preferably, the metal column is located on the heat dissipation path of the first type of electronic component to reduce the thermal resistance from the first type of electronic component to the external pins of the packaging structure.

[0035] Preferably, the method further comprises forming the conductive pillars by electroplating.

[0036] Preferably, it also includes forming external pins of the packaging structure through an RDL process before forming the first electrical connection layer, wherein the external pins of the packaging structure are located on the lower surface of the first electrical connection layer, and the upper surface of the first electrical connection layer is opposite to the lower surface.

[0037] Preferably, the height of the metal column is not less than 0.3 mm.

[0038] Preferably, the method further includes forming a first package body for encapsulating the first electrical connection layer, the chip, and the conductive pillar.

[0039] Preferably, the method further includes forming a second package body for encapsulating the second electrical connection layer, the metal pillar, and the second type of electronic components.

[0040] Preferably, the step of mounting a chip on the upper surface of the first electrical connection layer includes fixing the back surface of the chip to the first electrical connection layer by adhesive, with the active surface pad of the chip facing the first layer of the second electrical connection layer.

[0041] Preferably, the step of mounting a chip on the upper surface of the first electrical connection layer includes soldering active surface pads of the chip to the first electrical connection layer through bumps, with the pads of the chip facing the first electrical connection layer.

[0042] Preferably, the packaging structure is configured as a packaging structure of a module power supply, and the first type of electronic component is an inductive component.

[0043] Preferably, the second type of electronic components are resistors or capacitors.

[0044] According to the packaging structure and packaging method disclosed in the present invention, since the packaging structure includes at least two electrical connection layers, the flexibility of the packaging wiring is increased, and more devices can be integrated. At the same time, since a metal column is provided to connect with the first type of electronic component, the DC impedance of the first type of electronic component in the electrical path can be reduced, which is especially obvious in some high-power interfaces or high-current applications. It can also improve the heat dissipation effect of the packaging structure to reduce the thermal resistance from the first type of electronic component to the external pins of the packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0046] Figure 1 is a cross-sectional schematic diagram of the packaging structure of a power module in the prior art;

[0047] Figure 2 is a schematic cross-sectional view of the packaging structure of the first embodiment of the present invention;

[0048] Figure 3-Figure 8 is a three-dimensional diagram of each process step of manufacturing the package structure of the first embodiment of the present invention; DETAILED DESCRIPTION

[0049] The present invention is described below based on the following embodiments, but the present invention is not limited to these embodiments. In the detailed description of the present invention below, certain specific details are described in detail. Those skilled in the art can fully understand the present invention without these details. To avoid obscuring the essence of the present invention, well-known methods, processes, procedures, components, and circuits are not described in detail.

[0050] Furthermore, persons of ordinary skill in the art will appreciate that the figures provided herein are for illustration purposes only and are not necessarily drawn to scale.

[0051] At the same time, it should be understood that in the following description, a "circuit" refers to a conductive loop composed of at least one element or subcircuit connected electrically or electromagnetically. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected" between two nodes, it can be directly coupled or connected to the other element or there can be an intermediate element. The connection between the elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between the two.

[0052] Unless the context clearly requires otherwise, words like “include”, “comprising” and the like in the specification should be interpreted as including rather than exclusive or exhaustive; that is, as “including but not limited to”.

[0053] In the description of the present invention, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood to indicate or imply relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0054] The present application discloses a packaging structure, comprising: a first electrical connection layer, wherein the external pins of the packaging structure are located on the lower surface of the first electrical connection layer; a chip located on the upper surface of the first electrical connection layer, the upper surface of the first electrical connection layer being opposite to the lower surface; at least one second electrical connection layer located above the chip, wherein the first electrical connection layer and the first and second electrical connection layers are electrically connected via conductive pillars; a first type of electronic component located above the topmost second electrical connection layer, wherein the first type of electronic component is electrically connected to the first electrical connection layer via at least one second electrical connection layer, wherein at least a second type of electronic component is disposed between the topmost second electrical connection layer and the first type of electronic component to improve the integration of the package. The packaging structure further comprises a metal pillar located at least between any two adjacent second electrical connection layers or between the first type of electronic component and the topmost second electrical connection layer. Specifically, the metal pillar can serve as a pin electrode of the first type of electronic component to reduce the DC impedance of the electrical path of the first type of electronic component; the metal pillar can be located in the heat dissipation path of the first type of electronic component to reduce the thermal resistance from the first type of electronic component to the external pins of the packaging structure.

[0055] The at least one second electrical connection layer can be electrically connected via metal columns or conductive columns, and a second type of electronic component can be further provided between two adjacent second electrical connection layers.

[0056] In the present application, at least one second electrical connection layer is specifically a second electrical connection layer.

[0057] Figure 2 FIG2 is a schematic cross-sectional view of a package structure according to a first embodiment of the present invention. The package structure includes a first electrical connection layer 201, a chip 202 mounted on the upper surface of the first electrical connection layer 201, a second electrical connection layer 204 located above the chip 202, and a first-type electronic component 209 located above the second electrical connection layer 204. External pins 211 of the package structure are provided on the lower surface of the first electrical connection layer 201. The first electrical connection layer 201 and the second electrical connection layer 204 are electrically connected via conductive pillars 203. Metal pillars 205 are located between the first-type electronic component 209 and the second electrical connection layer 204. Specifically, in this embodiment, at least a portion of the metal pillars 205 contact the pads of the first-type electronic component 209. Furthermore, a second-type electronic component 206 is provided in the vacant space between the first-type electronic component 209 and the second electrical connection layer 204.

[0058] The package structure further includes a first package body 212, which encapsulates the first electrical connection layer 201, the conductive pillars 203, and the chip 202, with the first package body exposing the bumps on the active surface of the chip 202 and the upper surface of the conductive pillars 203. The package structure also includes a second package body 213, which encapsulates the second electrical connection layer 204, the metal pillars 205, and the second-type electronic components 206, with the second package body 213 exposing the upper surface of the metal pillars 205. In other embodiments, the package structure may further include a package body encapsulating the external pins 211 and a package body encapsulating the first-type electronic components 209 (not shown).

[0059] The package structure is electrically connected to an external circuit via external pins 211. Specifically, when the package structure is electrically connected to an external circuit, the external pins further include a solder layer for soldering to the external circuit. The solder pads of the first-type electronic components specifically include a metal connection layer 207 and a first solder layer 208 located thereon. The metal connection layer 207 contacts the metal pillars 205, and the first solder layer 208 contacts the lead-out terminals of the first-type electronic components.

[0060] In this embodiment, at least part of the metal pillars 205 are in contact with the solder pads of the first-type electronic components 209 to serve as electrode pins of the first-type electronic components 209, which can not only reduce the DC impedance on the electrical path of the first-type electronic components, but also increase the heat dissipation of the first-type electronic components; in other embodiments, the metal pillars may not be directly connected to the solder pads of the first-type electronic components 209, but may be located on the heat dissipation path of the first-type electronic components to reduce the thermal resistance from the first-type electronic components to the external pins of the packaging structure.

[0061] It should be noted that the first electrical connection layer in this application is formed by an RDL (rewiring technology) process, and the first electrical connection layer needs to be formed by RDL electroplating according to the circuit connection required by the packaging structure. The conductive pillar 203 is a solid pillar formed by electroplating. Because the thickness of the chip is generally thin, about 0.2mm, the conductive pillar can be formed by the electroplating process; the second type of electronic component 206 is generally a capacitor or resistor, and the thickness of the capacitor or resistor is relatively thick. Therefore, the height of the metal pillar 205 must be greater than the thickness of the second type of electronic component. However, this thickness cannot be achieved in existing processes. Hollow pillars with metal attached to the inner wall are usually used. Since the flow conductivity and heat dissipation capabilities of hollow pillars are relatively poor, metal pillars are selected in this application to achieve connections between higher stacks, wherein the metal pillars are solid and their height is not less than 0.3mm, and further, not less than 0.5mm, that is, the height of the metal pillars is at least greater than the height of the second type of electronic components. In this embodiment, the first electrical connection layer and the second electrical connection layer are both copper layers, and the material of the conductive column and the metal column is also copper. Of course, in other embodiments, those skilled in the art may also select other suitable metals, and are not limited to copper materials.

[0062] In this embodiment, the packaging structure is a packaging structure of a power module, wherein the first type of electronic component 209 is an inductor component. The inductor component can directly use a standard inductor without customizing a specific inductor. The chip 202 can be mounted on the first electrical connection layer in a positive manner, that is, the active surface of the chip 202 faces the second electrical connection layer, the back of the chip is adhered to the first electrical connection layer by adhesive, the pads on the active surface of the chip can be connected to the second electrical connection layer via conductive bumps, and then connected to the first electrical connection layer 201 via conductive pillars 203; of course, the chip 202 can also be mounted on the first electrical connection layer in a flip-chip manner, that is, the active surface of the chip 202 faces the first electrical connection layer, and the pads on the active surface of the chip are directly connected to the first electrical connection layer via conductive bumps located thereon. In addition, the pads of the chip are away from the bottom surface of the inductor, and are not likely to generate additional lead inductance due to being too close to the magnetic core. Furthermore, when the chip is flip-chip mounted on the first electrical connection layer, a pad may be provided on the back side of the chip, and the back side pad is connected to the first electrical connection layer through the second electrical connection layer and the conductive column.

[0063] Since the packaging structure of the present application includes at least two electrical connection layers, the flexibility of the packaging wiring is increased, and more devices can be integrated. At the same time, due to the setting of the metal column, the DC impedance of the electrical path connecting the first type of electronic components can be reduced, especially in some high-power interfaces or high-current applications. The effect is more obvious, and the heat dissipation effect of the packaging structure can also be improved to reduce the thermal resistance from the first type of electronic components to the external pins of the packaging structure.

[0064] The present invention also provides a method for manufacturing a packaging structure, comprising:

[0065] Forming a first electrical connection layer

[0066] mounting a chip on the upper surface of the first electrical connection layer;

[0067] forming a second electrical connection layer above the chip, wherein the first electrical connection layer and the second electrical connection layer are connected via conductive pillars;

[0068] A first type of electronic components is mounted above the second electrical connection layer, wherein a second type of electronic components is arranged between the first type of electronic components and the second electrical connection layer.

[0069] The manufacturing method further includes soldering metal pillars between the second electrical connection layer at least on the topmost layer and the first type of electronic components.

[0070] The following is based on Figure 3-Figure 8 The manufacturing method of the packaging structure is described in detail, and the method specifically includes the following steps:

[0071] like Figure 3 As shown, the external pins (not shown) of the package structure are first electroplated using an RDL (rewiring process) process, and then a first electrical connection layer 301 is electroplated on the external pins. The first electrical connection layer is formed using the RDL process, and the plating shape of the first electrical connection layer is determined by the circuit connection requirements of the package structure. In addition, before forming the first electrical connection layer, a package body is encapsulated with an encapsulating material to expose the lower surface of the external pins. When the package structure is connected to an external circuit, a solder layer is formed on the lower surface of the external pins for soldering the external circuit, such as a printed circuit board (PCB).

[0072] like Figure 4As shown, the RDL process is continued to be used to electroplate the first electrical connection layer 301 to form electrical terminals, namely conductive terminals 302. The conductive terminals are used to connect the first electrical connection 301 to the second electrical connection layer formed in a subsequent process. In this embodiment, the height requirement of the conductive terminals is not high, that is, the conductive terminals can be directly formed into a solid structure by electroplating.

[0073] like Figure 5 As shown, a bare chip 303 with conductive bumps is mounted on the first electrical connection layer 301. In this embodiment, the active surface of the chip 303 is away from the first electrical connection layer 301, and the back of the chip 303 is adhered to the first electrical connection layer 301 using adhesive, that is, the conductive bumps on the active surface pads of the chip face upward. In other embodiments, the chip 303 can also be mounted on the first electrical connection layer 301 using a flip-chip method, that is, the conductive bumps on the active surface pads of the chip 303 face the first electrical connection layer 301.

[0074] like Figure 6 As shown, the first electrical connection layer 301, the conductive pillars 302, and the chip 303 are encapsulated with an encapsulation material to form a first package body. The first package body exposes the upper surface of the conductive pillars 302 and the upper surface of the conductive bumps on the active side of the chip. Then, the second electrical connection layer 304 is electroplated on the first package body using an RDL process. When the chip 303 is face-up, the conductive bumps on the active side pads of the chip 303 are connected to the second electrical connection layer 304, and then electrically connected to the first electrical connection layer via the conductive pillars. When the chip 303 is flip-chip, the conductive bumps on the active side pads of the chip 303 are directly electrically connected to the first electrical connection layer. The back side of the chip 303 may also include pad electrodes, which can be electrically connected to the first electrical connection layer via the second electrical connection layer 304.

[0075] like Figure 7 As shown, a metal pillar 305 and a second type of electronic component 306 are reflow-soldered on the second electrical connection layer 304. The metal pillar 305 is solid, and the height of the metal pillar is at least higher than the thickness of the second type of electronic component 306. Preferably, the height of the metal pillar 305 is greater than 0.3 mm. In this embodiment, the second type of electronic component 306 is a capacitor or a resistor. The metal pillar can serve as a pin electrode of the first type of electronic component to reduce the DC impedance on the electrical path of the first type of electronic component; the metal pillar can also be located on the heat dissipation path of the first type of electronic component to reduce the thermal resistance from the first type of electronic component to the external pins of the packaging structure.

[0076] like Figure 8 The second electrical connection layer 304, the metal pillar 305, and the second type of electronic component 306 are encapsulated with an encapsulating material to form a second package body, with the upper surface of the metal pillar 305 exposed in the second package body. The first type of electronic component is then soldered to the second package body via reflow soldering. Prior to soldering the first type of electronic component, the method further includes forming a solder pad 307 for the first type of electronic component on the upper surface of the exposed metal pillar. The solder pad includes a metal connection layer and a first solder layer thereon, i.e., the metal pillar contacts the metal connection layer, and the lead end of the first type of electronic component contacts the first solder layer.

[0077] Whether to form a packaging body to encapsulate the first type of electronic components can be selected according to the requirements of the actual packaging structure. That is, the first type of electronic components can be encapsulated by the packaging body or not.

[0078] In this embodiment, the packaging structure is a packaging structure of a power module, and the first type of electronic component is an inductor component.

[0079] In other embodiments, the external pins, the first electrical connection layer 301 , the conductive pillars 302 , and the second electrical connection layer 304 described above may also be formed by other processes, and are not limited to the RDL process electroplating in this application.

[0080] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A packaging structure, characterized in that: The packaging structure is configured as a packaging structure of a module power supply, and the packaging structure includes: a first electrical connection layer, wherein the outer pins of the package structure are located on a lower surface of the first electrical connection layer; A chip is located on the upper surface of the first electrical connection layer, the upper surface of the first electrical connection layer being opposite to the lower surface; At least one second electrical connection layer is located on the chip, and the first electrical connection layer and the first second electrical connection layer are electrically connected via conductive pillars; a first-category electronic component located above the second electrical connection layer at the topmost layer, the first-category electronic component being electrically connected to the first electrical connection layer via at least one second electrical connection layer, wherein a second-category electronic component is disposed at least between the second electrical connection layer at the topmost layer and the first-category electronic component, the first-category electronic component being an inductor, and the second-category electronic component being a capacitor or a resistor; The packaging structure further includes a metal column, which is located at least between the first type of electronic component and the second electrical connection layer at the top layer to increase heat dissipation of the packaging structure; The second package is used to encapsulate at least one of the second electrical connection layers, the metal pillars, and the second type of electronic components.

2. The packaging structure according to claim 1, wherein: The metal pillars serve as pin electrodes of the first type of electronic components to reduce the DC impedance on the electrical path of the first type of electronic components.

3. The packaging structure according to claim 1, wherein: The metal column is located on the heat dissipation path of the first type of electronic component to reduce the thermal resistance from the first type of electronic component to the external pins of the packaging structure.

4. The packaging structure according to claim 1, wherein: The metal pillar is solid.

5. The packaging structure according to claim 1, wherein: The height of the metal pillar is not less than the height of the second type of electronic components.

6. The packaging structure according to claim 1, wherein: The height of the metal column is not less than 0.3 mm.

7. The packaging structure according to claim 2, wherein: The metal column is welded between the first type electronic component and the second electrical connection layer at the topmost layer, and the metal column contacts the pad of the first type electronic component to serve as a pin electrode of the first type electronic component.

8. The packaging structure according to claim 1, wherein: The conductive pillar is a solid conductive bump formed by electroplating, and the height of the conductive pillar is smaller than the height of the metal pillar.

9. The packaging structure according to claim 1, wherein: The packaging structure further includes a first packaging body for encapsulating the first electrical connection layer, the chip, and the conductive pillar.

10. The packaging structure according to claim 1, wherein: The first electrical connection layer and at least one second electrical connection layer are formed by electroplating through an RDL process.

11. The packaging structure according to claim 1, wherein: The metal pillar is a copper pillar.

12. The packaging structure according to claim 1, wherein: The back side of the chip is fixed to the first electrical connection layer by adhesive, and the pad of the chip faces the first layer and the second electrical connection layer.

13. The packaging structure according to claim 1, wherein: The pads on the active surface of the chip face the first electrical connection layer, so that the pad bumps of the chip are away from the inductor element, thereby reducing the generation of additional parasitic inductance.

14. A method for manufacturing a packaging structure, characterized in that: The packaging structure is configured as a packaging structure of a module power supply, and the method includes: forming a first electrical connection layer; mounting a chip on the upper surface of the first electrical connection layer; forming at least one second electrical connection layer above the chip, wherein the first electrical connection layer and the first and second electrical connection layers are electrically connected via conductive pillars; Mounting a first-type electronic component above the topmost second electrical connection layer, the first-type electronic component being electrically connected to the first electrical connection layer via at least one second electrical connection layer, wherein a second-type electronic component is disposed at least between the topmost second electrical connection layer and the first-type electronic component, the first-type electronic component being an inductor, and the second-type electronic component being a capacitor or a resistor; The method further comprises forming a metal pillar between at least the second electrical connection layer at the topmost layer and the first type of electronic components to increase heat dissipation of the packaging structure; A second package is formed to encapsulate the second electrical connection layer, the metal pillar, and the second type of electronic components.

15. The method according to claim 14, characterized in that The metal pillars serve as pin electrodes of the first type of electronic components to reduce the DC impedance on the electrical path of the first type of electronic components.

16. The method according to claim 14, characterized in that The metal column is located on the heat dissipation path of the first type of electronic component to reduce the thermal resistance from the first type of electronic component to the external pins of the packaging structure.

17. The method according to claim 14, characterized in that The method further includes forming the conductive pillar by electroplating.

18. The method according to claim 14, characterized in that It also includes forming external pins of the packaging structure through an RDL process before forming the first electrical connection layer, wherein the external pins of the packaging structure are located on the lower surface of the first electrical connection layer, and the upper surface of the first electrical connection layer is opposite to the lower surface.

19. The method according to claim 14, wherein The height of the metal column is not less than 0.3 mm.

20. The method according to claim 14, wherein The method further includes forming a first package body for encapsulating the first electrical connection layer, the chip, and the conductive pillar.

21. The method according to claim 14, wherein The step of mounting a chip on the upper surface of the first electrical connection layer includes fixing the back surface of the chip to the first electrical connection layer by adhesive, with the active surface pad of the chip facing the first layer and the second electrical connection layer.

22. The method according to claim 14, wherein The step of mounting a chip on the upper surface of the first electrical connection layer includes soldering the active surface pads of the chip to the first electrical connection layer through bumps, with the pads of the chip facing the first electrical connection layer.

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