Comparison device, analog-to-digital converter and electronic device

By designing a comparative device that includes a comparison unit, comparative switch, comparator, capacitance unit, capacitor switch unit, and control unit, the problem of voltage disorders in the traditional comparator structure is solved, and the output of high -precision comparative results is achieved It improved the accuracy and work efficiency of the modulus converter.

CN110798185BActive Publication Date: 2025-01-28SHANGHAI SINOMCU MICROELECTRONICS
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Patent Information

Application Number
CN201911234215.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-12-05
Publication Date
2025-01-28
Estimated Expiration
2039-12-05

AI Technical Summary

Technical Problem

The traditional comparator structure has voltage offset, which cannot ensure comparison accuracy, resulting in the analog-to-digital converter being unable to accurately transcode.

Method used

A comparison device is designed, including the voltage of the voltage, the voltage switch, the comparator, the capacitor unit, the capacitor switch unit, and the control unit. The capacitance unit is charged by controlling the voltage voltage to eliminate the internal voltage disorders inside the comparator.

Benefits of technology

A rapidly eliminating voltage disorders inside the comparator can be achieved, so that the comparator can quickly output the accurate comparison result, avoid the comparison of output errors, thereby improving the accuracy and working efficiency of the modulus converter.

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Abstract

The present disclosure relates to a comparison device, an analog-to-digital converter and an electronic device, wherein the device comprises a voltage-dividing unit, a voltage-dividing switch, a comparator, a capacitor unit, a capacitor switch unit and a control unit, wherein the capacitor unit comprises M capacitors connected in parallel, and the control unit is used to: within a first time period, control the voltage-dividing voltage outputted by the third terminal of the voltage-dividing unit to charge the capacitor unit; when the first time period is reached, output the comparison result through the output terminal of the comparator. Through the above device, the embodiment of the present disclosure can quickly eliminate the voltage offset phenomenon inside the comparator, so that the comparator can quickly output an accurate comparison result, and can avoid outputting an erroneous comparison result. When the comparator device is used in an analog-to-digital converter, due to its improved accuracy, it can achieve high-speed elimination of the offset voltage to ensure accurate transcoding during conversion, thereby improving work efficiency.
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Description

Technical Field

[0001] The present disclosure relates to the technical field of integrated circuits, and in particular to a comparison device, an analog-to-digital converter, and an electronic device. Background Art

[0002] In recent years, with the continuous development of integrated circuit manufacturing technology, the feature size of CMOS devices has been continuously reduced, and the operating voltage of integrated circuits has been continuously reduced. Under the deep submicron process, the operating speed of analog-to-digital converters has been greatly improved, and at the same time, the power consumption has been further reduced. However, as the core component of the analog-to-digital converter, the performance of the comparator has become a bottleneck in the design of high-precision analog-to-digital converters. Several traditional comparator structures cannot ensure comparison accuracy due to the internal voltage offset phenomenon, and comparison errors may occur, making the analog-to-digital converter unable to accurately transcode. Summary of the invention

[0003] In view of this, the present disclosure proposes a comparison device, which includes a voltage division unit, a voltage division switch, a comparator, a capacitor unit, a capacitor switch unit and a control unit, wherein:

[0004] The first end of the voltage dividing unit is used to input a first voltage, the second end of the voltage dividing unit is grounded, and the third end of the voltage dividing unit is electrically connected to the first end of the voltage dividing switch;

[0005] The second end of the voltage divider switch is electrically connected to the first input end of the comparator and the first end of the capacitor unit, the control end of the voltage divider switch is electrically connected to the control unit, and the second input end of the comparator is used to input a comparison voltage;

[0006] The capacitor unit includes M capacitors connected in parallel, wherein the second end of the first capacitor to the second end of the Nth capacitor are electrically connected to the first end of the capacitor switch unit, the second end of the N+1th capacitor to the second end of the Mth capacitor are grounded, the second end of the capacitor switch unit is used to input a second voltage, the third end of the capacitor switch unit is grounded, and the control end of the capacitor switch unit is electrically connected to the control unit, wherein M>N and M and N are positive integers;

[0007] The control unit is used for:

[0008] In a first time period, controlling the divided voltage outputted by the third terminal of the voltage dividing unit to charge the capacitor unit;

[0009] When the first time period is reached, the comparison result is outputted through the output terminal of the comparator.

[0010] In a possible implementation manner, controlling the divided voltage output by the third terminal of the voltage dividing unit to charge the capacitor unit includes:

[0011] Controlling the voltage divider switch to be turned on, and controlling the second end of the first capacitor to the second end of the Nth capacitor to be grounded through the capacitor switch unit, so as to charge the capacitor unit with the voltage divider voltage outputted by the third end of the voltage divider unit;

[0012] Outputting the comparison result through the output terminal of the comparator includes:

[0013] The voltage divider switch is controlled to be disconnected, and the second end of the first capacitor to the second end of the Nth capacitor are controlled to receive the second voltage through the capacitor switch unit, so that the output end of the comparator outputs a comparison result.

[0014] In a possible implementation manner, controlling the divided voltage output by the third terminal of the voltage dividing unit to charge the capacitor unit includes:

[0015] Control the voltage divider switch to be turned on, and control the second end of the first capacitor to the second end of the Nth capacitor to receive the second voltage through the capacitor switch unit, so as to charge the capacitor unit with the voltage divider voltage output by the third end of the voltage divider unit;

[0016] Outputting the comparison result through the output terminal of the comparator includes:

[0017] The voltage divider switch is controlled to be disconnected, and the second end of the first capacitor to the second end of the Nth capacitor are controlled to be grounded through the capacitor switch unit, so that the output end of the comparator outputs a comparison result.

[0018] In a possible implementation, the voltage dividing unit includes a first resistor and a second resistor, wherein:

[0019] The first end of the first resistor is used to receive the first voltage, the second end of the first resistor is electrically connected to the first end of the second resistor and the first end of the voltage divider switch, and the second end of the second resistor is grounded.

[0020] In a possible implementation, the capacitor switch unit includes a plurality of switches, the number of switches in the capacitor switch unit is greater than or equal to 2N, and any two of the plurality of switches are used to control a connection relationship between the second end of any one of the first capacitor to the Nth capacitor and the second voltage and ground, wherein:

[0021] The first ends of the two switches are electrically connected to the second end of the capacitor, the second end of one of the two switches serves as the second end of the capacitor switch unit, the second end of the other of the two switches serves as the third end of the capacitor switch unit, and the control end of each switch serves as the control end of the capacitor switch unit.

[0022] In a possible implementation manner, each switch in the voltage divider switch and the capacitor switch unit includes one of a triode, a transistor, and a single-pole single-throw switch.

[0023] According to another aspect of the present disclosure, an analog-to-digital converter is provided, the analog-to-digital converter comprising:

[0024] The comparison device.

[0025] According to another aspect of the present disclosure, an electronic device is provided, the electronic device comprising:

[0026] The analog-to-digital converter.

[0027] Various aspects of the embodiments of the present disclosure can quickly eliminate the voltage offset phenomenon inside the comparator, so that the comparator can quickly output accurate comparison results. Moreover, since the comparison device proposed in the embodiments of the present disclosure eliminates the voltage offset phenomenon inside the comparator, the comparator device can avoid outputting erroneous comparison results. When the comparator device is used in an analog-to-digital converter, due to its improved accuracy, it can achieve high-speed elimination of offset voltage to ensure accurate transcoding during conversion, thereby improving work efficiency.

[0028] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0030] Figure 1 A schematic diagram of a comparison device according to an embodiment of the present disclosure is shown.

[0031] Figure 2 A schematic diagram of a comparison device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0032] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0033] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0034] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the present disclosure.

[0035] See also Figure 1 , Figure 1 A schematic diagram of a comparison device according to an embodiment of the present disclosure is shown.

[0036] The comparison device can be applied to an analog-to-digital converter (ADC), such as Figure 1 As shown, the device includes a voltage dividing unit 10, a voltage dividing switch S0, a comparator 11, a capacitor unit 12, a capacitor switch unit 13 and a control unit 14, wherein:

[0037] The first end of the voltage dividing unit 10 is used to input the first voltage V1, the second end of the voltage dividing unit 10 is grounded, and the third end of the voltage dividing unit 10 is electrically connected to the first end of the voltage dividing switch S0;

[0038] The second end of the voltage divider switch S0 is electrically connected to the first input end VINA of the comparator 11 and the first end of the capacitor unit 12, the control end of the voltage divider switch 10 is electrically connected to the control unit 14, and the second input end of the comparator 11 is used to input the comparison voltage VB;

[0039] The capacitor unit 12 includes M capacitors connected in parallel, wherein the second end of the first capacitor C1 to the second end of the Nth capacitor CN are electrically connected to the first end of the capacitor switch unit 13, the second end of the N+1th capacitor C(N+1) to the second end of the Mth capacitor CM are grounded, the second end VINB of the capacitor switch unit 13 is used to input the second voltage V2, the third end of the capacitor switch unit 13 is grounded, and the control end of the capacitor switch unit 13 is electrically connected to the control unit 14, wherein M>N and M and N are positive integers;

[0040] The control unit 14 is used to:

[0041] In a first time period, the voltage-dividing voltage outputted by the third terminal of the voltage-dividing unit 10 is controlled to charge the capacitor unit 12;

[0042] When the first time period is reached, the comparison result Vout is outputted through the output terminal of the comparator 11 .

[0043] Through the above device, the embodiment of the present disclosure can quickly eliminate the voltage offset phenomenon inside the comparator 11, so that the comparator can quickly output an accurate comparison result. Moreover, since the comparison device proposed in the embodiment of the present disclosure eliminates the voltage offset phenomenon inside the comparator, the comparator device can avoid outputting erroneous comparison results. When the comparator device is used in an analog-to-digital converter, due to its improved accuracy, it can achieve high-speed elimination of the offset voltage to ensure accurate transcoding during conversion, thereby improving work efficiency.

[0044] It should be noted that the “second end of the first capacitor C1 to the second end of the Nth capacitor CN” described in the embodiment of the present disclosure may include the second end of the first capacitor C1, the second end of the second capacitor C2, the second end of the third capacitor C3, ..., the second end of the N-1th capacitor C(N-1), and the second end of the Nth capacitor CN. The “second end of the N+1th capacitor C(N+1) to the second end of the Mth capacitor CM” described in the embodiment of the present disclosure may include the second end of the N-1th capacitor C(N-1), the N+2th capacitor C(N+2), the N+3th capacitor C(N+3), ..., the M-1th capacitor C(M-1), and the Mth capacitor CM.

[0045] It should be noted that the embodiment of the present disclosure does not limit the specific sizes of the first voltage V1 and the second voltage V2. The two may be the same or different, and those skilled in the art may set them as needed.

[0046] In a possible implementation, the first time period may be a time period in the process of eliminating the offset voltage. For example, after the device is powered on, the process of eliminating the offset voltage may be started to eliminate the offset voltage of the comparator. During the first time period, the control unit 14 may control the voltage-dividing voltage outputted from the third terminal of the voltage-dividing unit 10 to charge the capacitor unit 12. When the first time period is reached, it may be considered that the offset voltage of the comparator has been eliminated, the comparison device may perform the comparison operation, and the control unit may output the comparison result through the output terminal of the comparator.

[0047] It should be noted that the present disclosure does not limit the specific length of the first time period, and those skilled in the art can determine it as needed.

[0048] In a possible implementation, controlling the divided voltage outputted by the third terminal of the voltage dividing unit 10 to charge the capacitor unit 12 may include:

[0049] Control the voltage divider switch S0 to be turned on, and control the second end of the first capacitor C1 to the second end of the Nth capacitor CN to be grounded through the capacitor switch unit 12, so as to charge the capacitor unit 12 with the voltage divider voltage outputted from the third end of the voltage divider unit 10;

[0050] Outputting the comparison result through the output terminal of the comparator 11 may include:

[0051] The voltage divider switch S0 is controlled to be disconnected, and the second end of the first capacitor C1 to the second end of the Nth capacitor CN are controlled by the capacitor switch unit 13 to receive the second voltage V2, so that the output end of the comparator 11 outputs the comparison result Vout.

[0052] In an example, assuming that the internal offset voltage VINB-VINA=10mV caused by the voltage offset phenomenon of the comparator 11, when the voltage difference between the comparison voltage VB input to the second input terminal VINB of the comparator 11 and the voltage VA input to the first input terminal VINA of the comparator 11 is within 10mV, the comparator cannot flip, that is, it is impossible to output a comparison result based on the comparison voltage VB at the second input terminal VINB of the comparator and the voltage VA input to the first input terminal VINA of the comparator. In this case, the comparison accuracy of the comparator is low and an accurate comparison result cannot be obtained.

[0053] In one example, in the first time period of the comparison device, i.e., the offset voltage elimination stage (sampling stage), according to "controlling the voltage divider switch S0 to be turned on, and controlling the second end of the first capacitor C1 to the second end of the Nth capacitor CN to be grounded through the capacitor switch unit 12, so as to charge the capacitor unit 12 with the voltage divider voltage outputted from the third end of the voltage divider unit 10", assuming that the voltage divider voltage outputted from the third end of the voltage divider unit 10 is VCOM, the total amount of electricity on the capacitor unit 12 is: (VCOM-GND)*(C1+…+CN+C(N+1)+…+CM). When the comparison device reaches the first time period, a comparison can be made. According to "controlling the voltage divider switch S0 to be turned off, and controlling the second end of the first capacitor C1 to the second end of the Nth capacitor CN to receive the second voltage V2 through the capacitor switch unit 13", after the voltage divider switch S0 is turned off, the total amount of electricity on the capacitor unit 12 remains unchanged, and it can be obtained:

[0054] (VCOM-GND)*(C1+…+CN+C(N+1)+…+CM)

[0055] =(VA-V2)*(C1+…+CN)+(VA-GND)*(C(N+1)+…+CM),

[0056] Since in the voltage comparison stage, the second end of the first capacitor C1 to the second end of the Nth capacitor CN receives the second voltage V2, the voltage difference between the first capacitor C1 and the Nth capacitor CN is (VA-V2). Since the total charge of the capacitor unit 12 remains unchanged, the voltage input to the first input terminal VINA of the comparator 11 is increased to a certain extent compared with the divided voltage VCOM. When the number of configurations N reaches an appropriate level, the offset voltage inside the comparator 11 can be offset. For example, by reasonably setting the number of capacitors from the first capacitor C1 to the Nth capacitor CN, the input voltage VA of the first input terminal VINA of the comparator 11 can be increased by 10mV. In this way, the 10mV offset voltage of VINB inside the comparator that is higher than VINA can be offset.

[0057] Of course, the embodiment of the present disclosure does not limit the number of capacitors of the capacitor unit 12, and those skilled in the art can determine the specific number through testing and set the size of N according to actual needs.

[0058] In a possible implementation, controlling the divided voltage outputted by the third terminal of the voltage dividing unit 10 to charge the capacitor unit 12 may include:

[0059] Control the voltage divider switch S0 to be turned on, and control the second end of the first capacitor C1 to the second end of the Nth capacitor CN to receive the second voltage V2 through the capacitor switch unit 13, so as to charge the capacitor unit 12 with the voltage divider voltage output by the third end of the voltage divider unit 10;

[0060] Outputting the comparison result through the output terminal of the comparator 11 may include:

[0061] The voltage divider switch S0 is controlled to be disconnected, and the second end of the first capacitor C1 to the second end of the Nth capacitor CN are controlled to be grounded through the capacitor switch unit 13, so that the output end of the comparator 11 outputs the comparison result.

[0062] In an example, assuming that the internal offset voltage VINA-VINB=10mV caused by the voltage offset phenomenon of the comparator 11, when the voltage difference between the comparison voltage VB input to the second input terminal VINB of the comparator 11 and the voltage VA input to the first input terminal VINA of the comparator is within 10mV, the comparator cannot flip, that is, the comparison result cannot be output according to the comparison voltage VB of the second input terminal VINB of the comparator 11 and the voltage VA input to the first input terminal VINA of the comparator 11. In this case, the comparison accuracy of the comparator is low and an accurate comparison result cannot be obtained.

[0063] In one example, in the first time period of the comparison device, i.e., the offset voltage elimination stage (sampling stage), according to "controlling the voltage divider switch S0 to be turned on, and controlling the second end of the first capacitor C1 to the second end of the Nth capacitor CN to receive the second voltage V2 through the capacitor switch unit 13, so as to charge the capacitor unit 12 with the voltage divider voltage outputted from the third end of the voltage divider unit 10", assuming that the voltage divider voltage outputted from the third end of the voltage divider unit 10 is VCOM, the total amount of electricity on the capacitor unit 12 is: (VCOM-V2)*(C1+…+CN)+(VCOM-GND)*(C(N+1)+…+CM). When the comparison device reaches the first time period, a comparison can be made. According to "controlling the voltage divider switch S0 to be turned off, and controlling the second end of the first capacitor C1 to the second end of the Nth capacitor CN to be grounded through the capacitor switch unit 13", after the voltage divider switch S0 is turned off, the total amount of electricity on the capacitor unit 12 remains unchanged, and it can be obtained:

[0064] (VCOM-V2)*(C1+…+CN)+(VCOM-GND)*(C(N+1)+…+CM)

[0065] =(VA-GND)*(C1+…+CN+C(N+1)+…+CM),

[0066] Since in the first time period (i.e., the sampling phase), the second end of the first capacitor C1 to the second end of the Nth capacitor CN are controlled to receive the second voltage V2, the voltage difference between the first capacitor C1 and the Nth capacitor CN is (VCOM-V2), and the second end of the N+1th capacitor C(N+1) to the second end of the Mth capacitor CM is grounded, so the voltage difference between the N+1th capacitor and the Mth capacitor CM is VCOM-GND. In the voltage comparison phase, the second end of the first capacitor C1 to the second end of the Mth capacitor CM are all grounded, so the voltage difference between the first capacitor C1 and the Mth capacitor CM is (VA-GND). Since the total charge of the capacitor unit 12 remains unchanged, the voltage input to the first input terminal VINA of the comparator 11 is lower than the divided voltage VCOM to a certain extent. When the number of configurations N reaches an appropriate level, the offset voltage inside the comparator 11 can be offset. For example, by reasonably setting the number of capacitors from the first capacitor C1 to the Nth capacitor CN, the input voltage VA of the first input terminal VINA of the comparator 11 can be reduced by 10mV. In this way, the 10mV offset voltage of VINA inside the comparator that is higher than VINB can be offset.

[0067] Of course, the embodiment of the present disclosure does not limit the number of capacitors of the capacitor unit 12 , and those skilled in the art can determine the specific number through testing and set the size of N as needed.

[0068] The following is an exemplary introduction to each unit of the comparison device.

[0069] See also Figure 2 , Figure 2 A schematic diagram of a comparison device according to an embodiment of the present disclosure is shown.

[0070] In a possible implementation, the voltage dividing unit 10 may include a first resistor R1 and a second resistor R2, wherein:

[0071] The first end of the first resistor R1 is used to receive the first voltage V1 , the second end of the first resistor R1 is electrically connected to the first end of the second resistor R2 and the first end of the voltage divider switch S0 , and the second end of the second resistor R2 is grounded.

[0072] Of course, the above description is exemplary, and the embodiments of the present disclosure are not limited thereto. In other implementations, the voltage divider unit 10 may be implemented in other ways. For example, the first resistor R1 may include a resistor network composed of multiple resistors, and the second resistor R2 may include a resistor network composed of multiple resistors. The present disclosure does not limit this.

[0073] In a possible implementation, Figure 2 As shown, the capacitor switch unit 13 may include a plurality of switches, the number of switches in the capacitor switch unit is greater than or equal to 2N, and any two switches among the plurality of switches are used to control the connection relationship between the second end of any one of the first capacitor C1 to the Nth capacitor CN and the second voltage V2 and the ground, wherein:

[0074] The first ends of the two switches are electrically connected to the second end of the capacitor, the second end of one of the two switches serves as the second end of the capacitor switch unit 13, the second end of the other of the two switches serves as the third end of the capacitor switch unit 13, and the control end of each switch serves as the control end of the capacitor switch unit 13.

[0075] In one example, if Figure 2 As shown, the switch S1 and the switch S2 can be used to control the electrical connection relationship between the first capacitor C1, the second voltage V2 and the ground. When the switch S1 is turned on and the switch S2 is turned off, the second end of the first capacitor C1 is grounded; when the switch S1 is turned off and the switch S2 is turned on, the second end of the first capacitor C1 receives the second voltage V2. Of course, the switch control method of the second capacitor C2 to the Nth capacitor CN is similar to the switch control method of the first capacitor C1, which will not be repeated here.

[0076] In a possible implementation manner, each switch in the voltage divider switch S0 and the capacitor switch unit 13 may include one of a triode, a transistor, and a single-pole single-throw switch.

[0077] Of course, the switch in the capacitor switch unit may also be implemented in other ways. For example, a single-pole double-throw switch may be used to implement the dual switch function in the capacitor switch unit 13, and the present disclosure does not limit this.

[0078] In one possible implementation, the control unit 14 can be implemented using a general-purpose chip, for example, a central processing unit CPU, a microprocessor MCU, a digital signal processor DSP, a field-programmable gate array FPGA, or the like, or can be implemented using a dedicated chip. The implementation method of the control instructions implemented by the control unit 14 can refer to relevant technologies, and the present disclosure does not limit this.

[0079] Through the above device, the embodiment of the present disclosure can eliminate the voltage offset phenomenon of the comparator itself caused by the manufacturing process and other reasons. By setting components such as capacitor units and capacitor switch units, the offset voltage inside the comparator can be eliminated. Therefore, the comparison device proposed in the embodiment of the present disclosure can eliminate voltage offset and output accurate comparison results. It can be adapted to high-precision comparison scenarios. For example, the comparison device proposed in the embodiment of the present disclosure can be applied to analog-to-digital converters for high-precision scenarios, which can improve the accuracy of the analog-to-digital converter.

[0080] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A comparison device, characterized in that: The device comprises a voltage dividing unit, a voltage dividing switch, a comparator, a capacitor unit, a capacitor switch unit and a control unit, wherein: The first end of the voltage dividing unit is used to input a first voltage, the second end of the voltage dividing unit is grounded, and the third end of the voltage dividing unit is electrically connected to the first end of the voltage dividing switch; The second end of the voltage divider switch is electrically connected to the first input end of the comparator and the first end of the capacitor unit, the control end of the voltage divider switch is electrically connected to the control unit, and the second input end of the comparator is used to input a comparison voltage; The capacitor unit includes M capacitors connected in parallel, wherein the second end of the first capacitor to the second end of the Nth capacitor are electrically connected to the first end of the capacitor switch unit, the second end of the N+1th capacitor to the second end of the Mth capacitor are grounded, the second end of the capacitor switch unit is used to input a second voltage, the third end of the capacitor switch unit is grounded, and the control end of the capacitor switch unit is electrically connected to the control unit, wherein M>N and M and N are positive integers; The control unit is used for: In a first time period, controlling the divided voltage outputted by the third terminal of the voltage dividing unit to charge the capacitor unit; When the first time period is reached, the comparison result is outputted through the output terminal of the comparator.

2. The device according to claim 1, characterized in that The step of controlling the divided voltage outputted by the third terminal of the voltage dividing unit to charge the capacitor unit comprises: Controlling the voltage divider switch to be turned on, and controlling the second end of the first capacitor to the second end of the Nth capacitor to be grounded through the capacitor switch unit, so as to charge the capacitor unit with the voltage divider voltage outputted by the third end of the voltage divider unit; Outputting the comparison result through the output terminal of the comparator includes: The voltage divider switch is controlled to be disconnected, and the second end of the first capacitor to the second end of the Nth capacitor are controlled to receive the second voltage through the capacitor switch unit, so that the output end of the comparator outputs a comparison result.

3. The device according to claim 1, characterized in that The step of controlling the divided voltage outputted by the third terminal of the voltage dividing unit to charge the capacitor unit comprises: Control the voltage divider switch to be turned on, and control the second end of the first capacitor to the second end of the Nth capacitor to receive the second voltage through the capacitor switch unit, so as to charge the capacitor unit with the voltage divider voltage output by the third end of the voltage divider unit; Outputting the comparison result through the output terminal of the comparator includes: The voltage divider switch is controlled to be disconnected, and the second end of the first capacitor to the second end of the Nth capacitor are controlled to be grounded through the capacitor switch unit, so that the output end of the comparator outputs a comparison result.

4. The device according to any one of claims 1 to 3, characterized in that: The voltage dividing unit includes a first resistor and a second resistor, wherein: The first end of the first resistor is used to receive the first voltage, the second end of the first resistor is electrically connected to the first end of the second resistor and the first end of the voltage divider switch, and the second end of the second resistor is grounded.

5. The device according to claim 1, characterized in that The capacitor switch unit includes a plurality of switches, the number of switches in the capacitor switch unit is greater than or equal to 2N, and any two switches among the plurality of switches are used to control the connection relationship between the second end of any one of the first capacitor to the Nth capacitor and the second voltage and the ground, wherein: The first ends of the two switches are electrically connected to the second end of the capacitor, the second end of one of the two switches serves as the second end of the capacitor switch unit, the second end of the other of the two switches serves as the third end of the capacitor switch unit, and the control end of each switch serves as the control end of the capacitor switch unit.

6. The device according to claim 5, characterized in that Each switch in the voltage divider switch and the capacitor switch unit includes one of a triode, a transistor, and a single-pole single-throw switch.

7. An analog-to-digital converter, characterized in that: The analog-to-digital converter comprises: A comparison device as claimed in any one of claims 1 to 6.

8. An electronic device, characterized in that: The electronic device comprises: The analog-to-digital converter as claimed in claim 7.

Citation Information

Patent Citations

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