Refreshing stored data with the help of memristors

Abstract

A control unit (1) for a memory (2), comprising at least one storage unit (21), in which one of a plurality of discrete storable values ​​(23a-23e) is encoded in the resistance value of a memristor (22), the control unit comprising: a measuring device (11), which is configured to measure the resistance value of the memristor; a discretizer (12), which is configured to assign one of a plurality of discrete storable values ​​as a read value to the measured resistance value; a comparison unit (13), which is configured to obtain a difference (24) between the nominal resistance value and the measured resistance value of the memristor; a driver (14), which is configured to apply a current / time characteristic curve (25) to the memristor based on the obtained difference, which drives the actual resistance value of the memristor in the direction of the nominal resistance value, thereby refreshing the storage unit. The present invention also relates to a hardware platform, an analog operation module and a computer program.

Description

Technical Field

[0001] The invention relates to an actuation unit for a memristor memory, which has an additional function for refreshing stored data. Background Art

[0002] A memristor is a non-volatile memory element that permanently changes its resistance when a certain current / time characteristic curve is applied. In this way, information can be stored in the memory element. Subsequently, the information can be read out again from the memory element by measuring the resistance of the memory element.

[0003] Physically, a lower resistance is often adjusted in that the current used for writing creates a locally more conductive path that leads through the less conductive substrate material and simultaneously bridges it. This more conductive path can be restored by reversing the polarity of the current.

[0004] Depending on the temperature, atoms or formulae that form more electrically conductive paths tend to diffuse more or less strongly into the surrounding substrate material over time. The long-term stability of the stored information is therefore limited. DE 10 2014 208 609 A1 and DE 10 2014 211 111 A1 therefore propose to regularly refresh nominally non-volatile memories (e.g. memristors), i.e. to actively store the stored information in the memory again. Summary of the invention

[0005] Within the scope of the present invention, an actuation unit for a memory is developed, which comprises at least one memory cell in which one of a plurality of discrete storable values ​​is encoded in the resistance of a memristor.

[0006] The control unit comprises a measuring device, which is configured to measure the resistance value of the memristor. Here, the measurement of the resistance value is understood to be any measurement of the following parameter: the parameter allows the resistance value to be inferred. For example, if a predetermined current is driven to flow through the memristor, the resistance value of the memristor is reflected in the voltage drop across the memristor. For example, if a predetermined voltage is applied to the memristor, the resistance value of the memristor is also reflected in the current flowing through the memristor. The measurement of the conductance that is the reciprocal of the resistance value can also be regarded as the measurement of the resistance value.

[0007] Furthermore, the control unit comprises a discretizer which is designed to assign one of a plurality of discrete storable values ​​as a read value to the measured resistance value. Each measured resistance value is mapped exactly to a read value by the discretizer. The more possible read values ​​there are, the more information can be stored in the storage unit. In the simplest case, there are two possible read values, by which exactly one bit of information can be stored.

[0008] Furthermore, the control unit comprises a comparison unit which is designed to determine the difference between the nominal resistance value of the memristor (corresponding to the read value) and the measured resistance value of the memristor. This difference is a measure of the extent to which the information stored in the memory cell has degraded.

[0009] For example, a measured variable which is a measure of conductance (i.e. the inverse of resistance) can vary between 0 and 4 in arbitrary units, and the discretizer can be designed to round the measured conductance to the nearest integer value as a read value. Thus, five values ​​0, 1, 2, 3 and 4 can be stored in the storage unit. For example, if the measured conductance is 2.6, the value 3 is assigned to the conductance as a read value. The difference of 0.4 then indicates that the value 3 stored in the storage unit is at the end of its long-term stability: if the conductance drops further below 2.5, the correct value 3 is no longer assigned to the conductance as a read value, but the incorrect value 2.

[0010] Furthermore, the control unit comprises a driver which is designed to apply a current / time characteristic curve to the memristor based on the determined difference value, which current / time characteristic curve drives the actual resistance value of the memristor in the direction of a nominal resistance value, which corresponds to the read value. In this way, the memory cell is refreshed. The current / time characteristic curve can be, in particular, a voltage pulse or a sequence of voltage pulses.

[0011] This can mean, for example, in the example mentioned, that the memristor in the memory cell is subjected to such a current / time characteristic that the conductance again approaches the value 3. The value 3 stored in the memory cell is then now protected against degradation in both directions, i.e. not only against degradation that increases the conductance (starting from a conductance of 3.5, an erroneous value of 4 would be recognized as a read value), but also against degradation that decreases the conductance (if the conductance falls below 2.5, as described above, an erroneous value of 2 would be recognized as a read value).

[0012] Depending on the material of the memristor, the physical mechanism of degradation may occur in such a way that it works only in one direction. For example, diffusion in the memristor material always only leads to the disappearance of the conductive path, but does not lead to its orderly reformation. Therefore, diffusion as a degradation mechanism can only reduce the conductance. Thus, for example, it is advantageous that when the actual resistance value of the memristor is driven in the direction of the nominal resistance value, it does not stop at the nominal resistance value. More precisely, the resistance or conductance can be further driven to a safe distance predetermined by the following value range: the next storable value is assigned to the value range as a discrete value. In the example mentioned, the conductance can therefore be increased to about 3.4, which is still far enough away from the conductance 3.5 to which the value 4 will be assigned as the read value. If the conductance starts from 3.4 instead of 3 after refreshing, it will take a longer time for degradation to cause the conductance to drop back to 2.6 and the next refresh will be required.

[0013] It has been found that the described control unit improves the long-term stability of information stored in a memory, in particular in applications in which one of three or more different storable values ​​is stored in a memory cell. The more different values ​​that can be stored in a memory cell, the closer the associated nominal resistance values ​​are to one another and the faster the degradation in the memristor, which results in a value being read from the memory cell that differs from the originally stored value.

[0014] This concerns applications in the field of neural networks in particular. In these applications, the results of learning are expressed as weights of the connections between neurons. These weights are mostly not binary, but can take on more than two discrete values. If these weights are stored in the form of memristor resistances, degradation in the memristors can result in the behavior of the neural network not being permanently deterministic, but changing unpredictably as the weights "switch" to the next discrete value.

[0015] Alternatively, this "switching" can be prevented by converting the neural network into a permanently learning form. An example of this is a network based on "spike timing dependent plasticity (STDP)", in which the weights of the connections of input neurons depend on whether the corresponding input is temporally causal for the output of the neuron. In this continuous learning process, the "switching" effects of individual weights can be at least partially compensated dynamically.

[0016] However, it has been found to be advantageous that the long-term stability of the information stored in the memory is ensured by the described control unit. In this way, a clear distinction can be made between the learning phase of the neural network and the subsequent inference phase, which is the normal operation of the network. In this inference phase, the behavior of the network is then deterministic. In contrast, a neural network that has been permanently learned in normal operation can be retrained solely by means of the input currents generated during normal operation, wherein the effects are not always predictable and are not always expected.

[0017] Thus, for example, during normal operation, a neural network for traffic sign recognition is most often loaded with the traffic signs that are most frequently encountered by vehicles equipped accordingly. In this case, each traffic sign appears not only in its nominal "pure form", but also in a number of slightly altered variants, which may result, for example, from soiling, slight damage, graffiti or the installation of stickers. These variants can attract the "attention" of the continuously learning neural network, which can then be at the expense of recognizing less frequently occurring traffic signs. For example, a number of variants of the frequently occurring traffic sign "Watch out for the right of way" can, for example, lead to the recognition of traffic sign 205 "Watch out for the right of way" replacing, to a certain extent, the recognition of traffic sign 129 "Warning of unsafe riverbank", so that a fully or partially automated vehicle can roll into the water.

[0018] If, on the other hand, the learning phase and the inference phase of the neural network can be clearly demarcated and if the long-term stability of the learning results is ensured by other means (i.e. by the control unit being designed for updating as described), such undesired "false learning" does not occur. This is advantageous in particular with regard to official certification of neural networks for at least partially automated driving.

[0019] In a particularly advantageous embodiment, the discretizer is designed to assign one of at least three different storable values ​​as a read value to the measured resistance value. Preferably, 3 to 10 storable values ​​are provided, particularly preferably 3 to 5 storable values ​​are provided. As described above, this allows, in particular, long-term stable storage of weights for connections in a neural network.

[0020] The motivation for using memristors to store weights is that the neural network can thus be implemented in the form of fast analog electronics.

[0021] Therefore, in a particularly advantageous configuration, the nominal resistance value of the memristor and the measured resistance value of the memristor are both present in analog form, and the comparison unit is configured to output the difference in analog form. The driver can in particular have an analog circuit for converting the difference into a current / time characteristic curve. Then, the refreshing can be done completely in an analog manner.

[0022] However, the difference and the resulting current / time characteristic curve can also be determined digitally. For this purpose, for example, a combination of a measuring device, a discretizer and a comparison unit with an analog-to-digital converter can be implemented, which can distinguish more finely than for distinguishing between storable discrete values ​​in a storage unit. The analog-to-digital converter then provides each measured value as a digital data word to the resistance of the memristor. The highest bit of this data word can then be used, for example, to distinguish between storable discrete values, while the lowest bit directly represents the difference.

[0023] For example, if the data word includes 8 bits, the resistance of the memristor can be represented in multiples of 32 using the top 3 bits. The resistance can be discretized directly into eight resistance values ​​0, 32, 64, 96, 128, 160, 192 and 224 by taking into account only the top 3 bits and omitting the remaining five bits. The memristor is then advantageously controlled in such a way that these eight resistance values ​​are nominal resistance values, which are assigned to the eight storable values ​​0 to 7 in the memory cell.

[0024] In an ideal long-term stable memristor, the five lower bits should be 0 every time the resistance value is measured (just as in the case of the nominal resistance value). If degradation causes the resistance to increase, this is no longer the case. That is, the five lower bits directly indicate in digital form the measure of the error caused by degradation (i.e. the difference). At the same time, the top three bits directly indicate: which of the eight possible values ​​is the value read from the memory cell.

[0025] Thus, the read value (on the one hand) and the difference value (on the other hand) can be determined simply by dividing the bits of the data word (without any arithmetic operations). The disadvantages in terms of speed compared to purely analog processing are therefore minimized. Digital processing is in turn advantageous for digital control of the current / time characteristic curve applied to the memristor.

[0026] In another advantageous configuration, the driver is configured to adjust the resistance of the memristor to a desired value. This is understood, for example, to mean that the driver alternately applies a current / time characteristic curve to the memristor and initiates a remeasurement of the resistance of the memristor, wherein this is repeated until it is satisfied that the resistance value corresponds to the desired value of the interruption condition. As described above, the desired value can be a nominal resistance value corresponding to the read value. However, the desired value can also be moved beyond the nominal resistance value within the resistance band still assigned to the read value (resulting in a higher conductance in the example mentioned above) in order to achieve a greater margin with respect to degradation that acts only in one direction.

[0027] Active regulation tends to take longer, but has the advantage of matching the physical changes of the memristor material. On the one hand, these materials may be affected by aging processes. On the other hand, the response of the material to the same current / time characteristic may also depend on the history of current / time characteristics that have been applied to the material in the past. Active regulation enables the current / time characteristic used to be matched to such long-term changes.

[0028] Furthermore, in a further particularly advantageous embodiment, the control unit is designed to refresh the memory cell in response to the fact that at least one memory cell has not been refreshed for a predetermined period of time. In this way, it can be ensured in particular that the contents of even rarely accessed memory cells remain stable over the long term. The predetermined period of time depends on the material of the memristor and the physical mechanism by which the resistance of the memristor is changed. This period of time is several orders of magnitude longer than the refresh cycle of a DRAM memory and can be, for example, in the range of days or weeks.

[0029] The control unit can advantageously be connected to a temperature sensor for the sensor temperature and designed to adapt the predefined time period as a function of the temperature or the course of the temperature over time. In particular, diffusion processes as degradation processes are strongly temperature dependent.

[0030] As mentioned above, the present invention also relates to a hardware platform for an artificial neural network and / or a neuromorphic network, the internal processing chain of which comprises a plurality of neurons connected to one another. A neuromorphic network is understood here in particular as a network in which a neuron outputs an event in response to the following situation: a stimulus provided on the input side exceeds a predetermined threshold value. Such a network is also called a "spiking neural network" and is similar, for example, to an event-based image sensor. Such an image sensor is divided into pixels, and whenever the light intensity incident on the pixel changes by a certain amount by a percentage, the pixel outputs an event corresponding to the pixel.

[0031] The hardware platform comprises at least one memory in which the weights of the connections between neurons (present as discrete values) are encoded in the form of memristor resistances. Furthermore, the described control unit is configured to ensure the long-term stability of the stored weights in the above-described manner.

[0032] However, the field of application of the memory with the described control unit is not limited to neural networks, but includes in particular all common analog computing modules whose properties are determined by parameters stored in the memory.

[0033] Therefore, the invention also relates to an analog computing module, which distributes one or more output signals to one or more analog input signals according to at least one computing operation. At least one computing operation and / or at least one discrete parameter determining the computing operation is encoded in a memory in the form of at least one resistance value of a memristor. The memory is coupled to the described control unit.

[0034] For example, an analog computing module can be designed to calculate the cross product of two vectors or matrices. In the digital domain, this calculation requires multiple operations that should be performed one after another. In the analog domain, for example, all components of the operation object can be provided simultaneously in the form of current, and all components of the result can also be formed simultaneously.

[0035] For all areas of application, the term "control unit" is not to be understood restrictively as meaning that the unit must be located at a specific location or that all parts of the unit must be combined in a hardware module. Rather, it is sufficient that the measuring device, the discretizer, the comparison unit and the drive are logically connected in such a way that a control unit with the described functions is formed. For example, for the normal operation of the memory, if, for example, the measuring device, the discretizer, the comparison unit or the drive are already present, a second function can be assigned to these components for the control unit. The control unit can also be integrated, for example, into a neural network which stores the weights of the connections between the neurons in the memory.

[0036] Thus, the realization of the control unit can in particular be carried out completely or partly in software, which controls the existing hardware in different ways. For example, the software can be sold as a plug-in, update or upgrade for existing hardware and in this respect is a separately salable product. Therefore, the invention also relates to a computer program with machine-readable instructions, which, when implemented on a computer and / or on a control device and / or on an embedded system, cause the computer, embedded system or control device to be upgraded to the control unit. Likewise, the invention also relates to a machine-readable data carrier or a download product with the computer program. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Further measures to improve the invention are shown in more detail below in conjunction with the description of preferred exemplary embodiments of the invention with the aid of the drawings.

[0038] Figure 1 An embodiment of the interaction between the control unit 1 and the memory 2 is shown;

[0039] Figure 2 An embodiment of a hardware platform 5 for a neural network 4 is shown;

[0040] Figure 3 An embodiment of the simulation operation module 6 is shown;

[0041] Figure 4 An exemplary integration of the control unit 1 and the memory 2 is shown, the memory comprising a plurality of memory units 21;

[0042] Figure 5 An exemplary processing of the resistance value 22 a in the actuation unit 1 is shown. DETAILED DESCRIPTION

[0043] according to Figure 1 The exemplary memory 2 controlled by the control unit 21 comprises a single memory cell 21, the central element of which is a memristor 22. The information stored in the memory cell 21 is encoded in the resistance value 22a of the memristor 22.

[0044] exist Figure 1 In the example shown, five different values ​​23a-23e can be stored in the memory cell 21. When the measured resistance 22a of the memristor 22 is within the range of the corresponding value 23a-23e on the scale corresponding to the resistance 22a, each of the values ​​23a-23e is recognized as a read value 23 in the control unit 1. In addition, each value 23a-23e is also assigned a nominal resistance value 24a-24e, which is set when the value 23a-23e is written into the memory cell 21.

[0045] After the resistance 22a of the memristor has been adjusted to the nominal resistance value 24a-24e, an ideal, infinitely long-term stable memristor 22 would maintain this resistance value 24a-24e until the information stored in the memory cell 21 is intentionally changed. In practice, however, the resistance 22a deviates from the nominal value 24a-24e over time. The task of the control unit 1 is to identify such deviations and to actively eliminate them before they reach a size that leads to an erroneous recognition of the information stored in the memory cell 21.

[0046] For this purpose, firstly, in step 110, the resistance 22a of the memristor 22 is measured by means of the measuring device 11. As described above, in step 120, the discretizer 12 determines the value 23 read from the memory cell 21. In step 130, the comparison unit 13 determines the difference 24 between (on the one hand) the nominal resistance values ​​24a-24e corresponding to the read value 23 and (on the other hand) the actual resistance value 22a. In step 140, the driver 24 determines the current / time characteristic curve 25 from the difference 24 and applies the current / time characteristic curve to the memristor 22 in order to drive the resistance value 22a of the memristor 22 in the direction of the nominal resistance value 24a-24e (corresponding to the read value 23). This determination can also be carried out in a purely analog manner according to the optional step 150.

[0047] According to optional step 145 , resistance value 22 a can be actively adjusted to a new desired value, ie the determination and application of current / time characteristic curve 25 is repeated until the desired value is reached with sufficient accuracy.

[0048] In order to determine when the memory cell 21 is next refreshed in this way, the control unit 1 is connected to a temperature sensor 3. The temperature sensor 3 is thermally coupled to the memory 2 and provides the control unit 1 with the temperature 3a of the memory 2.

[0049] Figure 2 An exemplary hardware platform 5 of a neural network 4 is shown. The internal processing chain 41 of the neural network 4 includes a plurality of neurons 42. Figure 2 Only a few of these neurons and their connections 44a-44c are shown. These connections 44a-44c are assigned corresponding weights 43a-43c, which are in turn stored in a memory 2. The memory 2 comprises three memory cells 21, each of which has a memristor 22. Thus, in the memory cell 21, the weights 43a-43c are encoded in the resistance value 22a of the memristor 22, wherein the read value 23 is discretized into one of the possible values ​​23a-23e. The memory 2 is coupled to the control unit 1.

[0050] Figure 3 An exemplary analog operation module 6 is shown. Two exemplary operation objects 61 and 62 are processed by an operation operation 63 parameterized by means of parameters 63a to form a result 64. The operation operation 63 and the corresponding parameters 63a are stored in a memory 2 which is coupled to the control unit 1.

[0051] Figure 4An exemplary integration of an actuation unit 1 is shown, which has a memory 2 with a plurality of memory cells 21. Each memory cell 21 is connected to exactly one of the word lines W0 and W1, and each memory cell is connected to exactly one of the bit lines B0, B1, B2. The memory cell 21 is selected by simultaneously actuating one word line W0, W1 and one bit line B0, B1, B2. For this purpose, each memory cell 21 also includes a control transistor 26 in addition to a memristor 22.

[0052] The components 11 , 12 , 13 and 14 belonging to the actuation unit 1 are present once in each bit line B0 , B1 , B2 .

[0053] Figure 5 The determination of the difference value 24 for updating is shown as an example. Figure 1 , five nominal resistance values ​​24a-24e corresponding to the values ​​0, 1, 2, 3 and 4 that can be stored are plotted on the scale of the resistance value 22a of the memristor 22. Now, the measured resistance value 22a is digitized and converted into a read value 23 (D) by the combination of the measuring device 11 and the discretizer 12. Since the measured resistance 22a is closest to the level 24d, the value read from the storage unit 21 is the value 3, which corresponds to the level 24. This resistance value 24d is converted into an analog value 23 (A) by means of an analog-to-digital converter, which is compared with the original measured resistance value 22a in the comparison unit 13. The simulated difference value 24 (A) is provided to the driver 14 so that the storage unit 21 can be refreshed accordingly.

Claims

1. A control unit (1) for a memory (2), the memory comprising at least one storage unit (21), wherein: In the storage unit (21), one of a plurality of discrete storable values ​​(23a-23e) is encoded in a resistance value (22a) of a memristor (22), and the control unit comprises: A measuring device (11) configured to measure (110) a resistance value (22a) of the memristor (22); a discretizer (12) configured to assign (120) one of the plurality of discrete storable values ​​(23a-23e) as a read value (23) to the measured resistance value (22a); a comparison unit (13) configured to determine a difference (24) between a nominal resistance value (24a-24e) of the memristor (22) and a measured resistance value (22a) of the memristor (22), wherein the nominal resistance value corresponds to the read value (23); A driver (14) is configured to apply a current / time characteristic curve (25) to the memristor (22) based on the determined difference value (24), wherein the current / time characteristic curve drives the actual resistance value (22a) of the memristor (22) in the direction of the nominal resistance value (24a-24e), thereby refreshing the storage unit (21), wherein the nominal resistance value corresponds to the read value (23).

2. The control unit (1) according to claim 1, wherein: The discretizer (12) is designed to assign one of at least three different storable values ​​(23a-23e) as a read value (23) to a measured resistance value (22a).

3. The control unit (1) according to any one of claims 1 to 2, wherein: The nominal resistance value (24a-24e) of the memristor (22) and the measured resistance value (22a) of the memristor (22) are both present in analog form, and the comparison unit (13) is designed to output (150) the difference value (24) in analog form.

4. The control unit (1) according to claim 3, wherein: The driver (14) has an analog circuit for converting the difference (24) into the current / time characteristic (25).

5. The control unit (1) according to claim 1 or 2, wherein: The driver (14) is designed to adjust (145) the resistance value (22a) of the memristor (22) to a desired value.

6. The control unit (1) according to claim 1 or 2, further configured to refresh the memory cells (21) in response to the following situation: at least one memory cell (21) has not been refreshed for a predetermined period of time.

7. The control unit (1) according to claim 6 is capable of being connected to a temperature sensor (3) for the temperature (3a) of the storage device (2), and the control unit is configured to match the predetermined duration according to the temperature (3a) or the time variation of the temperature (3a).

8. A hardware platform (5) for an artificial neural network and / or a neuromorphic network, the internal processing chain (41) of the hardware platform comprising a plurality of neurons (42) connected to each other, the hardware platform comprising at least one memory (2), in which the weights (43a-43c) of the connections (44a-44c) between the neurons (42) are encoded in the form of resistance values ​​(22a) of memristors (22), wherein: The weight is present as a discrete value, and the hardware platform further comprises a control unit (1) according to any one of claims 1 to 7.

9. An analog computing module (6) for distributing one or more output signals (64) to one or more analog input signals (61, 62) according to at least one computing operation (63), wherein: The at least one computing operation (63) and / or at least one discrete parameter (63a) determining the computing operation (63) is encoded in a memory (2) in the form of at least one resistance value (22a) of a memristor (22), wherein the memory (2) is coupled to a control unit (1) according to any one of claims 1 to 7. 10 . The analog computing module ( 6 ) according to claim 9 , which is designed to calculate the cross product of two vectors or the matrix product of two matrices.

11. A computer program product comprising machine-readable instructions, which, when executed on a computer and / or on a control device and / or on an embedded system, upgrade the computer, embedded system or control device to a control unit (1) according to any one of claims 1 to 7.

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