Resonators and semiconductor devices

By forming a smooth transition cavity structure between the substrate and the multilayer structure, the shortcomings in the performance and manufacturing process of the existing acoustic resonators are solved, and better performance and higher yield and consistency are achieved.

CN110868169BActive Publication Date: 2025-05-13THE 13TH RES INST OF CHINA ELECTRONICS TECH GRP CORP
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Patent Information

Application Number
CN201910080476.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-01-28
Publication Date
2025-05-13
Estimated Expiration
2039-01-28

AI Technical Summary

Technical Problem

In the structural design of existing acoustic resonators, there is a large angle between the cut surface at the contact between the edge of the cavity and the substrate and the substrate, resulting in poor performance of the resonator, complex manufacturing process, high difficulty, and low yield and consistency.

Method used

A cavity is formed between the substrate and the multi-layer structure. The cavity is surrounded by an upper side of the substrate and a lower side of the multi-layer structure. The lower side of the multi-layer structure and the middle area of ​​the corresponding part of the cavity are planes, and the edge of the middle area and the edge of the cavity are smooth curved surfaces with a smooth transition, and the smooth curved surface is located between the upper side of the substrate and the plane.

Benefits of technology

Through this new structure of resonator, the performance of the resonator is improved, the manufacturing process is simplified, and the yield and consistency are improved.

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Abstract

The present invention relates to the field of semiconductor technology, and discloses a resonator and a semiconductor device. The resonator includes: a substrate; a multilayer structure formed on the substrate, the multilayer structure including a lower electrode layer, a piezoelectric layer and an upper electrode layer from bottom to top; wherein a cavity is formed between the substrate and the multilayer structure, the cavity is surrounded by the upper side of the substrate and the lower side of the multilayer structure, the lower side of the multilayer structure and the middle area of ​​the corresponding part of the cavity are planes, and the edge of the middle area and the edge of the cavity are smooth curved surfaces with smooth transitions, and the smooth curved surface is located between the upper side of the substrate and the plane. The above-mentioned resonator forms a new type of resonator structure by setting a cavity with a plane top wall, and has better performance.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a resonator and a semiconductor device. Background Art

[0002] Resonators can be used in various electronic applications to implement signal processing functions, for example, some cellular phones and other communication devices use resonators to implement filters for transmitted and / or received signals. Several different types of resonators can be used depending on the application, such as film bulk acoustic resonators (FBARs), coupled resonator filters (SBARs), stacked bulk acoustic resonators (SBARs), dual bulk acoustic resonators (DBARs), and solid mounted resonators (SMRs).

[0003] A typical acoustic resonator includes an upper electrode, a lower electrode, a piezoelectric material between the upper and lower electrodes, an acoustic reflection structure below the lower electrode, and a substrate below the acoustic reflection structure. The area where the three layers of material, the upper electrode, the piezoelectric layer, and the lower electrode overlap in the thickness direction is usually defined as the effective area of ​​the resonator. When a voltage signal of a certain frequency is applied between the electrodes, due to the inverse piezoelectric effect of the piezoelectric material, an acoustic wave propagating vertically is generated between the upper and lower electrodes in the effective area. The acoustic wave is reflected back and forth between the interface between the upper electrode and the air and the acoustic reflection structure under the lower electrode, and resonates at a certain frequency. Summary of the invention

[0004] Based on the above problems, the present invention provides a resonator and a semiconductor device with a new structure.

[0005] A first aspect of an embodiment of the present invention provides a resonator, including:

[0006] substrate;

[0007] A multilayer structure is formed on the substrate, wherein the multilayer structure includes, from bottom to top, a lower electrode layer, a piezoelectric layer and an upper electrode layer;

[0008] A cavity is formed between the substrate and the multilayer structure, and the cavity is surrounded by the upper side of the substrate and the lower side of the multilayer structure. The lower side of the multilayer structure and the middle area of ​​the corresponding part of the cavity are planes, and the edge of the middle area and the edge of the cavity are smooth curved surfaces with smooth transitions, and the smooth curved surface is located between the upper side of the substrate and the plane.

[0009] Optionally, the smooth curved surface includes a first curved surface and a second curved surface connected in a smooth transition.

[0010] Optionally, a vertical section of the first curved surface is in the shape of an inverted parabola, a vertical section of the second curved surface is in the shape of a parabola, and the first curved surface is located below the second curved surface.

[0011] Optionally, the curvature of each point of the smooth surface is less than a first preset value.

[0012] Optionally, an angle between a cut surface at a point where the smooth curved surface contacts the substrate and the substrate is less than 45 degrees.

[0013] Optionally, a portion of the upper side surface of the substrate corresponding to the cavity has no abrupt change.

[0014] Optionally, the height of the cavity is any value between 100 nanometers and 2000 nanometers.

[0015] Optionally, the substrate is any one of a gallium arsenide substrate, a silicon carbide substrate, a sapphire substrate, a lithium niobate substrate, a lithium tantalate substrate and various composite material substrates.

[0016] Optionally, the substrate is a Si substrate.

[0017] A second aspect of an embodiment of the present invention provides a semiconductor device, comprising any one of the above-mentioned resonators.

[0018] The beneficial effect produced by adopting the above technical scheme is that: in the embodiment of the present invention, a cavity is formed between the substrate and the multilayer structure, the cavity is surrounded by the upper side surface of the substrate and the lower side surface of the multilayer structure, the lower side surface of the multilayer structure and the middle area of ​​the corresponding part of the cavity are planes, and the edge of the middle area and the edge of the cavity are smooth curved surfaces with smooth transitions, and the smooth curved surface is located between the upper side surface of the substrate and the plane, thereby forming a new resonator structure with better performance.

[0019] Moreover, the cavity structure in the present application makes the manufacturing process of the resonator relatively simple and less difficult, so the yield rate is higher and the consistency is better. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0021] Figure 1 is a schematic diagram of the structure of a resonator provided by an embodiment of the present invention;

[0022] Figure 2 yes Figure 1 A magnified schematic diagram of the middle A area;

[0023] Figure 3is a flow chart of a manufacturing process of a resonator provided by an embodiment of the present invention;

[0024] Figure 4 is a schematic diagram of a manufacturing process of a resonator provided by an embodiment of the present invention;

[0025] Figure 5 is a schematic diagram of three ion implantations provided by an embodiment of the present invention;

[0026] Figure 6 It is a schematic diagram of ion implantation in an oblique direction under a shielding layer structure provided by an embodiment of the present invention;

[0027] Figure 7 is a schematic diagram of four ion implantations provided by an embodiment of the present invention;

[0028] Figure 8 It is a schematic diagram of ion implantation in an oblique direction under another shielding layer structure provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0030] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0031] See also Figure 1 , the resonator in the present application may include a substrate 100 and a multilayer structure 200. The multilayer structure 200 is formed on the substrate 100, and the multilayer structure 200 includes a lower electrode layer 203, a piezoelectric layer 202 and an upper electrode layer 201 from bottom to top. Wherein, a cavity 300 is formed between the substrate 100 and the multilayer structure 200, and the cavity 300 is surrounded by the upper side of the substrate 100 and the lower side of the multilayer structure 200, and the lower side of the multilayer structure 200 and the middle area 2031 of the corresponding part of the cavity 100 are planes, and the edge of the middle area 2031 and the edge of the cavity 300 are smooth surfaces 2032 with smooth transitions, and the smooth surfaces 2032 are located between the upper side of the substrate 100 and the plane (the plane corresponding to the middle area 2031). Wherein, the smooth surface 2032 can ensure the performance of the resonator cavity without sudden changes. The smooth curved surface 2032 is a portion of the lower side of the multi-layer structure 200 .

[0032] The above-mentioned resonator forms a cavity 300 between the substrate 100 and the multilayer structure 200, and the cavity 300 is surrounded by the upper side of the substrate 100 and the lower side of the multilayer structure 200. The lower side of the multilayer structure 200 and the middle area 2031 of the corresponding part of the cavity 100 are planes, and the edge of the middle area 2031 and the edge of the cavity 300 are a smooth curved surface 2032 with a smooth transition. The smooth curved surface 2032 is located between the upper side of the substrate 100 and the plane, thereby forming a new resonator structure with better performance.

[0033] See also Figure 2 In some embodiments, the smooth curved surface 2032 may include a first curved surface 20321 and a second curved surface 20322 connected by a smooth transition. The first curved surface 20321 and the second curved surface 20322 connected by a smooth transition means that there is no sudden change at the connection between the first curved surface 20321 and the second curved surface 20322, and both the first curved surface 20321 and the second curved surface 20322 are also curved surfaces without sudden changes, so as to ensure the performance of the resonator cavity. The multilayer structure 200 is composed of many crystals, and no sudden change means that the gap between each crystal at the first smooth curved surface should not be too large to affect the performance of the resonator.

[0034] For example, the vertical section of the first curved surface 20321 may be in the shape of an inverted parabola, the vertical section of the second curved surface 20322 may be in the shape of a parabola, and the first curved surface 20321 is located below the second curved surface 20322. The first curved surface 20321 and the second curved surface 20322 are smoothly connected. Of course, the first curved surface 20321 and the second curved surface 20322 may also be curved surfaces of other shapes, as long as the gap between the crystals at the smooth curved surface 2032 does not affect the performance of the resonator.

[0035] In addition, the upper side of the substrate 100 has no abrupt change. Optionally, the upper side of the substrate 100 is a plane.

[0036] In some embodiments, the smooth surface 2032 is smooth as a whole, and the curvature of each point of the smooth surface 2032 can be less than the first preset value. The first preset value can be set according to actual conditions to achieve the purpose that the gap between each crystal at the smooth surface 2032 does not affect the performance of the resonator. In order to ensure the mechanical and electrical properties of the multi-layer structure, the curvature of the smooth surface in the transition area should be as small as possible. Under the condition of a certain thickness of the sacrificial layer, the curvature that is as small as possible requires the length of the transition zone to increase, which will increase the area of ​​the resonator, so the curvature and length of the transition zone should be optimized.

[0037] Preferably, the height of the cavity 300 is any value between 100 nanometers and 2000 nanometers.

[0038] In some embodiments, the angle between the cut surface where the smooth curved surface 2032 contacts the substrate 100 and the substrate 100 is less than 45 degrees. When the angle between the cut surface and the substrate 100 is less than 45 degrees, the resonator can have better performance.

[0039] In the above embodiments, the substrate 100 may be a silicon substrate, or may be any one of a gallium arsenide substrate, a silicon carbide substrate, a sapphire substrate, a lithium niobate substrate, a lithium tantalate substrate, and various composite material substrates, without limitation thereto.

[0040] Compared with traditional film bulk acoustic resonators (FBARs), coupled resonator filters (SBARs), stacked bulk acoustic resonators (SBARs), dual bulk acoustic resonators (DBARs) and solid-mount resonators (SMRs), the resonators produced by the above resonator production method can be called bridge bulk acoustic resonators (BBARs).

[0041] See also Figure 3 , the manufacturing process of the above-mentioned resonator is discussed in detail below.

[0042] Step 101: pre-treat the substrate to form a dielectric layer with a preset thickness.

[0043] In this step, the pretreatment may be an oxidation treatment, that is, the substrate 100 is oxidized to form a dielectric layer 400 with a preset thickness, such as Figure 4 (b). In some embodiments, the substrate may be placed in an oxidizing atmosphere for oxidation treatment so that an oxide layer of a preset thickness is formed on the substrate. Exemplarily, high-purity oxygen may be introduced into the substrate in a process temperature environment within a preset temperature range, and an oxide layer may be formed on the substrate by wet oxygen oxidation or hydrogen-oxygen synthesis oxidation. The preset temperature range may be 1000 degrees Celsius to 1200 degrees Celsius.

[0044] In addition, the implementation process of step 101 can also be: pre-treating the substrate 100 by vapor deposition to form a dielectric layer 400 of a preset thickness, such as Figure 4 (b) The vapor deposition method may be PECVD (Plasma Enhanced Chemical Vapor Deposition) or LPCVD (Low Pressure Chemical Vapor Deposition).

[0045] In addition, the implementation process of step 101 may also be: pre-treating the substrate by sputtering to form a dielectric layer with a preset thickness.

[0046] In addition, the implementation process of step 101 may also be: pre-treating the substrate by electron beam evaporation to form a dielectric layer with a preset thickness.

[0047] Step 102: performing ion implantation on a predetermined area of ​​the dielectric layer.

[0048] In this step, by performing ion implantation treatment in a preset area of ​​the dielectric layer, the etching or corrosion rate of the preset area of ​​the dielectric layer can be made greater than the etching or corrosion rate outside the preset area of ​​the dielectric layer, thereby forming a dielectric layer of a preset shape during the etching or corrosion process of the dielectric layer.

[0049] In some embodiments, the implementation process of step 102 may be: forming a shielding layer 500 in a preset area of ​​the dielectric layer 400, and performing ion implantation on the entire dielectric layer 400 after the shielding layer 500 is formed, such as Figure 4 (c) as shown.

[0050] Among them, by forming a shielding layer 500 in a preset area of ​​the dielectric layer 400 and then performing ion implantation on the entire dielectric layer 400, the shielding layer 500 can shield or to a certain extent reduce the impact of the ion implantation on the dielectric layer 400 covered by the shielding layer 500, thereby being able to form a sacrificial material portion of a preset shape in a subsequent step.

[0051] In this step, the shielding layer is formed in the preset area of ​​the dielectric layer, which may include: forming a shielding layer 500 whose edge thickness is less than the middle thickness in the preset area of ​​the dielectric layer 400, and the middle area of ​​the shielding layer 500 is a plane, such as Figure 4 As shown in (c). Figure 4 When the dielectric layer 400 in (c) is ion-implanted, the dielectric layer portion in the region of the shielding layer 500 can be less affected by the ion implantation due to the presence of the shielding layer 500. When the energy of the ion implantation is low, the ion implantation will not penetrate the shielding layer 500 to reach the dielectric layer below the shielding layer 500, and the portion not covered by the shielding layer 500 will be implanted with doping impurities of a preset depth. The shape of the shielding layer 500 will affect the shape of the sacrificial material portion in step 103. Generally, the shape of the sacrificial material portion is consistent with the shape of the shielding layer 500. Therefore, the shape of the final cavity required can be achieved by setting the specific shape of the shielding layer.

[0052] As an implementation method, the ion implantation treatment of the entire dielectric layer after the shielding layer is formed in step 102 includes: implanting doping impurities of a preset dose and a preset energy on the entire dielectric layer including the shielding layer area. The preset dose affects the etching or corrosion rate in step 103, and the preset energy affects the depth of the ion implantation, and ultimately affects the height of the cavity.

[0053] Specifically, the greater the preset dose of a certain area implanted with ions, the greater the etching or corrosion rate of the area in step 103; the smaller the preset dose of a certain area implanted with ions, the smaller the etching or corrosion rate of the area in step 103; if a certain area is not implanted with doped impurities due to the presence of the shielding layer 500, the etching or corrosion rate of the area in step 103 is the smallest.

[0054] For the preset energy, the greater the preset energy of a certain area injected with ions, the greater the ion injection depth of the area, and the greater the cavity height corresponding to the part after the cavity is finally formed; the smaller the preset energy of a certain area injected with ions, the smaller the ion injection depth of the area, and the smaller the cavity height corresponding to the part after the cavity is finally formed.

[0055] In the above embodiments, the shape of the shielding layer 400 is pre-set, and the sacrificial material part having the required shape can be etched or corroded in step 103 by only one ion implantation with a preset dose and preset energy. For example, the shape of the sacrificial material part is a plane on the top surface and a bridge-like structure in the vertical section.

[0056] Optionally, in order to obtain a resonator cavity with better performance, for the shielding layer, the thickness from the edge of the middle region to the edge thereof gradually decreases, so that the curved surface between the edge of the middle region of the shielding layer and the edge of the shielding layer has no mutation, thereby ensuring the performance of the resonator cavity. Among them, the substrate 100 and the multilayer structure 200 of the final resonator are composed of many crystals, and no mutation means that the transition between each point of the curved surface between the edge of the middle region of the shielding layer and the edge of the shielding layer is relatively smooth, so that the gap between each crystal of the part corresponding to the cavity of the resonator multilayer structure 200 should not be too large to affect the performance of the resonator.

[0057] For example, the edge of the middle region of the shielding layer and the edge of the shielding layer are formed into a smooth curved surface with a smooth transition, so that the resonator cavity finally formed is as follows: Figure 1 As shown in 300. Among them, the gap between each crystal of the part corresponding to the resonator cavity should not be too large to affect the performance of the resonator, and no mutation will occur. In some embodiments, the angle between the cut surface where the smooth curved surface contacts the substrate 100 and the substrate 100 is less than 45 degrees, so that the resonator cavity formed has better performance.

[0058] Exemplarily, the smooth curved surface may include a first curved surface and a second curved surface connected by a smooth transition.

[0059] The vertical section of the first curved surface is in the shape of an inverted parabola, the vertical section of the second curved surface is in the shape of a parabola, and the first curved surface is located below the second curved surface. Figure 1As shown in 300, it corresponds to the first curved surface and the second curved surface in the smooth curved surface.

[0060] As another possible implementation method, the ion implantation treatment of the entire dielectric layer after the shielding layer is formed in step 102 includes: multiple injections of doping impurities with a preset dose and a preset energy into the entire dielectric layer including the shielding layer area, wherein the preset dose and the preset energy of each ion implantation are different or not exactly the same.

[0061] The thickness of the shielding layer can be uniform everywhere, or the thickness at the edge can be less than the thickness in the middle and the middle area can be flat, and there is no limitation on this. At this time, by adjusting the preset dose and preset energy of each ion implantation, the shape of the sacrificial material part in step 103 can be the required shape.

[0062] In this embodiment, the preset dose relationship in each ion implantation in which the preset energy is sorted by size can be from small to large and then from large to small. In this way, after multiple ion implantations, multiple doped impurity layers will be formed at the edge of the shielding layer. The doped impurity layers corresponding to the ion implantation with large energy are thicker, and the doped impurity layers corresponding to the ion implantation with small energy are thinner, such as Figure 5 shown. Figure 5 In order to clearly illustrate the ion implantation, only the shielding layer 500 and the dielectric layer 400 are shown.

[0063] Figure 5 In the example, three ion implantations with different doses and energies are used for explanation, but the invention is not limited thereto. Assume that the dose of the first ion implantation is the first dose and the energy is the first energy; the dose of the second ion implantation is the second dose and the energy is the second energy; the dose of the third ion implantation is the third dose and the energy is the third energy; the first energy is greater than the second energy, and the second energy is greater than the third energy; the first dose is greater than the second dose, and the second dose is greater than the third dose. Then the depth of the first ion implantation is H1, the depth of the second ion implantation is H2, and the depth of the third ion implantation is H3, then H1>H2>H3, and each doped impurity layer is as follows Figure 5 In this embodiment, the depth of the first ion implantation with the highest energy is less than the thickness of the shielding layer 500, so the area below the middle area of ​​the shielding layer 500 is not implanted with ions.

[0064] Optionally, the direction of each ion implantation is perpendicular to the substrate 100, or

[0065] The direction of each ion implantation is at a preset angle other than 90 degrees to the substrate 100 (the preset angle of each ion implantation is different or not exactly the same), or

[0066] The directions of some of the ion implantations are perpendicular to the substrate 100 , and the directions of the other ion implantations are at an acute angle with the substrate 100 that is smaller than a preset angle.

[0067] It can be understood that, for the edge of the shielding layer, by changing the direction of ion implantation, the thickness of the shielding layer relative to the ion implantation direction can be adjusted (eg Figure 6 As shown in FIG. 1 ), doped impurity layers of different depths are obtained, so that the curved surface of the edge of the sacrificial material portion is smoother. In this embodiment, ion implantation of a preset dose and a preset energy is combined with the direction of each ion implantation to make the curved surface of the edge of the sacrificial material portion smoother.

[0068] The above is the case where the edge thickness of the shielding layer is less than the middle thickness. For the case where the thickness of the shielding layer is consistent, the details are as follows.

[0069] The step 102 of forming a shielding layer in a preset area of ​​the dielectric layer and performing ion implantation on the entire dielectric layer after the shielding layer is formed includes:

[0070] A. forming a shielding layer with uniform thickness in a preset area of ​​the dielectric layer;

[0071] B. implanting doping impurities of a preset dose and a preset energy into the entire dielectric layer forming the shielding layer region;

[0072] The shielding layer is removed and steps A and B are performed repeatedly in a cycle, and the preset area, preset dose, and preset energy corresponding to each ion implantation are different or not exactly the same.

[0073] By performing the removal of the shielding layer and steps A and B in a cycle for multiple times, multiple doped impurity layers can be formed on the dielectric layer 400 , and then in step 103 , the dielectric layer 400 is etched or corroded to form a sacrificial material portion of a desired shape.

[0074] The preset area, preset dose and preset energy corresponding to each ion implantation are different or not exactly the same, that is, the three factors of preset area, preset dose and preset energy corresponding to the ion implantation are different for each ion implantation; one of the three factors of each ion implantation may be the same.

[0075] See also Figure 7 , four ion implantations are used as an example for explanation, but the present invention is not limited to this. Figure 7In order to clearly illustrate the ion implantation, only the shielding layer 500 and the dielectric layer 400 are shown. A first shielding layer with a uniform thickness is formed in the first preset area of ​​the dielectric layer, and the first ion implantation is performed. The energy of the first ion implantation is the smallest, and the corresponding ion implantation depth is the smallest. After removing the first shielding layer, a second shielding layer with a uniform thickness is formed in the second preset area of ​​the dielectric layer, and the second ion implantation is performed. The energy of the second ion implantation is greater than the energy of the first ion implantation, and the ion implantation depth is greater than the depth of the first ion implantation. After removing the second shielding layer, a third shielding layer with a uniform thickness is formed in the third preset area of ​​the dielectric layer, and the third ion implantation is performed. The energy of the third ion implantation is greater than the energy of the second ion implantation, and the ion implantation depth is greater than the depth of the second ion implantation. After removing the third shielding layer, a fourth shielding layer with a uniform thickness is formed in the fourth preset area of ​​the dielectric layer, and the fourth ion implantation is performed. The energy of the fourth ion implantation is greater than the energy of the third ion implantation, and the ion implantation depth is greater than the depth of the third ion implantation. Among them, the energy in the four ion implantations is inversely proportional to the size of the preset area, and the larger preset area contains the smaller preset area.

[0076] Optionally, in step 102, the direction of each ion implantation is perpendicular to the substrate, or

[0077] The direction of each ion implantation is at a preset angle other than 90 degrees to the substrate (the preset angle of each ion implantation is different or not exactly the same), or

[0078] The direction of the ion implantation in a portion of times is perpendicular to the substrate, and the direction of the ion implantation in the remaining portion of times forms an acute angle with the substrate that is smaller than a preset angle.

[0079] It is understandable that when the thickness of the shielding layer 400 is uniform everywhere, the edge of the shielding layer 400 can be made to have an acute angle (such as 0.040°) less than the preset angle by changing the direction of ion implantation at the edge of the shielding layer 400. Figure 8 As shown), in the direction of ion injection, the thickness of the shielding layer 400 is no longer uniform everywhere, so that the ion injection effect at the boundary of the shielding layer 400 is substantially the same as the ion injection effect of the shielding layer whose edge thickness is less than that of the middle region.

[0080] Step 103, etching or corroding the dielectric layer after the ion implantation process to form a sacrificial material portion; the shape of the sacrificial material portion is a plane top surface and a bridge-shaped vertical cross section.

[0081] Among them, after the dielectric layer is ion-implanted in step 102, the dielectric layer below the shielding layer is not ion-implanted or the injection depth is shallow, and the dielectric layer outside the shielding layer is ion-implanted deeper, so that when the dielectric layer is etched, the shielding layer and the dielectric layer outside the shielding layer are etched or corroded at a faster rate, and the dielectric layer not ion-implanted is etched or corroded at a slower rate, and finally a sacrificial material portion of a desired shape can be formed. In this embodiment, the shape of the sacrificial material portion 600 is a top surface with a plane and a vertical cross-section with a bridge-shaped structure (see Figure 4 (d)). The top surface is the side of the sacrificial material portion 600 away from the substrate 100.

[0082] In some embodiments, the shielding layer may be made of SiN, a multilayer film structure, or a photoresist, and there is no limitation on this. The shielding layer is used to shield the ion implantation or block part of the ion implantation, which results in a large difference in the etching or corrosion rate between the shielding area and the non-shielding area: the etching or corrosion rate of the part without the shielding layer is faster, and the etching or corrosion rate of the part with the shielding layer is slower, and finally the sacrificial material part in this step is formed. Since the thickness from the edge of the middle area of ​​the shielding layer to the edge of the shielding layer gradually decreases, a transition area with no rate change can be formed at the edge of the shielding layer. The transition area can form a smooth surface by optimizing the oxidation method and the type and structure of the shielding layer. A multilayer structure containing piezoelectric films such as AlN is grown on the smooth surface to ensure the crystal quality of the piezoelectric film.

[0083] Step 104 , forming a multi-layer structure on the substrate on which the sacrificial material portion has been formed, wherein the multi-layer structure includes, from bottom to top, a lower electrode layer, a piezoelectric layer, and an upper electrode layer.

[0084] See also Figure 4 As shown in (e), a multilayer structure 200 is formed on the substrate 100 on which the sacrificial material portion 600 has been formed. The multilayer structure 200 includes a lower electrode layer 203, a piezoelectric layer 202 and an upper electrode layer 201 from bottom to top.

[0085] Step 105 , removing the sacrificial material portion.

[0086] See also Figure 4 (f) In this step, the sacrificial material portion is removed to form a cavity 300, and the shape of the cavity 300 is consistent with the shape of the sacrificial material portion.

[0087] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A resonator, characterized in that: include: substrate; A multilayer structure is formed on the substrate, wherein the multilayer structure includes, from bottom to top, a lower electrode layer, a piezoelectric layer and an upper electrode layer; Wherein, a cavity is formed between the substrate and the multilayer structure, and the cavity is surrounded by the upper side of the substrate and the lower side of the multilayer structure. The lower side of the multilayer structure and the middle area of ​​the corresponding part of the cavity are planes, and the edge of the middle area and the edge of the cavity are a smooth curved surface with a smooth transition, and the smooth curved surface is located between the upper side of the substrate and the plane; the smooth curved surface includes a first curved surface and a second curved surface connected by a smooth transition; the angle between the cut surface at the contact point between the smooth curved surface and the substrate and the substrate is less than 45 degrees; the shape of the cavity is formed by the specific shape of the shielding layer; the shape of the shielding layer is consistent with the shape of the sacrificial material part; the edge of the shielding layer is formed by multiple ion implantations to form a multilayer doped impurity layer, and the depth of the first ion implantation with the largest energy in the multiple ion implantations is less than the thickness of the shielding layer; at the edge of the shielding layer, the thickness of the shielding layer relative to the ion implantation direction is changed by changing the direction of the ion implantation to obtain doped impurity layers of different depths.

2. The resonator according to claim 1, characterized in that The vertical section of the first curved surface is in the shape of an inverted parabola, the vertical section of the second curved surface is in the shape of a parabola, and the first curved surface is located below the second curved surface.

3. The resonator according to claim 1, characterized in that The curvature of each point of the smooth curved surface is less than a first preset value.

4. The resonator according to claim 1, characterized in that The portion of the upper side surface of the substrate corresponding to the cavity has no abrupt change.

5. The resonator according to claim 1, characterized in that The height of the cavity is any value between 100 nanometers and 2000 nanometers.

6. The resonator according to any one of claims 1 to 5, characterized in that: The substrate is any one of a gallium arsenide substrate, a silicon carbide substrate, a sapphire substrate, a lithium niobate substrate, a lithium tantalate substrate and various composite material substrates.

7. The resonator according to any one of claims 1 to 5, characterized in that: The substrate is a Si substrate.

8. A semiconductor device, characterized in that: A resonator comprising any one of claims 1 to 7.

Citation Information

Patent Citations

  • Film bulk acoustic wave resonator and preparation method thereof

    CN101465628A

  • Resonator and semiconductor device

    CN209088901U

  • Resonator and semiconductor device

    CN209659252U