Semiconductor Devices

Abstract

A semiconductor device is provided. The semiconductor device includes a substrate, an insulating film and a photosensitive film. The substrate includes a semiconductor chip region and a scribe groove region arranged along the edge of the semiconductor chip region. The insulating film includes a first portion arranged on the semiconductor chip region, a second portion arranged on the scribe groove region and connected to the first portion, and a third portion arranged on the scribe groove region and protruding from the second portion in a first direction. The photosensitive film is arranged on the insulating film and has a side wall exposed on the second portion of the insulating film. A first width of the third portion in a second direction perpendicular to the first direction decreases as the distance from the semiconductor chip region increases.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2018-0102533 filed on August 30, 2018 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to semiconductor devices. Background Art

[0004] Recently, semiconductor devices have advanced in miniaturization and high performance. Therefore, a low-k insulating film may be used in the semiconductor device.

[0005] When a semiconductor device is cut off for packaging of the semiconductor device, physical stress may be applied to the semiconductor device. Meanwhile, when a low-k insulating film is used in the semiconductor device, a peeling phenomenon of a wire disposed under the low-k insulating film may occur. Summary of the invention

[0006] An aspect is to provide a semiconductor device having enhanced reliability because an opening region having a cut edge is formed in an insulating film along a scribe line region, which prevents a peeling phenomenon and crack failure of a semiconductor chip.

[0007] According to an exemplary embodiment of the present disclosure, a semiconductor device is provided, comprising: a substrate comprising a semiconductor chip region and a scribe line region arranged along an edge of the semiconductor chip region; an insulating film comprising a first portion arranged on the semiconductor chip region, a second portion arranged on the scribe line region and connected to the first portion, and a third portion arranged on the scribe line region and protruding from the second portion in a first direction; and a photosensitive film, which is arranged on the insulating film and has an exposed side wall exposed on the second portion, wherein a first width of the third portion in a second direction perpendicular to the first direction decreases as the distance from the semiconductor chip region increases.

[0008] According to an exemplary embodiment of the present disclosure, a semiconductor device is provided, comprising: a substrate comprising a semiconductor chip region and a scribe line region arranged along an edge of the semiconductor chip region; an insulating film comprising a first portion arranged on the semiconductor chip region, a second portion arranged on the scribe line region and connected to the first portion, and a third portion arranged on the scribe line region and protruding from the second portion in a first direction; a first opening region defined by a first side wall of the second portion and a second side wall of the third portion on the scribe line region; a photosensitive film arranged on the insulating film and having an exposed side wall exposed on the second portion; and a second opening region defined by the insulating film and the exposed side wall of the photosensitive film on the first opening region, wherein a first width of the first opening region in a second direction perpendicular to the first direction increases with increasing distance from the semiconductor chip region.

[0009] According to an exemplary embodiment of the present disclosure, a semiconductor device is provided, comprising: a substrate comprising a semiconductor chip region and a scribe groove region arranged along an edge of the semiconductor chip region; an insulating film comprising a first portion arranged on the semiconductor chip region, a second portion arranged on the scribe groove region and connected to the first portion, and a third portion arranged on the scribe groove region and protruding from the second portion in a first direction; a photosensitive film comprising a fourth portion arranged on the first portion of the insulating film, a fifth portion arranged on the second portion of the insulating film, and a sixth portion protruding from the fifth portion in the first direction, wherein a first width of the third portion in a second direction perpendicular to the first direction decreases as the distance from the semiconductor chip region increases.

[0010] The objects that the present disclosure is intended to solve are not limited to those mentioned above, and other objects not mentioned above may be clearly understood by those skilled in the art based on the description provided below. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above and other aspects will become more apparent to those skilled in the art by describing in detail exemplary embodiments of the above and other aspects with reference to the accompanying drawings, in which:

[0012] Figure 1 is a top view provided to illustrate a semiconductor device according to some exemplary embodiments;

[0013] Figure 2 yes Figure 1 An enlarged view of region A;

[0014] Figure 3 It is along Figure 1 Line BB, and Figure 2A cross-sectional view taken along line CC and line DD;

[0015] Figures 4 to 12 is a view showing an intermediate stage of manufacturing, which is provided to explain a method for manufacturing a semiconductor device according to some exemplary embodiments;

[0016] Fig.13 is a top view provided to illustrate a semiconductor device according to some other exemplary embodiments;

[0017] Fig.14 is provided to illustrate some other exemplary embodiments Fig.13 A cross-sectional view of a semiconductor device shown in FIG.

[0018] Fig.15 is a top view provided to illustrate a semiconductor device according to some other exemplary embodiments;

[0019] Fig.16 is a top view provided to illustrate a semiconductor device according to some other exemplary embodiments;

[0020] Fig.17 is a top view provided to illustrate a semiconductor device according to some other exemplary embodiments;

[0021] Fig.18 is provided to illustrate some other exemplary embodiments Fig.17 A cross-sectional view of a semiconductor device shown in FIG.

[0022] Fig.19 is a top view provided to illustrate a semiconductor device according to some other exemplary embodiments;

[0023] Fig. 20 is provided to illustrate some other exemplary embodiments Fig.19 0014 is a cross-sectional view of a semiconductor device shown in FIG. DETAILED DESCRIPTION

[0024] In the following, reference will be made to Figures 1 to 3 Semiconductor devices according to some exemplary embodiments are described. In the present disclosure, the term "at least one of A and B" includes "only A", "only B", and "both A and B".

[0025] Figure 1 is a top view provided to illustrate a semiconductor device according to some exemplary embodiments; Figure 2 yes Figure 1 An enlarged view of region A; Figure 3 It is along Figure 1 Line BB, and Figure 2 For ease of explanation, Figure 1 and Figure 2 The base substrate 190 is not shown.

[0026] refer to Figures 1 to 3 , a semiconductor device according to some exemplary embodiments may include a substrate 110 , a first insulating film 120 , an etch stop film 130 , a second insulating film 140 , a rewire layer 150 , a passivation film 160 , a photosensitive film 170 , a connection terminal 180 , and a base substrate 190 .

[0027] The substrate 110 may be a structure in which a base substrate and an epilayer are stacked on each other, but the present disclosure is not limited thereto. The substrate 110 may be, for example, a silicon substrate, a gallium arsenide substrate, a silicon germanium substrate, a ceramic substrate, a quartz substrate, or a glass substrate for display, or a semiconductor on insulator (SOI) substrate. Hereinafter, a silicon substrate will be described as an example. In addition, the substrate 110 may have a configuration in which an insulating film is formed on a silicon substrate.

[0028] The substrate 110 may include a semiconductor chip region I and a scribe line region II.

[0029] The semiconductor chip may be arranged on the semiconductor chip region I. The semiconductor chip may be, for example, a memory chip, a logic chip, or the like. When the semiconductor chip is a logic chip, various logic gates or logic structures may be formed in consideration of the calculations to be performed by the logic of the logic chip. When the semiconductor chip is a memory chip, the memory chip may be, for example, a nonvolatile memory chip. Specifically, the memory chip may be a flash memory chip. More specifically, the memory chip may be one of a NAND flash memory chip or a NOR flash memory chip. At the same time, the memory device according to the present disclosure is not limited to the specific structures illustrated above. According to some exemplary embodiments of the present disclosure, the memory chip may include any one of a phase change random access memory (PRAM), a magnetoresistive random access memory (MRAM), or a resistive random access memory (RRAM).

[0030] The scribe line region II may be disposed along an edge of the semiconductor chip region I. The scribe line region II may include Figure 4 The scribe line SL may be a line for cutting the substrate 110 during a manufacturing process of the semiconductor device.

[0031] The substrate 110 may include a semiconductor chip wire 101. The semiconductor chip wire 101 may be disposed, for example, on the semiconductor chip region I. The semiconductor chip wire 101 is a metal wire in a semiconductor device according to some exemplary embodiments. However, this is only for ease of explanation, and the present disclosure is not limited thereto. Of course, the semiconductor chip wire 101 may also be a transistor, a diode, etc. formed in the substrate 110, and may be, for example, a gate of a transistor or a source / drain of a transistor.

[0032] The first insulating film 120 may be disposed on the substrate 110. The first insulating film 120 may be disposed across the semiconductor chip region I and the scribe line region II. The first insulating film 120 may, for example, cover the front surface of the substrate 110.

[0033] The first insulating film 120 may include a low-k material having a lower dielectric constant than the silicon oxide film. The first insulating film 120 may have a dielectric constant of about 1.0 to 3.0, and may include at least one of an organic material, an inorganic material, and an organic-inorganic hybrid material. In addition, the first insulating film 120 may be porous or non-porous. The first insulating film 120 may be formed, for example, of a doped silicon oxide series material or of an organic polymer having a low-k.

[0034] The doped oxide series material may be, for example, fluorine-doped oxide (FSG), carbon-doped oxide, silicon oxide, hydrogen silsesquioxane (SiO:H), methyl silsesquioxane (SiO:CH3), SiOC (SiOC:H), etc. The organic polymer with low k may be, for example, polyallyl ether resin, cyclofluorine resin, siloxane copolymer, polyallyl ether fluorinated vinyl resin, polypentafluorostyrene, polytetrafluoroethylene resin, polyimide fluorinated vinyl resin, polynaphthalene fluorinated urea, polysilicide resin, etc.

[0035] Despite Figure 3 1 and 2 show that the first insulating film 120 is a single film, but the present disclosure is not limited thereto. For example, the first insulating film 120 may include insulating films stacked along the third direction Z and a barrier film disposed between each insulating film stacked in the third direction Z. The barrier film may include, for example, an insulating material such as SiN, SiON, SiC, SiCN, SiOCH, SiOC, and SiOF.

[0036] The wire structure 121 may be in electrical contact with the semiconductor chip wire 101. The wire structure 121 may include vias to electrically connect between the plurality of wires and between the lowest wire among the plurality of wires and the semiconductor chip wire 101, respectively.

[0037] Although in Figure 31 shows that the sidewall of the through hole has a vertical inclination in the third direction Z, but the present disclosure is not limited thereto. For example, it is certainly possible that the sidewall of the through hole can extend from the semiconductor chip wire 101 toward the wire at a random inclination. The wire structure 121 can include a conductive material.

[0038] The etch stop film 130 may be disposed on the first insulating film 120. The etch stop film 130 may be disposed across the semiconductor chip region I and the scribe line region II.

[0039] The etch stop film 130 may include an insulating material having an etch selectivity to the first insulating film 120. The etch stop film 130 may include, for example, silicon nitride, silicon oxynitride, silicon carbonitride, or the like.

[0040] The second insulating film 140 may be disposed on the etch stop film 130. The second insulating film 140 may be disposed across the semiconductor chip region I and the scribe line region II.

[0041] The second insulating film 140 may include a first portion 141 disposed on the semiconductor chip region I, a second portion 142 disposed on the scribe line region II and connected to the first portion 141 , and a third portion 143 disposed on the scribe line region II and protruding in the first direction X from the second portion 142 .

[0042] The third portion 143 of the second insulating film 140 may include a first surface 143a in contact with the second portion 142 of the second insulating film 140, a second surface 143b opposite to the first surface 143a, and a third surface 143c connecting the first surface 143a and the second surface 143b (see Figure 2 The third surface 143c of the third portion 143 of the second insulating film 140 may have, for example, Figure 2 However, the present disclosure is not limited thereto.

[0043] The width W1 of the third portion 143 of the second insulating film 140 in the second direction Y perpendicular to the first direction X may decrease with increasing distance from the semiconductor chip region I. That is, the third surface 143c of the third portion 143 of the second insulating film 140 may be formed to have an acute angle with an imaginary line extending in the first direction X.

[0044] The second insulating film 140 may include a first open region OP1 formed on the scribe line region II. The first open region OP1 may be defined by sidewalls of the second portion 142 of the second insulating film 140 and the third portion 143 of the second insulating film 140 on the scribe line region II.

[0045] A portion of the upper surface of the etch stop film 130 may be exposed through the first open region OP1. However, the present disclosure is not limited thereto. That is, according to some other exemplary embodiments, a portion of the upper surface of the first insulating film 120 may be exposed through the first open region OP1.

[0046] The width W2 of the first open region OP1 in the second direction Y may increase with increasing distance from the semiconductor chip region I. That is, the width W2 of the first open region OP1 in the second direction Y may increase with decreasing distance from the second surface 143 b of the third portion 143 of the second insulating film 140 .

[0047] A width W3 of the first opening region OP1 in the first direction X exposing the sidewall of the second portion 142 of the second insulating film 140 may be formed to be regular. A width of the first opening region OP1 in the first direction X exposing the sidewall of the third portion 143 of the second insulating film 140 may decrease as a distance from the second surface 143 b of the third portion 143 of the second insulating film 140 decreases.

[0048] The shape of the first open region OP1 on the XY plane may have a trapezoidal shape having a cutting edge at a portion contacting the second surface 143 b of the third portion 143 of the second insulating film 140 .

[0049] The second insulating film 140 may include an insulating material different from that of the first insulating film 120. For example, the second insulating film 140 may include tetraethyl orthosilicate (TEOS). However, the present disclosure is not limited thereto.

[0050] Rewiring layer 150 may be disposed on semiconductor chip region I. A portion of rewiring layer 150 may extend within first portion 141 of second insulating film 140 and within etch stop film 130. A remaining portion of rewiring layer 150 may be disposed on first portion 141 of second insulating film 140. Rewiring layer 150 may be electrically connected to conductive line structure 121. Rewiring layer 150 may be disposed between conductive line structure 121 and connection terminal 180.

[0051] Although in Figure 3 14 shows that the sidewall of a portion of the rewiring layer 150 extending within the first portion 141 of the second insulating film 140 and the etching stop film 130 have a vertical inclination, but the present disclosure is not limited thereto. That is, according to some other exemplary embodiments, the sidewall of the rewiring layer 150 has a random inclination and may extend from the conductive line structure 121 toward the passivation film 160.

[0052] The rewiring layer 150 may include, for example, at least one metal or metal alloy selected from the group consisting of copper (Cu), aluminum (Al), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), tin (Sn), lead (Pb), titanium (Ti), chromium (Cr), palladium (Pd), indium (In), zinc (Zn) and carbon (C).

[0053] The passivation film 160 may be disposed on the first portion 141 of the second insulating film 140 and the rewiring layer 150. The passivation film 160 may be disposed across the semiconductor chip region I and the scribe line region II.

[0054] A portion of the passivation film 160 may extend on the second portion 142 of the second insulating film 140 . That is, a sidewall of the passivation film 160 may be exposed on the second portion 142 of the second insulating film 140 .

[0055] The passivation film 160 may expose the remaining portion of the second portion 142 of the second insulating film 140 and the first open region OP1 . In addition, the passivation film 160 may expose a portion of the rewiring layer 150 .

[0056] The passivation film 160 may be, for example, a silicon nitride film or a silicon nitride oxide film.

[0057] The photosensitive film 170 may be disposed to overlap the passivation film 160 on the passivation film 160. The photosensitive film 170 may be disposed across the semiconductor chip region I and the scribe line region II.

[0058] The photosensitive film 170 may include a fourth portion 171 disposed on the first portion 141 of the second insulating film 140 and a fifth portion 172 disposed on the second portion 142 of the second insulating film 140. The fifth portion 172 of the photosensitive film 170 may be formed to be connected to the fourth portion 171 of the photosensitive film 170.

[0059] A sidewall of the fifth portion 172 of the photosensitive film 170 may be exposed on the second portion 142 of the second insulating film 140 .

[0060] The photosensitive film 170 may expose the remaining portion of the second portion 142 of the second insulating film 140 and the first open region OP1 . In addition, the photosensitive film 170 may expose a portion of the rewiring layer 150 .

[0061] The photosensitive film 170 may include a second opening region OP2 formed on the scribe line region II. The second opening region OP2 may be formed on the second portion 142 of the second insulating film 140 and the first opening region OP1. The second opening region OP2 may be defined by a sidewall of the fifth portion 172 of the photosensitive film 170 on the scribe line region II.

[0062] A portion of the second portion 142 of the second insulating film 140 and the first open region OP1 may be exposed through the second open region OP2 .

[0063] The sidewall of the fifth portion 172 of the photosensitive film 170 may be formed to extend in the second direction Y. That is, the width W4 of the second open area OP2 in the first direction X may be formed to be regular along the second direction Y. However, the present disclosure is not limited thereto.

[0064] A width W4 of the second opening area OP2 in the first direction X may be formed to be greater than a width W3 of the first opening area OP1 in the first direction X.

[0065] The photosensitive film 170 may include, for example, any one of photosensitive polyimide (PSPI), polyimide (PI), and photosensitive polyhydroxystyrene; however, the present disclosure is not limited thereto.

[0066] The connection terminal 180 may be disposed, for example, on the semiconductor chip region I. A portion of the connection terminal 180 may penetrate the photosensitive film 170 and the passivation film 160 and extend in the third direction Z to contact the rewiring layer 150. For example, the connection terminal 180 may protrude from the upper surface of the photosensitive film 170 in the third direction Z.

[0067] The connection terminal 180 may electrically connect the rewiring layer 150 and the base substrate 190 .

[0068] The base substrate 190 may be disposed on the connection terminal 180. The base substrate 190 may be disposed across the semiconductor chip region I and the scribe line region II.

[0069] The base substrate 190 may include a first pad 191 , a connection line 192 , a second pad 193 , and an external connection terminal 194 .

[0070] The external connection terminal 194 may be disposed on the upper surface of the base substrate 190. Since the first pad 191 is disposed on the lower surface of the base substrate 190, it may be electrically connected to the connection terminal 180. Since the second pad 193 is disposed on the upper surface of the base substrate 190, it may be electrically connected to the external connection terminal 194. Since the connection line 192 is disposed within the base substrate 190, it may be electrically connected between the first pad 191 and the second pad 193.

[0071] Although in Figure 3190 and the upper surface of the second pad 193 are formed on the same plane, and the lower surface of the base substrate 190 and the lower surface of the first pad 191 are formed on the same plane, but the present disclosure is not limited thereto. That is, according to some other exemplary embodiments, the first pad 191 may be formed to protrude from the lower surface of the base substrate 190, and the second pad 193 may be formed to protrude from the upper surface of the base substrate 190.

[0072] The base substrate 190 may be a package substrate, and may be, for example, a printed circuit board (PCB), a ceramic substrate, or the like.

[0073] The semiconductor device according to some exemplary embodiments may fit a portion where stress applied to the substrate 110 is concentrated during a cutting process of the substrate 110 to the cutting edge of the first opening region OP1 by forming the first opening region OP1 having a cutting edge in the second direction Y in the second insulating film 140 on the scribe line region II. As a result, the reliability of the semiconductor device may be enhanced by preventing a peeling phenomenon and a crack failure of the semiconductor chip while securing straightness in the cutting process of the substrate 110.

[0074] In the following, reference will be made to Figures 1 to 12 A method for manufacturing a semiconductor device according to some exemplary embodiments is described.

[0075] Figures 4 to 12 is a view showing an intermediate stage of manufacturing, which is provided to explain a method for manufacturing a semiconductor device according to some exemplary embodiments.

[0076] refer to Figure 4 , a semiconductor chip region I and a scribe line region II may be defined on the substrate 110. The scribe line region II may be defined to be disposed along an edge of the semiconductor chip region I. The substrate 110 may include a semiconductor chip semiconductor chip wire 101 formed therein.

[0077] The scribe line SL may be formed to pass through the center of the scribe line region II.

[0078] The scribe line SL may indicate a line for cutting the substrate 110 in a subsequent cutting process of the substrate 110. The process of cutting the substrate 110 along the scribe line SL may be performed by using, for example, a blade or a razor. The following description will be made considering the use of a razor in the substrate cutting process.

[0079] refer to Figure 5, a first insulating film 120 including a conductive line structure 121 may be formed on the substrate 110. Next, an etch stop film 130 and a second insulating film 140 may be sequentially stacked.

[0080] Each of the first insulating film 120 , the etch stopper film 130 , and the second insulating film 140 may be formed on the semiconductor chip region I and the scribe line region II.

[0081] refer to Figure 6 , a first trench T1 may be formed on the semiconductor chip region I. For example, a portion of the second insulating film 140 formed on the semiconductor chip region I and a portion of the etch stop film 130 formed on the semiconductor chip region I may be removed. The conductive line structure 121 may be exposed through the first trench T1.

[0082] refer to Figure 7 , a rewiring layer 150 and a passivation film 160 may be sequentially formed on the second insulating film 140 .

[0083] Specifically, the rewiring layer 150 may be formed to fill the first trench T1. In addition, the rewiring layer 150 may also be formed on the upper surface of the second insulating film 140. The rewiring layer 150 may be formed on the semiconductor chip region I.

[0084] The passivation film 160 may be formed to cover upper surfaces of the second insulating film 140 and the rewiring layer 150. The passivation film 160 may be formed across the semiconductor chip region I and the scribe line region II.

[0085] refer to Figure 8 Specifically, as a portion of the passivation film 160 formed on the scribe line region II and a portion of the second insulating film 140 formed on the scribe line region II are removed, a second trench T2 may be formed in the second insulating film 140 .

[0086] The sidewall of the second insulating film 140 may be exposed through the second trench T2. Figure 8 As shown, the upper surface of the etching stop film 130 may also be exposed through the second trench T2. However, the present disclosure is not limited thereto. That is, according to some other exemplary embodiments, when the etching stop film 130 is etched during the formation process of the second trench T2, the upper surface of the first insulating film 120 may be exposed.

[0087] like Fig.11 As shown, the second trench T2 may be formed to have a cutting edge shape protruding in the second direction Y along the scribe line SL on the XY plane.

[0088] For the sake of convenience of explanation, the second insulating film 140 formed on the semiconductor chip area I is defined as the first part 141, the second insulating film 140 connected to the first part 141 and formed on the scribe line area II is defined as the second part 142, and the second insulating film 140 overlapping with the second trench T2 in the second direction Y and formed on the scribe line area II so as to protrude from the second part 142 in the first direction X is defined as the third part 143.

[0089] refer to Fig. 9 , a photosensitive film 170 including the third trench T3 may be formed on the passivation film 160. Specifically, the photosensitive film 170 formed on a portion of the second portion 142 of the second insulating film 140 and on the third portion 143 of the second insulating film 140 may be removed.

[0090] Furthermore, the passivation film 160 formed on a portion of the second portion 142 of the second insulating film 140 and on the third portion 143 of the second insulating film 140 may also be removed.

[0091] Through the above-described removal process, the photosensitive film 170 including the third trench T3 and the second trench T2 formed on a portion of the second portion 142 of the second insulating film 140 may be formed.

[0092] The sidewall of the photosensitive film 170 may be exposed on the second portion 142 of the second insulating film 140 through the third trench T3 .

[0093] In addition, the connection terminal 180 may be formed on a groove formed by removing a portion of the passivation film 160 formed on the rewiring layer 150 and a portion of the photosensitive film 170 formed on the rewiring layer 150 .

[0094] The photosensitive film 170 may include a fourth portion 171 formed on the semiconductor chip region I and a fifth portion 172 formed on the scribe line region II. The fifth portion 172 of the photosensitive film 170 may be defined as a portion extending in the first direction X by being connected to the fourth portion 171 of the photosensitive film 170 .

[0095] Fig.10 and Fig.11 The planar shape of the semiconductor device formed according to the above process is shown.

[0096] refer to Fig.10 and Fig.11, a second trench T2 having a cutting edge protruding in the second direction Y and extending along the scribe line SL in the second direction Y may be formed to expose the third surface 143c of the third portion 143 of the second insulating film 140 on the scribe line region II. In this case, the second trench T2 may be formed such that a width W2 of the second trench T2 in the second direction Y may increase as a distance from the scribe line SL decreases.

[0097] Despite Fig.11 FIG. 4 shows that the cutting edges of the two second trenches T2 are opposite to each other, but the present disclosure is not limited thereto.

[0098] The third trench T3 may be formed to expose a portion of the second portion 142 of the second insulating film 140, the third portion 143 of the second insulating film 140, and the second trench T2. In this case, the third trench T3 may be formed to have a regular width in the first direction X, but the present disclosure is not limited thereto.

[0099] refer to Figure 1 , Figure 2 and Fig.12 , you can follow Fig.11 The scribe line SL shown in FIG. cuts the substrate 110. As a result, the Figure 1 and Figure 2 The planar shape of the semiconductor device shown in .

[0100] Then, the base substrate 190 may be formed to be electrically connected with the connection terminal 180 on the connection terminal 180 .

[0101] Through the above process, it is possible to manufacture Figure 3 The semiconductor device shown in .

[0102] In the following, reference will be made to Fig.13 and Fig.14 Semiconductor devices according to some other exemplary embodiments are described. Figure 2 and Figure 3 The difference between the semiconductor devices shown in .

[0103] Fig.13 is a top view provided to illustrate a semiconductor device according to some other exemplary embodiments; Fig.14 is provided to illustrate some other exemplary embodiments Fig.13 For ease of explanation, the base substrate 190 is Fig.13 Excluded.

[0104] refer to Fig.13 and Fig.14The photosensitive film 270 may include a fourth portion 271 disposed on the first portion 141 of the second insulating film 140, a fifth portion 272 disposed on the second portion 142 of the second insulating film 140 and connected to the fourth portion 271 of the photosensitive film 270, and a sixth portion 273 protruding from the fifth portion 272 of the photosensitive film 270 along the first direction X.

[0105] The sixth portion 273 of the photosensitive film 270 may include a fourth surface 273 a contacting the fifth portion 272 of the photosensitive film 270 , a fifth surface 273 b opposite to the fourth surface 273 a , and a sixth surface 273 c connecting the fourth surface 273 a and the fifth surface 273 b .

[0106] The sixth surface 273c of the sixth portion 273 of the photosensitive film 270 may have a Fig.13 The width of the sixth portion 273 of the photosensitive film 270 in the second direction Y may decrease as the distance from the semiconductor chip region I increases.

[0107] However, the present disclosure is not limited thereto. That is, according to some other exemplary embodiments, the sixth surface 273 c of the sixth portion 273 of the photosensitive film 270 may have a curved plane shape.

[0108] At least a portion of the sixth portion 273 of the photosensitive film 270 may be disposed on the third portion 143 of the second insulating film 140. That is, a fifth surface 273b of the sixth portion 273 of the photosensitive film 270 may be formed between the first surface 143a of the third portion 143 of the second insulating film 140 and the second surface 143b of the third portion 143 of the second insulating film 140.

[0109] A width W5 between the fifth surface 273 b of the sixth portion 273 of the photosensitive film 270 and the second surface 143 b of the third portion 143 of the second insulating film 140 in the first direction X may be formed smaller than a width W6 of the first open area OP1 in the first direction X.

[0110] refer to Fig.14 At least a portion of a sidewall of the second portion 142 of the second insulating film 140 exposed by the first opening region OP1 and a sidewall of the sixth portion 273 of the photosensitive film 270 exposed by the second opening region OP2 may have sequential slope profiles.

[0111] In the following, reference will be made to Figure 5 The semiconductor device is described according to some other exemplary embodiments. Figure 2 The differences in semiconductor devices are shown.

[0112] Fig.15 is provided to illustrate a top view of a semiconductor device according to some other exemplary embodiments; for ease of explanation, the base substrate 190 is Fig.15 Excluded.

[0113] refer to Fig.15 , the second insulating film 340 may include a second portion 342 disposed on the scribe line region II and a third portion 343 connected to the second portion 342 in the first direction X.

[0114] The third portion 343 of the second insulating film 340 may include a first surface 343 a contacting the second portion 342 of the second insulating film 340 , a second surface 343 b opposite to the first surface 343 a , and a third surface 343 c connecting the first surface 343 a and the second surface 343 b .

[0115] In this case, the third surface 343 c of the third portion 343 of the second insulating film 340 may have a curved surface shape indented in the third portion 343 of the second insulating film 340 .

[0116] A width W7 of the third portion 343 of the second insulating film 340 in the second direction Y may decrease as the distance from the semiconductor chip region I increases. In addition, a width W8 of the first open region OP1 in the second direction Y may increase as the distance from the semiconductor chip region I increases.

[0117] In the following, reference will be made to Fig.16 The semiconductor device according to some other exemplary embodiments will be described. Figure 2 The differences in semiconductor devices are shown.

[0118] Fig.16 is provided to illustrate a top view of a semiconductor device according to some other exemplary embodiments; for ease of explanation, the base substrate 190 is Fig.16 Excluded.

[0119] refer to Fig.16 The photosensitive film 470 may include a fourth portion 471 disposed on the first portion 141 of the second insulating film 140, a fifth portion 472 disposed on the second portion 142 of the second insulating film 140 and connected to the fourth portion 471 of the photosensitive film 470, and a sixth portion 473 protruding from the fifth portion 472 of the photosensitive film 470 along the first direction X.

[0120] The sixth portion 473 of the photosensitive film 470 may include a fourth surface 473a contacting the fifth portion 472 of the photosensitive film 470, a fifth surface 473b opposite to the fourth surface 473a, and a sixth surface 473c connecting the fourth surface 473a and the fifth surface 473b.

[0121] The sixth surface 473c of the sixth portion 473 of the photosensitive film 470 may have a Fig.16 The width of the sixth portion 473 of the photosensitive film 470 in the second direction Y may be formed along the first direction X to be regular.

[0122] At least a portion of the sixth portion 473 of the photosensitive film 470 may be disposed on the third portion 143 of the second insulating film 140. That is, a fifth surface 473b of the sixth portion 473 of the photosensitive film 470 may be formed between the first surface 143a of the third portion 143 of the second insulating film 140 and the second surface 143b of the third portion 143 of the second insulating film 140.

[0123] A width W5 between the fifth surface 473 b of the sixth portion 473 of the photosensitive film 470 and the second surface 143 b of the third portion 143 of the second insulating film 140 in the first direction X may be formed smaller than a width W6 of the first open region OP1 in the first direction X.

[0124] At least a portion of a sidewall of the second portion 142 of the second insulation film 140 exposed by the first opening region OP1 and a sidewall of the sixth portion 473 of the photosensitive film 470 exposed by the second opening region OP2 may have a continuous slope profile.

[0125] In the following, reference will be made to Fig.17 and Fig.18 The semiconductor device according to some other exemplary embodiments will be described. Figure 2 and Figure 3 The difference between the semiconductor devices shown in .

[0126] Fig.17 is a top view provided to illustrate a semiconductor device according to some other exemplary embodiments; Fig.18 is provided to illustrate some other exemplary embodiments Fig.17 For ease of explanation, the base substrate 190 is Fig.17 Excluded.

[0127] refer to Fig.17 and Fig.18The photosensitive film 570 may include a fourth portion 571 disposed on the first portion 141 of the second insulating film 140, a fifth portion 572 disposed on the second portion 142 of the second insulating film 140 and connected to the fourth portion 571 of the photosensitive film 570, and a sixth portion 573 protruding from the fifth portion 572 of the photosensitive film 570 along the first direction X.

[0128] The sixth portion 573 of the photosensitive film 570 may include a fourth surface 573 a contacting the fifth portion 572 of the photosensitive film 570 and a fifth surface 573 b connected to the fourth surface 573 a .

[0129] The fifth surface 573b of the sixth portion 573 of the photosensitive film 570 may have a Fig.17 The width of the sixth portion 573 of the photosensitive film 570 in the second direction Y may decrease as the distance from the semiconductor chip region I increases.

[0130] The sixth portion 573 of the photosensitive film 570 may be formed only on the second portion 142 of the second insulating film 140. That is, the sixth portion 573 of the photosensitive film 570 does not overlap with the third portion 143 of the second insulating film 140.

[0131] A fifth surface 573 b of the sixth portion 573 of the photosensitive film 570 may be formed between the first surface 143 a of the third portion 143 of the second insulating film 140 and the fourth surface 573 a of the sixth portion 573 of the photosensitive film 570 .

[0132] Widths W9 , W10 in the first direction X between the fifth surface 573 b of the sixth portion 573 of the photosensitive film 570 and the second surface 143 b of the third portion 143 of the second insulating film 140 may be formed greater than a width W3 of the first open area OP1 in the first direction X.

[0133] In the following, reference will be made to Fig.19 and Fig. 20 The semiconductor device according to some other exemplary embodiments will be described. Figure 2 and Figure 3 The difference between the semiconductor devices shown in .

[0134] Fig.19 is a top view provided to illustrate a semiconductor device according to some other exemplary embodiments; Fig. 20 is provided to illustrate some other exemplary embodiments Fig.19 For ease of explanation, the base substrate 190 is Fig.19 Excluded.

[0135] refer to Fig.19 and Fig. 20 The photosensitive film 670 may include a fourth portion 671 disposed on the first portion 141 of the second insulating film 140, a fifth portion 672 disposed on the second portion 142 of the second insulating film 140 and connected to the fourth portion 671 of the photosensitive film 670, and a sixth portion 673 protruding from the fifth portion 672 of the photosensitive film 670 along the first direction X.

[0136] The sixth portion 673 of the photosensitive film 670 may include a fourth surface 673a contacting the fifth portion 672 of the photosensitive film 670, a fifth surface 673b opposite to the fourth surface 673a, and a sixth surface 673c connecting the fourth surface 673a and the fifth surface 673b.

[0137] The sixth surface 673c of the sixth portion 673 of the photosensitive film 670 may have a Fig.19 The width of the sixth portion 673 of the photosensitive film 670 in the second direction Y may decrease as the distance from the semiconductor chip region I increases.

[0138] However, the present disclosure is not limited thereto. That is, according to some other exemplary embodiments, the sixth surface 673 c of the sixth portion 673 of the photosensitive film 670 may have a curved shape.

[0139] The sixth portion 673 of the photosensitive film 670 may be formed only on the second portion 142 of the second insulating film 140. That is, the sixth portion 673 of the photosensitive film 670 does not overlap with the third portion 143 of the second insulating film 140.

[0140] A fifth surface 673 b of the sixth portion 673 of the photosensitive film 670 may be formed between the first surface 143 a of the third portion 143 of the second insulating film 140 and the fourth surface 673 a of the sixth portion 673 of the photosensitive film 670 .

[0141] A width W11 between the fifth surface 673 b of the sixth portion 673 of the photosensitive film 670 and the second surface 143 b of the third portion 143 of the second insulating film 140 in the first direction X may be formed greater than a width W3 of the first open area OP1 in the first direction X.

[0142] The exemplary embodiments according to the present disclosure are described above with reference to the accompanying drawings, but it should be understood that the present disclosure is not limited to the aforementioned exemplary embodiments, but can be manufactured in various different forms, and can be implemented in other specific forms by those skilled in the art without changing the technical concepts or characteristics of the present disclosure. Therefore, it will be understood that the exemplary embodiments described above are merely illustrative and should not be understood as limiting.

Claims

1. A semiconductor device, comprising: A substrate comprising a semiconductor chip region and a scribe line region arranged along an edge of the semiconductor chip region; an insulating film including a first portion disposed on the semiconductor chip region, a second portion disposed on the scribe line region and connected to the first portion, and a third portion disposed on the scribe line region and protruding from the second portion in a first direction; as well as a photosensitive film disposed on the insulating film and having an exposed sidewall, the exposed sidewall being exposed on the second portion of the insulating film, The first width of the third portion in a second direction perpendicular to the first direction decreases as the distance from the semiconductor chip region increases.

2. The semiconductor device according to claim 1, wherein The third portion includes a first surface in contact with the second portion, a second surface opposite to the first surface, and a third surface connecting the first surface and the second surface, and The third surface has a planar shape.

3. The semiconductor device according to claim 1, wherein The photosensitive film includes a fourth portion disposed on the first portion of the insulating film, a fifth portion disposed on the second portion of the insulating film, and a sixth portion protruding from the fifth portion in the first direction.

4. The semiconductor device according to claim 3, wherein: The sixth portion includes a fourth surface in contact with the fifth portion, a fifth surface opposite to the fourth surface, and a sixth surface connecting the fourth surface and the fifth surface, and The sixth surface has a planar shape.

5. The semiconductor device according to claim 4, wherein: A second width of the sixth portion in the second direction decreases as a distance from the semiconductor chip region increases.

6. The semiconductor device according to claim 4, wherein: The fifth surface is formed between a first surface of the third portion in contact with the second portion of the insulating film and a second surface of the third portion opposite to the first surface.

7. The semiconductor device according to claim 4, wherein: The fifth surface is formed between a first surface of the third portion in contact with the second portion and the fourth surface.

8. The semiconductor device according to claim 3, wherein: The sixth portion includes a fourth surface in contact with the fifth portion and a fifth surface connected to the fourth surface, and The fifth surface has a curved shape.

9. The semiconductor device according to claim 1, wherein: The third portion includes a first surface in contact with the second portion and a second surface connected to the first surface, and The second surface has a curved shape.

10. The semiconductor device according to claim 1, wherein The exposed sidewall of the photosensitive film extends in the second direction.

11. The semiconductor device according to claim 1, further comprising a base substrate disposed on the photosensitive film.

12. A semiconductor device comprising: A substrate comprising a semiconductor chip region and a scribe line region arranged along an edge of the semiconductor chip region; an insulating film including a first portion disposed on the semiconductor chip region, a second portion disposed on the scribe line region and connected to the first portion, and a third portion disposed on the scribe line region and protruding from the second portion in a first direction; a first opening region defined by a first sidewall of the second portion and a second sidewall of the third portion on the scribe line region; a photosensitive film disposed on the insulating film and having an exposed sidewall exposed on the second portion; as well as a second opening region defined on the first opening region by the insulating film and the exposed sidewalls of the photosensitive film, The first width of the first opening region in a second direction perpendicular to the first direction increases as the distance from the semiconductor chip region increases.

13. The semiconductor device according to claim 12, wherein: A second width of the second opening region in the first direction is formed to be regular along the second direction.

14. The semiconductor device according to claim 12, wherein: The photosensitive film includes a fourth portion disposed on the first portion of the insulating film, a fifth portion disposed on the second portion of the insulating film, and a sixth portion protruding from the fifth portion in the first direction.

15. The semiconductor device according to claim 12, wherein: At least a portion of the third side wall of the insulating film exposed by the first opening region and at least a portion of the exposed side wall of the photosensitive film exposed by the second opening region have a continuous slope profile. 16 . The semiconductor device according to claim 12 , further comprising a passivation film provided between the insulating film and the photosensitive film.

17. A semiconductor device comprising: A substrate comprising a semiconductor chip region and a scribe line region arranged along an edge of the semiconductor chip region; an insulating film including a first portion disposed on the semiconductor chip region, a second portion disposed on the scribe line region and connected to the first portion, and a third portion disposed on the scribe line region and protruding from the second portion in a first direction; a photosensitive film including a fourth portion disposed on the first portion of the insulating film, a fifth portion disposed on the second portion of the insulating film, and a sixth portion protruding from the fifth portion in the first direction; as well as a base substrate disposed on the photosensitive film, The first width of the third portion in a second direction perpendicular to the first direction decreases as the distance from the semiconductor chip region increases.

18. The semiconductor device according to claim 17, wherein: At least a portion of the sixth portion is disposed on the third portion of the insulating film.

19. The semiconductor device according to claim 17, wherein: A second width of the sixth portion in the second direction decreases as a distance from the semiconductor chip region increases.

20. The semiconductor device according to claim 17, wherein The sixth portion does not overlap with the third portion.

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