A server motherboard with Shenwei 1621CPU and no ICH2 chip

Abstract

The invention discloses a Shenwei 1621CPU server motherboard without an ICH2 chip set, comprising a CPU, a BIOS chip, a memory slot, a motherboard timing control chip, a PCIE bus expansion chip, a BMC management chip, a network chip, a SATA chip, a SAS chip, a USB chip, and a PCIE slot. The BIOS chip, the memory slot, the BMC management chip, and the PCIE bus expansion chip are directly connected to the CPU, and the CPU supports two groups of PCI-E X8 signals. The invention adopts a domestic Shenwei SW1621 CPU equipped with a domestic deep operating system, and has the characteristics of fast processing speed, flexible interface expansion, high cost performance, high security level, and the like.

Description

Technical Field

[0001] The present invention relates to the technical field of server motherboards, and more specifically to a Shenwei 1621 CPU server motherboard without an ICH2 chip set. Background Art

[0002] After the Huawei and ZTE incidents, the localization of the information industry has gradually been put on the agenda. As the top priority of the information industry, the independent control of the server industry is very important. In recent years, the country has increased its investment in the domestic independent and controllable information industry, and major server manufacturers have also launched a number of domestic independent and controllable servers with Shenwei SW1621 CPU as the core. However, most of these server manufacturers use the ICH2 chip design solution, which is not only expensive, but also has great constraints on performance.

[0003] Therefore, how to provide a low-cost, high-performance Shenwei 1621CPU server motherboard without ICH2 chips that can meet the application needs of key industries such as national defense, finance, telecommunications, and energy is an urgent problem that technical personnel in this field need to solve. Summary of the invention

[0004] In view of this, the present invention provides a Shenwei 1621CPU ICH2-free chip server motherboard, which is based on the SW1621 processor and equipped with a PCIE SWITCH ICH2-free chip solution, aiming to replace Intel's mid- and low-end servers, achieve independent control of information security, and provide strong support for building national information security.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A Shenwei 1621CPU server motherboard without ICH2 chip set, including CPU, BIOS chip, memory slot, timing control chip, PCIE bus expansion chip, BMC management chip, SAS chip, network chip, SATA chip, USB chip, PCIE slot;

[0007] The BIOS chip, memory slot, BMC management chip, SAS chip and PCIE bus expansion chip are directly connected to the CPU. The BMC management chip is connected to the CPU through the I2C bus for CPU physical health status monitoring and parameter transmission.

[0008] One group of X8 PCIE signals of the CPU is connected to the input end of the SAS expansion chip, and two Mini-SAS X4 signals are output to the outside through the SAS adapter chip. A maximum of 8 SATA3.0 interfaces can be provided to the outside through the SAS signal connector;

[0009] A group of X8 PCIE signals of the CPU is connected to the input end of the PCI-E bus expansion chip. The PCI-E bus expansion chip expands 1 PCI-E X16, 3 PCI-E X8, 2 PCI-E X4, and 5 PCI-E X1 as outputs for the expansion of high and low speed bus interfaces, where:

[0010] 1) One X16 PCIE3.0 signal is connected to the PCIE X16 physical expansion slot, and three X8 PCIE3.0 signals are connected to three PCIE X8 physical expansion slots respectively, for expanding external high-performance expansion cards;

[0011] 2) 1 X4 PCIE3.0 signal is connected to the NVME slot to expand high-performance data storage media;

[0012] 3) 1 X4 PCIE3.0 signal is connected to the SATA expansion chip, which expands 3 SATA3.0 interfaces and 1 msata3.0 interface for connecting the server operating system disk and data disk;

[0013] 4) 1 X4 PCIE3.0 signal is connected to the network control chip, expanding 4 Gigabit Ethernet interfaces to provide a data exchange channel between the server and peripherals;

[0014] 5) 2-way X1 PCIE3.0 signals are connected to the USB adapter chip respectively, expanding 6-way USB3.0 and 2-way USB2.0 interfaces for connecting peripherals such as keyboard, mouse, and U disk;

[0015] 6) 1 X1 PCIE2.0 signal is connected to the BMC management chip, providing 1 VGA display interface, 1 management interface and 1 management serial port to realize remote health management of the server and KVM-OVER-IP function;

[0016] 7) 1 X1 PCIE2.0 signal is connected to the Mini-PCIE slot for expansion of the server trusted module.

[0017] Preferably, in the above-mentioned Shenwei 1621CPU server motherboard without ICH2 chip set, the BIOS storage chip is AT25F512B, the timing control chip is LCMX02, the PCIE expansion chip is PEX8780, the BMC management chip is AST2400, the SAS chip is SAS2008, the network chip is IntelI350, the SATA chip is Marvell 88SE9215, and the USB chip is UPD720201.

[0018] Preferably, in the above-mentioned Shenwei 1621CPU server motherboard without ICH2 chipset, the CPU adopts the Shenwei SW1621 integrated device.

[0019] It can be seen from the above technical solution that compared with the prior art, the beneficial effect of the present invention is that the present invention uses the SW1621 processor as the core and is equipped with a PCIE SWITCH without an ICH2 chip set to replace Intel's mid- and low-end servers, achieve independent control of information security, and provide strong support for building national information security; it has the characteristics of low price, excellent performance, and can meet the application needs of key industries such as national defense, finance, telecommunications, and energy. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0021] Figure 1 The accompanying drawing is a general structural framework diagram of the present invention.

[0022] Figure 2 The accompanying drawing is a schematic diagram of the structure of the server mainboard of the present invention. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] Please see attached Figure 1 , Attachment Figure 2 The present invention discloses a new type of Shenwei 1621 CPU without ICH2 chip set server motherboard, including CPU, BIOS chip, memory slot, power timing control chip, PCIE bus expansion chip, BMC management chip, SAS chip, network chip, SATA chip, USB chip, PCIE slot.

[0025] 1. The motherboard is based on Shenwei SW1621. The power and timing control chip LCMX02 is used to complete the power and timing control of the motherboard. The BIOS is loaded from the BIOS chip AT25F512B through the SPI data bus to finally complete the startup of the motherboard. Shenwei SW1621 CPU supports eight-channel DDR3 memory controller, with a single channel supporting up to 32GB, a total of 256GB memory, and a maximum speed of 1600MHz.

[0026] 2. Shenwei SW1621 supports 2 groups of X8 PCIE3.0: 1 group of X8 PCIE3.0 bus expands 1 PCI-E X16, 3 PCI-E X8, 2 PCI-E X4, and 5 PCI-E X1 as outputs through the PCIE bus expansion chip PEX8780, which is used for the expansion of low-speed bus interfaces; 1 group of X8 PCIE3.0 outputs 2 X4 Mini-SAS interfaces through the SAS adapter chip, and can provide up to 8 SAS / SATA interfaces to the outside.

[0027] 3. A PCIE bus expansion chip PEX8780 expands 1 PCI-E X16, 3 PCI-E X8, 2 PCIE3.0 X4, and 5 PCIE2.0 X1 buses: 1 X16 PCIE3.0 signal is connected to the PCIE X16 physical expansion slot, and 3 X8 PCIE3.0 signals are connected to 3 PCIE X8 physical expansion slots respectively; 1 PCI-E3.0 X4 signal is expanded to 4 SATA3.0 signals through the SATA conversion chip Marvell 88SE9215, and 1 PCI-E3.0 X4 signal is led out through the NVME slot; 5 PCI-E2.0 X1 signals: 1 PCIE2.0 X1 signal is expanded to 4 Gigabit Ethernet interfaces through a network control chip intelI35; 1 PCI-E2.0 The X1 signal is expanded through the BMC management chip AST2400 to form 1 VGA display interface, 1 management interface and 1 management serial port; 2 PCIE2.0 X1 signals are expanded through 2 USB conversion chips UPD720201 to form 6 USB3.0 interfaces; 1 PCI-E2.0 X1 signal is connected to the Mini-PCIE slot.

[0028] 4. The 1-way X1 PCIE3.0 bus output by the PCIE bus expansion chip PEX8780 is expanded to 4-way SATA3.0 interfaces through the SATA chip Marvell88SE9215. One SATA interface is connected to the MSATA connector, and three SATA interfaces are connected to the SATA connector.

[0029] 5. The 1-way X1 PCIE2.0 signal output by the PCIE bus expansion chip PEX8780 is expanded into a 4-way Gigabit Ethernet interface through a network chip IntelI350 and connected to the RJ45 connector on the server motherboard;

[0030] 6. The 1-way X1 PCIE2.0 signal output by the PCIE bus expansion chip PEX8780 is expanded into 2-way USB2.0 and 2-way USB3.0 signals through a USB conversion chip UPD720201: 1 of the 2 USB3.0 signals is connected to the Mini-PCIE slot for secure and trusted module expansion; 1 USB2.0 is connected to the BMC chip for realizing the KVM-OVER-IP function; 2 USB3.0 signals are directly led out through the motherboard connector.

[0031] 7. The SPI data bus of Shenwei SW1621 CPU is connected to the BIOS chip through a level conversion chip to carry the BIOS startup program.

[0032] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0033] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A Shenwei 1621CPU server motherboard without ICH2 chip set, including CPU, BIOS chip, memory slot, timing control chip, PCIE bus expansion chip, BMC management chip, SAS chip, network chip, SATA chip, USB chip, PCIE slot; The BIOS chip, memory slot, BMC management chip, SAS chip and PCIE bus expansion chip are directly connected to the CPU. The BMC management chip is connected to the CPU through the I2C bus for CPU physical health status monitoring and parameter transmission. One group of X8 PCIE signals of the CPU is connected to the input end of the SAS expansion chip, and two Mini-SAS X4 signals are output to the outside through the SAS adapter chip. A maximum of 8 SATA3.0 interfaces can be provided to the outside through the SAS signal connector; A group of X8 PCIE signals of the CPU is connected to the input end of the PCI-E bus expansion chip. The PCI-E bus expansion chip expands 1 PCI-E X16, 3 PCI-E X8, 2 PCI-E X4, and 5 PCI-EX1 as outputs for the expansion of high and low speed bus interfaces, where: 1) 1 X16 PCIE3.0 signal is connected to the PCIEX16 physical expansion slot, and 3 X8 PCIE3.0 signals are connected to 3 PCIE X8 physical expansion slots respectively, which are used to expand external high-performance expansion cards; 2) 1 X4 PCIE3.0 signal is connected to the NVME slot to expand high-performance data storage media; 3) 1-way X4 PCIE3.0 signal is connected to the SATA expansion chip, which expands 3-way SATA3.0 interface and 1-way msata3.0 interface for connecting the server operating system disk and data disk; 4) 1 X4 PCIE3.0 signal is connected to the network control chip, expanding 4 Gigabit Ethernet interfaces to provide a data exchange channel between the server and peripherals: 5) 2-way X1 PCIE3.0 signals are connected to the USB adapter chip, expanding 6-way USB3.0 and 2-way USB2.0 interfaces for connecting keyboard, mouse, and USB flash drive peripherals; 6) 1 X1 PCIE2.0 signal is connected to the BMC management chip, providing 1 VGA display interface, 1 management interface and 1 management serial port to realize remote health management of the server and KVM-OVER-IP function; 7) 1 X1 PCIE2.0 signal is connected to the Mini-PCIE slot for expansion of the server trusted module.

2. According to claim 1, a Shenwei 1621CPU server motherboard without ICH2 chipset is characterized in that: The BIOS chip is AT25F512B, the timing control chip is LCMX02, the PCIE expansion chip is PEX8780, the BMC management chip is AST2400, the SAS chip is SAS2008, the network chip is IntelI350, the SATA chip is Marvell 88SE9215, and the USB chip is UPD720201.

3. A Shenwei 1621CPU server motherboard without ICH2 chipset according to claim 1 or 2, characterized in that: The CPU adopts the Shenwei SW1621 integrated device.

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