Four-quadrant multiplier and integrated circuit

Abstract

A four-quadrant multiplier and an integrated circuit. The four-quadrant multiplier introduces an input selection operation circuit. The unit can be used to implement pre-operation or conversion of multiple input signals, reduce the number of multi-bit multipliers, reduce the cost of the integrated circuit and the possibility of wiring errors. At the same time, the multi-bit multiplier can also flexibly access different input signals and perform different operations, and the use is not fixed, which improves flexibility. Even if there is a wiring error, it can be converted through the input selection operation circuit, so that the system reliability and compatibility are high.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic circuits, and in particular to a four-quadrant multiplier and an integrated circuit. Background Art

[0002] Digital four-quadrant multipliers have been maturely applied in many fields. For example, in smart meters, traditional four-quadrant multipliers can better realize the multiplication function of smart meters. For example, for single-phase meters, the typical application of four-quadrant multipliers is as follows: the three ADCs of the four-quadrant multiplier are used for live current detection input, voltage signal detection input, and neutral current detection input. In traditional applications, the purpose of each ADC is fixed and one-to-one corresponding, and the input signals of the two multi-bit multipliers are also fixed one-to-one. For three-phase four-wire meters, there are at least three multi-bit multipliers in the three-phase four-wire to realize these three multiplications: ; ; ; The inputs of these multi-bit multipliers also have a one-to-one correspondence with fixed inputs and fixed uses. For a three-phase three-wire meter, there are at least two multi-bit multipliers for three-phase three-wire, which respectively implement the two multiplications: ; ; The inputs of these multi-bit multipliers also have a one-to-one correspondence with fixed inputs and fixed uses.

[0003] However, in a conventional four-quadrant multiplier with multiple detection inputs, since the multiplication relationship is fixed, multiple one-to-one corresponding fixed input and fixed-purpose multi-bit multipliers are used, which results in poor adaptive matching capability of the multi-bit multipliers, high cost, and the problem of easy wiring errors when wiring each multi-bit multiplier. Summary of the invention

[0004] In view of this, an embodiment of the present application provides a four-quadrant multiplier and an integrated circuit, aiming to solve the problems of poor adaptive matching capability, high cost, and easy wiring errors of traditional four-quadrant multipliers.

[0005] An embodiment of the present application provides a four-quadrant multiplier, including:

[0006] A vector input circuit including a plurality of input channels;

[0007] at least two input selection operation circuits, each of which comprises a plurality of input terminals respectively connected to the plurality of input channels, and each of which is used for selecting at least one of the signals output by the vector input circuit for operation and output;

[0008] At least one multi-bit multiplier, one input of each of the multi-bit multipliers is connected to one of the input selection operation circuits, and each of the multi-bit multipliers performs a product operation on two input signals and then outputs the result.

[0009] Optionally, the input selection operation circuit includes:

[0010] A selection circuit includes a plurality of input ports as the plurality of input terminals, at least one output port and at least one selection signal input port, wherein the selection circuit selects one or more of the signals input to the plurality of input ports according to the selection signal input to the selection signal input port and outputs the selected signals to the corresponding output port;

[0011] The operation circuit includes at least one input port connected to at least one output port of the selection circuit. The operation circuit receives the signal selected by the selection circuit and performs at least one operation of inversion, addition, subtraction and multiplication before outputting the signal.

[0012] Optionally, the operation circuit includes at least one of a negation operator, an adder, a subtraction operator and a multiplication operator.

[0013] Optionally, each of the input channels includes an analog-to-digital converter, a first filtering circuit and a first correction circuit, and the analog-to-digital converter, the first filtering circuit and the first correction circuit are connected in series.

[0014] Optionally, the first filtering circuit includes a low-pass filter and / or a high-pass filter.

[0015] Optionally, at least one second filtering circuit is further included, and each of the second filtering circuits is connected to the output of each of the multi-bit multipliers to filter the signal output by each of the multi-bit multipliers.

[0016] Optionally, at least one second correction circuit is further included, each second correction circuit is connected between each multi-bit multiplier and each second filtering circuit, or each second correction circuit is connected to the output of each second filtering circuit, and each second correction circuit corrects the signal output by each multi-bit multiplier.

[0017] Another aspect of the embodiments of the present application further provides an integrated circuit, including the above-mentioned four-quadrant multiplier.

[0018] The above-mentioned four-quadrant multiplier introduces an input selection operation circuit. This unit can be used to realize pre-operation or conversion of multiple input signals, reduce the number of multi-bit multipliers, reduce the cost of integrated circuits and the possibility of wiring errors. At the same time, the multi-bit multiplier can also flexibly access different input signals and perform different operations, and the purpose is not fixed, which improves flexibility. Even if there is a wiring error, it can be converted through the input selection operation circuit, making the system reliable and compatible. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 A schematic diagram of the structure of a four-quadrant multiplier provided in one embodiment of the present application;

[0021] Figure 2 for Figure 1 A schematic diagram of the circuit structure of an input selection operation circuit in a four-quadrant multiplier is shown;

[0022] Figure 3 for Figure 2 A circuit structure diagram of a first implementation of a selection circuit in an input selection operation circuit is shown;

[0023] Figure 4 for Figure 2 A circuit structure diagram of a second implementation of a selection circuit in an input selection operation circuit is shown;

[0024] Figure 5 for Figure 2 A circuit structure diagram of a third implementation of a selection circuit in an input selection operation circuit is shown;

[0025] Figure 6 for Figure 2 A schematic diagram of a circuit structure of an implementation of an operation circuit in an input selection operation circuit is shown;

[0026] Figure 7 A schematic diagram of the structure of a four-quadrant multiplier provided in another embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0028] See also Figure 1 , Figure 1 The circuit structure of a four-quadrant multiplier with three input channels in one embodiment of the present application is shown. The four-quadrant multiplier can be applied to an integrated circuit, including a vector input circuit 100, at least two input selection operation circuits 200 and at least one multi-bit multiplier 300.

[0029] The vector input circuit 100 includes a plurality of input channels 101; each input selection operation circuit 200 includes a plurality of input terminals respectively connected to the plurality of input channels 101, and each input selection operation circuit 200 is used to select at least one of the signals output by the vector input circuit 100 for operation and output; one input of each multi-bit multiplier 300 is connected to an input selection operation circuit 200, and each multi-bit multiplier 300 performs a product operation on two input signals and outputs the result. In the embodiment of the present application, the signal can be pre-operated before being input into the multi-bit multiplier 300, that is, each signal can be unfixed before being input into the multi-bit multiplier 300, and wiring errors can be corrected, and the purpose of the multi-bit multiplier 300 is not affected, which increases the flexibility of each multi-bit multiplier 300, reduces the number of multi-bit multipliers 300, and improves the compatibility of the system and reduces the system cost.

[0030] Generally, each input channel 101 is used to access a same or different detection signal, and the input channel 101 includes an analog-to-digital converter (ADC), a first filtering circuit and a first correction circuit. The analog-to-digital converter converts the analog quantity into a digital quantity; the first filtering circuit includes a low-pass filter and / or a high-pass filter, which is used to extract the required frequency band signal; the first correction circuit is used for gain correction, phase correction, DC offset error correction, etc. The specific series connection sequence of the analog-to-digital converter, the first filtering circuit and the first correction circuit can be adjusted according to the situation, and the attached figure example is only for illustration.

[0031] In the field of smart meters, the vector input circuit 100 is provided by a traditional smart meter or its metering chip, and the input channels 101 are generally multiple, and different numbers are set according to different application fields. Generally speaking, a single-phase smart meter has three input channels 101, a three-phase four-wire meter has six or seven input channels 101, and a three-phase three-wire meter has four input channels 101. In some smart socket applications, there may be one voltage signal input channel and multiple current signal input channels.

[0032] In the embodiment of the present application, an input (port) of a multi-bit multiplier 300 corresponds to an input selection operation circuit 200. For example, if there are 4 multi-bit multipliers 300, there are 8 inputs, so there are 8 corresponding input selection operation circuits 200. Figure 2 , each input selection operation circuit 200 includes a selection circuit 201 and an operation circuit 202.

[0033] Among them, the selection circuit 201 includes multiple input ports IN1~INn as multiple input ends, at least one output port OUT1~OUTn and at least one selection signal input port Sel1~Selt. The selection circuit 201 selects one or more of the signals connected to the multiple input ports IN1~INn and outputs them from the corresponding output ports according to the selection signal connected to the selection signal input port Sel1~Selt.

[0034] The input of the selection circuit 201 is the output of each input channel 101, and its output is the selected vector input signal, which can be multiple selection 1 output, multiple selection 2 output, multiple selection 3 output or multiple selection n output, which can be flexibly customized according to needs. Figure 3 The selection circuit 201 is a multi-way selection switch, which is composed of multiple input signals IN1~INn, selection signals Sel1~Selt, and multiple output signals OUT1~OUTn. Figure 4 , the selection circuit 201 is a four-to-one MUX (Multiplexer, data selector) switch, which selects OUT1 to be equal to IN1, IN2, IN3 or IN4 according to the level of the Sel1 / Sel2 signal. Figure 5 The selection circuit 201 is a four-to-one MUX switch, which selects OUT to be equal to IN1 or IN2 according to the level of the Sel signal.

[0035] See also Figure 2 and Figure 6 The operation circuit 202 includes at least one input port connected to at least one output port of the selection circuit 201. The operation circuit 202 receives the signal selected by the selection circuit 201 and performs at least one operation of negation, addition, subtraction and multiplication before outputting the signal. The operation circuit 202 includes at least one of the negation operator 121, the adder 122, the subtractor 123 and the multiplier 124.

[0036] The operation circuit 202 operates one or more vector input signals output by the selection circuit 201. The main operations include inversion, addition, etc. The operation circuit 202 outputs to the input of the multi-bit multiplier 300. For more detailed vector operation, see Figure 6 , the vector operator is as follows:

[0037] Example 1: Negation operator 121, negation: OUT=-OUT1;

[0038] Example 2: Adder 122, vector addition: OUT = + OUT1 + OUT2 + ... + OUTn;

[0039] Example 3: Subtraction operator 123, vector subtraction: OUT = - OUT1 - OUT2 - ... - OUTn;

[0040] Example 4: Multiplier 124, vector multiplication: OUT=OUT1*OUTn;

[0041] The operation circuit 202 includes but is not limited to the common addition, subtraction, multiplication and division operations mentioned above. The above operations can be a single operation or can be connected in series to include both inversion and addition, subtraction, multiplication and division operations.

[0042] See also Figure 7 , Figure 7 The circuit structure of a four-quadrant multiplier including n input channels 101 in another embodiment of the present application is shown. The four-quadrant multiplier also includes at least one second filtering circuit 400, each second filtering circuit 400 is connected to the output of each multi-bit multiplier 300, and filters the signal output by each multi-bit multiplier 300. Optionally, the four-quadrant multiplier also includes at least one second correction circuit 500, each second correction circuit 500 is connected between each multi-bit multiplier 300 and each second filtering circuit 400, or each second correction circuit 500 is connected to the output of each second filtering circuit 400, and each second correction circuit 500 corrects the signal output by each multi-bit multiplier 300.

[0043] Here are three examples to illustrate:

[0044] Example 1:

[0045] In the application of smart sockets, the voltage signal is shared, and the current signal may be 3-way, or 4 / 5 / 6, etc. Our traditional three-phase electric energy metering signal can only realize the multiplication of three-way voltage and circuit current, and finally obtain the three-phase power respectively. For this application of smart sockets, the power and electric energy of up to three input channels 101 can be calculated, and the three-way voltage signal is input to the three-way voltage ADC. After using the present application scheme, one of the inputs of each multi-bit multiplier 300 is set to a voltage signal, as long as one of the ADCs is used as a voltage sampling ADC, and the other input of the multi-bit multiplier 300 is set to each current signal. This greatly saves ADC resources. Using a three-phase metering chip with 7-way ADCs, the original scheme can only realize 3-way power calculation. After using the present application scheme, up to 6-way power calculation can be realized.

[0046] Example 2:

[0047] In a three-phase four-wire meter, if there is an incorrect connection between voltages or currents, the input selection operation circuit 200 of the present application can correct the incorrect vector. For example, if Ua is incorrectly connected to Ub, the selection circuit 201 can be used to easily switch between Ua and Ub.

[0048] Example 3:

[0049] In a three-phase three-wire application, the vector of three-phase four-wire is obtained by the following process:

[0050] In three-phase three-wire, the four vectors obtained by ADC are: , , , ;

[0051] There are two results of multi-bit multipliers 300: , ;

[0052] If the content of this application is used, then you can get: ;

[0053] Assume that the vector input signal of the ADC also introduces and , then according to , , , , and These 6 vectors can be restored:

[0054] ;

[0055] ;

[0056] ;

[0057] ;

[0058] ;

[0059] ;

[0060] That is: a three-phase three-wire meter (line voltage * current). According to the present application scheme, all vectors of the three-phase four-wire (phase voltage * current) can be restored, and then these vectors can be introduced into the four-quadrant multiplier to obtain the power of each phase required by the three-phase four-wire algorithm.

[0061] It can be seen that the four-quadrant multiplier of the present application can be applied to many possible applications such as multi-channel metering in smart sockets, correction of three-phase four-wire incorrect wiring, restoration of phase voltage in three-phase three-wire, three-phase four-wire and three-phase three-wire adaptation, single three-phase leakage current detection, etc. The application field is very wide, and the application of the present invention is not limited to the few examples given.

[0062] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A four-quadrant multiplier, characterized in that: include: A vector input circuit including a plurality of input channels; at least two input selection operation circuits, each of which comprises a plurality of input terminals respectively connected to the plurality of input channels, and each of which is used for selecting at least one of the signals output by the vector input circuit for operation and output; At least one multi-bit multiplier, one input of each of the multi-bit multipliers is connected to one of the input selection operation circuits, and each of the multi-bit multipliers performs a product operation on two input signals and then outputs the result; at least one second filtering circuit, each of the second filtering circuits being connected to an output of each of the multi-bit multipliers to filter a signal output by each of the multi-bit multipliers; The input selection operation circuit comprises: A selection circuit includes a plurality of input ports as the plurality of input terminals, at least one output port and at least one selection signal input port, wherein the selection circuit selects one or more of the signals input to the plurality of input ports according to the selection signal input to the selection signal input port and outputs the selected signals to the corresponding output port; The operation circuit includes at least one input port connected to at least one output port of the selection circuit. The operation circuit receives the signal selected by the selection circuit and performs at least one operation of inversion, addition, subtraction and multiplication before outputting the signal.

2. The four-quadrant multiplier according to claim 1, characterized in that: The operation circuit includes at least one of a negation operator, an addition operator, a subtraction operator and a multiplication operator.

3. The four-quadrant multiplier according to claim 1, characterized in that: Each of the input channels includes an analog-to-digital converter, a first filtering circuit, and a first correction circuit. The analog-to-digital converter, the first filtering circuit, and the first correction circuit are connected in series. 4 . The four-quadrant multiplier according to claim 3 , wherein the first filtering circuit comprises a low-pass filter and / or a high-pass filter.

5. The four-quadrant multiplier according to claim 1, characterized in that: The system also includes at least one second correction circuit, each of which is connected between each of the multi-bit multipliers and each of the second filtering circuits, or each of the second correction circuits is connected to the output of each of the second filtering circuits, and each of the second correction circuits corrects the signal output by each of the multi-bit multipliers.

6. An integrated circuit, characterized in that: A four-quadrant multiplier comprising any one of claims 1 to 5.

Images