Radio frequency microwave circuit board and preparation method thereof

Abstract

The present invention discloses a radio frequency microwave circuit board and a preparation method. The radio frequency microwave circuit board includes a substrate, a first through hole, a front dielectric layer, which is arranged on the upper surface of the substrate, and a second through hole and a third through hole are provided on the front dielectric layer, which penetrate the upper and lower surfaces of the front dielectric layer. The metal paste in the first through hole is recorded as a first metal column, and the metal paste in the second through hole is recorded as a second metal column. A first chip is arranged on the substrate and in the third through hole, and the pad of the first chip is connected to a second metal column via a bonding wire. A second chip is arranged on the upper surface of the front dielectric layer, and the pad of the second chip is connected to a second metal column via a bonding wire. A back dielectric layer is arranged on the back of the substrate. The present invention forms a four-layer circuit board structure by arranging the front dielectric layer and the back dielectric layer on the substrate. The chip can be installed on both the substrate and the front dielectric layer, making the wiring of the radio frequency microwave circuit board more convenient.

Description

Technical Field

[0001] The present invention relates to the field of microwave transmission technology, and in particular to a radio frequency microwave circuit board and a preparation method thereof. Background Art

[0002] With the widespread application of RF microwave devices such as 5G, millimeter wave, and THz, the functions of RF units are becoming more and more complex and the application frequency is constantly increasing, and the demand for interconnection between different chips is rapidly increasing.

[0003] The connection circuits of the chips on the existing radio frequency microwave circuit board are concentrated on one layer, and the convenience of the radio frequency microwave circuit board is poor. Summary of the Invention

[0004] The embodiments of the present invention provide a radio frequency microwave circuit board and a preparation method thereof, aiming to solve the problem of poor convenience of current radio frequency microwave circuit boards.

[0005] A first aspect of an embodiment of the present invention provides a radio frequency microwave circuit board, including:

[0006] A substrate is provided with a first through hole penetrating the upper surface and the lower surface of the substrate, wherein the first through hole of the substrate is filled with metal, and the metal in the first through hole is recorded as a first metal column;

[0007] a front dielectric layer disposed on the upper surface of the substrate by hot pressing, the front dielectric layer being provided with a second through hole and a third through hole penetrating the upper surface and the lower surface of the front dielectric layer, the second through hole being filled with metal, the metal in the second through hole being referred to as a second metal post, and at least one second metal post being connected to the first metal post;

[0008] A first chip is disposed on the upper surface of the substrate, and within the third through hole, a pad of the first chip is connected to at least one second metal pillar via a bonding wire;

[0009] The second chip is arranged on the upper surface of the front dielectric layer, and the pad of the second chip is connected to at least one second metal column through a bonding wire.

[0010] In an embodiment of the present application, when at least two first chips are provided on the upper surface of the substrate, and at least two first chips need to be connected through a resistor, the radio frequency microwave circuit board further includes:

[0011] The resistance layer is arranged on the substrate, between the two first chips that need to be connected through the resistance, and is respectively connected to the two first chips that need to be connected through the resistance.

[0012] In an embodiment of the present application, the radio frequency microwave circuit board further includes:

[0013] a first front seed layer, disposed between the substrate and the front dielectric layer and located in a first predetermined area on the substrate and an inner sidewall of the first through-hole, wherein the first front seed layer in the first predetermined area is used to dispose a first chip, wherein a filled metal is connected to the first through-hole through the first front seed layer;

[0014] A second front seed layer is arranged in a first preset area on the front dielectric layer and on the inner side wall of the second through hole. The second front seed layer in the first preset area on the front dielectric layer is used to set the second chip, wherein the filled metal is connected to the second through hole through the second front seed layer.

[0015] In an embodiment of the present application, the radio frequency microwave circuit board further includes:

[0016] a first front conductor layer, disposed between the first front seed layer and the front dielectric layer and located on the first front seed layer, wherein a first region of the first front conductor layer is used for arranging a first chip, and a second region of the first front conductor layer is used for thickening the first metal pillar;

[0017] The second front conductive layer is disposed on the second front seed layer. The first region of the second front conductive layer is used for arranging the second chip. The second region of the second front conductive layer is used for thickening the second metal pillar.

[0018] In an embodiment of the present application, a signal shielding structure formed by a circle of other second metal pillars is further provided around the periphery of the second metal pillar connected to the pad of the first chip;

[0019] A signal shielding structure formed by a circle of other second metal pillars is further provided around the periphery of the second metal pillar connected to the pad of the second chip.

[0020] In an embodiment of the present application, the radio frequency microwave circuit board further includes:

[0021] A back dielectric layer is provided on the back side of the substrate by hot pressing, and a fourth through hole is provided on the back dielectric layer, which penetrates the upper surface and the lower surface of the back dielectric layer. The fourth through hole is filled with metal, and the metal in the fourth through hole is recorded as a fourth metal column, and the fourth metal column is connected to the first metal column.

[0022] A second aspect of an embodiment of the present invention provides a method for preparing a radio frequency microwave circuit board, comprising:

[0023] preparing a first through hole on a substrate, wherein the first through hole passes through the upper surface and the lower surface of the substrate;

[0024] injecting metal into the first through hole of the substrate and solidifying the metal to form a first metal column penetrating the upper surface and the lower surface of the substrate;

[0025] Hot-pressing a front dielectric layer on the upper surface of the substrate, and preparing a second through hole on the front dielectric layer that penetrates the upper and lower surfaces of the front dielectric layer, wherein the second through hole is connected to the first through hole;

[0026] injecting metal into the second through hole of the front dielectric layer to form a second metal column penetrating the upper surface and the lower surface of the front dielectric layer;

[0027] preparing a third through hole on the front dielectric layer that penetrates the upper surface and the lower surface of the front dielectric layer;

[0028] A first chip is installed in the third through hole and at a position reserved for the first chip on the substrate, and the pad of the first chip is connected to the second metal column through a bonding wire; a second chip is installed at a position reserved for the second chip on the front dielectric layer, and the pad of the second chip is connected to the second metal column through a bonding wire.

[0029] In an embodiment of the present application, before injecting metal into the first through hole of the substrate, the method further includes:

[0030] depositing a first front seed layer on the front surface of the substrate and the inner sidewall of the first through hole;

[0031] When injecting metal into the first through hole of the substrate, the method further comprises:

[0032] A first front conductor layer is deposited on the first front seed layer, wherein a first region of the first front conductor layer is reserved for arranging a first chip, and a second region of the first front conductor layer is used to thicken the first metal pillar.

[0033] In an embodiment of the present application, after depositing the first front conductor layer on the first front seed layer, the method further includes:

[0034] removing the first front seed layer on the substrate except for the first front conductor layer and the reserved position for the resistor layer to obtain the resistor layer;

[0035] The resistance value of the resistor layer is adjusted by a laser resistor trimmer.

[0036] In an embodiment of the present application, when hot pressing the front dielectric layer on the upper surface of the substrate, the process further includes:

[0037] hot pressing a back dielectric layer on the lower surface of the substrate;

[0038] Correspondingly, after the back dielectric layer is hot-pressed on the lower surface of the substrate, a fourth through hole is prepared on the back dielectric layer, the fourth through hole penetrating the upper and lower surfaces of the back dielectric layer, and the fourth through hole is connected to the first through hole below the first through hole;

[0039] Metal is injected into the fourth through hole to form a fourth metal column penetrating the upper surface and the lower surface of the back dielectric layer.

[0040] The present invention forms a double-layer circuit board structure by arranging a front dielectric layer and a back dielectric layer on a substrate. The chip can be installed on both the substrate and the front dielectric layer through the through holes on the front dielectric layer. The wiring of the radio frequency microwave circuit board is more convenient and clear. The double-layer circuit board can separate the sensitive chip and other chips into two different layers, reducing the loss of the entire chip circuit, thereby improving the performance of the radio frequency microwave circuit board and making it more convenient to manufacture. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0042] Figure 1 A schematic structural diagram of a radio frequency microwave circuit board provided in one embodiment of the present invention;

[0043] Figure 2 A flowchart of a method for preparing a radio frequency microwave circuit board provided in one embodiment of the present invention;

[0044] Figure 3 A schematic cross-sectional structural diagram of a first through hole formed on a substrate according to an embodiment of the present invention;

[0045] Figure 4 A bottom-view structural diagram of a first through hole formed on a substrate according to an embodiment of the present invention;

[0046] Figure 5 A schematic cross-sectional view of the preparation of a first front seed layer and a first back seed layer provided in one embodiment of the present invention;

[0047] Figure 6 A schematic cross-sectional view of the preparation of a first photoresist layer according to an embodiment of the present invention;

[0048] Figure 7 A schematic diagram of a cross-sectional structure of a first front conductor layer and a first back conductor layer provided in one embodiment of the present invention Figure 1 ;

[0049] Figure 8 A schematic diagram of a cross-sectional structure of a first front conductor layer and a first back conductor layer provided in one embodiment of the present invention Figure 2 ;

[0050] Figure 9 A schematic cross-sectional view of the removal of the first front seed layer and the second back seed layer provided in one embodiment of the present invention;

[0051] Figure 10 A schematic diagram of a cross-sectional structure for preparing a front dielectric layer and a back dielectric layer provided in one embodiment of the present invention;

[0052] Figure 11 A schematic cross-sectional structural diagram of a method for preparing a second through hole and a fourth through hole according to an embodiment of the present invention;

[0053] Figure 12 A schematic cross-sectional view of the preparation of a second front conductor layer and a second back conductor layer provided in one embodiment of the present invention;

[0054] Figure 13 A schematic cross-sectional structural diagram of a method for preparing a third through hole according to an embodiment of the present invention;

[0055] Figure 14 A schematic cross-sectional structural diagram of mounting a first chip and a second chip according to an embodiment of the present invention.

[0056] Among them: 1. substrate; 2. first through hole; 3. first front seed layer; 4. first back seed layer; 5. first photoresist layer; 6. first front conductor layer; 7. first back conductor layer; 8. first metal pillar; 9. front dielectric layer; 10. back dielectric layer; 11. second front conductor layer; 12. second back conductor layer; 13. second chip; 14. solder resist layer; 15. first chip. DETAILED DESCRIPTION

[0057] To help those skilled in the art better understand this solution, the following will clearly describe the technical solutions in the embodiments of this solution in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of this solution, not all of it. Based on the embodiments of this solution, all other embodiments obtained by those skilled in the art without creative work should fall within the scope of protection of this solution.

[0058] In the specification and claims of this solution, as well as in the accompanying drawings, the term "including" and any variations thereof mean "including but not limited to," and is intended to cover non-exclusive inclusions. Furthermore, the terms "first" and "second," etc., are used to distinguish between different objects, not to describe a specific order.

[0059] The following describes the implementation of the present invention in detail with reference to the accompanying drawings:

[0060] like Figure 1 As shown, an embodiment of the present invention provides a radio frequency microwave circuit board, comprising

[0061] A substrate 1 is provided with a first through hole 2 penetrating the upper surface and the lower surface of the substrate 1 , wherein the first through hole 2 of the substrate 1 is filled with metal, and the metal in the first through hole 2 is denoted as a first metal pillar 8;

[0062] A front dielectric layer 9 is provided on the upper surface of the substrate 1 by hot pressing; the front dielectric layer 9 is provided with a second through hole and a third through hole penetrating the upper surface and the lower surface of the front dielectric layer 9, respectively; the second through hole is filled with metal, and the metal in the second through hole is referred to as a second metal column, and at least one second metal column connected to the first metal column exists;

[0063] A first chip 15 is provided on the upper surface of the substrate 1, and in the third through hole, a pad of the first chip 15 is connected to at least one second metal pillar via a bonding wire;

[0064] The second chip 13 is disposed on the upper surface of the front dielectric layer 9 , and the pad of the second chip 13 is connected to at least one second metal column through a bonding wire.

[0065] In this embodiment, the substrate 1 is a pre-sintered ceramic substrate, for example, it can be alumina ceramic, aluminum nitride ceramic and quartz. The selection of the diameter of the first through hole 2 can refer to the following constraints: the ratio of the thickness of the substrate 1 to the diameter of the first through hole 2 is between 3:1 and 4:1. According to the thickness of the substrate 1 during actual packaging, the diameter of the first through hole 2 can be set between 70-125 microns. The first chip 15 and the second chip 13 can both be RF chips. Metal is filled in the first through hole 2 and the second through hole, and the metal can be copper. The first through hole can be filled with metal slurry, using copper slurry, or it can be filled by electroplating, using copper electroplating solution. The second through hole is filled with metal by electroplating, using copper electroplating solution.

[0066] In this embodiment, the lower surface of the front dielectric layer 9 is in contact with the upper surface of the substrate 1, and the front dielectric layer 9 completely covers the substrate 1. The front dielectric layer 9 can be wired, and a second chip 13 can be placed on the front surface of the front dielectric layer 9. The first chip 15 is located within a third through-hole in the front dielectric layer and is disposed on the substrate 1. The front dielectric layer 9 can be made of a liquid crystal polymer (LCP) with low microwave loss and good temperature stability. The diameter of the second through-hole can be set between 70 and 125 microns, and the diameter of the second through-hole meets the constraint that the ratio of the diameter of the second through-hole to the thickness of the substrate 1 in the front dielectric layer 9 is 1:1.

[0067] In this embodiment, a front dielectric layer 9 is provided on the substrate 1, forming a double-layer circuit board structure. The chip can be mounted on both the substrate 1 and the front dielectric layer 9 through the third through-hole in the front dielectric layer. Wiring can be performed on both the front dielectric layer 9 and the substrate 1, making wiring of the RF microwave circuit board more convenient and clear. Furthermore, the double-layer circuit board can separate the sensitive chip from other chips on two different layers, reducing losses in the entire chip circuit and thereby improving the performance of the RF microwave circuit board. Furthermore, the core board of the multi-layer circuit board has a uniform temperature and high thermal conductivity. The second through-hole in the front dielectric layer 9 is connected to the first through-hole 2 in the substrate 1, and both are filled with copper, which optimizes the heat dissipation path. Local heat sources on the front dielectric layer 9 can be quickly transferred to the substrate 1 and conducted downward.

[0068] In an embodiment of the present invention, when at least two first chips 15 are provided on the upper surface of the substrate 1 and at least two first chips 15 need to be connected through a resistor, the radio frequency microwave circuit board further includes:

[0069] The resistor layer is disposed on the substrate 1 between the two first chips 15 that need to be connected via a resistor, and is respectively connected to the two first chips 15 that need to be connected via a resistor.

[0070] In this embodiment, the resistance layer is a layer of metal used to connect the two first chips 15. High-precision resistors are provided on the substrate 1 to improve the integration density of the RF microwave circuit board, and the resistance deviation of the resistance layer is within ±1%.

[0071] like Figure 1 As shown, in an embodiment of the present invention, the radio frequency microwave circuit board further includes:

[0072] The first front seed layer 3 is arranged between the substrate 1 and the front dielectric layer 9, and is located in the first preset area on the substrate 1 and the inner wall of the first through hole 2. The first front seed layer 3 in the first preset area is used to set the first chip 15, wherein the filled metal is connected to the first through hole 2 through the first front seed layer 3.

[0073] The second front seed layer is arranged in the first preset area on the front dielectric layer 9 and the inner side wall of the second through hole. The second front seed layer in the first preset area is used to set the second chip 13, wherein the filled metal is connected to the second through hole through the second front seed layer.

[0074] In this embodiment, the materials that can be selected for the first front seed layer 3 and the second front seed layer are Ta, Ti or Cu, and the thickness selection can meet the constraint conditions of 50nm-5000nm. Of course, the thickness of the first front seed layer 3 and the second front seed layer can also be set as needed. The setting of the first front seed layer 3 can better and more simply set the first chip 15 on the substrate 1. The setting of the second front seed layer can better and more simply set the second chip 13 on the substrate 1. At the same time, it also prepares for the subsequent thickening of the chip setting area and other areas. In specific applications, the Ta layer of the retained first front seed layer (that is, retaining part of the first front seed layer as the resistance layer without remaking the resistance layer) can be used as the resistance layer in the position where the resistance layer is set.

[0075] like Figure 1 As shown, in an embodiment of the present invention, the radio frequency microwave circuit board further includes:

[0076] a first front conductive layer 6 disposed between the first front seed layer 3 and the front dielectric layer 9 and located on the first front seed layer 3; a first region of the first front conductive layer 6 is used for arranging the first chip 15; and a second region of the first front conductive layer 6 is used for thickening the first metal pillar 8;

[0077] The second front conductive layer 11 is disposed on the second front seed layer. The first region of the second front conductive layer 11 is used to dispose the second chip 13 , and the second region of the second front conductive layer 11 is used to thicken the second metal pillar.

[0078] In this embodiment, the thickness of the first front conductive layer 6 and the second front conductive layer 11 can both be 15-20 μm, and both can be fabricated by electroplating. The provision of the first front conductive layer 6 can better connect the first chip 15 to the substrate 1, and the provision of the second front conductive layer 11 can better connect the second chip 13 to the front dielectric layer 9.

[0079] like Figure 4 As shown, in an embodiment of the present invention, the second metal pillars connecting the pads of the first chip 15 and the pads of the second chip 13 are recorded as conductive pillars, and a signal shielding structure formed by a circle of other second metal pillars is provided around the conductive pillars.

[0080] In this embodiment, since the conductive pillar needs to transmit signals, a signal shielding structure is required for the conductive pillar. The signal shielding structure in this application can be configured as follows: when preparing the second through-hole corresponding to the conductive pillar, a circle of through-holes is also prepared around the second through-hole. Metal slurry is also injected into this circle of through-holes to form metal pillars. The metal pillars surrounding the conductive pillar can form a signal shielding structure. Correspondingly, a circle of signal shielding structure is also provided outside the first metal pillar.

[0081] like Figure 1 As shown, in an embodiment of the present invention, the radio frequency microwave circuit board further includes:

[0082] The back dielectric layer 10 is arranged on the back side of the substrate 1 by hot pressing. The back dielectric layer 10 is provided with a fourth through hole that penetrates the upper surface of the back dielectric layer 10 and the lower surface of the back dielectric layer 10. The fourth through hole is filled with metal. The metal in the fourth through hole is recorded as a fourth metal column, and the fourth metal column is connected to the first metal column 8.

[0083] In this embodiment, the upper surface of the back dielectric layer 10 is in contact with the lower surface of the substrate 1, and the back dielectric layer 10 is completely covered under the substrate 1. The back dielectric layer 10 can be wired, and the back dielectric layer 10 can be made of a liquid crystal polymer (LCP) with low microwave loss and good temperature stability. The diameter of the fourth through hole can be set between 70 and 125 microns, and the diameter of the fourth through hole meets the constraint condition: the ratio of the diameter of the fourth through hole to the thickness of the substrate 1 in the back dielectric layer 10 is 1:1. The fourth through hole is filled with metal, and the fourth through hole is filled with metal by electroplating. The front dielectric layer 9, the substrate 1, and the back dielectric layer 10 form a three-layer circuit board, which makes wiring simpler and clearer while reducing transmission loss.

[0084] like Figure 1 As shown, in an embodiment of the present invention, the radio frequency microwave circuit board further includes:

[0085] The first back seed layer 4 is disposed between the substrate 1 and the back dielectric layer 10 and is located in a first preset area under the substrate 1 .

[0086] The second back seed layer is disposed in the first preset area under the back dielectric layer 10 and on the inner sidewall of the fourth through hole. The filled metal is connected to the fourth through hole through the second back seed layer.

[0087] In this embodiment, the materials that can be selected for the first back seed layer 4 and the second back seed layer are Ti or Cu, and the thickness selection can meet the constraint conditions of 50nm-5000nm. Of course, the thickness of the first back seed layer 4 and the second back seed layer can also be set as needed.

[0088] like Figure 1 As shown, in an embodiment of the present invention, the radio frequency microwave circuit board further includes:

[0089] a first back conductor layer 7, disposed between the first back seed layer 4 and the back dielectric layer 10 and located below the first back seed layer 4, wherein the first region of the first back conductor layer is used to thicken the first metal pillar;

[0090] The second back side conductor layer 12 is disposed under the second back side seed layer. The first region of the second back side conductor layer 12 is used to thicken the fourth metal pillar.

[0091] In this embodiment, the thickness of the first back conductor layer 7 and the second back conductor layer 12 may both be 15-20 μm, and the first back conductor layer 7 and the second back conductor layer 12 may both be manufactured by electroplating.

[0092] like Figure 1 As shown, in the embodiment of the present invention, a solder resist layer 14 is further included, which is disposed on the lower surface of the back dielectric layer 10 and in an area outside the fourth through hole. The solder resist layer 14 facilitates assembly with other components.

[0093] like Figure 2 As shown, a structural schematic diagram of a radio frequency microwave circuit board corresponding to each step in the process flow of another method for preparing a radio frequency microwave circuit board provided in an embodiment of the present application.

[0094] S101 , preparing a first through hole 2 on a substrate 1 , wherein the first through hole 2 passes through the upper surface and the lower surface of the substrate 1 .

[0095] In this embodiment, the substrate 1 is a pre-sintered ceramic substrate 1, for example, it can be alumina ceramic, aluminum nitride ceramic, quartz, etc. When preparing the first through hole 2 on the pre-sintered substrate 1, picosecond cold laser drilling can be used, and the processed first through hole 2 passes through the upper surface and lower surface of the substrate 1. The hole wall of the first through hole 2 prepared in this way is smooth, the verticality is high, and the aperture difference between the upper surface and the lower surface of the substrate 1 is less than 5%. The first through hole 2 will subsequently be injected with metal as a signal transmission line, and the first through hole 2 prepared in this way can reduce transmission loss after the metal is injected.

[0096] S102 , injecting metal into the first through hole 2 of the substrate 1 and solidifying the metal to form a first metal column 8 penetrating the upper surface and the lower surface of the substrate 1 .

[0097] In this embodiment, since the airtight packaging requires that the prepared packaging shell is airtight, after injecting metal into the first through hole 2 of the substrate 1, it is also necessary to pile up metal around the first through hole 2, and then solidify the metal inside and around the first through hole 2, so that the substrate 1 as the bottom plate of the packaging shell is airtight. There will be no problem of poor airtightness due to too little metal injection or metal sintering process. At the same time, the first through hole 2 is made first and then the metal is solidified. When the metal is solidified, the position of the first through hole 2 will not change, thereby improving the reliability and consistency of the chip packaging. The first through hole can be filled with metal by filling metal slurry. When filling with metal slurry, high-temperature sintering is required to solidify the metal slurry. The first through hole can also be filled with metal by electroplating. When filling with electroplating, the metal can be solidified at room temperature.

[0098] S103 , hot-pressing a front dielectric layer 9 on the substrate 1 , and preparing a second through hole on the front dielectric layer 9 , wherein the second through hole is connected to the first through hole 2 .

[0099] In this embodiment, the front dielectric layer 9 is formed on the substrate 1 by hot pressing. The front dielectric layer 9 utilizes a liquid crystal polymer, which exhibits a certain degree of fluidity and flattens the surface of the substrate 1. When creating a second through-hole in the front dielectric layer 9, a picosecond cold laser process is used to drill a hole at a vertical interconnection location, corresponding to the location of the first through-hole 2, using the aluminum nitride of the substrate 1 as a target. The resulting second through-hole penetrates both the upper and lower surfaces of the front dielectric layer 9. This method produces a second through-hole with smooth walls, high verticality, and precise positioning.

[0100] S104 , injecting metal into the second through hole of the front dielectric layer 9 by electroplating to form a second metal column penetrating the upper surface and the lower surface of the front dielectric layer 9 .

[0101] In this embodiment, the function of the metal filled in the second through hole is the same as that of the metal filled in the first through hole 2 , and reference is made to the explanation in S102 .

[0102] S105 , preparing a third through hole on the front dielectric layer that penetrates the upper surface and the lower surface of the front dielectric layer.

[0103] In this embodiment, the third through hole is a blind hole provided between the front dielectric layer 9 and the substrate 1. The hole can be drilled using picosecond cold laser processing.

[0104] S106 , installing the first chip 15 in the third through hole and at a position reserved for arranging the first chip on the substrate, and connecting the pad of the first chip 15 to the second metal column through a bonding wire.

[0105] In this embodiment, the first chip is placed in the third through-hole on the front dielectric layer 15 and surface-mounted on the substrate 1 .

[0106] S107 , installing the second chip 13 at a location reserved for the second chip 13 on the front dielectric layer 9 , and connecting the pads of the second chip 13 to the second metal pillars through bonding wires.

[0107] In this embodiment, the second chip 13 needs to be mounted on the front dielectric layer 9, and the second chip 13 can be mounted on the front dielectric layer 9 by surface mounting. The second metal pillars connecting the pads of the first chip 15 and the second chip 13 are referred to as conductive pillars. The conductive pillars are also surrounded by a peripheral shielding structure formed by a circle of second metal pillars. The peripheral shielding structure can be a coaxial-like peripheral shielding structure.

[0108] Figures 3 to 14 This is a structural schematic diagram corresponding to each step in the process flow of another method for preparing a radio frequency microwave circuit board provided in an embodiment of the present application.

[0109] First, a first through hole 2 is prepared on the substrate 1, wherein the first through hole 2 passes through the upper surface and the lower surface of the substrate 1. The cross-sectional view of the substrate 1 after the first through hole 2 is prepared can be seen in FIG. Figure 3 The top view of the substrate 1 after the through hole 2 is prepared can be referred to Figure 4 , the details are the same as step S101.

[0110] Second, metal is deposited on the front surface of the substrate 1 and the inner sidewall of the first through hole 2 to form a first front seed layer 3. A position for arranging the first chip 15 is reserved on the first front seed layer 3. For details, please refer to Figure 5 shown.

[0111] In this embodiment, the surface of the substrate 1 and the first through hole 2 are cleaned before depositing the first front seed layer 3. The first front seed layer 3 is deposited on the front surface of the substrate 1 by physical vapor deposition or chemical vapor deposition.

[0112] Third, metal is injected into the first through hole 2 of the substrate 1 on which the first front seed layer 3 is deposited by electroplating to form a first metal column 8 penetrating the upper and lower surfaces of the substrate 1. The specific method of filling the first through hole 2 with metal slurry is the same as step S102.

[0113] In practical applications, while injecting metal into the first through hole 2, the first front conductor layer 6 can also be prepared on the first front seed layer 3 by electroplating. Figure 6-8 shown.

[0114] A first front conductor layer 6 is prepared on the first front seed layer 3 by electrochemical deposition, wherein a first region of the first front conductor layer 6 is reserved for arranging the first chip 15 , and a second region of the first front conductor layer 6 is used to thicken the first metal pillar 8 .

[0115] In the embodiment of the present application, the specific method for preparing the first front conductor layer 6 and the first metal pillar 8 is as follows: the first photoresist layer 5 is coated on the first front seed layer 3 by spin coating or lamination hot pressing on the upper surface of the first front seed layer 3, and then the position where the first front conductor layer 6 is to be prepared on the first photoresist layer 5 is subjected to standard photolithography processes such as exposure and development to obtain a conductor layer through-hole for preparing the first front conductor layer 6, and finally the position of the conductor layer through-hole on the first photoresist layer 5 and the first through-hole 2 are filled with metal by electroplating. Specifically, when filling the metal, a combination of pulse plating and DC plating is used to ensure that there are no voids in the copper deposition in the first through-hole 2 and the efficiency is also improved. After the first through-hole 2 is filled, metal is continued to be accumulated on the first through-hole 2 until the surface protrudes to form the first front conductor layer 6, and finally the first photoresist layer 5 is removed by a standard film stripping process to obtain the first front conductor layer 6. The metal in the first through-hole 2 is the first metal pillar 8.

[0116] The first front conductive layer 6 is fabricated using a semiconductor photolithography process, resulting in high line precision, good impedance matching, and low loss. The first photoresist layer 5 can be made of either a high-viscosity photoresist or a high-resolution photosensitive dry film. The first photoresist layer 5 meets the following constraints: a thickness greater than 15 microns, a line resolution less than 10 microns, and steep inner sidewalls of the conductive layer through-holes formed after exposure of the first photoresist layer 5.

[0117] After preparing the first front conductor layer 6, in order to obtain a first front conductor layer 6 of a preset thickness and also to obtain a first front conductor layer 6 with higher precision and lower surface roughness, the first front conductor layer 6 may be thinned and polished.

[0118] Specifically, during the production, the first front conductor layer 6 can be thinned. During the grinding process, some scratches may exist, and the first front conductor layer 6 needs to be polished to reduce the surface roughness of the first front conductor layer 6 and reduce the transmission loss of the line.

[0119] The first front conductor layer covers both the substrate and the first metal column in the first through hole, forming a complete covering structure on the first metal column and the substrate, thereby ensuring air tightness.

[0120] Fourth, the first front seed layer 3 on the substrate 1 except for the position corresponding to the first front conductor layer 6 and the position reserved for setting the resistance layer is removed, such as Figure 9 shown.

[0121] In this embodiment, a method of first photolithography and then etching is adopted to remove the first front seed layer 3 except for the position corresponding to the first front conductor layer 6 and the position reserved for setting the resistance layer. In this way, the first front seed layer 3 at the position of the reserved resistance layer is not removed, and the first front seed layer 3 at the position of the reserved resistance layer is recorded as the resistance layer. In actual production, the first front seed layer 3 corresponding to the resistance layer position can be partially removed, leaving the Ta layer, and finally a resistance layer of a preset thickness is obtained, and the resistance value of the resistance layer is adjusted by a laser resistor trimming machine.

[0122] Finally, chemical nickel-gold plating can be used to protect the first front surface conductor layer 6 and the resistance layer on the surface to improve environmental tolerance.

[0123] Fifth, a front dielectric layer 9 is hot pressed on the substrate 1, and a second through hole is prepared on the front dielectric layer 9 by picosecond cold laser processing, wherein the second through hole is connected to the first through hole 2, as shown in FIG. Figure 10-11 shown.

[0124] The specific method of preparing the front dielectric layer 9 and preparing the second through hole in the front dielectric layer 9 in the fifth step can be referred to the description of step S103 and will not be repeated here.

[0125] Sixth, metal is deposited on the front surface of the front dielectric layer 9 and the inner sidewall of the second through hole to form a second front seed layer, and a position for arranging the second chip 13 is reserved on the second front seed layer.

[0126] In this embodiment, the surface of the front dielectric layer 9 and the second through hole are cleaned before depositing the second front seed layer. The second front seed layer is deposited on the front of the front dielectric layer 9 by physical vapor deposition or chemical vapor deposition.

[0127] Seventh, metal is injected into the second through hole of the front dielectric layer 9 on which the second front seed layer is deposited by electroplating to form a second metal column penetrating the upper and lower surfaces of the front dielectric layer 9, such as Figure 12 shown.

[0128] The specific method of filling the second through hole with metal in the seventh step can be referred to the description of step S104 and will not be repeated here.

[0129] In specific production, if necessary, while metal is filled in the second through hole, the second front conductor layer 11 is prepared on the second front seed layer by electrochemical deposition.

[0130] The specific method for preparing the second front conductive layer 11 is the same as the method for preparing the first front conductive layer 6 in the third embodiment. The method for preparing the first front conductive layer 6 may be referred to. The second front conductive layer covers both the front dielectric layer and the second metal pillar within the second through hole, forming a complete coating structure on the second metal pillar and the front dielectric layer to ensure airtightness.

[0131] After the second front conductor layer 11 is prepared, the second front seed layer on the area of the front dielectric layer 9 other than the location of the second front conductor layer 11 is removed.

[0132] In this embodiment, the second front conductor layer 11 can be thinned. During the grinding process, some scratches may exist, and the second front conductor layer 11 needs to be polished to reduce the surface roughness of the second front conductor layer 11 and reduce the transmission loss of the line.

[0133] Eighth, a third through hole is prepared on the front conductor layer by using picosecond cold laser processing. For details, please refer to the description of step S105. Figure 13 shown.

[0134] In this embodiment, the process of preparing the third through hole is the same as the process of preparing the second through hole, and will not be repeated here.

[0135] Ninth, place the first chip in the third through hole, install the first chip 15 at the position reserved for the first chip 15 on the substrate 1, and connect the pad of the first chip 15 to the second metal column 8 through a bonding wire. Figure 14 As shown, the content of this step is consistent with that of step S106. For details, please refer to the description of step S106, which will not be repeated here.

[0136] In this embodiment, if a first front seed layer 3 is provided on the substrate 1 , the first chip 15 is disposed on the first front seed layer 3 .

[0137] If the first front seed layer 3 and the first front conductor layer 6 are provided on the substrate 1 , the first chip 15 is disposed on the first front conductor layer 6 .

[0138] Tenth, the second chip 13 is mounted on the front dielectric layer 9, and the pad of the second chip 13 is connected to the second metal column through a bonding wire, as shown in FIG. Figure 14 shown.

[0139] The specific installation method is the same as that in step S107, and reference may be made to step S107.

[0140] Eleventh, prepare the solder resist layer 14 on the back side of the substrate 1, such as Figure 1 shown.

[0141] In this embodiment, the solder resist layer 14 can be prepared on the back side of the substrate 1 by spin coating. The material of the solder resist layer 14 can be a photosensitive solder resist material. The preparation of the solder resist layer 14 can facilitate the assembly of the RF microwave circuit board and other components.

[0142] In the specific production, when preparing the front dielectric layer, the back dielectric layer 10 can also be hot-pressed on the back of the substrate 1, and a fourth through hole can be prepared on the back dielectric layer 10. The fourth through hole is filled with metal by electroplating. The metal in the fourth through hole is recorded as the fourth metal column, and the fourth metal column is connected to the first metal column 8.

[0143] Specifically, the method for forming the fourth through hole on the back dielectric layer 10 is the same as the method for forming the second through hole on the front dielectric layer 9, which can be referred to as S103. The method for filling the fourth through hole with metal is the same as the method for filling the second through hole with metal, which can be referred to as S104.

[0144] During the preparation process, a first back seed layer 4 can be prepared on the back side of the substrate 1, and a first back conductor layer 7 can be deposited on the first back seed layer 4 and under the first metal pillar 8. A second back seed layer can be deposited on the lower surface of the back dielectric layer 10 and in the third through hole, and a second back conductor layer 12 is deposited on the back side of the second back seed layer and under the third metal pillar. The preparation methods of the above-mentioned back seed layers and back conductor layers can refer to the preparation methods of the front seed layer and the front conductor layer. The second back conductor layer covers both under the back dielectric layer and under the fourth metal pillar in the fourth through hole, forming a complete coating structure on the fourth metal pillar and the back dielectric layer, thereby ensuring airtightness.

[0145] When preparing the first front seed layer, a first back seed layer and a first back conductor layer can also be provided on the back side of the substrate. The first back seed layer and the first front seed layer are prepared in the same manner. The first back conductor layer is prepared in the same manner as the first front conductor layer. The first back conductor layer covers both the substrate and the first metal pillar within the first through-hole, forming a complete encapsulation structure over the first metal pillar and the substrate, ensuring airtightness.

[0146] The first to eleventh steps above can be deleted or recombined according to actual needs.

[0147] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some of the technical features thereof can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A radio frequency microwave circuit board, characterized in that: include: A substrate is provided with a first through hole penetrating the upper surface and the lower surface of the substrate, wherein the first through hole of the substrate is filled with metal, and the metal in the first through hole is recorded as a first metal column; A front dielectric layer is provided on the upper surface of the substrate by hot pressing; The front dielectric layer is provided with a second through hole and a third through hole penetrating the upper surface and the lower surface of the front dielectric layer, the second through hole is filled with metal, the metal in the second through hole is recorded as a second metal column, and the second metal column is connected to the first metal column; A first chip is disposed on the upper surface of the substrate, and within the third through hole, a pad of the first chip is connected to at least one second metal pillar via a bonding wire; The second chip is arranged on the upper surface of the front dielectric layer, and the pad of the second chip is connected to at least one second metal column through a bonding wire.

2. The radio frequency microwave circuit board according to claim 1, wherein: When at least two first chips are provided on the upper surface of the substrate, and the at least two first chips need to be connected via a resistor, the radio frequency microwave circuit board further includes: The resistance layer is arranged between the two first chips that need to be connected through the resistance on the substrate, and is respectively connected to the two first chips that need to be connected through the resistance.

3. The radio frequency microwave circuit board according to claim 1, wherein: The radio frequency microwave circuit board also includes: a first front seed layer, disposed between the substrate and the front dielectric layer and located in a first predetermined area on the substrate and an inner sidewall of the first through-hole, wherein the first front seed layer in the first predetermined area is used to dispose a first chip, wherein a filled metal is connected to the first through-hole through the first front seed layer; A second front seed layer is arranged in a first preset area on the front dielectric layer and on the inner side wall of the second through hole. The second front seed layer in the first preset area on the front dielectric layer is used to set the second chip, wherein the filled metal is connected to the second through hole through the second front seed layer.

4. The radio frequency microwave circuit board according to claim 3, wherein: The radio frequency microwave circuit board also includes: a first front conductor layer, disposed between the first front seed layer and the front dielectric layer and located on the first front seed layer, wherein a first region of the first front conductor layer is used for arranging a first chip, and a second region of the first front conductor layer is used for thickening the first metal pillar; The second front conductive layer is disposed on the second front seed layer. The first region of the second front conductive layer is used for arranging the second chip. The second region of the second front conductive layer is used for thickening the second metal pillar.

5. The radio frequency microwave circuit board according to claim 1, wherein: A signal shielding structure formed by a circle of other second metal pillars is further provided around the periphery of the second metal pillar connected to the pad of the first chip; A signal shielding structure formed by a circle of other second metal pillars is further provided around the periphery of the second metal pillar connected to the pad of the second chip.

6. The radio frequency microwave circuit board according to claim 1, wherein: The radio frequency microwave circuit board also includes: A back dielectric layer is provided on the back side of the substrate by hot pressing, and a fourth through hole is provided on the back dielectric layer, which penetrates the upper surface and the lower surface of the back dielectric layer. The fourth through hole is filled with metal, and the metal in the fourth through hole is recorded as a fourth metal column, and the fourth metal column is connected to the first metal column.

7. A method for preparing a radio frequency microwave circuit board, characterized in that: include: preparing a first through hole on a substrate, wherein the first through hole passes through the upper surface and the lower surface of the substrate; injecting metal into the first through hole of the substrate and solidifying the metal to form a first metal column penetrating the upper surface and the lower surface of the substrate; Hot-pressing a front dielectric layer on the upper surface of the substrate, and preparing a second through hole on the front dielectric layer that penetrates the upper and lower surfaces of the front dielectric layer, wherein the second through hole is connected to the first through hole; injecting metal into the second through hole of the front dielectric layer to form a second metal column penetrating the upper surface and the lower surface of the front dielectric layer; preparing a third through hole on the front dielectric layer that penetrates the upper surface and the lower surface of the front dielectric layer; Installing the first chip in the third through hole and at a position reserved for the first chip on the substrate, and connecting the pad of the first chip to the second metal column via a bonding wire; A second chip is installed on the front dielectric layer at a location reserved for the second chip, and a pad of the second chip is connected to the second metal column via a bonding wire.

8. The method for preparing a radio frequency microwave circuit board according to claim 7, wherein: Before injecting metal into the first through hole of the substrate, the method further includes: depositing a first front seed layer on the front surface of the substrate and the inner sidewall of the first through hole; When injecting metal into the first through hole of the substrate, the method further comprises: A first front conductor layer is deposited on the first front seed layer, wherein a first region of the first front conductor layer is reserved for arranging a first chip, and a second region of the first front conductor layer is used to thicken the first metal pillar.

9. The method for preparing a radio frequency microwave circuit board according to claim 8, wherein: After depositing a first front conductor layer on the first front seed layer, the method further includes: removing the first front seed layer on the substrate except for the first front conductor layer and the reserved position for the resistor layer to obtain the resistor layer; The resistance value of the resistor layer is adjusted by a laser resistor trimmer.

10. The method for preparing a radio frequency microwave circuit board according to claim 7, wherein: When hot pressing the front dielectric layer on the upper surface of the substrate, the method further includes: hot pressing a back dielectric layer on the lower surface of the substrate; Correspondingly, after the back dielectric layer is hot-pressed on the lower surface of the substrate, a fourth through hole is prepared on the back dielectric layer, the fourth through hole penetrating the upper and lower surfaces of the back dielectric layer, and the fourth through hole is connected to the first through hole below the first through hole; Metal is injected into the fourth through hole to form a fourth metal column penetrating the upper surface and the lower surface of the back dielectric layer.

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