Semiconductor structure and method of forming the same

Abstract

The present application relates to a semiconductor structure and a method for forming the same, the semiconductor structure comprising: a first substrate, a surface of the first substrate having a patterned region, a device pattern being formed in the patterned region; a second substrate, the second substrate being bonded to the surface of the first substrate by a support structure, the support structure being bonded to the first substrate and / or the second substrate by an adhesive, the support structure being arranged around the patterned region such that a cavity is formed between the first substrate and the second substrate, the patterned region being located in the cavity; the surface of the first substrate further having a barrier dam structure located in the cavity, the barrier dam structure having a certain height, the barrier dam structure being located between the support structure and the patterned region, the barrier dam structure being in a closed pattern and being arranged around the patterned region to block the adhesive overflowing from between the first substrate and the second substrate. The performance of the semiconductor structure is not affected by the adhesive overflow during the bonding process.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a semiconductor structure and a forming method thereof. BACKGROUND

[0002] Some manufacturing processes of semiconductor wafers, such as TSV (Through Silicon Via) process of CIS (MOS Image Sensor), contain a bonding process, in which two wafers or one wafer and one substrate are bonded into an integrated wafer to form a product function, and in some processes, a cavity is also formed. In this process, the bonding process needs to use some adhesive materials to make the two materials to be bonded well combined together. Most of the adhesive materials are in liquid state, and the dosage needs to be strictly controlled. If the control is wrong or difficult, the adhesive material will overflow into the cavity between the two wafers, and then flow into the chip pattern on the wafer, for example, the image sensor unit is covered by the adhesive material, which affects the product performance and yield.

[0003] How to avoid the overflow of the adhesive material to the chip pattern in the bonding process is a problem to be solved at present. SUMMARY

[0004] The technical problem to be solved by the present application is to provide a semiconductor structure and a forming method thereof to avoid the influence of the overflow of the adhesive material on the product performance in the bonding process.

[0005] In order to solve the above problems, the present application provides a semiconductor structure, which comprises: a first substrate, the surface of the first substrate has a pattern area, and a device pattern is formed in the pattern area; a second substrate, the second substrate is bonded to the surface of the first substrate through a support structure, the support structure is bonded to the first substrate and / or the second substrate through adhesive, the support structure is arranged around the pattern area to form a cavity between the first substrate and the second substrate, and the pattern area is located in the cavity; and the surface of the first substrate is further provided with a blocking dam structure with a certain height in the cavity, the blocking dam structure is located between the support structure and the pattern area, and is arranged around the pattern area in a closed pattern to block the adhesive overflowed from the first substrate and the second substrate.

[0006] Optionally, the support structure is formed on the surface of the first substrate, and the second substrate is bonded to the top of the support structure through adhesive.

[0007] Optionally, the support structure is formed on the second substrate surface, and the support structure is bonded to the first substrate surface by adhesive.

[0008] Optionally, the barrier dam structure comprises one barrier dam in a closed loop pattern.

[0009] Optionally, the barrier dam structure comprises two or more barrier dams in a closed loop pattern, and adjacent barrier dams are spaced apart.

[0010] Optionally, the device pattern comprises at least one of a convex pattern and a concave pattern.

[0011] Optionally, the barrier dam structure has a height that is the same as or higher than a height of the device pattern.

[0012] Optionally, the first substrate has a plurality of pattern regions and a plurality of barrier dam structures, and each of the pattern regions is surrounded by the barrier dam structures and the support structure.

[0013] The technical scheme of the present application further provides a method for forming a semiconductor structure, comprising the following steps: providing a first substrate, wherein a pattern region is formed on a surface of the first substrate, a device pattern is formed in the pattern region, and a barrier dam structure with a certain height is arranged on the surface of the first substrate, the barrier dam structure is in a closed pattern, and surrounds the pattern region; providing a second substrate; bonding the second substrate to the surface of the first substrate by a support structure, so that a cavity is formed between the first substrate and the second substrate, the pattern region and the barrier dam structure are located in the cavity, the support structure is bonded to the first substrate and / or the second substrate by adhesive, the support structure is located at the periphery of the barrier dam structure, and surrounds the pattern region.

[0014] Optionally, the support structure is formed on the surface of the first substrate, adhesive is applied on the top of the support structure, and the second substrate is bonded to the top of the support structure by the adhesive; or the support structure is formed on the surface of the second substrate, adhesive is applied on the top of the support structure, and the top of the support structure is bonded to the first substrate by the adhesive.

[0015] Optionally, the barrier dam structure comprises one barrier dam in a closed loop pattern.

[0016] Optionally, the barrier dam structure comprises two or more barrier dams in a closed loop pattern, and adjacent barrier dams are spaced apart.

[0017] Optionally, the device pattern comprises at least one of a convex pattern and a concave pattern.

[0018] Optionally, the height of the barrier dam structure is the same as or greater than the height of the device pattern.

[0019] Optionally, when the height of the barrier dam structure is the same as the height of the device pattern, the barrier dam structure and the device pattern are formed simultaneously.

[0020] Optionally, a plurality of pattern regions and a plurality of barrier dam structures are formed on the first substrate, and each of the pattern regions is surrounded by the barrier dam structures and the support structures.

[0021] The forming method of the semiconductor structure of the present application prevents the overflowed adhesive from affecting the device pattern and improves the yield of the product by blocking the overflowed adhesive with the barrier dam structure located at the periphery of the pattern region during the pressing of the two substrates. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figures 1a-1b Fig. 1 is a structure diagram of the prior art in which the overflowed adhesive covers the chip pattern.

[0023] Figures 2a-3b Fig. 2 is a structure diagram of the forming process of the semiconductor structure of one embodiment of the present application.

[0024] Figures 4-5 Fig. 3 is a structure diagram of the forming process of the semiconductor structure of one embodiment of the present application. DETAILED DESCRIPTION

[0025] As described in the background, in the prior art, the adhesive easily overflows during the pressing and fixing process of the two wafers, which affects the performance of the chip on the wafer surface.

[0026] Please refer to Figure 1a and Figure 1b Fig. 1 is a structure diagram of the prior art in which the overflowed adhesive covers the chip pattern during the pressing process. In the figure, Figure 1a Fig. 1A is a top view (the second wafer 120 is not shown); Figure 1b Fig. 1B is a sectional view.

[0027] The second wafer 120 is pressed on the surface of the first wafer 110, the surface of the first wafer 110 is formed with a chip pattern 111, the support structure 130 is formed between the first wafer 110 and the second wafer 120, which surrounds the region where the chip pattern 111 is located, so that the first wafer 110 and the second wafer 120 form a cavity 140, and the chip pattern 111 is located in the cavity 140. The top of the support structure 130 and the second wafer 120 are bonded by an adhesive layer 131.

[0028] Since the adhesive is liquid before curing, part of the adhesive will overflow into the cavity 140 and cover the chip pattern 111 on the edge during the pressing process, thereby affecting the product performance.

[0029] To solve the above problem, the inventors propose a new method for forming a semiconductor structure to avoid the overflow of the adhesive during the pressing process from affecting the product performance.

[0030] The following detailed description of the semiconductor structure and the method for forming the semiconductor structure according to the present application is provided in conjunction with the accompanying drawings.

[0031] Please refer to Figures 2a-3b , which is a structural schematic diagram of the forming process of the semiconductor structure according to an embodiment of the present application.

[0032] Please refer to Figure 2a and Figure 2b , a first substrate 200 is provided, the surface of the first substrate 200 has a pattern area, a device pattern 201 is formed in the pattern area, a barrier dam structure 210 with a certain height is arranged on the surface of the first substrate 200, and a support structure 220 is arranged around the periphery of the barrier dam structure 210 to surround the pattern area and form a closed pattern. Figure 2a is a top view of the first substrate 200, Figure 2b is a sectional view, in which only part of the device pattern 201 is shown.

[0033] The first substrate 200 can include a semiconductor substrate such as monocrystalline silicon, silicon-on-insulator, etc., and can also include a dielectric layer, a metal connection layer, etc. on the surface of the semiconductor substrate. The first substrate 200 can be a wafer on which a plurality of chips are formed, the surface of the first substrate 200 has a chip pattern, and the chip pattern includes a plurality of device patterns. The device pattern 201 can be a protruding pattern structure or a recessed pattern structure, and can be one or more of a rectangular, circular, square, or polygonal pattern, such as a long strip, a groove, a via, etc. In some embodiments, the device pattern 201 can be a pixel array pattern of an image sensor. In this embodiment, the device pattern 201 is a protruding pattern.

[0034] The support structure 220 surrounds the pattern area where the device pattern 201 is located and is used to support a second substrate to be pressed on the first substrate 200, thereby forming a cavity between the first substrate 200 and the second substrate, so that the device pattern 201 is located in the cavity.

[0035] The barrier dam structure 210 is located between the patterned region and the support structure 220. In this embodiment, the barrier dam structure 210 only includes one barrier dam in a closed loop pattern, which is a single-layered fence shape and is arranged around the patterned region to form a closed pattern. In this embodiment, the area surrounded by the barrier dam structure 210 is rectangular, and in other embodiments, other closed patterns such as a circle, a polygon, or the like can be formed according to the distribution of the device pattern 201 on the first substrate 200. The distance between the barrier dam structure 210 and the support structure 220 can be in the range of 1 μm to 1000 μm, which can be set according to the actual material resolution capability and space to ensure that there is enough space between the barrier dam structure 210 and the support structure 220 to accommodate the overflowed glue.

[0036] In this embodiment, the device pattern 201 is a convex pattern structure, and the height of the barrier dam structure 210 can be the same as or higher than that of the device pattern 201.

[0037] In one embodiment, the barrier dam structure 210 can also be located in the same lithography layer as the device pattern 201, and the barrier dam structure 210 can be formed at the same time as the device pattern 201 is formed on the surface of the first substrate 200 by an etching process without adding a process step. In this case, the height of the device pattern 201 is the same as that of the barrier dam structure 210.

[0038] In other embodiments, the barrier dam structure 210 can be formed separately, and the height of the barrier dam structure 210 is greater than that of the device pattern 201.

[0039] Please refer to Figure 3a and Figure 3b The adhesive 301 is applied on the top of the support structure 220, and the second substrate 300 is pressed against the top of the support structure 220 and is fixed by the adhesive 301. The support structure 220 is arranged around the patterned region to form a cavity 302 between the first substrate 200 and the second substrate 300, and the device pattern 201 and the barrier dam structure 210 are located in the cavity 302.

[0040] The second substrate 300 can be a semiconductor substrate such as a wafer, or other substrates such as glass, plastic plate, and the like. In this embodiment, the device pattern formed on the first substrate 200 is an image sensing unit, and the second substrate 300 is glass.

[0041] In the embodiment, the device patterns 201 are all convex patterns, and the height of the barrier dam structure 210 is the same as the height of the device patterns. The barrier dam structure 210 and the device patterns 201 can be located in the same photoetching layer, and can be formed simultaneously in the process of forming the device patterns 201 by photoetching or etching process. The barrier dam structure 210 and the device patterns 201 can be obtained by etching the semiconductor substrate or etching a material layer such as an epitaxial layer or a dielectric layer on the surface of the semiconductor substrate.

[0042] In other embodiments, the height of the barrier dam structure 210 can also be higher than the height of the device patterns 201, so as to further improve the blocking effect on the adhesive 301. At this time, the barrier dam structure 210 can be formed separately. Specifically, after the device patterns 201 are formed, a barrier material layer covering the first substrate 200 and the device patterns 201 is formed, and then the barrier material layer is etched to form the barrier dam structure 210.

[0043] The liquid adhesive 301 is coated on the top of the support structure 220, and the second substrate 300 is pressed against the support structure 220 towards the first substrate 200. The liquid adhesive 301 will overflow and enter the cavity between the first substrate 200 and the second substrate 300 under pressure. Part of the adhesive 301 will also overflow to the outside of the support structure 220 (not shown in the figure).

[0044] Since the barrier dam structure 210 is arranged at the periphery of the pattern area where the device patterns 201 are located, it can block the overflow of the adhesive and prevent the adhesive 301 from entering the area where the device patterns 201 are located.

[0045] In addition, since the overflowed adhesive 301 covers at least part of the side wall of the support structure 220 and at least part of the side wall of the barrier dam structure 210, the contact area between the adhesive 301 and the first substrate 200 is increased, so that the bonding strength between the first substrate 200 and the second substrate 300 can be further improved, and the reliability of the semiconductor structure can be improved.

[0046] In other embodiments, the support structure 220 can also be formed on the surface of the second substrate 300. At this time, during the pressing process, the adhesive is coated on the top of the support structure 220 on the second substrate 300, and then the second substrate 300 is pressed against the surface of the first substrate 200, and the support structure 220 is located at the periphery of the barrier dam structure 210. During the pressing process, the overflowed adhesive climbs along the side wall of the support structure and the barrier dam structure 210, and the barrier dam structure 210 can still block the adhesive from entering the area where the device patterns 201 are located.

[0047] In other embodiments, the electrical connection between the first substrate 200 and the second substrate 300 can be formed after the two substrates are bonded together, for example, a wiring layer can be formed on the back surface of the first substrate 200, and the electrical connection structure on the second substrate 300 can be connected to the wiring layer on the back surface of the first substrate 200 by wire bonding process, or the electrical connection between the two substrates can be achieved by vertical metal vias, etc. In other embodiments, the electrical connection between the first substrate 200 and the second substrate 300 can also not be formed. Those skilled in the art can reasonably design according to the specific product requirements, which will not be described here.

[0048] The method for forming the semiconductor structure described above can prevent the overflowed adhesive from affecting the device pattern by the blocking dam structure located at the periphery of the pattern area during the bonding of the two substrates, thereby improving the reliability of the semiconductor structure.

[0049] In other embodiments, a plurality of pattern areas and a plurality of blocking dam structures can be formed on the first substrate, and each of the pattern areas is surrounded by the blocking dam structure and the support structure. For example, the first substrate and the second substrate are both wafers, a plurality of chip structures are formed on the first substrate, and adjacent chip structures are isolated by the support structure. After the second substrate is bonded to the first substrate, a plurality of cavities are formed, and each cavity has a chip structure.

[0050] Please refer to Figures 4-5 for the structural schematic diagram of the forming process of the semiconductor structure of another embodiment of the present application.

[0051] Please refer to Figure 4 In this embodiment, the blocking dam structure on the surface of the first substrate 200 includes two blocking dams with a certain spacing and nested arrangement, which are blocking dam 401 and blocking dam 402.

[0052] In the case of more overflowed adhesive, the single fence structure of the blocking dam structure 201 shown in Figure 3a will not be able to completely block the overflowed adhesive, and part of the overflowed adhesive will overflow from the space between the blocking dam structure 201 and the support structure 220 to the area where the device pattern 201 is located.

[0053] In order to further improve the blocking effect of the overflowed adhesive, the blocking dam structure in this embodiment includes two fence-shaped blocking dams 401 and 402, which can double-block the overflowed adhesive.

[0054] In other embodiments, the barrier dam structure can further include three or more barrier dams arranged in a nested manner. The spacing between adjacent barrier dams can range from 1 μm to 1000 μm, depending on the material resolution capability and space available to accommodate the overflow of the adhesive.

[0055] Referring to Figure 5 An adhesive 501 is applied on top of the support structure 220, and the second substrate 300 is bonded to the top of the support structure 220 by the adhesive 501. The support structure 220 is arranged around the patterned region such that a cavity 502 is formed between the first substrate 200 and the second substrate 300, and the device pattern 201 and the barrier dam structure 210 are located in the cavity 502.

[0056] The embodiments of the present application further provide a semiconductor structure.

[0057] Referring to Figure 3a and Figure 3b FIG. 1 is a schematic diagram of a semiconductor structure according to an embodiment of the present application.

[0058] In this embodiment, the semiconductor structure includes a first substrate 200 having a patterned region on its surface, and a device pattern 201 formed in the patterned region. A second substrate 300 is bonded to the surface of the first substrate 200 by a support structure 220. The support structure 220 is bonded to the first substrate 200 and / or the second substrate 300 by an adhesive 301. The support structure 220 is arranged around the patterned region such that a cavity 302 is formed between the first substrate 200 and the second substrate 300, and the patterned region is located in the cavity 302. The first substrate 200 further has a barrier dam structure 210 located in the cavity 302 and having a certain height. The barrier dam structure 210 is located between the support structure 220 and the patterned region, and forms a closed pattern around the patterned region to block the overflow of the adhesive from between the first substrate 200 and the second substrate 300.

[0059] In one embodiment, the support structure 220 is formed on the surface of the first substrate 200, and the second substrate 300 is bonded to the top of the support structure 220 by the adhesive 301.

[0060] In another embodiment, the support structure 220 is formed on the surface of the second substrate 300, and the support structure 300 is bonded to the surface of the first substrate 200 by the adhesive.

[0061] The device pattern 201 on the surface of the first substrate 200 includes at least one of a convex pattern and a concave pattern, and can be one or more of a rectangular pattern, a circular pattern, a polygonal pattern, or the like, such as a long strip, a groove, a through hole, or the like. In some embodiments, the device pattern 201 can be a pixel array pattern of an image sensor.

[0062] In this embodiment, the barrier dam structure 210 is a single-layer fence that surrounds the pattern region to form a closed pattern. In this embodiment, the region surrounded by the barrier dam structure 210 is rectangular, and in other embodiments, other closed patterns such as a circular pattern, a polygonal pattern, or the like can be formed according to the distribution of the device pattern 201 on the first substrate 200.

[0063] In this embodiment of the present application, the device pattern 201 is a convex pattern structure, and the barrier dam structure 210 has the same height as the device pattern 201. Further, the barrier dam structure 210 has the same height as the device pattern 201 and is located in the same photoetching layer, and can be formed at the same time.

[0064] In other embodiments, the device pattern 201 is higher than the device pattern 201 to improve the barrier effect on the adhesive 301.

[0065] Please refer to Figure 5 for a structural schematic diagram of a semiconductor structure according to another embodiment of the present application.

[0066] In this embodiment, the barrier dam structure on the surface of the first substrate 200 includes two barrier dams that are arranged in a sleeved manner with a certain spacing, namely, a barrier dam 401 and a barrier dam 402, both of which are in the shape of a fence and can double-block the overflowed adhesive.

[0067] In other embodiments, the barrier dam structure can further include three or more barrier dams arranged in a sleeved manner. The spacing between adjacent barrier dams can be in the range of 1 μm to 1000 μm, and is set according to the actual material resolution capability and space, so that there is enough space between adjacent barrier dams to accommodate the overflowed adhesive.

[0068] In other embodiments, a plurality of pattern regions and a plurality of barrier dam structures can be formed on the first substrate, and each of the pattern regions is surrounded by the barrier dam structure and the support structure. For example, the first substrate and the second substrate are both wafers, a plurality of chip structures are formed on the first substrate, adjacent chip structures are isolated by the support structure, and the second substrate is pressed against the first substrate to form a plurality of cavities, each of which has a chip structure.

[0069] The above merely describes the preferred embodiments of the present application, and it should be pointed out that, for those skilled in the art, several improvements and refinements can be made without departing from the principles of the present application, and these improvements and refinements should also be considered as falling within the protection scope of the present application.

Claims

1. A semiconductor structure, characterized by, The application relates to a device structure, comprising: a first substrate, a surface of the first substrate having a pattern region, a device pattern being formed in the pattern region; a second substrate, the second substrate being bonded to the surface of the first substrate by a support structure, the support structure being bonded to the first substrate and / or the second substrate by adhesive, the support structure being arranged around the pattern region so that a cavity is formed between the first substrate and the second substrate, the pattern region being located in the cavity; the surface of the first substrate further having a barrier dam structure with the same height as the device pattern, the barrier dam structure being located in the cavity, the barrier dam structure and the device pattern being located in the same photoetching layer, the barrier dam structure and the device pattern being formed simultaneously in the same etching process, the barrier dam structure being located between the support structure and the pattern region, the barrier dam structure being a closed pattern and being arranged around the pattern region to block the adhesive overflowing from between the first substrate and the second substrate.

2. The semiconductor structure of claim 1, wherein, The support structure is formed on the surface of the first substrate, and the second substrate is bonded to the top of the support structure by adhesive.

3. The semiconductor structure of claim 1, wherein, The support structure is formed on the surface of the second substrate, and the support structure is bonded to the surface of the first substrate by adhesive.

4. The semiconductor structure of claim 1, wherein, The barrier dam structure comprises a closed-loop pattern barrier dam.

5. The semiconductor structure of claim 1, wherein, The barrier dam structure comprises two or more barrier dams arranged in a closed-loop pattern, and the adjacent barrier dams have a certain spacing.

6. The semiconductor structure of claim 1, wherein, The device pattern comprises at least one of a convex pattern and a concave pattern.

7. The semiconductor structure of claim 1, wherein, The first substrate has a plurality of pattern regions and a plurality of barrier dam structures, and each of the pattern regions is surrounded by the barrier dam structure and the support structure.

8. A method of forming a semiconductor structure, comprising: The application relates to a device structure, comprising: a first substrate, a surface of the first substrate having a pattern region, a device pattern being formed in the pattern region; a second substrate, the second substrate being bonded to the surface of the first substrate by a support structure, the support structure being bonded to the first substrate and / or the second substrate by adhesive, the support structure being arranged around the pattern region so that a cavity is formed between the first substrate and the second substrate, the pattern region being located in the cavity; the surface of the first substrate further having a barrier dam structure with the same height as the device pattern, the barrier dam structure being located in the cavity, the barrier dam structure and the device pattern being located in the same photoetching layer, the barrier dam structure and the device pattern being formed simultaneously in the same etching process, the barrier dam structure being a closed pattern and being arranged around the pattern region to block the adhesive overflowing from between the first substrate and the second substrate.

9. The method of forming of claim 8, wherein, The support structure is formed on the surface of the first substrate, and the second substrate is bonded to the top of the support structure by adhesive.

10. The method of forming of claim 8, wherein, The support structure is formed on the surface of the second substrate, and the support structure is bonded to the surface of the first substrate by adhesive. The barrier dam structure comprises a closed-loop pattern barrier dam. The barrier dam structure comprises two or more barrier dams arranged in a closed-loop pattern, and the adjacent barrier dams have a certain spacing. The device pattern comprises at least one of a convex pattern and a concave pattern. The first substrate has a plurality of pattern regions and a plurality of barrier dam structures, and each of the pattern regions is surrounded by the barrier dam structure and the support structure.

11. The method of forming of claim 8, wherein, The barrier dam structure comprises two or more barrier dams arranged in a closed loop pattern.

12. The method of forming of claim 8, wherein, The device pattern comprises at least one of a convex pattern and a concave pattern.

13. The method of forming of claim 8, wherein, A plurality of pattern regions and a plurality of barrier dam structures are formed on the first substrate, and each of the pattern regions is surrounded by the barrier dam structures and the support structures.

Images