Gallium nitride semiconductor device and its packaging method
Through embedded packaging technology, the transistor and diode are connected by glass-through hole or through silicon-through hole technology, the problem of large parasitic effects in traditional packaging methods is solved, and area reduction and performance improvement is achieved.
Patent Information
- Application Number
- CN202010162714.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-03-10
- Publication Date
- 2025-07-11
- Estimated Expiration
- 2040-03-10
AI Technical Summary
The traditional gallium nitride semiconductor device packaging method leads to large parasitic effects, increased losses, and large area occupancy, which is not conducive to device performance and system design.
Embedded packaging technology is used to paste transistors and diode chips back to back together, and electrical connection is achieved through glass through holes or through silicon through holes to reduce parasitic inductance and resistance, and make full use of the area on both front and back sides of the chip.
It effectively reduces the parasitic inductance and resistance, reduces the area of a single chip, improves the fast switching performance of the device and the compactness of the system design.
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Figure CN111244074B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor devices, and more particularly to a gallium nitride semiconductor device and its packaging method. Background Art
[0002] In a bridge circuit, a gallium nitride high electron mobility transistor (GaN HEMT) and a diode are usually anti-parallel connected to form a bridge arm, and the diode functions as a freewheeling diode. The traditional packaging method is to package these two chips in two packages respectively and then realize electrical connection using a PCB (printed circuit board) externally, or to place them in parallel and package them in one package, and use leads to realize electrical connection.
[0003] Both of the above two packaging forms will additionally introduce relatively large parasitic effects, which are not conducive to the fast switching of the device, resulting in increased losses and affecting the performance of the device. Moreover, the packages made by the traditional packaging method occupy a relatively large area, which is not conducive to system design. Summary of the Invention
[0004] The first object of the present invention is to provide a gallium nitride semiconductor device that can reduce parasitic inductance and parasitic resistance and can reduce the area of a single chip.
[0005] The second object of the present invention is to provide a packaging method for the above gallium nitride semiconductor device.
[0006] The third object of the present invention is to provide another packaging method for the above gallium nitride semiconductor device.
[0007] To achieve the above first object, the present invention provides a gallium nitride semiconductor device, including a transistor, a diode, a sealing material, a first electrical interconnect and a second electrical interconnect. The transistor includes a first substrate, a gate, a source and a drain, and the gate, the source and the drain are all located on the front surface of the first substrate. The diode includes a second substrate, an anode and a cathode, and at least one of the anode and the cathode is located on the front surface of the second substrate. The back surface of the first substrate is bonded and fixed to the back surface of the second substrate. The sealing material at least partially wraps the transistor and the diode. The first electrical interconnect electrically connects the source to the anode, and the second electrical interconnect electrically connects the drain to the cathode. At least one of the first electrical interconnect and the second electrical interconnect passes through the sealing material.
[0008] A preferred solution is that the diode is a lateral PN junction diode or a gallium nitride diode.
[0009] A further solution is that two through-glass vias are formed in the sealing material, the first electrical interconnect is located in one through-glass via, and the second electrical interconnect is located in the other through-glass via.
[0010] A preferred solution is that the first substrate and the second substrate are bonded and fixed by insulating glue or solder paste.
[0011] A preferred solution is that the diode is a vertical PN junction diode.
[0012] A further solution is that through-glass vias are provided in the sealing material, the first electrical interconnect is located in the through-glass vias, through-silicon vias are provided in the transistor, and the second electrical interconnect is located in the through-silicon vias.
[0013] A still further solution is that a first metal layer is provided on the back surface of the first substrate, and the first metal layer is electrically connected to the drain through the second electrical interconnect. A second metal layer electrically connected to the first metal layer is provided on the back surface of the second substrate, and the second metal layer is electrically connected to the cathode.
[0014] A further solution is that the first metal layer and the second metal layer are bonded and fixed by conductive glue.
[0015] A still further solution is that the second metal layer and the drain are electrically connected through the second electrical interconnect.
[0016] To achieve the above second object, the present invention provides a packaging method for a gallium nitride semiconductor device. The packaging method includes: bonding and fixing the back surface of the first substrate and the back surface of the second substrate; bonding the front surface of the first substrate to the first liner by insulating glue; filling a sealing material between the first liner and the second liner, and wrapping the sealing material around the transistor and the diode; removing the first liner and the second liner, forming a plurality of first electrode holes in the insulating glue, forming a plurality of second electrode holes on the side of the sealing material close to the diode, and forming two through-glass vias in the sealing material; electroplating copper in the first electrode holes, the second electrode holes and the through-glass vias, the electroplated copper in the first electrode holes forms the gate, source and drain, the electroplated copper in the second electrode holes forms the anode and cathode, and the electroplated copper in the through-glass vias forms the first electrical interconnect and the second electrical interconnect; printing a solder mask layer.
[0017] To achieve the above third objective, the present invention provides a packaging method for a gallium nitride semiconductor device, and the packaging method includes: forming a through-silicon via on a transistor, and forming a second electrical interconnect in the through-silicon via by electroplating; electroplating copper on the back surface of a first substrate to form a first metal layer electrically connected to the second electrical interconnect, and electroplating copper on the back surface of a second substrate to form a second metal layer; bonding and fixing the first metal layer and the second metal layer together with a conductive adhesive; bonding the front surface of the first substrate to a first liner with an insulating adhesive; filling a sealing material between the first liner and a second liner, and wrapping the sealing material around the transistor and the diode; removing the first liner and the second liner, forming a plurality of first electrode holes in the insulating adhesive, forming a second electrode hole on the side of the sealing material close to the diode, and forming a through-glass via in the sealing material; electroplating copper in the first electrode holes, the second electrode hole, and the through-glass via, the electroplated copper in the first electrode holes forms a gate, a source, and a drain, the electroplated copper in the second electrode hole forms an anode, and the electroplated copper in the through-glass via forms a first electrical interconnect; printing a solder mask layer.
[0018] The beneficial effect of the present invention is that after the transistor wafer and the diode wafer are thinned and diced, they are packaged in the form of an embedded package. During the process of the embedded package, a single transistor and a diode chip are pasted back to back, and the electrodes on the upper and lower sides of the gallium nitride semiconductor device are electrically connected by using the through glass via (TGV) technology or the through silicon via (TSV) technology. This gallium nitride semiconductor device can reduce parasitic inductance and parasitic resistance, make full use of the areas on both sides of the chip, and is beneficial to reducing the area of a single chip. Description of the Drawings
[0019] Figure 1 It is a schematic structural diagram of a first embodiment of the gallium nitride semiconductor device of the present invention.
[0020] Figure 2 It is a schematic structural diagram of a second embodiment of the gallium nitride semiconductor device of the present invention.
[0021] Figure 3 It is a schematic structural diagram of a third embodiment of the gallium nitride semiconductor device of the present invention.
[0022] The present invention will be further described below in conjunction with the drawings and embodiments. Detailed Embodiments
[0023] First Embodiment of Gallium Nitride Semiconductor Device
[0024] Refer to Figure 1, the gallium nitride semiconductor device of this embodiment includes a transistor 1, a diode 2, a sealing material 3, a first electrical interconnect 4, and a second electrical interconnect 5. The transistor 1 is a gallium nitride high electron mobility transistor (GaN HEMT).
[0025] The transistor 1 includes a first substrate 11, a gate (not shown), a source electrode 13, and a drain electrode 14. The gate, the source electrode 13, and the drain electrode 14 are all located on the front surface 111 of the first substrate 11.
[0026] The diode 2 is a lateral PN junction diode. The diode 2 includes a second substrate 21, an anode 22, and a cathode 23. The anode 22 and the cathode 23 are both located on the front surface 211 of the second substrate 21. The back surface 112 of the first substrate 11 and the back surface 212 of the second substrate 21 are bonded and fixed by an insulating adhesive 6 or solder paste.
[0027] The sealing material 3 at least partially wraps the transistor 1 and the diode 2. The first electrical interconnect 4 electrically connects the source electrode 13 and the anode 22, and the second electrical interconnect 5 electrically connects the drain electrode 14 and the cathode 23. Both the first electrical interconnect 4 and the second electrical interconnect 5 pass through the sealing material 3.
[0028] Through-glass vias 31 (TGV) and 32 are formed in the sealing material 3. The first electrical interconnect 4 is located in the through-glass via 31, and the second electrical interconnect 5 is located in the through-glass via 32.
[0029] The packaging method of the gallium nitride semiconductor device includes: First, bond and fix the back surface 112 of the first substrate 11 and the back surface 212 of the second substrate 21. Then, bond the front surface 111 of the first substrate 11 to the first liner by an insulating adhesive 7. Then, fill the sealing material 3 between the first liner and the second liner and wrap the sealing material 3 outside the transistor 1 and the diode 2. Then, remove the first liner and the second liner, form a plurality of first electrode holes 71 in the insulating adhesive 7, form a second electrode hole 30 on the side of the sealing material 3 close to the diode 2, and form through-glass vias 31 and 32 in the sealing material 3. Then, electroplate copper in the first electrode holes 71, the second electrode hole 30, the through-glass vias 31, and the through-glass vias 32. The electroplated copper in the first electrode holes 71 forms the gate, the source electrode 13, and the drain electrode 14. The electroplated copper in the second electrode hole 30 forms the anode 22 and the cathode 23. The electroplated copper in the through-glass via 31 forms the first electrical interconnect 4, and the electroplated copper in the through-glass via 32 forms the second electrical interconnect 5. Finally, print a solder mask layer 9.
[0030] Second embodiment of the gallium nitride semiconductor device
[0031] As an illustration of the second embodiment of the gallium nitride semiconductor device of the present invention, only the differences from the first embodiment of the above-mentioned gallium nitride semiconductor device will be described below.
[0032] See Figure 2 , in this embodiment, the diode 220 is a gallium nitride diode.
[0033] The third embodiment of the gallium nitride semiconductor device
[0034] As an illustration of the third embodiment of the gallium nitride semiconductor device of the present invention, only the differences from the first embodiment of the above-mentioned gallium nitride semiconductor device will be described below.
[0035] See Figure 3 , the diode 320 is a vertical PN junction diode, the anode 322 is located on the front surface 3211 of the second substrate 321, and the cathode 323 is located on the back surface 3212 of the second substrate 321. A through-glass via 331 (TGV) is formed in the encapsulating material 33, the first electrical interconnect 34 is located in the through-glass via 331, and the first electrical interconnect 34 passes through the encapsulating material 33 to electrically connect the source electrode 313 and the anode 322. A through-silicon via (TSV) 332 is formed in the transistor 310, and the second electrical interconnect 35 is located in the through-silicon via 332. A first metal layer 361 is provided on the back surface 3112 of the first substrate 311, and the first metal layer 361 is electrically connected to the drain electrode 314 through the second electrical interconnect 35. A second metal layer 362 electrically connected to the first metal layer 361 is provided on the back surface 3212 of the second substrate 321, the second metal layer 362 is electrically connected to the cathode 323, and the second metal layer 362 and the first metal layer 361 are bonded and fixed by a conductive adhesive 363.
[0036] The packaging method of a gallium nitride semiconductor device includes: First, a through-silicon via 332 is formed in the transistor 310, and a second electrical interconnect 35 is formed in the through-silicon via 332 by electroplating. Then, a first metal layer 361 electrically connected to the second electrical interconnect 35 is formed on the back surface 3112 of the first substrate 311, and a second metal layer 362 is formed by electroplating copper on the back surface 3212 of the second substrate 321. Then, the first metal layer 361 and the second metal layer 362 are bonded and fixed by a conductive adhesive 363. Then, the front surface 3111 of the first substrate 311 is bonded to the first liner by an insulating adhesive 37. Then, a sealing material 33 is filled between the first liner and the second liner, and the sealing material 33 is wrapped outside the transistor 310 and the diode 320. Then, the first liner and the second liner are removed, a plurality of first electrode holes 371 are formed in the insulating adhesive 37, a second electrode hole 330 is formed on one side of the sealing material 3 close to the diode 320, and a through-glass via 331 is formed in the sealing material 33. Then, copper is electroplated in the first electrode holes 371, the second electrode hole 330, and the through-glass via 331. The electroplated copper in the first electrode holes 371 forms a gate, a source 313, and a drain 314, the electroplated copper in the second electrode hole 330 forms an anode 322, and the electroplated copper in the through-glass via 331 forms a first electrical interconnect 34. Finally, a solder mask layer 39 is printed.
[0037] As can be seen from the above, after the transistor wafer and the diode wafer are thinned and diced, an embedded packaging form is adopted for packaging. In the process of the embedded packaging, a single transistor and a diode chip are pasted back to back, and the electrodes on the upper and lower sides of the gallium nitride semiconductor device are electrically connected by using the through-glass via technology or the through-silicon via technology. This gallium nitride semiconductor device can reduce the parasitic inductance and parasitic resistance, make full use of the areas on both sides of the chip, and is beneficial to reducing the area of a single chip.
[0038] Finally, it should be emphasized that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A gallium nitride semiconductor device, characterized in that, Comprising: A transistor, the transistor comprising a first substrate, a gate, a source and a drain, the gate, the source and the drain being all located on the front side of the first substrate; A diode, the diode comprising a second substrate, an anode and a cathode, at least one of the anode and the cathode being located on the front side of the second substrate, the back side of the first substrate being adhesively fixed to the back side of the second substrate; A sealing material, the sealing material at least partially wrapping the transistor and the diode; A first electrical interconnect, the first electrical interconnect electrically connecting the source to the anode; A second electrical interconnect, the second electrical interconnect electrically connecting the drain to the cathode; The diode is a vertical PN junction diode; A glass-passing through hole is formed in the sealing material, and the first electrical interconnect is located in the glass-passing through hole; A silicon-passing through hole is formed in the transistor, and the second electrical interconnect is located in the silicon-passing through hole; A first metal layer is provided on the back side of the first substrate, and the first metal layer is electrically connected to the drain through the second electrical interconnect; A second metal layer electrically connected to the first metal layer is provided on the back side of the second substrate, and the second metal layer is electrically connected to the cathode; The first metal layer and the second metal layer are adhesively fixed through a conductive adhesive.
2. A packaging method for a gallium nitride semiconductor device, characterized in that, The gallium nitride semiconductor device is the gallium nitride semiconductor device as claimed in claim 1, and the packaging method comprises: Forming a silicon-passing through hole in the transistor, and forming a second electrical interconnect in the silicon-passing through hole by electroplating; Electroplating copper on the back side of the first substrate to form a first metal layer electrically connected to the second electrical interconnect, and electroplating copper on the back side of the second substrate to form a second metal layer; Adhesively fixing the first metal layer and the second metal layer through a conductive adhesive; Adhesively bonding the front side of the first substrate to a first liner through an insulating adhesive; Filling the sealing material between the first liner and a second liner, and wrapping the sealing material outside the transistor and the diode; Removing the first liner and the second liner, forming a plurality of first electrode holes in the insulating adhesive, forming a second electrode hole on the side of the sealing material close to the diode, and forming a glass-passing through hole in the sealing material; Electroplating copper in the first electrode hole, the second electrode hole and the glass-passing through hole, the electroplated copper in the first electrode hole forms the gate, the source and the drain, the electroplated copper in the second electrode hole forms the anode, and the electroplated copper in the glass-passing through hole forms the first electrical interconnect; Printing a solder mask layer.
Citation Information
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