Bias current compensation method and compensation circuit, linear voltage stabilization circuit

Abstract

The embodiment of the present invention proposes a bias current compensation method, a bias current compensation circuit and a linear voltage regulator circuit. The compensation method obtains a sampled voltage at the output of an error amplifier, and outputs a compensation signal according to the output voltage to enhance the bias current of the linear voltage regulator circuit, thereby improving the response speed of the linear voltage regulator circuit. And because the output voltage of the sampled error amplifier is used, the circuit burden at the power tube gate is reduced, and the parasitic capacitance at the power tube gate will not be increased, so the frequency at the third pole will not be pulled down, which is conducive to maintaining the stability of the linear voltage regulator circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of linear voltage stabilization, and in particular to a bias current compensation method, a bias current compensation circuit and a linear voltage stabilization circuit. Background Art

[0002] Linear voltage regulator circuits, such as LDO (low dropout regulator), usually include an error amplifier and a power tube. Linear voltage regulator circuits generally have three poles: the first pole is at the output of the error amplifier, the second pole is at the output of the linear voltage regulator circuit, and the third pole is at the gate of the power tube. The power tube of the linear voltage regulator circuit will output voltage to supply power to the load. When the load undergoes transient changes, the output voltage will oscillate. The linear voltage regulator circuit will use feedback regulation to restore the output voltage to a normal state, but there will be a certain delay.

[0003] In order to speed up this process, a compensation circuit is usually introduced to enhance the bias current of the linear voltage regulator circuit and improve the response speed of the linear voltage regulator circuit. The traditional approach is to use a circuit connected to the gate of the power tube to sample its electrical signal, and then process the electrical signal to generate a compensation current to enhance the bias current. However, the introduction of the circuit will also increase the parasitic capacitance at the gate of the power tube, causing the frequency of the third pole to decrease. If it is as low as to fall within the system bandwidth range of the linear voltage regulator circuit or to be close to the frequency of the first pole, it will affect the stability of the linear voltage regulator circuit to a certain extent. Summary of the invention

[0004] Based on this, the present invention proposes a bias current compensation method, a bias current compensation circuit and a linear voltage stabilization circuit, which can reduce the impact on the stability of the linear voltage stabilization circuit.

[0005] In a first aspect, a bias current compensation method is proposed, comprising:

[0006] Obtaining a sampled voltage at an output terminal of an error amplifier in a linear voltage regulator circuit;

[0007] Outputting a compensation signal according to the sampled voltage;

[0008] The compensation signal is used to enhance the bias current of the linear voltage stabilization circuit.

[0009] In one embodiment, the step of outputting a compensation signal according to the sampling voltage includes: adjusting the compensation signal according to the sampling voltage, so that the compensation signal increases as the sampling voltage increases.

[0010] In one embodiment, the step of outputting a compensation signal according to the sampling voltage includes: adjusting the compensation signal according to the sampling voltage, and when the sampling voltage is higher than a preset value, allowing the compensation signal to increase as the sampling voltage increases, and when the sampling voltage is lower than or equal to the preset value, allowing the compensation signal to stabilize at a fixed value.

[0011] In one embodiment, the compensation signal is a compensation current, and using the compensation signal to enhance the bias current of the linear voltage regulator circuit is to superimpose the compensation current on the bias current; or

[0012] The compensation signal is a compensation voltage. Using the compensation signal to enhance the bias current of the linear voltage stabilization circuit is to use the compensation voltage to increase the working voltage of the bias current source, thereby increasing the bias current output by the bias current source.

[0013] Therefore, the bias current compensation method in the embodiment of the present invention obtains the sampled voltage at the output of the error amplifier, and outputs a compensation signal according to the output voltage to enhance the bias current of the linear voltage regulator circuit, thereby improving the response speed of the linear voltage regulator circuit. And because it is the output voltage of the sampled error amplifier, the circuit burden at the power tube gate is reduced, and the parasitic capacitance at the power tube gate will not be increased, so the frequency at the third pole will not be pulled down, which is conducive to maintaining the stability of the linear voltage regulator circuit.

[0014] In a second aspect, a bias current compensation circuit is proposed, comprising:

[0015] A sampling circuit, used for sampling the voltage at the output end of the error amplifier in the linear voltage regulation circuit; and

[0016] A compensation signal output circuit, wherein the input end of the compensation signal output circuit is connected to the sampling circuit, and the output end is used to connect to the bias current source of the linear voltage stabilization circuit. The compensation signal output circuit is used to access the sampling voltage provided by the sampling circuit and output a compensation signal to enhance the bias current of the bias current source.

[0017] In one embodiment, the compensation signal output circuit includes a current increasing circuit, the input end of the current increasing circuit serves as the input end of the compensation signal output circuit, the output end of the current increasing circuit serves as the output end of the compensation signal output circuit, and the current increasing circuit is used to output a compensation current as a compensation signal according to a sampling voltage, and the compensation current increases as the sampling signal increases.

[0018] In one embodiment, the current increasing circuit includes a fifth current source, a transistor MP4, a transistor MN2, and a first path to ground connected in parallel with the transistor MP4; the drain terminal of the transistor MN2 is connected to the input voltage, the gate terminal is connected to the sampling voltage as the input terminal of the compensation signal output circuit, and the source terminal is grounded; the source terminal of the transistor MP4 is connected to the output terminal of the fifth current source, the gate terminal is connected to the drain terminal of the transistor MN2, and the drain terminal serves as the output terminal of the compensation signal output circuit;

[0019] The pull-down current passing through the transistor MN2 increases as the sampling voltage increases, and the current passing through the transistor MP4 increases as the pull-down current increases; one end of the first ground path is connected to the source end of the transistor MP4, and the other end is grounded, for diverting the output current of the fifth current source from the transistor MP4.

[0020] In one embodiment, the current increasing circuit further includes a second path to ground connected in parallel with the transistor MN2; one end of the second path to ground is connected to the drain of the transistor MN2, and the other end is grounded, for maintaining the gate potential of the transistor MP4.

[0021] In one embodiment, the compensation signal output circuit also includes a transposition circuit, the input end of the transposition circuit is connected to the output end of the current increase circuit to access the compensation current, the output end of the transposition circuit is used to connect to the voltage end of the bias current source of the linear voltage stabilization circuit, and the transposition circuit is used to convert the compensation current into a compensation voltage as a compensation signal to enhance the working voltage of the bias current source and thereby enhance the bias current.

[0022] In the bias current compensation circuit of the embodiment of the present invention, the sampling circuit obtains the sampled voltage at the output of the error amplifier, and outputs a compensation signal according to the output voltage to enhance the bias current of the linear voltage regulator circuit, thereby improving the response speed of the linear voltage regulator circuit. And because it is the output voltage of the sampled error amplifier, the circuit burden at the power tube gate is reduced, and the parasitic capacitance at the power tube gate will not be increased, so the frequency of the third pole will not be pulled down, which is conducive to maintaining the stability of the linear voltage regulator circuit.

[0023] In a third aspect, a linear voltage stabilization circuit is proposed, comprising:

[0024] a linear voltage regulation subcircuit, the linear voltage regulation subcircuit comprising a bias current source and an error amplifier for generating a bias current; and

[0025] A compensation circuit is connected to the output end of the error amplifier, and is used to sample the voltage at the output end of the error amplifier and output a compensation signal according to the sampled voltage. The compensation circuit is also connected to the bias current source, and is used to enhance the bias current using the compensation signal.

[0026] In one embodiment, the linear voltage stabilization subcircuit also includes a second-stage amplifier; the bias current source includes a first current source and a second current source, both of which are connected to the compensation circuit, the first current source is used to generate a first bias current to act on the error amplifier, and the second current source is used to generate a second bias current to act on the second-stage amplifier; the compensation circuit is used to enhance the first bias current and the second bias current using the compensation signal.

[0027] In one embodiment, the linear voltage stabilization subcircuit further includes a power tube, a feedback circuit and a Miller compensation capacitor. The positive input terminal of the error amplifier is connected to a reference voltage, and the negative input terminal is connected to the output terminal of the feedback circuit, and is used to connect to the feedback voltage generated by the feedback circuit so as to adjust the output voltage of the error amplifier in a negative feedback manner; the output terminal of the error amplifier is connected to the input terminal of the second-stage amplifier, and the output terminal of the second-stage amplifier is connected to the gate of the power tube. The second-stage amplifier is used to pull down the gate potential of the power tube when the output voltage of the error amplifier increases to drive the power tube to perform power amplification. The drain of the power tube serves as the output terminal of the linear voltage stabilization subcircuit, and the output terminal of the linear sub-voltage stabilization circuit is distributed with the second pole of the linear voltage stabilization subcircuit; one end of the Miller compensation capacitor is connected to the output terminal of the linear voltage stabilization subcircuit, and the other end is connected to the negative voltage terminal of the error amplifier. The Miller compensation capacitor is used to compensate the second pole at the output of the linear voltage stabilization subcircuit through zero point compensation.

[0028] In one embodiment, the compensation circuit comprises:

[0029] a sampling circuit connected to the output end of the error amplifier and used for sampling the voltage at the output end of the error amplifier; and

[0030] A compensation signal output circuit, wherein the input end of the compensation signal output circuit is connected to the sampling circuit, and the output end is used to connect to the bias current source. The compensation signal output circuit is used to access the sampling voltage provided by the sampling circuit and output a compensation signal to enhance the bias current of the bias current source.

[0031] In one embodiment, the compensation signal output circuit includes a current increasing circuit, the input end of the current increasing circuit serves as the input end of the compensation signal output circuit, the output end of the current increasing circuit serves as the output end of the compensation signal output circuit, and the current increasing circuit is used to output a compensation current as a compensation signal according to a sampling voltage, and the compensation current increases as the sampling signal increases.

[0032] In the linear voltage stabilization circuit of the embodiment of the present invention, the compensation circuit outputs a compensation signal according to the sampled voltage at the output of the error amplifier to enhance the bias current of the linear voltage stabilization circuit, thereby improving the response speed of the linear voltage stabilization circuit, which is beneficial to maintaining the output voltage of the linear voltage stabilization circuit stable. And because it is the output voltage of the sampled error amplifier, the circuit burden at the power tube gate is reduced, and the parasitic capacitance at the power tube gate will not be increased, so the frequency at the third pole will not be pulled down, which is beneficial to maintaining the stability of the linear voltage stabilization circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0034] Figure 1 is a flow chart of a bias current compensation method in one embodiment of the present invention;

[0035] Figure 2 is a schematic structural diagram of a bias current compensation circuit in one embodiment of the present invention;

[0036] Figure 3 is a schematic structural diagram of a compensation signal output circuit in a specific embodiment of the present invention;

[0037] Figure 4 is a schematic structural diagram of a compensation signal output circuit in another specific embodiment of the present invention;

[0038] Figure 5 Schematic diagram of the structure of a linear voltage stabilizing circuit in one embodiment of the present invention. DETAILED DESCRIPTION

[0039] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] The terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish different objects rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, device, product or end including a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units inherent to these processes, methods, products or ends.

[0041] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0042] As described in the background technology, sampling the electrical signal at the gate of the power tube will increase the parasitic capacitance at the gate of the power tube, which will reduce the frequency of the third pole and affect the stability of the linear voltage regulator circuit to a certain extent. The embodiment of the present invention proposes a bias current compensation method, which can reduce the impact on the stability of the linear voltage regulator circuit.

[0043] See also Figure 1 , a bias current compensation method in one embodiment of the present invention includes steps 102 to 106:

[0044] Step 102, obtaining a sampled voltage at the output end of an error amplifier in a linear voltage regulator circuit.

[0045] The output end of the error amplifier in the linear voltage stabilization circuit is distributed with the first pole of the linear voltage stabilization circuit, and the first pole may be the main pole of the linear voltage stabilization circuit. The linear voltage stabilization circuit may be a low voltage difference linear regulator.

[0046] Step 104: output a compensation signal according to the sampled voltage.

[0047] The compensation signal can be a voltage or current signal.

[0048] In one embodiment, outputting the compensation signal according to the sampling voltage includes adjusting the compensation signal according to the sampling voltage, such that the compensation signal increases as the sampling voltage increases.

[0049] When the load at the output end of the linear voltage regulator circuit increases, the output voltage of the linear voltage regulator circuit will decrease, for example, undershoot will occur. In order to restore the output voltage, the output voltage of the error amplifier will increase, and the sampling voltage obtained from the output end of the error amplifier will also increase. The compensation signal will be enhanced accordingly, which is beneficial to the subsequent enhancement of the bias current. Therefore, when the load becomes larger, not only the compensation signal will be output, but also the compensation signal will be enhanced. The response speed of the linear voltage regulator circuit can be further improved, which is more conducive to improving the stability of the linear voltage regulator circuit.

[0050] Furthermore, when the sampling voltage is higher than a preset value, the compensation signal can be enhanced as the sampling voltage increases, and when the sampling voltage is lower than or equal to the preset value, the compensation signal can be stabilized at a fixed value. The preset value can be the voltage output value of the error amplifier when the output voltage of the linear voltage regulator circuit remains stable. In this way, when the load becomes smaller and the output voltage of the linear voltage regulator circuit increases, such as when an overshoot phenomenon occurs, causing the output voltage of the error amplifier to become lower, the compensation signal will at least not be lower than a fixed value. If the output voltage of the error amplifier is lower than the preset value, the compensation signal will remain unchanged, so the enhancement effect of the bias current can be ensured, thereby ensuring the response speed of the linear voltage regulator circuit.

[0051] Step 106: Use the compensation signal to enhance the bias current of the linear voltage regulator circuit.

[0052] Sufficient bias current can improve the response speed of the linear voltage regulator circuit, which is beneficial for the linear voltage regulator circuit to work stably in the linear range.

[0053] Regarding step 106, depending on the compensation signal, the following two bias current enhancement methods may be included:

[0054] In one embodiment, the compensation signal is a compensation current. Using the compensation signal to enhance the bias current of the linear voltage regulator circuit is to superimpose the compensation current on the bias current. The enhanced bias current can improve the response speed of the linear voltage regulator circuit.

[0055] In another embodiment, the compensation signal is a compensation voltage, the bias current is generated by a bias current source, and using the compensation signal to enhance the bias current is to apply the compensation voltage to the bias current source to enhance the operating voltage of the bias current source, thereby enhancing the bias current.

[0056] Regarding step 106, when the linear voltage stabilization circuit has more than two amplifiers, the number of bias currents can be the same as the number of amplifiers, and one bias current acts on one amplifier, so that the response speed of each amplifier is improved, which is more conducive to improving the stability of the linear voltage stabilization circuit. When the linear voltage stabilization circuit includes an error amplifier and a second-stage amplifier, the step of enhancing the bias current using the compensation signal may include: enhancing a first bias current and a second bias current using the compensation signal; wherein the first bias current acts on the error amplifier of the linear voltage stabilization circuit, and the second bias current acts on the second-stage amplifier of the linear voltage stabilization circuit.

[0057] Therefore, the bias current compensation method in the embodiment of the present invention obtains the sampled voltage at the output of the error amplifier, and outputs a compensation signal according to the output voltage to enhance the bias current of the linear voltage stabilization circuit, thereby improving the response speed of the linear voltage stabilization circuit. And because it is the output voltage of the sampled error amplifier, the circuit burden at the power tube gate is reduced, and the parasitic capacitance at the power tube gate will not be increased, so the frequency at the third pole will not be pulled down, which is conducive to maintaining the stability of the linear voltage stabilization circuit. Further, the compensation signal can also be enhanced as the sampled voltage increases, so when the load becomes larger, not only will the compensation signal be output, but the compensation signal will also be further enhanced, and the response speed of the linear voltage stabilization circuit can be further improved. When the sampled voltage is lower than the preset value, the compensation signal can be stabilized at a fixed value. In this way, when the load becomes smaller and the output voltage becomes higher, for example, when an overshoot phenomenon occurs, the output voltage of the error amplifier becomes lower, which can also ensure the enhancement effect of the bias current, thereby ensuring the response speed of the linear voltage stabilization circuit.

[0058] A bias current compensation method is provided above. Next, the present invention further provides a bias current compensation circuit, which can implement the above compensation method. Figure 2 As shown, the compensation circuit 200 includes:

[0059] The sampling circuit 210 is used to sample the voltage at the output end of the error amplifier in the linear voltage stabilization circuit 230; and

[0060] The compensation signal output circuit 220 has an input end connected to the sampling circuit 210, and an output end used to connect to the bias current source of the linear voltage regulator circuit 230. The compensation signal output circuit is used to access the sampling voltage provided by the sampling circuit 210 and output a compensation signal to enhance the bias current of the bias current source.

[0061] In the bias current compensation circuit of the embodiment of the present invention, the sampling circuit 210 obtains the sampled voltage at the output of the error amplifier, and outputs a compensation signal according to the output voltage to enhance the bias current of the linear voltage regulator circuit, thereby improving the response speed of the linear voltage regulator circuit. And because it is the output voltage of the sampled error amplifier, the circuit burden at the power tube gate is reduced, and the parasitic capacitance at the power tube gate will not be increased, so the frequency at the third pole will not be pulled down, which is conducive to maintaining the stability of the linear voltage regulator circuit.

[0062] The compensation signal may be a compensation current or a compensation voltage. The following is an embodiment of superimposing the compensation current as the compensation signal onto the bias current.

[0063] Regarding the compensation signal output circuit 220 in an embodiment of the present invention, the compensation current can be enhanced as the sampling voltage increases. In this embodiment, the compensation signal output circuit 220 includes a current increasing circuit 222, the input end of the current increasing circuit 222 serves as the input end of the compensation signal output circuit 220, and the output end of the current increasing circuit 222 serves as the output end of the compensation signal output circuit 220. The current increasing circuit 222 is used to output the compensation current as a compensation signal superimposed on the bias current source, so that the compensation signal is enhanced as the sampling signal increases. The compensation current and the bias current are superimposed as a total bias current to act on the linear voltage stabilization circuit.

[0064] like Figure 3 As shown, specifically, the current increasing circuit 222 in the compensation signal output circuit 220 includes a fifth current source IB5, a transistor MP4, a transistor MN2, and a first ground path 223 connected in parallel with the transistor MP4; the drain terminal of the transistor MN2 is connected to the input voltage, the gate terminal of the transistor MN2 is connected to the sampling voltage as the input terminal of the compensation signal output circuit, that is, the output voltage of the error amplifier in the linear voltage regulator circuit 230, and the source terminal of the transistor MN2 is grounded; the source terminal of the transistor MP4 is connected to the output terminal of the fifth current source IB5, the gate terminal is connected to the drain terminal of the transistor MN2, and the drain terminal serves as the output terminal of the current increasing circuit 222;

[0065] The pull-down current passing through the transistor MN2 increases as the sampling voltage increases, and the current passing through the transistor MP4 increases as the pull-down current increases; one end of the first ground path 223 is connected to the source end of the transistor MP4, and the other end is grounded, and is used to shunt the output current of the fifth current source IB5 from the transistor MP4. Specifically, the transistor MN2 is N-type, and the transistor MP4 is P-type, and both can be MOS tubes. Specifically, the transistor MN2 in this implementation can be used as the sampling circuit 210 or a part of the sampling circuit 210.

[0066] When the load connected to the output end of the linear voltage regulator circuit increases, the voltage at the output end of the error amplifier will increase, the sampling voltage at the gate end of the transistor MN2 will also increase, and the conduction characteristic of the N-type transistor MN2 will also be enhanced, so the pull-down current of the transistor MN2 will increase, which will pull down the gate potential of the P-type transistor MP4, thereby increasing the source-gate potential difference of the P-type transistor MP4, and the current flowing through the P-type transistor MP4 will increase, that is, the compensation current increases. In this way, when the load increases, the compensation circuit 200 still outputs a further enhanced compensation signal, so that the response speed of the linear voltage regulator circuit is further improved.

[0067] In a specific embodiment, Figure 3 As shown, the first ground path 223 includes a transistor MP3, the source end of the transistor MP3 is connected to the output end of the fifth current source IB5, the gate end of the transistor MP3 is connected to the input voltage, the drain end is grounded, and the output end of the fifth current source IB5 is connected to the input voltage. The first ground path 223 can also further include a third current source IB3, the input end of the third current source IB3 is connected to the gate end of the transistor MP3, and the output end is grounded. The introduction of the third current source IB3 can effectively prevent the connection line between the input voltage and the gate end of the transistor MP3 from forming an island ground, which is beneficial to the stability of the line, thereby improving the stability of the gate end voltage of the transistor MP3, and is beneficial to the stable conduction of the transistor MP3.

[0068] Preferably, Figure 3 As shown, the first ground path 223 further includes a resistor R1, and the gate terminal of the transistor MP3 is connected to the input voltage through the resistor R1.

[0069] Preferably, Figure 3 As shown, the drain end of the transistor MN2 can be connected to the input voltage obtained after filtering by an RC filter circuit, and the RC filter circuit is a parallel RC filter circuit, such as Figure 3 , the resistor R2 and the capacitor C0 are connected in parallel to form the RC filter circuit.

[0070] Furthermore, the current increasing circuit 222 further includes a second ground path 224 connected in parallel with the transistor MN2; one end of the second ground path 224 is connected to the drain terminal of the transistor MN2, and the other end is grounded, for maintaining the gate terminal potential of the transistor MP4.

[0071] In this embodiment, the second ground path 224 can be grounded to form a conductive path all the time. If the sampling voltage connected to the gate terminal of the transistor MN2 is too low, resulting in a pull-down current that is too low and causing the transistor MN2 to not work, because the gate terminal of the transistor MP4 can always have a potential, the transistor MP4 can be kept turned on continuously, and the transistor MP4 can continue to output a fixed compensation current, thereby ensuring the enhancement effect of the bias current and thus ensuring the response speed of the linear voltage regulator circuit.

[0072] Specifically, the second ground path 224 includes a fourth current source IB5 , an input terminal of the fourth current source IB5 is connected to the drain terminal of the transistor MN2 , and an output terminal of the fourth current source IB5 is grounded.

[0073] Specifically, Figure 4 As shown, the compensation signal output circuit 220 may also include a sixth current source IB6, and the output end of the current increasing circuit 222 is connected to the output end of the sixth current source IB6, for superimposing the compensation current on the current output by the sixth current source IB6, and then the total compensation current formed is superimposed on the bias current of the linear voltage stabilization circuit, further enhancing the compensation effect. In other implementation schemes, the sixth current source IB6 may also be used as a bias power supply for the linear voltage stabilization circuit 210 to generate a bias current, and the compensation current output by the current increasing circuit 222 is superimposed on the current output by the sixth current source IB6, so that two current sources generating fixed currents are not needed, and the circuit structure can be simplified.

[0074] The above is an embodiment in which the compensation current is superimposed on the bias current as a compensation signal. In another embodiment, a compensation voltage may be used as the compensation signal.

[0075] In this other embodiment, if Figure 4 As shown, the compensation signal output circuit 220 further includes a transposition circuit 226 for converting a current signal into a voltage signal, the input end of the transposition circuit 226 is connected to the output end of the current increase circuit 220 to access the compensation current, and the output end of the transposition circuit 226 is used to connect to the voltage end of the bias current source of the linear voltage stabilization circuit 210, and is used to output the compensation voltage as a compensation signal to enhance the voltage of the bias current source and thereby enhance the bias current.

[0076] For the transposition circuit 226, in other implementation schemes, the input end of the transposition circuit 226 can be connected to the output end of the current increasing circuit 220, and can also be connected to the output end of the sixth current source IB6, so as to access the total compensation current formed by superimposing the compensation current on the current output by the sixth current source IB6, and the total compensation current is transposed into a compensation voltage by the transposition circuit 226 to act on the bias current source of the linear voltage regulator circuit 210 to enhance the bias current of the linear voltage regulator circuit.

[0077] In a specific embodiment, Figure 5As shown, the transposition circuit 226 includes a transistor MN3, a transistor MN4 and a transistor MP5; the gate-drain connection of the transistor MN3 serves as the input terminal of the transposition circuit 226, the gate terminal of the transistor MN3 is connected to the gate terminal of the transistor MN4, the source terminal of the transistor MN3 is grounded, the source terminal of the transistor MN4 is grounded, the drain terminal of the transistor MN4 is connected to the drain terminal of the transistor MP5, the source terminal of the transistor MP5 is connected to the input voltage, and the gate-drain connection of the transistor MP5 serves as the output terminal of the transposition circuit. Optionally, the transistor MN3 and the transistor MN4 are both N-type, and the transistor MP5 is P-type, and all three can be MOS tubes. The embodiment of the present invention also proposes a linear voltage stabilization circuit. As Figure 5 As shown, the linear voltage stabilizing circuit 500 includes:

[0078] A linear voltage stabilization subcircuit 510, the linear voltage stabilization subcircuit comprising an error amplifier EA and a bias current source 518 for generating a bias current, the output end of the error amplifier EA being provided with a first pole of the linear voltage stabilization subcircuit, the first pole being a main pole; and

[0079] The compensation circuit 200 is connected to the output end of the error amplifier EA, and is used to sample the voltage at the output end of the error amplifier EA and output a compensation signal according to the sampled voltage. The compensation circuit 200 is also connected to the bias current source 518, and is used to enhance the bias current using the compensation signal.

[0080] In the linear voltage regulator circuit 500 in the embodiment of the present invention, the compensation circuit 200 outputs a compensation signal according to the sampled voltage at the output of the error amplifier EA to enhance the bias current of the linear voltage regulator circuit 500, thereby improving the response speed of the linear voltage regulator circuit 500, which is beneficial to maintaining the stability of the output voltage of the linear voltage regulator circuit 500. In addition, because the output voltage of the sampled error amplifier EA is used, the circuit burden at the gate of the power tube MP2 is reduced, and the parasitic capacitance at the gate of the power tube MP2 is not increased, so the frequency at the third pole will not be pulled down, which is beneficial to maintaining the stability of the linear voltage regulator circuit.

[0081] For the specific definition of the compensation circuit 200 , please refer to the above description and will not be repeated here.

[0082] When the linear voltage stabilization subcircuit 510 has more than two amplifier stages, the number of bias current sources can be the same as the number of amplifier stages. One bias current source acts on one amplifier, so that the response speed of each amplifier is improved, which is more conducive to improving the stability of the linear voltage stabilization circuit. In one embodiment, Figure 5As shown, the linear voltage regulator sub-circuit 510 also includes a second-stage amplifier 512, and the bias current source 518 includes a first current source IB1 and a second current source IB2, the first current source IB1 is used to generate a first bias current to act on the error amplifier EA, and the second current source IB2 is used to generate a second bias current to act on the second-stage amplifier 512; the first current source IB1 and the second current source IB2 are both connected to the compensation circuit 200, and the compensation circuit 200 is used to enhance the first bias current and the second bias current using the compensation signal.

[0083] Furthermore, if Figure 5 The linear voltage stabilization subcircuit 510 further includes a power tube MP2, a feedback circuit 514 and a Miller compensation capacitor Cc. The positive input terminal of the error amplifier EA is connected to a reference voltage VREF, and the negative input terminal is connected to the output terminal of the feedback circuit 514, and is used to connect to the feedback voltage VFB generated by the feedback circuit 514 so as to adjust the output voltage of the error amplifier EA in a negative feedback manner; the output terminal of the error amplifier EA is connected to the input terminal of the second-stage amplifier 512, and the output terminal of the second-stage amplifier 512 is connected to the gate of the power tube MP2. The second-stage amplifier 512 is used to When the output voltage VOUT-EA of the error amplifier EA increases, the gate potential of the power tube MP2 is pulled down to drive the power tube MP2 to perform power amplification. The drain of the power tube MP2 serves as the output end of the linear voltage stabilization subcircuit 510. The output end of the linear voltage stabilization subcircuit 510 is distributed with the second pole of the linear voltage stabilization subcircuit 510. The second pole can be a secondary main pole. One end of the Miller compensation capacitor Cc is connected to the output end of the linear voltage stabilization subcircuit 510, and the other end is connected to the negative voltage end of the error amplifier EA. The Miller compensation capacitor Cc is used to compensate the second pole through a zero point. The Miller compensation capacitor Cc can move the first pole at the output of the error amplifier EA to a low frequency, and move the second pole distributed at the output of the linear voltage stabilization subcircuit 510 to a high frequency to achieve pole separation, which is beneficial for the second pole to reduce or even offset the influence of the zero point on the stability of the linear voltage stabilization subcircuit 510 system.

[0084] In this embodiment, when the load at the output end of the linear voltage regulator circuit 500 increases, the output voltage VOUT of the linear voltage regulator circuit 500 decreases, resulting in a decrease in the feedback voltage, and the output voltage of the error amplifier EA will increase. The second-stage amplifier 512 will pull down the gate terminal potential of the power tube MP2, and the power of the power tube MP2 will be amplified, and the power supply of the power tube MP2 will increase. The drain voltage of the power tube MP2, that is, the output voltage VOUT of the linear voltage regulator sub-circuit 510, will return to a normal state. The compensation circuit 200 samples the output voltage VOUT-EA of the error amplifier EA, and can output a compensation signal based on the voltage VOUT-EA to enhance the bias current of the linear voltage regulator circuit, thereby improving the response speed of the linear voltage regulator circuit.

[0085] Specifically, Figure 5 As shown, the first current source IB1 is connected to the positive power supply terminal of the error amplifier EA to input the first bias current to the positive power supply terminal of the error amplifier EA. When the first bias current increases, the response speed of the error amplifier EA can be accelerated.

[0086] Specifically, Figure 5 As shown, the second-stage amplifier 512 includes an N-type transistor MN1 and a P-type transistor MP1, the output end of the error amplifier EA is connected to the gate end of the N-type transistor MN1, the drain end of the transistor MN1 is connected to the gate-drain connection of the transistor MP1, the source end of the transistor MN1 is grounded, the gate end of the transistor MP1 is connected to the gate end of the power tube MP2, and the source end of the transistor MP1 is connected to the input voltage. The transistor MN1 and the transistor MP2 can both be MOS tubes. The output end of the second current source IB2 is connected to the gate-drain connection of the transistor MP1. The introduction of the second bias current allows more current to pass through the transistor MN1, which can further lower the gate potential of the power tube MP2 and speed up the response speed of the power tube MP2.

[0087] Specifically, Figure 5 As shown, the linear voltage stabilization subcircuit 510 also includes an output capacitor COUT. The drain end of the power tube MP2, as the output end of the linear voltage stabilization subcircuit 510, is also grounded through the output capacitor COUT. The output capacitor COUT is used to filter the output voltage of the linear voltage stabilization subcircuit 510, which is beneficial to the stability of the output voltage.

[0088] Specifically, Figure 5 As shown, the feedback circuit 514 includes a feedback resistor RFB1 and a feedback resistor RFB2, the drain of the power tube MP2 is connected to the first end of the feedback resistor RFB2, the second end of the feedback resistor RFB2 is connected to the first end of the feedback resistor RFB1, the second end of the feedback resistor RFB1 is grounded, and a feedback voltage VFB is generated at the connection between RFB2 and RFB1, and the feedback voltage VFB is given to the negative input terminal of the error amplifier EA.

[0089] The output voltage VOUT of the linear voltage regulator circuit and the input voltage of the positive input terminal of the error amplifier EA satisfy the following formula:

[0090]

[0091] Among them, VOUT is the output voltage of the linear voltage regulator circuit, RFB2 and RFB1 are the resistance values ​​of feedback resistors RFB2 and RFB1 respectively, and VREF is the input voltage of the positive input terminal of the error amplifier EA.

[0092] When the load at the output end of the linear voltage regulator circuit increases, the output voltage VOUT will undershoot, that is, it will drop instantaneously. The negative feedback loop will feedback this situation to the error amplifier EA, and then the error amplifier EA will increase its output voltage VOUT-EA according to the feedback voltage VFB, and the second-stage amplifier 512 will pull down the gate potential of the power tube MP2 to return the output voltage VOUT to a normal state. When the linear voltage regulator circuit is equivalent to a small signal state, it can be seen that when the load at the output end increases, the output voltage VOUT decreases, the feedback voltage VFB decreases, the error amplifier EA output voltage VOUT-EA increases, and the gate potential of the power tube MP2 decreases, so that the power supply of the power tube MP2 increases, and finally the output voltage VOUT is restored.

[0093] In one embodiment, Figure 5 As shown, the linear voltage stabilization subcircuit 510 further includes a second-stage load 516, and the source end of the transistor MN1 is connected to the input voltage through the second-stage load 516. The second-stage load 516 specifically includes a resistor R0 and the transistor MP1, the source end of the transistor MP1 is connected to one end of the resistor R0, and the other end of the resistor R0 is connected to the input voltage.

[0094] Those skilled in the art will appreciate that the steps, measures, and schemes in the various operations, methods, and processes discussed in this application may be alternated, modified, combined, or deleted. Furthermore, other steps, measures, and schemes in the various operations, methods, and processes discussed in this application may also be alternated, modified, rearranged, decomposed, combined, or deleted.

[0095] Furthermore, the steps, measures, and schemes in the prior art that are similar to the various operations, methods, and processes disclosed in this application may also be alternated, changed, rearranged, decomposed, combined, or deleted.

[0096] The terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, the meaning of "multiple" is two or more. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connected" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", etc. are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly. When an element such as a layer, a film, a region or a substrate is referred to as being "on" or "under" another element, the element may be "directly" located "on" or "under" another element, or there may be an intermediate element.

[0097] It should be understood that, although the steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0098] The above is a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles described in the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

[0099] The above is only a partial implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present application, several improvements and modifications can be made. These improvements and modifications should also be described in detail through the above embodiments. The technicians in this field can clearly understand that each implementation can be implemented by means of software plus the necessary general hardware platform, and of course, by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product.

[0100] Finally, it should be noted that a bias current compensation method, a bias current compensation circuit, and a linear voltage stabilization circuit disclosed in the embodiments of the present invention are only preferred embodiments of the present invention, and are only used to illustrate the technical solution of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments.

Claims

1. A bias current compensation circuit, characterized in that: include: A sampling circuit, used for sampling the voltage at the output end of the error amplifier in the linear voltage stabilization circuit; A compensation signal output circuit, wherein the input end of the compensation signal output circuit is connected to the sampling circuit, and the output end is used to connect the bias current source of the linear voltage regulator circuit, and the compensation signal output circuit is used to access the sampling voltage provided by the sampling circuit and output a compensation signal to enhance the bias current of the bias current source; The compensation signal output circuit includes a current increasing circuit, which includes a fifth current source, a transistor MP4, a transistor MN2, and a first ground path connected in parallel with the transistor MP4; the drain terminal of the transistor MN2 is connected to the input voltage, the gate terminal is connected to the sampling voltage as the input terminal of the compensation signal output circuit, and the source terminal is grounded; the source terminal of the transistor MP4 is connected to the output terminal of the fifth current source, the gate terminal is connected to the drain terminal of the transistor MN2, and the drain terminal serves as the output terminal of the compensation signal output circuit; the pull-down current passing through the transistor MN2 increases as the sampling voltage increases, and the current passing through the transistor MP4 increases as the pull-down current increases; one end of the first ground path is connected to the source terminal of the transistor MP4, and the other end is grounded, and is used to shunt the output current of the fifth current source from the transistor MP4.

2. The compensation circuit according to claim 1, characterized in that: The input end of the current increasing circuit serves as the input end of the compensation signal output circuit, and the output end of the current increasing circuit serves as the output end of the compensation signal output circuit. The current increasing circuit is used to output a compensation current as a compensation signal according to a sampling voltage, and the compensation current is enhanced as the sampling signal increases.

3. The compensation circuit according to claim 1, characterized in that: The current increasing circuit further includes a second path to ground connected in parallel with the transistor MN2; one end of the second path to ground is connected to the drain of the transistor MN2, and the other end is grounded, for maintaining the gate potential of the transistor MP4.

4. The compensation circuit according to claim 1, characterized in that: The compensation signal output circuit also includes a transposition circuit, the input end of the transposition circuit is connected to the output end of the current increase circuit to access the compensation current, the output end of the transposition circuit is used to connect to the voltage end of the bias current source of the linear voltage stabilization circuit, and the transposition circuit is used to convert the compensation current into a compensation voltage as a compensation signal to enhance the working voltage of the bias current source and thereby enhance the bias current.

5. A bias current compensation method, characterized in that: The bias current compensation method is implemented by using the compensation circuit according to any one of claims 1 to 4, comprising: Obtaining a sampled voltage at an output end of an error amplifier in a linear voltage regulator circuit; Outputting a compensation signal according to the sampled voltage; The compensation signal is used to enhance the bias current of the linear voltage stabilization circuit.

6. The compensation method according to claim 5, characterized in that: The step of outputting a compensation signal according to the sampling voltage includes: adjusting the compensation signal according to the sampling voltage, so that the compensation signal increases as the sampling voltage increases.

7. The compensation method according to claim 5, characterized in that: The step of outputting a compensation signal according to the sampling voltage includes: adjusting the compensation signal according to the sampling voltage, when the sampling voltage is higher than a preset value, making the compensation signal increase as the sampling voltage increases, and when the sampling voltage is lower than or equal to the preset value, making the compensation signal stable at a fixed value.

8. The compensation method according to claim 5, characterized in that: The compensation signal is a compensation current, and using the compensation signal to enhance the bias current of the linear voltage stabilization circuit is to superimpose the compensation current on the bias current; Alternatively, the compensation signal is a compensation voltage, and using the compensation signal to enhance the bias current of the linear voltage stabilization circuit is to use the compensation voltage to increase the working voltage of the bias current source, thereby increasing the bias current output by the bias current source.

9. A linear voltage stabilizing circuit, characterized in that: include: A linear voltage stabilization subcircuit, the linear voltage stabilization subcircuit comprising a bias current source and an error amplifier for generating a bias current; the linear voltage stabilization subcircuit comprises more than two stages of amplifiers, the number of the bias current sources being the same as the number of stages of the amplifiers; as well as The compensation circuit according to any one of claims 1 to 4 is connected to the output end of the error amplifier, used to sample the voltage at the output end of the error amplifier, and output a compensation signal according to the sampled voltage, and the compensation circuit is also connected to the bias current source, used to enhance the bias current using the compensation signal.

10. The linear voltage stabilizing circuit according to claim 9, characterized in that: The linear voltage stabilization subcircuit also includes a second-stage amplifier; the bias current source includes a first current source and a second current source, both of which are connected to the compensation circuit, the first current source is used to generate a first bias current to act on the error amplifier, and the second current source is used to generate a second bias current to act on the second-stage amplifier; The compensation circuit is used to enhance the first bias current and the second bias current using the compensation signal.

11. The linear voltage stabilizing circuit according to claim 10, characterized in that: The linear voltage stabilization subcircuit also includes a power tube, a feedback circuit and a Miller compensation capacitor. The positive input terminal of the error amplifier is connected to a reference voltage, and the negative input terminal is connected to the output terminal of the feedback circuit, and is used to connect to the feedback voltage generated by the feedback circuit so as to adjust the output voltage of the error amplifier in a negative feedback manner; the output terminal of the error amplifier is connected to the input terminal of the second-stage amplifier, and the output terminal of the second-stage amplifier is connected to the gate of the power tube. The second-stage amplifier is used to pull down the gate potential of the power tube when the output voltage of the error amplifier increases to drive the power tube to perform power amplification. The drain of the power tube serves as the output terminal of the linear voltage stabilization subcircuit, and the output terminal of the linear voltage stabilization subcircuit is distributed with the second pole of the linear voltage stabilization subcircuit; one end of the Miller compensation capacitor is connected to the output terminal of the linear voltage stabilization subcircuit, and the other end is connected to the negative voltage terminal of the error amplifier. The Miller compensation capacitor is used to compensate the second pole at the output of the linear voltage stabilization subcircuit through zero point compensation.

12. The linear voltage stabilizing circuit according to claim 9, characterized in that: The compensation circuit comprises: a sampling circuit connected to the output end of the error amplifier and used for sampling the voltage at the output end of the error amplifier; and A compensation signal output circuit, wherein the input end of the compensation signal output circuit is connected to the sampling circuit, and the output end is used to connect to the bias current source. The compensation signal output circuit is used to access the sampling voltage provided by the sampling circuit and output a compensation signal to enhance the bias current of the bias current source.

13. The linear voltage stabilizing circuit according to claim 12, characterized in that: The compensation signal output circuit includes a current increasing circuit, the input end of the current increasing circuit serves as the input end of the compensation signal output circuit, the output end of the current increasing circuit serves as the output end of the compensation signal output circuit, and the current increasing circuit is used to output a compensation current as a compensation signal according to a sampling voltage, and the compensation current is enhanced as the sampling signal increases.

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