Light load mode decision circuit, decision method, primary side control circuit, and isolated converter

Abstract

The present invention provides a light load mode determination circuit, a determination method, a primary side control circuit, and an isolated converter. The light load mode determination circuit includes a comparison circuit, a statistical circuit, and a determination circuit. The comparison circuit is configured to compare a status detection signal with at least one detection reference signal and output a comparison result. The statistical circuit is coupled to the comparison circuit and is configured to perform statistics based on the comparison result within a set time and output a statistical result. The determination circuit is coupled to the statistical circuit and is configured to compare the statistical result with a determination reference signal to determine whether the isolated converter enters a light load mode. The present invention can effectively solve the problem of load depth under light load conditions of the isolated converter, can realize the discrimination of the light load mode under the condition of load depth, can save the pins of the control chip and the large external capacitor, and can effectively reduce the area of the control chip itself.

Description

Technical Field

[0001] The present invention belongs to the field of electronics, relates to the technical field of switching power supplies, and particularly relates to a light load mode determination circuit, a determination method, a primary side control circuit, and an isolated converter. Background Art

[0002] Isolated converters are widely used in the field of switching power supplies due to their many advantages such as strong anti-interference ability, high safety, easy implementation of step-up and step-down conversion, and easy implementation of multiple outputs. An isolated converter generally includes a rectification circuit, a primary side circuit, a secondary side circuit, etc. Through the precise control of the primary and secondary side control circuits, the isolated converter can output safely and stably.

[0003] As Figure 1 shown, it is an isolated converter using primary side control in the prior art. The output voltage at the circuit board terminal of the isolated converter is V1, that is, the voltage across capacitor C4. The output voltage at the cable terminal of the isolated converter is V2, that is, the voltage across load resistor R2. The circuit board terminal of the isolated converter is coupled to the load through an output cable, and the resistance value of the output cable is Rcable, so there is a load depth. In the isolated converter with primary side control, by adjusting the pulse width or pulse frequency of the control signal of primary side switch Q1, the output voltage V1 at the circuit board terminal can be kept constant. If the output voltage V1 at the circuit board terminal is set to be constant, when different loads are used, the voltage drop across the output cable will change with the change of the load resistor.

[0004] To achieve a constant output voltage V2 at the cable terminal, as Figure 2 shown, the prior art adopts an output cable voltage drop compensation scheme. By collecting the median value or peak value of the current flowing through the primary side switch and converting it into a stable voltage signal or current signal through a low-pass filter, and then through the signal processing of the voltage-current conversion circuit and outputting it to the FB pin of the control chip, an accurate signal representing the load depth can be obtained, thereby realizing the precise control of the output voltage at the cable terminal. Theoretically, the electrical signal output by the low-pass filter can be directly compared with a reference voltage, and the output signal of the comparator can be used as a light load mode indication signal. However, the disadvantage of this scheme is that under very light load conditions, the bandwidth of the low-pass filter to be used is very narrow, so the filtering constant of the low-pass filter is very large. At the same time, if a filtering resistor with a large resistance value is selected, it is easily interfered by the internal noise of the control chip, which means that the capacitance value of the filtering capacitor of the low-pass filter adopted by this scheme needs to be very large. As Figure 1 shown, the control chip of the isolated converter is provided with a CPC pin, which is used to couple an external filtering capacitor. The technical problems existing in the prior art make the area of the on-chip integrated low-pass filter of the control chip very large, so the cost is high. At the same time, the setting of on-chip capacitors also increases the pins of the control chip. Summary of the Invention

[0005] To solve at least some of the above problems, the present invention provides a light load mode determination circuit, a determination method, a primary side control circuit, and an isolated converter, effectively solving the problem of deep load under light load conditions of the isolated converter.

[0006] The present invention discloses a light load mode determination circuit for an isolated converter, which includes:

[0007] A comparison circuit for comparing a state detection signal with at least one detection reference signal and outputting a comparison result;

[0008] A statistical circuit coupled to the comparison circuit for performing statistics based on the comparison result within a set time and outputting a statistical result; and

[0009] A determination circuit coupled to the statistical circuit for comparing the statistical result with a determination reference signal to determine whether the isolated converter enters a light load mode.

[0010] In an embodiment of the present invention, the statistical circuit includes: a charge and discharge circuit, whose input terminal is coupled to the comparison circuit and whose output terminal is coupled to the determination circuit, for performing a charge and discharge process based on the comparison result within a set time to perform statistics and output a statistical result; when the comparison result is a first comparison state, the charge and discharge circuit performs a charging process; when the comparison result is a second comparison state, the charge and discharge circuit performs a discharging process.

[0011] In an embodiment of the present invention, the at least one detection reference signal includes a first detection reference signal and a second detection reference signal; the statistical circuit further includes a weighting circuit; when the state detection signal is greater than the first detection reference signal and less than the second detection reference signal, the statistical circuit performs weighted statistics on the comparison result with a first weighting value; when the state detection signal is greater than the second detection reference signal, the statistical circuit performs weighted statistics on the comparison result with a second weighting value; the second detection reference signal is greater than the first detection reference signal; the second weighting value is greater than the first weighting value.

[0012] In an embodiment of the present invention, the charge and discharge circuit includes:

[0013] A charging circuit, whose input terminal is coupled to the comparison circuit and whose output terminal is coupled to the determination circuit, for performing a charging process when the comparison result is a first comparison state; and

[0014] A discharging circuit, whose input terminal is coupled to the comparison circuit and whose output terminal is coupled to the determination circuit, for performing a discharging process when the comparison result is a second comparison state.

[0015] In one embodiment of the present invention, the charging circuit includes a first current source, a first switch, and a first capacitor; the discharging circuit includes a second current source, a second switch, and the first capacitor;

[0016] The first current source is configured to provide a charging current;

[0017] The first switch has its first end coupled to the output end of the first current source, and its switch control end coupled to the comparison circuit, and is used to control the conduction state of the charging circuit;

[0018] The first capacitor has its first end respectively coupled to the second end of the first switch and the input end of the decision circuit, and its second end coupled to the ground;

[0019] The second switch has its first end coupled to the first end of the first capacitor, its second end coupled to the second end of the first capacitor, and its switch control end coupled to the comparison circuit, and is used to control the conduction state of the discharging circuit; and

[0020] The second current source is coupled between the second switch and the first capacitor, and is used to provide a discharging current.

[0021] In one embodiment of the present invention, when the comparison result is in the first comparison state, the first current source outputs a charging current that is positively correlated with the state detection signal.

[0022] In one embodiment of the present invention, the statistical circuit includes a counting circuit configured to perform statistical counting according to the comparison result within a set time; when the comparison result is in the first comparison state, the counting circuit performs an increment calculation once; when the comparison result is in the second comparison state, the counting circuit performs a decrement calculation once.

[0023] In one embodiment of the present invention, the light load mode decision circuit further includes:

[0024] A state detection signal acquisition circuit, whose output end is coupled to the comparison circuit, and is used to acquire the state detection signal.

[0025] In one embodiment of the present invention, the light load mode decision circuit further includes:

[0026] A primary side switch driving circuit, whose input end is coupled to the decision circuit, and is used to generate a driving signal to control the switch state of the primary side switch.

[0027] The present invention discloses a primary side control circuit for an isolated converter, and the primary side control circuit is used to control the switch state of a primary side switch, and includes the light load mode decision circuit as described above.

[0028] The present invention discloses an isolated converter, which includes a primary circuit and a secondary circuit. The primary circuit receives an input voltage and includes a primary winding, a primary switch, and the primary control circuit as described above. The secondary circuit includes a secondary winding, and the primary winding and the secondary winding are coupled to form a transformer.

[0029] In an embodiment of the present invention, when the light load mode determination circuit determines that the isolated converter enters the light load mode, the primary control circuit controls to reduce the operating current of the primary control circuit.

[0030] The present invention discloses a method for determining the light load mode of an isolated converter, which includes:

[0031] Comparing the status detection signal with at least one detection reference signal and outputting a comparison result;

[0032] Statistical analysis is performed according to the comparison result within a set time, and a statistical result is output; and

[0033] Comparing the statistical result with a determination reference signal to determine whether the isolated converter enters the light load mode.

[0034] In an embodiment of the present invention, the step of performing statistical analysis according to the comparison result within a set time and outputting a statistical result includes:

[0035] A charge and discharge process is performed according to the comparison result within a set time for statistical analysis, and a statistical result is output; when the comparison result is in the first comparison state, the charge and discharge circuit performs a charging process; when the comparison result is in the second comparison state, the charge and discharge circuit performs a discharging process.

[0036] In an embodiment of the present invention, the step of performing statistical analysis according to the comparison result within a set time and outputting a statistical result includes:

[0037] The at least one detection reference signal includes a first detection reference signal and a second detection reference signal; when the status detection signal is greater than the first detection reference signal and less than the second detection reference signal, the comparison result is weighted and statistically analyzed with a first weighting value; when the status detection signal is greater than the second detection reference signal, the comparison result is weighted and statistically analyzed with a second weighting value; the second detection reference signal is greater than the first detection reference signal; the second weighting value is greater than the first weighting value.

[0038] In an embodiment of the present invention, the step of performing statistical analysis according to the comparison result within a set time and outputting a statistical result includes:

[0039] When the comparison result is in the first comparison state, the counting circuit performs an increment calculation; when the comparison result is in the second comparison state, the counting circuit performs a decrement calculation.

[0040] The present invention provides a light load mode determination circuit, a determination method, a primary side control circuit, and an isolated converter. Among them, the light load mode determination circuit includes a comparison circuit, a statistical circuit, and a determination circuit. The present invention realizes filtering by adopting the light load mode determination circuit, thereby effectively solving the problem of load depth under light load conditions of the isolated converter. In addition, more specifically, filtering is realized by controlling the discharge of the small capacitor on the control chip or adopting the form of an addition and subtraction counter. The present invention can effectively save the pins of the control chip and the large capacitor outside the chip, and at the same time, the area of the control chip itself can also be effectively reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 FIG. shows a circuit schematic diagram of a prior art isolated converter with primary side control.

[0042] Figure 2 FIG. shows a schematic diagram of the principle of an output cable voltage drop compensation scheme of a prior art isolated converter.

[0043] Figure 3 FIG. shows a circuit schematic diagram of a light load mode determination circuit according to an embodiment of the present invention.

[0044] Figure 4 FIG. shows a circuit schematic diagram of a light load mode determination circuit according to an embodiment of the present invention.

[0045] Figure 5 FIG. shows a circuit schematic diagram of a light load mode determination circuit according to an embodiment of the present invention.

[0046] Figure 6 FIG. shows a circuit schematic diagram of a light load mode determination circuit according to an embodiment of the present invention.

[0047] Figure 7 FIG. shows a circuit schematic diagram of a light load mode determination circuit according to an embodiment of the present invention.

[0048] Figure 8 FIG. shows a schematic flowchart of a light load mode determination method according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0049] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0050] In order to further understand the present invention, the preferred implementation schemes of the present invention will be described below in conjunction with embodiments. However, it should be understood that these descriptions are only for further explaining the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0051] The description of this part is only for several typical embodiments, and the present invention is not limited to the scope described in the embodiments. The replacement of some technical features in the same or similar prior art means with those in the embodiments is also within the scope of description and protection of the present invention.

[0052] "Coupled" or "connected" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conduction medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include the connection through other active or passive devices on the basis of achieving the same or similar functional purposes, such as the connection through circuits or components such as switches and follower circuits.

[0053] The primary-side controlled isolated converter includes a primary-side circuit and a secondary-side circuit. The primary-side circuit receives an input voltage, and the secondary-side circuit provides an output voltage or output current. The primary-side circuit may include a primary winding, a primary switch, and a primary control circuit. The secondary-side circuit may include a secondary winding and a rectifier diode. The primary winding and the secondary winding are coupled to form a transformer. The rectifier diode can be a diode or a synchronous rectifier diode. By controlling the switching state of the primary switch through the primary control circuit, the isolated converter can maintain a stable output. The average output current of the primary control circuit in the DCM mode (i.e., discontinuous mode) satisfies the following relationship:

[0054]

[0055] In addition, the average output current of the primary control circuit in the CCM mode (i.e., continuous mode) satisfies the following relationship:

[0056]

[0057] Where, Io_DCM is the average output current in the DCM mode, Io_CCM is the average output current in the CCM mode, Nps is the turns ratio of the primary and secondary sides of the transformer, Ipk is the peak current value of CS in the DCM mode, Vcs_pk is the peak voltage corresponding to the peak current value of CS in the DCM mode; Imid is the median current value of CS in the CCM mode, Vcs_mid is the median voltage corresponding to the median current value of CS in the CCM mode. Tsw is the switching period of the primary switch, Ton is the conduction time of the primary switch, Tdem is the demagnetization time, Toff is the dead time. VREF_TRIM1 is the first equivalent voltage, VREF_TRIM2 is the second equivalent voltage, and Rcs is the sampling resistor.

[0058] Based on the above formula, it can be known that by constructing a circuit structure or implementation method that can satisfy the above relational expression, the output average current can be accurately obtained. In view of the load depth problem under light load conditions, in light load conditions, Ipk or Imid is processed by reducing the peak current through the control loop inside the primary control circuit, so Ipk or Imid is controlled at a fixed low value. At the same time, under light load conditions, the conduction time Ton and the demagnetization time Tdem of the primary switch are both very low, and when the transformer turns ratio Nps remains unchanged, Ton and Tdem remain unchanged. Therefore, from the above formulas (1) and (2), it can be known that the light load mode determination under load depth can be simplified to calculate the magnitude of Tsw, where Tsw = Ton + Tdem + Toff. In the light load mode, the conduction time Ton and the demagnetization time Tdem of the primary switch are much smaller than Toff, so when making the light load mode determination, it can also be simplified to calculate the magnitude of the dead time Toff.

[0059] As Figure 3 shown, an embodiment of the present invention provides a light load mode determination circuit for an isolated converter. The light load mode determination circuit 12 includes a comparison circuit 121, a statistical circuit 122, and a determination circuit 123. Among them, the comparison circuit 121 is used to compare the state detection signal with at least one detection reference signal and output a comparison result. The input end of the statistical circuit 122 is coupled to the output end of the comparison circuit 121. The statistical circuit 122 is used to perform statistics according to the comparison result within a set time and output a statistical result. The set time is a statistical time period selected by the statistical circuit 122 for the statistical comparison result required for the light load mode determination circuit. Specifically, the statistical circuit can be at least one of a series of circuits such as a charge-discharge circuit, a counting circuit, etc. that satisfy the above description requirements for statistical calculation or are equivalent to statistical calculation. The input end of the determination circuit 123 is coupled to the statistical circuit 122. The determination circuit 123 is used to compare the statistical result with a determination reference signal to determine whether the isolated converter enters the light load mode. By using the light load mode determination circuit to achieve filtering, the present invention can effectively solve the load depth problem under light load conditions of the isolated converter, effectively save the pins of the control chip and the large external capacitor, and at the same time, the area of the control chip itself can also be effectively reduced.

[0060] In an embodiment of the present invention, the status detection signal may be the switching period Tsw of the primary side switch, the status detection signal may be the dead time Toff, and the status detection signal may also be the switching frequency f of the primary side switch. When the detection reference signal is the first detection reference signal, the comparison result may be the comparison result characterization signals corresponding to the two cases where the status detection signal is greater than the first detection reference signal and the status detection signal is not greater than the first detection reference signal. When the detection reference signal is the first detection reference signal and the second detection reference signal, the comparison result may be the comparison result characterization signals corresponding to the three cases where the status detection signal is less than the first detection reference signal, the status detection signal is between the first detection reference signal and the second detection reference signal, and the status detection signal is greater than the second detection reference signal, where the second detection reference signal is greater than the first detection reference signal. In addition, in an embodiment of the present invention, the status detection signal is the switching period Tsw or the dead time Toff of the primary side switch. When the statistical result is greater than the decision reference signal, it is determined that the isolated converter has entered the light load mode. In another embodiment of the present invention, the status detection signal is the switching frequency f of the primary side switch. When the statistical result is less than the decision reference signal, it is determined that the isolated converter has entered the light load mode. Exemplarily, the status detection signal is the dead time Toff, the detection reference signal is the first detection reference signal, and the first detection reference signal is specifically 500 us. Within the set time, when Toff > 500 us, a charging process is performed or an increment calculation (such as adding 1 to the statistical value) is performed; when Toff < 500 us, a discharging process is performed or a decrement calculation (such as subtracting 1 from the statistical value) is performed. The statistical circuit 122 performs statistics according to the comparison result within the set time and outputs the statistical result. When the statistical result is greater than the decision reference signal, the decision circuit determines that the isolated converter has entered the light load mode; otherwise, the isolated converter has not entered the light load mode. The present invention can effectively prevent single false triggering from entering or exiting the light load mode, avoid frequent switching between the two states of the isolated converter being in the light load mode and not in the light load mode, and ensure the stable operation of the isolated converter.

[0061] In an embodiment of the present invention, the light load mode decision circuit further includes a status detection signal acquisition circuit. The output end of the status detection signal acquisition circuit is coupled to the comparison circuit, and the status detection signal acquisition circuit is used to acquire the status detection signal. As Figure 3 shown in an embodiment, the status detection signal acquisition circuit is specifically the dead time Toff acquisition circuit 11. The output end of the dead time Toff acquisition circuit 11 is coupled to the input end of the comparison circuit 121, and the dead time Toff acquisition circuit 11 is used to acquire the dead time Toff.

[0062] In an embodiment of the present invention, as Figure 3As shown, the light load mode determination circuit further includes a primary side switch driving circuit 13. The input end of the primary side switch driving circuit 13 is coupled to the output end of the determination circuit 123. The primary side switch driving circuit 13 is used to generate a driving signal to control the switching state of the primary side switch. In an embodiment of the present invention, when the determination circuit 123 determines that the light load mode has been entered, the standby power consumption of the primary side control circuit will be reduced. When entering the light load mode, the determination circuit 123 will generate a determination signal. This determination signal passes through the primary side switch driving circuit 13 to reduce the switching frequency of the primary side switch. When the load is in a very light load state, the primary side switch is controlled to turn off through the primary side switch driving circuit 13, and the primary side circuit waits for the communication pulse sent by the secondary side circuit. When the communication pulse of the secondary side circuit is not received, the primary side switch remains in the off state. When the primary side control circuit enters the sleep (light load) mode, only the communication pulse detection circuit and the most basic reference voltage and current will be retained. Therefore, the primary side control circuit can achieve ultra-low standby power consumption.

[0063] In an embodiment of the present invention, as Figure 4 shown, the light load mode determination circuit 22 includes a comparison circuit 221, a charge and discharge circuit 222, and a determination circuit 223. The comparison circuit 221 is used to compare the state detection signal with at least one detection reference signal and output a comparison result. The input end of the charge and discharge circuit 222 is coupled to the output end of the comparison circuit 221. The charge and discharge circuit 222 is used to perform a charge and discharge process according to the comparison result within a set time for statistics and output a statistical result. When the comparison result is the first comparison state, the charge and discharge circuit performs a charging process; when the comparison result is the second comparison state, the charge and discharge circuit performs a discharging process. The input end of the determination circuit 223 is coupled to the charge and discharge circuit 222. The determination circuit 223 is used to compare the statistical result with the determination reference signal to determine whether the isolated converter enters the light load mode.

[0064] In an embodiment of the present invention, when the comparison result is the first comparison state, the first current source outputs a charging current that is positively correlated with the state detection signal. In an embodiment, at least one detection reference signal is the first detection reference signal. When the state detection signal is greater than the first detection reference signal, the magnitude of the charging current output by the first current source is positively correlated with the magnitude of the state detection signal. In another embodiment, at least one detection reference signal includes the first detection reference signal and the second detection reference signal. When the state detection signal is greater than the first detection reference signal, the magnitude of the charging current output by the first current source is positively correlated with the magnitude of the state detection signal. Among them, the second detection reference signal is greater than the first detection reference signal.

[0065] In an embodiment of the present invention, as Figure 5As shown, the light load mode determination circuit 22 includes a comparison circuit 221, a charge and discharge circuit 222, and a determination circuit 223. The charge and discharge circuit 222 includes a charging circuit 2222 and a discharging circuit 2223. The input end of the charging circuit 2222 is coupled to the comparison circuit 221, the output end of the charging circuit 2222 is coupled to the input end of the determination circuit 223, and the charging circuit 2222 is used to perform a charging process when the comparison result is in the first comparison state. The input end of the discharging circuit 2223 is coupled to the comparison circuit 221, the output end of the discharging circuit 2223 is coupled to the input end of the determination circuit 223, and the discharging circuit 2223 is used to perform a discharging process when the comparison result is in the second comparison state.

[0066] In an embodiment of the present invention, as Figure 5 shown, the charge and discharge circuit 222 further includes a weighting circuit 2221. The input end of the weighting circuit 2221 is coupled to the output end of the comparison circuit 221, and the output end of the weighting circuit 2221 is respectively coupled to the charging circuit 2222 and the discharging circuit 2223. The at least one detection reference signal specifically includes a first detection reference signal and a second detection reference signal. When the state detection signal is greater than the first detection reference signal and less than the second detection reference signal, the weighting circuit 2221 performs weighted statistics on the comparison result with a first weighting value; when the state detection signal is greater than the second detection reference signal, the weighting circuit 2221 performs weighted statistics on the comparison result with a second weighting value. Among them, the second detection reference signal is greater than the first detection reference signal, and the second weighting value is greater than the first weighting value. Exemplarily, the state detection signal is the dead time Toff, the at least one detection reference signal includes a first detection reference signal and a second detection reference signal, the first detection reference signal is specifically 500 us, and the second detection reference signal is specifically 1000 us. There are the following three comparison results: Toff > 1000 us, 500 us < Toff < 1000 us, and Toff < 500 us. Within a set time, when Toff > 1000 us, a charging process is performed with the second weighting value; when 500 us < Toff < 1000 us, a charging process is performed with the first weighting value; when Toff < 500 us, a discharging process is performed with the first weighting value. The charging amount of the charging process with the second weighting value is greater than the charging amount of the charging process with the first weighting value. The weighted process can reflect the speed of entering the LL (light load) mode under different load conditions. When the load is very light, the Toff value is large. By weighting the current Toff, it can be quickly determined as the light load mode, so that the isolated converter enters the light load mode, which can effectively reduce the working loss and greatly reduce the standby power consumption of the primary control circuit.

[0067] In an embodiment of the present invention, as Figure 6As shown in the figure, the light load mode determination circuit 32 includes a comparison circuit 321, a charge and discharge circuit 322, and a determination circuit 323. The comparison circuit 321 is used to compare the state detection signal with at least one detection reference signal and output a comparison result. The input end of the counting circuit 322 is coupled to the output end of the comparison circuit 321. The counting circuit 322 is used to perform statistical counting according to the comparison result within a set time and output a statistical result. When the comparison result is the first comparison state, the counting circuit performs an increment calculation once. When the comparison result is the second comparison state, the counting circuit performs a decrement calculation once. The input end of the determination circuit 323 is coupled to the counting circuit 322. The determination circuit 323 is used to compare the statistical result with the determination reference signal to determine whether the isolated converter enters the light load mode. In another embodiment of the present invention, the light load mode determination circuit 32 further includes a Toff acquisition circuit 31 and a primary side switch driving circuit 33. The Toff acquisition circuit 31 is coupled to the input end of the comparison circuit 321. The Toff acquisition circuit 31 is used to acquire the dead time Toff. The primary side switch driving circuit 33 is coupled to the output end of the determination circuit 323. The primary side switch driving circuit 33 is used to generate a driving signal to control the switching state of the primary side switch.

[0068] In an embodiment of the present invention, the light load mode determination circuit 32 further includes a weighting circuit. The state detection signal is the dead time Toff. The at least one detection reference signal includes a first detection reference signal and a second detection reference signal. The first detection reference signal is specifically 500 us, and the second detection reference signal is specifically 1000 us. There are the following three comparison results: Toff > 1000 us, 500 us < Toff < 1000 us, and Toff < 500 us. Within the set time, when Toff > 1000 us, an increment calculation is performed once with a second weighting value (such as adding 2 to the statistical value); when 500 us < Toff < 1000 us, an increment calculation is performed once with a first weighting value (such as adding 1 to the statistical value); when Toff < 500 us, a decrement calculation is performed once with the first weighting value (such as subtracting 1 from the statistical value). The weighting process can reflect the speed of entering the LL (light load) mode under different load conditions. When the load is very light, the Toff value is large. By weighting the current Toff, it can be quickly determined as the light load mode, so that the isolated converter enters the low-power working state corresponding to the light load mode, and the standby power consumption of the primary side control circuit can be greatly reduced.

[0069] In an embodiment of the present invention, as Figure 7As shown, the light load mode determination circuit includes a comparison circuit, a charge and discharge circuit, and a determination circuit. The charge and discharge circuit includes a charge circuit and a discharge circuit. The charge circuit includes a first current source, a first switch K1, and a first capacitor Cjudge. The discharge circuit includes a second current source, a second switch K2, and the first capacitor Cjudge. The first current source is used to provide a charging current Ichg. The first terminal of the first switch K1 is coupled to the output terminal of the first current source, and the switch control terminal of the first switch K1 is coupled to the output terminal of the comparison circuit. The first switch K1 is used to control the conduction state of the charge circuit. The first terminal of the first capacitor Cjudge is respectively coupled to the second terminal of the first switch K1 and the input terminal of the determination circuit, and the second terminal of the first capacitor Cjudge is coupled to ground. The first terminal of the second switch K2 is coupled to the first terminal of the first capacitor Cjudge, the second terminal of the second switch K2 is coupled to the second terminal of the first capacitor Cjudge, and the switch control terminal of the second switch K2 is coupled to the output terminal of the comparison circuit. The second switch K2 is used to control the conduction state of the discharge circuit. The second current source is coupled between the second switch K2 and the first capacitor Cjudge, and the second current source is used to provide a discharge current Idischg. In an embodiment of the present invention, the first detection reference signal can be set to 500 us. When the dead time Toff is greater than 500 us, the charge and discharge circuit controls the first switch K1 to conduct, so that the first current source charges the first capacitor. When the dead time Toff is less than 500 us, the charge and discharge circuit controls the second switch K2 to conduct, so that the second current source discharges the first capacitor. Preferably, when the dead time Toff is greater than 500 us, the magnitude of the charging current output by the first current source is positively correlated with the magnitude of the dead time Toff. In addition, the determination circuit compares the voltage Vjudge at the first terminal of the first capacitor Cjudge with the determination reference signal Vref1. When the voltage Vjudge is greater than the determination reference signal Vref1, the light load mode determination circuit determines that the isolated converter has entered the light load mode, so that the primary control circuit controls the switching state of the primary switch, and the isolated converter enters the low-power operating state corresponding to the light load mode. The capacitance value required for the first capacitor Cjudge used in the present invention is very small, and only occupies a very small area on the primary control circuit (i.e., the primary chip).

[0070] In an embodiment of the present invention, a primary control circuit for an isolated converter is disclosed, which includes the light load mode determination circuit as described above. The primary control circuit is used to control the switching state of the primary switch.

[0071] In an embodiment of the present invention, an isolated converter is disclosed. The isolated converter includes a primary circuit and a secondary circuit. The primary circuit receives an input voltage. The primary circuit includes a primary winding, a primary switch, and the primary control circuit as described above. The secondary circuit includes a secondary winding. The primary winding and the secondary winding are coupled to form a transformer.

[0072] In an embodiment of the present invention, when the light load mode determination circuit determines that the isolated converter enters the light load mode, the primary control circuit controls to reduce the operating current of the primary control circuit, so that the isolated converter enters the low efficiency operating state corresponding to the light load mode.

[0073] As Figure 8 shown, an embodiment of the present invention discloses a light load mode determination method for an isolated converter, which includes the steps of:

[0074] S100. Comparing the status detection signal with at least one detection reference signal and outputting a comparison result;

[0075] S200. Performing statistics according to the comparison result within a set time and outputting a statistical result; and

[0076] S300. Comparing the statistical result with the judgment reference signal to determine whether the isolated converter enters the light load mode.

[0077] In an embodiment of the present invention, the step of performing statistics according to the comparison result within a set time and outputting a statistical result includes: performing a charging and discharging process according to the comparison result within a set time to perform statistics and outputting a statistical result; when the comparison result is the first comparison state, the charge and discharge circuit performs a charging process; when the comparison result is the second comparison state, the charge and discharge circuit performs a discharging process.

[0078] In an embodiment of the present invention, the step of performing statistics according to the comparison result within a set time and outputting a statistical result includes: at least one detection reference signal includes a first detection reference signal and a second detection reference signal; when the status detection signal is greater than the first detection reference signal and less than the second detection reference signal, the comparison result is weighted and statistically analyzed with a first weighting value; when the status detection signal is greater than the second detection reference signal, the comparison result is weighted and statistically analyzed with a second weighting value. Wherein, the second detection reference signal is greater than the first detection reference signal; the second weighting value is greater than the first weighting value.

[0079] A light load mode determination circuit, a determination method, a primary control circuit and an isolated converter are proposed by the present invention. Among them, the light load mode determination circuit includes a comparison circuit, a statistical circuit and a judgment circuit. The present invention effectively solves the problem of load depth under light load conditions of the isolated converter by using the light load mode determination circuit to implement filtering. Specifically, it is realized by discharging the small capacitor on the control chip or using an addition and subtraction counter. The present invention can effectively save the pins of the control chip and the large capacitor outside the chip, and at the same time, the area of the control chip itself can be effectively reduced.

[0080] The description and application of the present invention herein are illustrative and are not intended to limit the scope of the present invention to the above embodiments. The related descriptions of effects or advantages involved in the embodiments may not be reflected in the experimental examples due to the uncertainty of specific condition parameters and are not used to limit the embodiments. Variations and changes of the disclosed embodiments are possible, and various components of substitution and equivalence of the embodiments are known to those of ordinary skill in the art. Those skilled in the art should clearly understand that the present invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of the present invention. Other variations and changes can be made to the disclosed embodiments without departing from the scope and spirit of the present invention.

Claims

1. An off - load mode decision circuit for an isolated converter, characterized in that, The light load mode determination circuit includes: A comparison circuit for comparing the status detection signal with at least one detection reference signal and outputting a comparison result, where the at least one detection reference signal includes a first detection reference signal and a second detection reference signal; A statistics circuit coupled to the comparison circuit for performing statistics based on the comparison result within a set time and outputting a statistics result; the statistics circuit further includes a weighting circuit; when the status detection signal is greater than the first detection reference signal and less than the second detection reference signal, the statistics circuit performs weighted statistics on the comparison result with a first weighting value; when the status detection signal is greater than the second detection reference signal, the statistics circuit performs weighted statistics on the comparison result with a second weighting value; the second detection reference signal is greater than the first detection reference signal; the second weighting value is greater than the first weighting value; and A determination circuit coupled to the statistics circuit for comparing the statistics result with a determination reference signal to determine whether the isolated converter enters the light load mode.

2. The light load mode determination circuit according to claim 1, wherein The statistics circuit includes: A charge and discharge circuit, whose input terminal is coupled to the comparison circuit and whose output terminal is coupled to the determination circuit, for performing a charge and discharge process based on the comparison result within a set time to perform statistics and output a statistics result; when the comparison result is a first comparison state, the charge and discharge circuit performs a charging process; when the comparison result is a second comparison state, the charge and discharge circuit performs a discharging process.

3. The light load mode determination circuit according to claim 2, wherein The charge and discharge circuit includes: A charging circuit, whose input terminal is coupled to the comparison circuit and whose output terminal is coupled to the determination circuit, for performing a charging process when the comparison result is a first comparison state; and A discharging circuit, whose input terminal is coupled to the comparison circuit and whose output terminal is coupled to the determination circuit, for performing a discharging process when the comparison result is a second comparison state.

4. The light load mode determination circuit according to claim 3, wherein The charging circuit includes a first current source, a first switch, and a first capacitor; the discharging circuit includes a second current source, a second switch, and the first capacitor; The first current source for providing a charging current; The first switch, whose first end is coupled to the output end of the first current source and whose switch control end is coupled to the comparison circuit for controlling the conduction state of the charging circuit; The first capacitor, whose first end is respectively coupled to the second end of the first switch and the input end of the determination circuit, and whose second end is coupled to ground; The second switch, whose first end is coupled to the first end of the first capacitor, whose second end is coupled to the second end of the first capacitor, and whose switch control end is coupled to the comparison circuit for controlling the conduction state of the discharging circuit; And The second current source coupled between the second switch and the first capacitor for providing a discharging current.

5. The light load mode determination circuit according to claim 4, wherein When the comparison result is a first comparison state, the first current source outputs a charging current that is positively correlated with the status detection signal.

6. The light load mode determination circuit according to claim 1, wherein The statistics circuit includes a counting circuit for performing statistical counting based on the comparison result within a set time; when the comparison result is a first comparison state, the counting circuit performs an increment calculation once; when the comparison result is a second comparison state, the counting circuit performs a decrement calculation once.

7. The light load mode determination circuit according to claim 1, wherein The light load mode determination circuit further includes: A state detection signal acquisition circuit, whose output terminal is coupled to the comparison circuit, and is used to acquire the state detection signal.

8. The light load mode determination circuit according to claim 1, wherein The light load mode determination circuit further includes: A primary side switch driving circuit, whose input terminal is coupled to the determination circuit, and is used to generate a driving signal to control the switching state of the primary side switch.

9. A primary control circuit for an isolated converter, the primary control circuit being used to control the switching state of a primary switch, characterized in that, Including the light load mode determination circuit according to any one of claims 1-8.

10. An isolated converter, characterized in that, The isolated converter includes a primary side circuit and a secondary side circuit. The primary side circuit receives an input voltage. The primary side circuit includes a primary side winding, a primary side switch, and the primary side control circuit according to claim 9; the secondary side circuit includes a secondary side winding, and the primary side winding and the secondary side winding are coupled to form a transformer.

11. The isolated converter according to claim 10, wherein When the light load mode determination circuit determines that the isolated converter enters the light load mode, the primary side control circuit controls to reduce the operating current of the primary side control circuit.

12. A light load mode determination method for an isolated converter, characterized in that, Including: Comparing the state detection signal with at least one detection reference signal and outputting a comparison result, where the at least one detection reference signal includes a first detection reference signal and a second detection reference signal; Statistically analyzing according to the comparison result within a set time and outputting a statistical result; When the state detection signal is greater than the first detection reference signal and less than the second detection reference signal, statistically analyzing the comparison result with a first weighting value; When the state detection signal is greater than the second detection reference signal, statistically analyzing the comparison result with a second weighting value; The second detection reference signal is greater than the first detection reference signal; The second weighting value is greater than the first weighting value; And Comparing the statistical result with a determination reference signal to determine whether the isolated converter enters the light load mode.

13. The light load mode determination method according to claim 12, wherein The step of statistically analyzing according to the comparison result within a set time and outputting a statistical result includes: Performing a charge and discharge process according to the comparison result within a set time for statistical analysis and outputting a statistical result; when the comparison result is a first comparison state, the charge and discharge circuit performs a charging process; when the comparison result is a second comparison state, the charge and discharge circuit performs a discharging process.

14. The light load mode determination method according to claim 12, wherein The step of statistically analyzing according to the comparison result within a set time and outputting a statistical result includes: When the comparison result is a first comparison state, the counting circuit performs an increment calculation once; when the comparison result is a second comparison state, the counting circuit performs a decrement calculation once.

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