Power management integrated circuit modeling system and operation method thereof
By designing a PMIC modeling system, including power supply, resistor setting unit and controller, monitoring the load current and adjusting the power output, the problem that the PMIC simulation model in the prior art cannot accurately reflect the current supply limit and voltage drop, and a more accurate PDN analysis is achieved.
Patent Information
- Application Number
- CN201910521413.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-12-11
- Filing Date
- 2019-06-17
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2039-06-17
AI Technical Summary
The existing power management integrated circuit (PMIC) simulation model cannot accurately reflect its current supply limit and voltage drop impact in the power distribution network (PDN), resulting in differences in the simulation results and actual measurement results.
A PMIC modeling system is designed, which includes a power supply, a resistor setting unit and a controller. By monitoring the load current and generating a current comparison value, the controller adjusts the power output current and the resistance setting unit's resistance value to reflect the current supply limit of the PMIC.
The system can more accurately simulate the behavior of PMIC in PDN, reduce the difference between simulation results and actual measurement results, and improve the accuracy of PDN analysis.
Smart Images

Figure CN111382549B_ABST
Abstract
Description
[0001] This application claims the priority benefit of Korean Patent Application No. 10-2018-0159228 filed on December 11, 2018, in the Korean Intellectual Property Office (KIPO), the disclosure of which is incorporated herein by reference in its entirety. Technical Field
[0002] Systems and methods consistent with embodiments relate to a power management integrated circuit (PMIC) modeling system for power distribution network (PDN) analysis and a method of driving the PMIC modeling system. Background Art
[0003] The simulation model of the power management integrated circuit (PMIC) used for verification of the power distribution network (PDN) applies an ideal voltage source and therefore cannot reflect the ability to limit the current supply, which is a fundamental characteristic of the PMIC. When the simulation model is applied to the PDN, the effects of the voltage drop and decoupling capacitors cannot be accurately reflected. There are differences between the simulation results of the PMIC and PDN obtained using the simulation model and the actual measurement results. Summary of the invention
[0004] According to an embodiment, a power management integrated circuit (PMIC) modeling system for power distribution network (PDN) analysis is provided, the PMIC modeling system comprising: a power supply configured to supply a source current for driving a load; a resistance setting unit configured to monitor the load current supplied to the load, and generate a current comparison value by comparing a first current value of the load current at a current moment with a second current value of the load current at a previous moment; and a controller configured to generate a control signal for changing a variable resistance of the resistance setting unit based on the current comparison value, and control the power supply to change the source current. The resistance setting unit is also configured to change the resistance value of the variable resistance based on the control signal, and the load current changes based on the changed source current and the changed resistance value.
[0005] According to an embodiment, a power management integrated circuit (PMIC) modeling system for power distribution network (PDN) analysis is provided, the PMIC modeling system including: a power supply configured to supply a source current for driving a load; a resistance setting unit configured to monitor the load current supplied to the load, and generate a current comparison value by comparing a first current value of the load current at a current moment with a second current value of the load current at a previous moment; and a controller configured to set a parameter for controlling the source current of the power supply based on the current comparison value, and generate a control signal for changing a variable resistance of the resistance setting unit based on the parameter. The resistance setting unit is also configured to change the resistance value of the variable resistance based on the control signal, and the load current changes based on the changed source current and the changed resistance value.
[0006] According to an embodiment, a method for operating a power management integrated circuit (PMIC) modeling system for power distribution network (PDN) analysis is provided, the method comprising: controlling a power supply to supply a source current for driving a load; monitoring the load current supplied to the load; generating a current comparison value by comparing a first current value of the load current at a current moment with a second current value of the load current at a previous moment; based on the current comparison value, changing a resistance value of a variable resistor, and controlling the power supply to change the source current. The load current changes based on the changed source current and the changed resistance value. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1 is a diagram illustrating a PMIC modeling system according to an embodiment of the inventive concept.
[0008] Figure 2A is a flow chart illustrating a method of generating a current waveform for PDN verification and applying the current waveform to a PMIC modeling system.
[0009] Figure 2B is a diagram illustrating an example of parameters input to a PMIC modeling system.
[0010] Figure 3A is a diagram illustrating a method of driving a PMIC modeling system in a normal mode according to an embodiment of the inventive concept.
[0011] Figure 3B is a diagram illustrating a method of driving a PMIC modeling system in a normal mode according to an embodiment of the inventive concept.
[0012] Figure 4 is shown when a forward bias is applied to Figure 1 Graph showing the switch-on operation of the ideal diode ID shown in FIG.
[0013] Figure 5 is a diagram illustrating an operation of switching from a normal mode to a maximum current mode (imax mode) when supply of current is to be limited according to an embodiment.
[0014] Fig. 6A is a diagram illustrating a method of driving a PMIC modeling system in a maximum current mode (imax mode) according to an embodiment of the inventive concept.
[0015] Figure 6B is a diagram illustrating a method of driving a PMIC modeling system in a maximum current mode (imax mode) according to an embodiment of the inventive concept.
[0016] Figure 7 is shown when a reverse bias is applied to Figure 1Graph showing the switch-off operation of the ideal diode ID shown in FIG.
[0017] Figure 8 is a diagram for describing an operation of switching from a maximum current mode (imax mode) to a normal mode according to an embodiment.
[0018] Fig. 9 is a diagram illustrating an example of verification of operation performance of a PMIC in which a PMIC modeling system according to an embodiment of the inventive concept is applied to a chip packaging system unit.
[0019] Fig.10 is a diagram illustrating an example of verification of operation performance of a PMIC in which a PMIC modeling system according to an embodiment of the inventive concept is applied to a mobile device. DETAILED DESCRIPTION
[0020] Hereinafter, a power management integrated circuit (PMIC) modeling system and a method of driving the PMIC modeling system according to embodiments of the inventive concept will be described in detail with reference to the accompanying drawings.
[0021] Verification of the power distribution network (PDN) is performed to ensure power and signal integrity (PSI) at the system level. A typical verification method for product analysis may include configuring the PDN as a model of the on-chip die, package, board, and PMIC, and verifying the PDN through simulation. Through simulation, an accurate PMIC model is used to verify characteristics similar to the measurement results in the actual device. The present invention is intended to provide a PMIC modeling system that reflects the circuit operation characteristics of the PMIC and a method for driving the PMIC modeling system.
[0022] Embodiments of the inventive concept intend to provide a PMIC modeling system capable of limiting current supply of a PMIC and a method of driving the PMIC modeling system.
[0023] Furthermore, embodiments of the inventive concept intend to provide a PMIC modeling system capable of predicting a voltage drop of a PDN and the influence of a decoupling capacitor and a method of driving the PMIC modeling system.
[0024] Furthermore, embodiments of the inventive concept intend to provide a PMIC modeling system capable of reducing a difference between simulation results and actual measurement results of a PMIC and a PDN, and a method of driving the PMIC modeling system.
[0025] Figure 1 is a diagram illustrating a PMIC modeling system according to an embodiment of the inventive concept.
[0026] Reference Figure 1, the PMIC modeling system 100 includes a power supply 110, a resistance setting unit 120, and a controller 130. The power supply 110 may limit an output current according to a normal mode or a maximum current mode (imax mode).
[0027] The power supply 110 includes a current source unit IS, a voltage source, an ideal diode ID, a first resistor Rp connected in parallel with the current source IS, and a second resistor Rs connected in series with the ideal diode ID. The ideal diode ID may be replaced by a switch. The power supply 110 may supply a direct current (dc) power to the load 210 using a voltage source.
[0028] The PMIC modeling system 100 may supply power to a load 210 through a PDN 200. The PDN 200 may include a load 210. The load 210 is a component that performs a function by consuming power, and may include a transistor, a cable, and / or a passive element.
[0029] As an example, the load 210 may include a microprocessor, a central processing unit (CPU), a graphics processing unit (GPU), an application processor, or a semiconductor memory device (e.g., a dynamic random access memory (DRAM), a phase change random access memory (PRAM), a magnetic random access memory (MRAM), a ferroelectric random access memory (FRAM), or a solid state drive (SSD)). The load 210 may be powered through one or more power terminals. An operating current i and an operating voltage v may be supplied from the PDN 200 to the load 210.
[0030] The operating voltage v transmitted to the load 210 may be a DC voltage. The operating voltage v may vary with the amount of operating current i consumed due to the operation of the load 210. The range of variation of the operating voltage v for the load 210 to operate normally may include a tolerance of the supplied voltage.
[0031] The PMIC modeling system 100 may be driven in a normal mode or a maximum current mode according to a forward bias (or an on-operation of a switch) or a reverse bias (or an off-operation of a switch).
[0032] In the maximum current mode, the PMIC modeling system 100 may supply a preset constant current (eg, a maximum current) to the load 210 of the PDN 200 .
[0033] In the normal mode, the PMIC modeling system 100 may supply the load 210 with a current requested by the load 210 without limiting the current required by the load 210 .
[0034] As an example, when the ideal diode ID is in forward bias, the PMIC modeling system 100 may operate in the normal mode. In the normal mode, the PMIC modeling system 100 may perform operations similar to those of an ideal voltage source.
[0035] As an example, when the ideal diode ID is in reverse bias, the PMIC modeling system 100 may operate in a maximum current mode (imax mode). In the maximum current mode (imax mode), the PMIC modeling system 100 may operate as a direct current (DC) current source.
[0036] When performing PDN simulation, the PMIC modeling system 100 may repeat the switching between the normal mode and the maximum current mode (imax mode) multiple times. That is, the PMIC modeling system 100 may switch from the normal mode to the maximum current mode (imax mode), and may also switch from the maximum current mode (imax mode) to the normal mode. Such switching between driving modes may be repeated multiple times.
[0037] The PMIC modeling system 100 may adjust the supplied current so that the current supply capability of the power supply 110 does not exceed the current variation di / dt with respect to the maximum time variation.
[0038] The PMIC modeling system 100 may supply a current within a preset maximum current to the load 210 .
[0039] When operating in the maximum current mode, the PMIC modeling system 100 may supply a current within the maximum current to the load 210 even if the load 210 requires a current exceeding the maximum current. When operating in the normal mode, the PMIC modeling system 100 may supply a current required by the load 210.
[0040] The resistance setting unit 120 may monitor the load current supplied to the load 210 in real time. The resistance setting unit 120 may compare the value of the load current monitored at the current moment with the value of the load current monitored at the previous moment. The resistance setting unit 120 may send the result of the comparison between the load current value at the current moment and the load current value at the previous moment to the controller 130 in real time.
[0041] The controller 130 may transmit the result of the comparison between the load current value at the current moment and the load current value at the previous moment to the power supply 110 in real time.
[0042] The controller 130 may control the output current of the power supply 110 based on the current comparison result (ie, the current comparison value) monitored by the resistance setting unit 120 .
[0043] The controller 130 may load current waveform data of current flowing into the chip (ie, current required by the chip), and may drive the loaded current waveform data and apply it to PDN verification. The controller 130 may include a memory configured to store current waveform data of each chip and a processor configured to drive the current waveform data.
[0044] The power supply 110 may limit the current supply capability based on the current comparison result (ie, current comparison value) input from the controller 130. That is, the power supply 110 may limit the current supplied to the load 210 based on the current comparison result (ie, current comparison value) input from the controller 130.
[0045] The resistance setting unit 120 may include a variable resistor (see Figure 3A ). The controller 130 may control the variable resistance of the resistance setting unit 120 based on the current comparison result (i.e., the current comparison value) monitored by the resistance setting unit 120. The controller 130 may generate a variable resistance control signal for controlling the variable resistance of the resistance setting unit 120, and provide the generated variable resistance control signal to the resistance setting unit 120.
[0046] The resistance setting unit 120 may change the variable resistance based on a variable resistance control signal input from the controller 130 .
[0047] The controller 130 may calculate a maximum current allowable in the maximum current mode, and adjust the variable resistance of the resistance setting unit 120 according to the calculated maximum current.
[0048] As an example, when operating in the normal mode, the resistance setting unit 120 may set the variable resistance to a maximum value (eg, infinity) under the control of the controller 130 .
[0049] As an example, when operating in a maximum current mode (imax mode), the resistance setting unit 120 may adjust the variable resistance to a preset value under the control of the controller 130 to limit the output current (ie, the current supplied to the load 210 ).
[0050] As an example, when operating in a maximum current mode (imax mode), the resistance setting unit 120 may adjust the output current in real time by changing the variable resistance according to a result of the comparison of the current value monitored in real time.
[0051] As an example, when operating in a maximum current mode (imax mode), the resistance setting unit 120 may adjust the output current at time intervals by changing the variable resistance according to a result of comparison of the current values monitored at the time intervals.
[0052] PDN 200 can be a chip packaging system (see Fig. 9 ). The load 210 may be a chip included in a chip packaging system. However, the embodiment is not limited thereto. The PDN 200 may be a mobile device (see Fig.10 ). The load 210 may be an application processor (AP) included in a mobile device.
[0053] Figure 2A is a flow chart illustrating a method of generating a current waveform for PDN verification and applying the current waveform to a PMIC modeling system. Figure 2B is a diagram illustrating an example of parameters input to a PMIC modeling system.
[0054] Reference Figure 1 , Figure 2A and Figure 2B , a current waveform required by the load 210 (eg, a chip) may be generated to perform PDN verification using the PMIC modeling system 100 .
[0055] As an example, an on-chip power supply network of a chip may be modeled as an RLC circuit through parameter extraction ( S10 ).
[0056] Subsequently, transistors used in the chip can be modeled as current sources or capacitors according to switching (S20).
[0057] Subsequently, device modeling of a lumped constant circuit may be configured using the RLC circuit modeling of operation S10 and the modeling of a current source or capacitor of operation S20. A lumped constant circuit refers to an equivalent circuit configured assuming that the inductance, capacitance, and resistance distributed in the circuit are concentrated in one location. When the length of the circuit is short compared to the wavelength of the signal flowing through the circuit, it can be seen that the flow of the signal is transmitted instantaneously from the input end of the circuit to the output end. In this case, an equivalent circuit having all circuit constants including resistance, inductance, and capacitance concentrated in one location may be configured. Thereafter, full-chip electrical modeling (S30) may be performed by configuring device modeling of a lumped constant circuit. When there are multiple chips to be used for PDN analysis, full-chip electrical modeling may be performed on each of the individual chips.
[0058] Subsequently, a waveform (hereinafter referred to as a "current waveform") representing the change of the current flowing into the chip (i.e., the current required by the chip) over time can be acquired or generated by simulating the full chip electrical modeling using an electronic circuit simulation program (e.g., SPICE) (S40). The current waveform can be configured as program type data, and the controller 130 can load and store the data of the current waveform.
[0059] Subsequently, PDN verification may be performed by applying the current waveform of each chip to the PMIC modeling system 100 ( S50 ). Figure 2B As shown in , parameters of the PMIC may be set in the controller 130 .
[0060] As examples of parameters of the PMIC modeling system 100, the value of "vdd" (first parameter) can be used to set the vdd or positive supply voltage level of the power supply 110. The value of "imax" (second parameter) can be used to limit the maximum current. The value of "didtmax" (third parameter) can be used to limit the value of di / dt.
[0061] Figure 3A is a diagram illustrating a method of driving a PMIC modeling system in a normal mode according to an embodiment of the inventive concept. Figure 4 is shown when a forward bias is applied to Figure 1 Schematic diagram of the turn-on (SW_on) operation of the ideal diode ID shown in FIG.
[0062] Reference Figure 3A and Figure 4 In normal mode, the PMIC modeling system 100 can supply the current requested by the load. In normal mode, the ideal diode ID of the power supply 110 can operate in forward bias.
[0063] As an example, the controller 130 may set the ideal diode ID to operate in a forward bias in the normal mode.
[0064] As an example, the ideal diode ID may be replaced by a switch. The controller 130 may turn on the switch SW of the power supply 110 in the normal mode.
[0065] In the normal mode, the output voltage level of the power supply 110 is maintained at vdd. Here, vdd may be supplied from the power supply. In the normal mode, the controller 130 may control the power supply 110 and the resistance setting unit 120 so that the current required by the load 210 is supplied.
[0066] In the normal mode, the current source IS can supply the current required by the load 210 .
[0067] When the PMIC modeling system 100 operates in the normal mode, the current required by the load 210 may increase. When the source current i_source of the current source IS required by the load 210 exceeds the maximum current imax, the controller 130 may control the power supply 110 and the resistance setting unit 120 to switch from the normal mode to the maximum current mode.
[0068] In the maximum current mode, the PMIC modeling system 100 of the inventive concept may operate the power supply 110 such that a current variation value di / dt according to a change in current required by the load 210 over time does not exceed a maximum di / dt.
[0069] The variable resistor of the resistor setting unit 120 may be set between the output voltage Vout and the ground GND. The first terminal of the variable resistor may be electrically connected to the terminal of the output voltage Vout. The second terminal of the variable resistor may be electrically connected to the terminal of the ground GND. Here, the connection between the first terminal of the variable resistor and the terminal of the output voltage Vout may be logically performed by an electronic circuit program.
[0070] In the normal mode, the controller 130 may control the resistance setting unit 120 to set the variable resistance to a maximum value (eg, infinity). In the normal mode, the resistance setting unit 120 may set the variable resistance r_limit to a maximum value (eg, infinity) under the control of the controller 130 .
[0071] The resistance setting unit 120 may monitor the current supplied to the load 210 (i.e., the load current) and provide the result of the monitoring of the current to the controller 130. When the supply of the current is to be limited according to the result of monitoring the load current by the resistance setting unit 120, the controller 130 may control the resistance setting unit 120 to switch from the normal mode to the maximum current mode (imax mode).
[0072] The resistance setting unit 120 may change the variable resistance r_limit from a maximum value to a preset resistance r_limit′ under the control of the controller 130 to switch from the normal mode to the maximum current mode (imax mode).
[0073] As an example, when switching from the normal mode to the maximum current mode (imax mode), the resistance setting unit 120 may change the variable resistance, ie, the limiting resistance r_limit, so that the source current i_source (i_out+i_limit) at the current moment changes to the maximum current imax, thereby setting the maximum current mode (imax mode).
[0074] [Table 1]
[0075]
[0076] As shown in Table 1, the controller 130 may calculate a target limiting current value to be used to calculate a target current i_source and a value of a limiting resistor r_limit. The target limiting current value calculated by the controller 130 may be provided to the resistance setting unit 120. In Table 1, "ΔT" represents a time variation value. When the limiting resistor r_limit is changed by the resistance setting unit 120 under the control of the controller 130, the first source current i_source of the power supply 110 may be changed to the second source current i_source'.
[0077] Figure 3Bis a diagram illustrating a method of driving a PMIC modeling system in a normal mode according to an embodiment of the inventive concept.
[0078] Figure 3A 1 and 2 show that the resistance setting unit 120 includes a variable resistor, and the mode change is performed by changing the resistance value of the variable resistor. The embodiment is not limited thereto. Figure 3B As shown in , the resistance setting unit 120a may include an electronic device capable of adjusting a resistance other than a variable resistor.
[0079] Figure 5 is a diagram illustrating an operation of switching from a normal mode to a maximum current mode (imax mode) when supply of current is to be limited according to an embodiment.
[0080] Reference Figure 5 The resistance setting unit 120 may monitor the load current at each preset time t1, t2, t3, t4, etc. The resistance setting unit 120 may compare the load current value monitored at the current time with the load current value at the previous time.
[0081] The resistance setting unit 120 may generate a comparison result between the load current value at the current moment and the load current value at the previous moment. The resistance setting unit 120 may provide the comparison result of the load current value to the controller 130 in real time. Embodiments are not limited thereto. The controller 130 may determine whether to perform a mode change based on the comparison result of the current value generated at each preset moment t1, t2, t3, t4, etc. When it is determined that the mode change is to be performed, the controller 130 may control the resistance setting unit 120 to change the mode.
[0082] When the current change di / dt required by the load 210 does not exceed the maximum current change max di / dt, the resistance setting unit 120 may maintain the variable resistance at a first value r_limit (eg, infinity). The PMIC modeling system 100 operates in a normal mode while the variable resistance maintains a first value (eg, infinity).
[0083] When the current change di / dt required by the load 210 exceeds the maximum current change max di / dt, the resistance setting unit 120 changes the variable resistance from the first value r_limit to the second value r_limit'. The second value r_limit' of the variable resistance can be set to be less than the first value r_limit. The second value r_limit' of the variable resistance is not fixed to one value, but can be changed in real time according to the target source current i_source.
[0084] As an example, when switching from the normal mode to the maximum current mode (imax mode), the resistance setting unit 120 may change the variable resistance from the first value r_limit to the second value r_limit′ so that the source current i_source (i_out+i_limit) at the current moment becomes the maximum current imax, and thus the maximum current mode (imax mode) is set.
[0085] The current source IS may output a second source current i_source′ changed from the first source current i_source according to the changed variable resistance r_limit′ to the load 210. The source current output from the current source IS may be changed in real time according to the current required by the load 210.
[0086] Fig. 6A is a diagram illustrating a method of driving a PMIC modeling system in a maximum current mode (imax mode) according to an embodiment of the inventive concept. Figure 7 is shown when a reverse bias is applied to Figure 1 Schematic diagram of the cut-off (SW_off) operation of the ideal diode ID shown in FIG.
[0087] Reference Fig. 6A and Figure 7 In the maximum current mode, the PMIC modeling system 100 may limit the source current i_source to the maximum current imax.
[0088] In the maximum current mode, the ideal diode ID of the power supply 110 may be operated under reverse bias.
[0089] As an example, the controller 130 may set the ideal diode ID to operate in reverse bias in the maximum current mode.
[0090] As an example, the ideal diode ID may be replaced by a switch. The controller 130 may turn off the switch SW of the power supply 110 in the maximum current mode.
[0091] In the maximum current mode (imax mode), the resistance setting unit 120 may monitor the current supplied to the load 210 (i.e., the load current) and provide the result of the current monitoring to the controller 130. When the supply of the current does not need to be limited to 100 according to the result of monitoring the load current by the resistance setting unit 120, the controller 130 may control the resistance setting unit 120 to switch from the maximum current mode to the normal mode.
[0092] Reference Figure 5 The resistance setting unit 120 may monitor the load current at each preset time t1, t2, t3, t4, etc. The resistance setting unit 120 may compare the load current value monitored at the current time with the load current value at the previous time.
[0093] The resistance setting unit 120 may generate a comparison result between the load current value at the current moment and the load current value at the previous moment. The resistance setting unit 120 may provide the comparison result of the load current value to the controller 130 in real time. Embodiments are not limited thereto. The controller 130 may determine whether to perform a mode change based on the comparison result of the current value generated at each preset moment t1, t2, t3, t4, etc. When it is determined that a mode change is to be performed, the controller 130 may control the resistance setting unit 120 to change the mode. The output current of the PMIC modeling system 100 can be adjusted by changing the resistance value of the variable resistor of the resistance setting unit 120.
[0094] In the maximum current mode (imax mode), the current driving capability of the current source IS is maximized. In the maximum current mode (imax mode), the current source IS can output a constant maximum current, thereby operating similarly to a DC current source.
[0095] The resistance setting unit 120 may change the limit resistance value r_limit of the variable resistor in real time based on the control of the controller 130. The resistance setting unit 120 may control the output current i_out supplied to the load 210 by changing the limit resistance value r_limit of the variable resistor in real time.
[0096] [Table 2]
[0097]
[0098] The controller 130 may calculate a limit current i_limit and a limit resistance value r_limit for estimating an allowable maximum current as shown in Table 2. In Table 2, "ΔT" represents a time variation value.
[0099] The variable resistance of the resistance setting unit 120 may be adjusted according to the limit current i_limit calculated by the controller 130. The output current in the PMIC modeling system 100 may be changed by adjusting the variable resistance of the resistance setting unit 120.
[0100] In the maximum current mode (imax mode), the current insufficient due to the current supply limitation may be supplemented by supplying the discharge current of the decoupling capacitor in the load 210 .
[0101] In the maximum current mode (imax mode), the output voltage level can be lower than or equal to the VDD supplied by the power supply. In the maximum current mode (imax mode), the ideal diode ID can remain in a reverse biased state.
[0102] Figure 6Bis a diagram illustrating a method of driving a PMIC modeling system in a maximum current mode (imax mode) according to an embodiment of the inventive concept.
[0103] exist Fig. 6A 1 and 2 show that the resistance setting unit 120 includes a variable resistor, and the mode change is performed by changing the resistance value of the variable resistor. The embodiment is not limited thereto. Figure 6B As shown in , the resistance setting unit 120a may include an electronic device capable of adjusting a resistance other than a variable resistor.
[0104] Figure 8 is a diagram for describing an operation of switching from a maximum current mode (imax mode) to a normal mode according to an embodiment.
[0105] Reference Figure 8 , during the maximum current mode (imax mode), the current required by the load 210 may be changed. When the current required by the load 210 during the maximum current mode (imax mode) is reduced to less than or equal to the maximum current value, the limitation of the current supply is no longer required. When it is not necessary to limit the current supply, the operation of the PMIC modeling system 100 may be switched from the maximum current mode (imax mode) to the normal mode. In this case, when the decoupling capacitor of the load 210 is fully charged, the output voltage level may be restored to VDD, and the operation may be switched from the maximum current mode (imax mode) to the normal mode.
[0106] When the operation of the PMIC modeling system 100 switches to the normal mode, the controller 130 may change the ideal diode ID back to the forward biased state.
[0107] In addition, the controller 130 may control the resistance setting unit 120 to change the variable resistance from a certain value to infinity (r_limit r_limit').
[0108] The resistance setting unit 120 may change the variable resistance from a certain value to infinity (r_limit) according to the control of the controller 130. By changing the variable resistance, the operation of the PMIC modeling system 100 can be switched from the maximum current mode to the normal mode. Because the operation is switched from the maximum current mode (imax mode) to the normal mode, the current source IS can output the current required by the load 210 without limiting the current.
[0109] The PMIC modeling system 100 may be implemented using a simplified circuit model. As an example, the PMIC modeling system 100 may be implemented using the Verilog-A language (see Figure 2B). The PMIC modeling system 100 can be implemented in Verilog-A language and can be commonly used for simulation and analysis using a SPICE-based circuit simulator.
[0110] Fig. 9 is a diagram illustrating an example of verification of operation performance of a PMIC in which a PMIC modeling system according to an embodiment of the inventive concept is applied to a chip packaging system unit.
[0111] Reference Fig. 9 The PMIC modeling system 100 of the present invention can be applied to co-analysis of chip packaging systems. The PMIC modeling system 100 can be applied to system-level power integrity verification.
[0112] The PMIC modeling system 100 can be applied to system-level PDN optimization and simulation of PDN noise and PDN jitter. The PMIC modeling system 100 can be applied to various simulations and analyses using current supply limiting capability (maximum di / dt) including voltage regulator modules (VRMs) such as PMICs.
[0113] Fig.10 is a diagram illustrating an example of verification of operation performance of a PMIC in which a PMIC modeling system according to an embodiment of the inventive concept is applied to a mobile device.
[0114] Reference Fig.10 , the mobile device 300 may include an application processor (AP) 310, a memory device 320, a storage device 330, a communication interface 340, a camera 350, a display 360, and a touch panel 370. The mobile device 300 may be implemented as a smart phone.
[0115] The AP 310 may control the overall operation of the mobile device 300. The AP 310 may control the memory device 320, the storage device 330, the communication interface 340, the camera 350, the display 360, and the touch panel 370. The AP 310 may include a CPU core.
[0116] The memory device 320 and the storage device 330 may store data for the operation of the mobile device 300. For example, the memory device 320 may correspond to a volatile memory device such as a DRAM, a static random access memory (SRAM), or a mobile DRAM. The storage device 330 may correspond to a nonvolatile memory device such as an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a PRAM, a resistive random access memory (RRAM), a nano floating gate memory (NFGM), a polymer random access memory (PoRAM), an MRAM, or a FRAM. In one embodiment, the storage device 330 may also include an SSD, a hard disk drive (HDD), and a compact disk read-only memory (CD-ROM).
[0117] The communication interface 340 may include a code division multiple access (CDMA) module, a long term evolution (LTE) module, a radio frequency (RF) module, an ultra-wideband (UWB) module, a wireless local area network (WLAN) module, and a world interoperability for microwave access (WiMAX) module. The mobile device 300 may also include a global positioning system (GPS) module, a microphone module, a speaker module, and a gyroscope module.
[0118] The PMIC modeling system 100 may manage power for operations of the AP 310, the memory device 320, the storage device 330, the communication interface 340, the camera 350, the display 360, and the touch panel 370 of the mobile device 300. In response to a command CMD input from the AP 310, the PMIC modeling system 100 may supply a level of a first driving voltage in a normal mode, and supply a level of a second driving voltage in a maximum current mode.
[0119] The PMIC modeling system and the method of driving the PMIC modeling system according to the inventive concept can limit the current supply capability of the PMIC by controlling the change di / dt of the current over time.
[0120] The PMIC modeling system and the method for driving the PMIC modeling system according to the present invention can adjust the change of current over time di / dt by switching from normal mode to maximum current mode (imax mode) or from maximum current mode (imax mode) to normal mode according to the result of real-time monitoring of the output current of the current supply.
[0121] The PMIC modeling system and the method of driving the PMIC modeling system according to the inventive concept may reflect characteristics similar to those of an actual PMIC in PDN simulation by reflecting limited current supply capability.
[0122] The PMIC modeling system and the method of driving the PMIC modeling system according to the inventive concept can reflect the influence of voltage drop and decoupling capacitor, so that performance verification identical to or similar to an actual measurement result of the PMIC can be performed.
[0123] According to an embodiment of the inventive concept, simulation of a PMIC can be performed according to various loads, and time for simulation of the PMIC may be reduced.
[0124] According to an embodiment of the inventive concept, a power management integrated circuit (PMIC) modeling system for limiting the capability of current supply by controlling a change di / dt of current over time and a method of driving the PMIC modeling system can be provided.
[0125] According to an embodiment of the inventive concept, the PMIC modeling system is able to adjust the current change over time di / dt by switching from normal mode to maximum current mode (imax mode) or from maximum current mode (imax mode) to normal mode according to the result of real-time monitoring of the output current of the current source.
[0126] According to an embodiment of the inventive concept, the PMIC modeling system can reflect characteristics similar to those of an actual PMIC in PDN simulation by reflecting limited current supply capability. The PMIC modeling system can achieve performance verification that is the same or similar to actual measurement results in PDN analysis by reflecting the effects of voltage drop and decoupling capacitors.
[0127] According to an embodiment of the inventive concept, simulation of a PDN may be performed according to various loads, and time for simulation of the PDN may be reduced.
[0128] As is conventional in the field of the inventive concept, the exemplary embodiments are described and shown in the accompanying drawings in terms of functional blocks, units and / or modules. It will be understood by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory components, wiring connections, etc.) that can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case where these blocks, units and / or modules are implemented by microprocessors or the like, they can be programmed using software (e.g., microcode) to perform the various functions discussed herein, and they can be optionally driven by firmware and / or software. Optionally, each block, unit and / or module can be implemented by dedicated hardware, or implemented as a combination of dedicated hardware that performs some functions and processors (e.g., one or more programmed microprocessors and associated circuits) that perform other functions. In addition, without departing from the scope of the inventive concept, each block, unit and / or module of the exemplary embodiment can be physically divided into two or more interacting and discrete blocks, units and / or modules. In addition, the blocks, units and / or modules of the exemplary embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the inventive concept.
[0129] The various operations of the above-described methods may be performed by any suitable means capable of performing the operations, such as various hardware and / or software components, circuits and / or modules.
[0130] Software may include an ordered listing of executable instructions for implementing logical functions and may be implemented in any "processor readable medium" for use by or in connection with an instruction execution system, device or apparatus (such as a single-core or multi-core processor or a system containing a processor).
[0131] The blocks or steps and functions of the methods or algorithms described in conjunction with the example embodiments disclosed herein may be implemented directly in hardware, in software modules executed by a processor, or in a combination of the two. If implemented in software, the functions may be stored as one or more instructions or codes on a tangible, non-transitory computer-readable medium, or transmitted as one or more instructions or codes through a tangible, non-transitory computer-readable medium. The software module may reside in a random access memory (RAM), flash memory, read-only memory (ROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), registers, a hard disk, a removable disk, a CD ROM, or any other form of storage medium known in the art.
[0132] Although the embodiments of the present invention have been described with reference to the accompanying drawings, it will be appreciated by those skilled in the art that various modifications may be made without departing from the scope of the present invention and without changing the features of the present invention. Therefore, the above embodiments may be considered only in a descriptive sense and not for the purpose of limitation.
Claims
1. A power management integrated circuit modeling system for power distribution network analysis, the power management integrated circuit modeling system comprising: A power supply is configured to: supply a source current for driving a load; a resistance setting unit configured to: monitor a load current supplied to the load, and generate a current comparison value by comparing a first current value of the load current at a current moment with a second current value of the load current at a previous moment; as well as A controller is configured to: based on the current comparison value, generating a control signal for changing a variable resistance of a resistance setting unit; as well as Controlling the power supply changes the source current, The resistance setting unit is further configured to: change the resistance value of the variable resistor based on the control signal, where the load current changes based on the changing source current and the changing resistance value, The controller is further configured to: based on the current comparison value, control the power supply and the resistance setting unit to switch between a maximum current mode of supplying a constant current and a normal mode of supplying a source current for driving a load.
2. The power management integrated circuit modeling system according to claim 1, wherein: The power supply includes: Voltage source; Ideal diode; A current source, connected in parallel to an ideal diode; a first resistor connected in parallel to the current source; and A second resistor is connected in series with the ideal diode.
3. The power management integrated circuit modeling system according to claim 2, wherein: The controller is further configured to control the power supply to switch from the normal mode to the maximum current mode by controlling the ideal diode to maintain a reverse bias state based on the current comparison value being greater than the maximum comparison value in the normal mode.
4. The power management integrated circuit modeling system according to claim 2, wherein: The controller is further configured to control the power supply to switch from the maximum current mode to the normal mode by controlling the ideal diode to maintain a forward biased state based on a load current used by the load in the maximum current mode decreasing to less than or equal to the maximum current.
5. The power management integrated circuit modeling system according to claim 1, wherein: The resistance setting unit is further configured to send the current comparison value to the controller.
6. The power management integrated circuit modeling system according to claim 1, wherein: The controller is further configured to control the resistance setting unit to switch from the normal mode to the maximum current mode based on the current comparison value being greater than the maximum comparison value in the normal mode.
7. The power management integrated circuit modeling system according to claim 6, wherein: The controller is further configured to control the resistance setting unit to switch from the normal mode to the maximum current mode by changing the resistance value of the variable resistor from a first value to a second value smaller than the first value.
8. The power management integrated circuit modeling system according to claim 1, wherein: The controller is further configured to control the resistance setting unit to switch from the maximum current mode to the normal mode based on a load current used by the load in the maximum current mode decreasing to be lower than or equal to the maximum current.
9. The power management integrated circuit modeling system according to claim 8, wherein: The controller is further configured to control the resistance setting unit to switch from the maximum current mode to the normal mode by changing the resistance value of the variable resistor to infinity.
10. The power management integrated circuit modeling system according to claim 1, wherein: The controller is further configured to control the power supply and the resistance setting unit to switch from the maximum current mode to the normal mode based on a load current used by the load during the maximum current mode decreasing to be lower than or equal to the maximum current and a decoupling capacitor of the load being fully charged.
11. A power management integrated circuit modeling system for power distribution network analysis, the power management integrated circuit modeling system comprising: A power supply is configured to: supply a source current for driving a load; a resistance setting unit configured to: monitor a load current supplied to the load, and generate a current comparison value by comparing a first current value of the load current at a current moment with a second current value of the load current at a previous moment; as well as A controller is configured to: based on the current comparison value, Setting parameters for controlling the source current of the power supply; as well as generating a control signal for changing a variable resistance of a resistance setting unit based on the parameter, The resistance setting unit is further configured to: change the resistance value of the variable resistor based on the control signal, where the load current changes based on the changing source current and the changing resistance value, The controller is further configured to: based on the current comparison value, control the power supply and the resistance setting unit to switch between a maximum current mode of supplying a constant current and a normal mode of supplying a source current for driving a load.
12. The power management integrated circuit modeling system according to claim 11, wherein: The parameters that are set are: The first parameter is used to set the positive supply voltage level of the power supply; A second parameter is used to limit the maximum current of the power supply; and The third parameter is used to limit the change of current over time.
13. The power management integrated circuit modeling system according to claim 11, wherein: Data on the current waveform used by the load is stored in the controller, The controller is further configured to use the current waveform data to perform power distribution network analysis.
14. A method of operating a power management integrated circuit modeling system for power distribution network analysis, the method comprising: controlling a power supply that supplies a source current for driving a load; monitoring the load current supplied to the load; generating a current comparison value by comparing a first current value of the load current at a current moment with a second current value of the load current at a previous moment; Based on the current comparison value, Change the resistance value of the variable resistor; as well as Controlling the power supply changes the source current, where the load current changes based on the changing source current and the changing resistance value, The method further includes: based on the current comparison value, controlling the power supply and the variable resistor to switch between a maximum current mode of supplying a constant current and a normal mode of supplying a source current for driving a load.
15. The method according to claim 14, wherein: The step of changing the resistance value of the variable resistor includes controlling the variable resistor to switch from the normal mode to the maximum current mode supplying a constant current based on a current comparison value being greater than a maximum comparison value in a normal mode supplying a source current for driving a load.
16. The method according to claim 15, wherein: The step of controlling the variable resistor to switch from the normal mode to the maximum current mode includes changing the resistance value of the variable resistor from a first value to a second value smaller than the first value.
17. The method according to claim 15, wherein: The step of controlling the variable resistor to switch from the normal mode to the maximum current mode includes: changing the resistance value of the variable resistor so that the source current becomes the maximum current.
18. The method according to claim 15, wherein: In the maximum current mode, the output voltage level of the power supply is maintained below or equal to the supply voltage value of the power supply.
19. The method according to claim 14, wherein: The step of changing the resistance value of the variable resistor includes: based on the load current used by the load during the maximum current mode of supplying a constant current being reduced to less than or equal to the maximum current and the decoupling capacitor of the load being fully charged, controlling the variable resistor to switch from the maximum current mode to the normal mode of supplying a source current for driving the load.
20. The method according to claim 19, wherein: The step of controlling the variable resistor to switch from the maximum current mode to the normal mode includes: changing the resistance value of the variable resistor to infinity.
21. The method according to claim 19, wherein: In the normal mode, the output voltage level of the power supply is maintained at the power supply voltage value of the power supply, and the source current is maintained not to exceed the maximum current.
Citation Information
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Semiconductor device for monitoring a reverse voltage
CN108427028A