Display device

Abstract

A display device is provided in which defects caused by external light reflection in a non-display area are minimized. The display device includes a display panel and a touch unit arranged on the display panel. The display panel may include: a substrate including a display area and a non-display area arranged around the display area; an insulating member including a valley portion, the valley portion being defined as an opening arranged along the outside of the display area in the non-display area; and a display unit arranged in the display area and including a light-emitting element electrically connected to a thin film transistor. The touch unit may include an anti-reflection unit, the anti-reflection unit overlapping the valley portion and configured to reduce the reflectivity of external light.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2018-0171136 filed on December 27, 2018, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0002] Example embodiments of the present disclosure relate to a display device, and more particularly, to a display device in which defects caused by external light reflection in a non-display area are minimized. Background Art

[0003] Among various display devices, organic light emitting display devices have vivid colors, wide viewing angles, excellent contrast, and fast response speeds, and thus have attracted much attention as next-generation display devices.

[0004] Generally, an organic light emitting display device includes a thin film transistor and an organic light emitting diode formed on a substrate, and the organic light emitting diode operates by emitting light in response to a current supplied by the thin film transistor. The organic light emitting display device can be used as a display unit of a miniaturized product such as a mobile phone, or as a display unit of a large product such as a television.

[0005] An organic light-emitting display device may include a display area in which pixels are arranged and a non-display area outside the display area. Since the non-display area of ​​the organic light-emitting display device is generally formed along the edge of the substrate, a structure for preventing external moisture from penetrating is arranged. The formation of these structures for preventing external moisture from penetrating may cause problems, such as the possibility that external light may be reflected by the structure and light leakage may occur inside the non-display area. Summary of the invention

[0006] Example embodiments of the present disclosure include a display device in which defects caused by external light reflection in a non-display area are minimized. However, it should be understood that the example embodiments described herein should be considered in a descriptive sense only and not for limiting the present disclosure.

[0007] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented example embodiments.

[0008] According to an exemplary embodiment of the present disclosure, a display device includes a display panel and a touch unit arranged on the display panel. The display panel may include: a substrate including a display area and a non-display area arranged around the display area; an insulating member including a valley portion, the valley portion being defined as an opening arranged along the outer side of the display area in the non-display area; and a display unit arranged in the display area and including a light-emitting element electrically connected to a thin film transistor. The touch unit may include an anti-reflection unit overlapping the valley portion and configured to reduce the reflectivity of external light.

[0009] The touch unit may be directly disposed on the display panel, and may include: a sensing electrode corresponding to the display area; and a signal line corresponding to the non-display area and electrically connected to the sensing electrode.

[0010] The sensing electrode may include: a first conductive layer; a second conductive layer disposed on the first conductive layer; a first insulating layer disposed between the first conductive layer and the second conductive layer; and a second insulating layer disposed on the second conductive layer.

[0011] The anti-reflection unit may include the same material as that of the second conductive layer.

[0012] The sensing electrodes may have a grid shape.

[0013] The sensing electrode may include a first sensing electrode and a second sensing electrode intersecting the first sensing electrode, and the signal line may include a first signal line connected to the first sensing electrode and a second signal line connected to the second sensing electrode.

[0014] At least a portion of the signal line may overlap the valley portion.

[0015] The anti-reflection unit may include at least a portion of the signal line.

[0016] The touch unit may further include a dummy layer to which the electrical signal is not applied, the dummy layer being arranged on an outer side of the signal line, and at least a portion of the dummy layer overlapping the valley portion.

[0017] The anti-reflection unit may include at least a portion of the dummy layer.

[0018] The touch unit may further include: an anti-static discharge line disposed on an outer side of the signal line, and at least a portion of the anti-static discharge line overlaps the valley portion.

[0019] The anti-reflection unit may include at least a portion of an anti-static discharge line.

[0020] The touch unit may further include: a protection line disposed at an outermost portion of the signal line and configured to prevent signal interference with the signal line, and at least a portion of the protection line overlaps the valley portion.

[0021] The anti-reflection unit may include at least a portion of the guard line.

[0022] The width of the anti-reflection unit may be greater than the width of the valley portion.

[0023] The light emitting element may include: a pixel electrode; a common electrode arranged on the pixel electrode; and an emission layer arranged between the pixel electrode and the common electrode. The display panel may further include: an encapsulation unit arranged on the common electrode, the encapsulation unit including: a first inorganic encapsulation layer; a second inorganic encapsulation layer arranged on the first inorganic encapsulation layer; and an organic encapsulation layer arranged between the first inorganic encapsulation layer and the second inorganic encapsulation layer. The touch unit may be arranged on the second inorganic encapsulation layer.

[0024] The common electrode may extend to a portion of the non-display area and may cover the valley.

[0025] The display area of ​​the display panel may include rounded corner portions.

[0026] A partial area of ​​the touch unit may have a predetermined curvature to correspond to the shape of the display area.

[0027] The insulating member may further include: a first insulating layer; and a second insulating layer disposed on the first insulating layer. The valley may include a first opening defined in the first insulating layer and a second opening defined in the second insulating layer.

[0028] The display unit may further include: a planarization layer arranged on the thin film transistor to cover the thin film transistor; and a pixel defining layer arranged on the planarization layer and including an opening defining an emission area of ​​the light emitting element, wherein the first insulating layer may include the same material as that of the planarization layer, and the second insulating layer may include the same material as that of the pixel defining layer.

[0029] The insulating member may further include: a first insulating layer; a second insulating layer disposed on the first insulating layer; and a third insulating layer disposed on the second insulating layer. The valley may include: a first opening defined in the first insulating layer; a second opening defined in the second insulating layer; and a third opening defined in the third insulating layer.

[0030] The display unit may also include: a first planarization layer, arranged on the thin film transistor to cover the thin film transistor; a second planarization layer, arranged on the first planarization layer; and a pixel defining layer, arranged on the second planarization layer and including an opening that defines an emission area of ​​the light emitting element, wherein the first insulating layer may include the same material as that of the first planarization layer, the second insulating layer may include the same material as that of the second planarization layer, and the third insulating layer may include the same material as that of the pixel defining layer.

[0031] The valley portion may surround an outer portion of the display area in a plan view, and may have a shape in which at least one side of the valley portion is open.

[0032] The valley portion may have a stepped structure of two or more steps.

[0033] The inner surface of the valley portion may have a tapered inclined surface.

[0034] According to an example embodiment of the present disclosure, a display device includes: a substrate including a display area and a non-display area arranged around the display area; a display unit arranged in the display area and including a light emitting element electrically connected to a thin film transistor; an insulating member extending from the display area and including a valley, the valley being defined as an opening arranged along an outer side of the display area, and at least a portion of the insulating member being arranged in the non-display area; an encapsulation unit including at least one inorganic layer and at least one organic layer and arranged on the light emitting element to encapsulate the light emitting element; and a touch unit arranged on the encapsulation unit and including a sensing electrode corresponding to the display area, a signal line corresponding to the non-display area and connected to the sensing electrode, and a dummy layer arranged on one side of the signal line, the dummy layer overlapping the valley.

[0035] The sensing electrodes may include a plurality of first sensing electrodes and a plurality of second sensing electrodes, the signal lines may include a plurality of first signal lines respectively connected to the plurality of first sensing electrodes and a plurality of second signal lines respectively connected to the plurality of second sensing electrodes, and the dummy layer may be provided between a first signal line arranged at an outermost portion among the plurality of first signal lines and a second signal line arranged at an outermost portion among the plurality of second signal lines.

[0036] According to an example embodiment of the present disclosure, a display device includes: a substrate including a display area and a non-display area arranged around the display area; a display unit arranged in the display area and including a light emitting element electrically connected to a thin film transistor; an insulating member extending from the display area and including a valley, the valley being defined as an opening arranged along the outside of the display area, and at least a portion of the insulating member being arranged in the non-display area; an encapsulation unit including at least one inorganic layer and at least one organic layer and arranged on the light emitting element to encapsulate the light emitting element; and a touch unit arranged on the encapsulation unit and including an anti-reflection unit, the anti-reflection unit being configured to reduce the reflectivity of external light, wherein, in a plan view, the anti-reflection unit may include at least a first portion overlapping the entirety of the valley and a second portion surrounding the first portion and not overlapping the valley.

[0037] The touch unit may include: a sensing electrode corresponding to a display area; and a signal line corresponding to a non-display area and electrically connected to the sensing electrode; wherein the anti-reflection unit may include at least one of a portion of the signal line, a portion of the protection line, a portion of the anti-static discharge line, and a portion of the dummy layer arranged on one side of the signal line. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] These and / or other aspects of the present disclosure will become apparent and more easily understood through the following description of embodiments in conjunction with the accompanying drawings, in which:

[0039] Figure 1 is a plan view of a display device according to an exemplary embodiment of the present disclosure;

[0040] Figure 2 yes Figure 1 A cross-sectional view of a display device;

[0041] Figure 3 yes Figure 1 A plan view of a display panel of a display device;

[0042] Figure 4 is an equivalent circuit diagram of a pixel according to an example embodiment of the present disclosure;

[0043] Figure 5 is a cross-sectional view of a stacked structure of a display panel and a touch unit in a display device according to an exemplary embodiment of the present disclosure;

[0044] Figure 6 is a plan view of a touch unit of a display device according to an exemplary embodiment of the present disclosure;

[0045] Figure 7 is a cross-sectional view of a display panel of a display device according to an exemplary embodiment of the present disclosure;

[0046] Figure 8 yes Figure 7 a cross-sectional view of a portion of a display area;

[0047] Fig. 9 is a cross-sectional view of a display panel of a display device according to an exemplary embodiment of the present disclosure;

[0048] Fig.10 and Fig.11 are cross-sectional views of a portion of a display device according to an example embodiment of the present disclosure;

[0049] Fig.12 is a cross-sectional view of a portion of a display device according to an example embodiment of the present disclosure; and

[0050] Figures 13 to 18is a plan view of a portion of a display device according to an example embodiment of the present disclosure.

[0051] because Figures 1 to 18 The drawings in the drawings are intended for illustrative purposes, and therefore the elements in the drawings are not necessarily drawn to scale. For example, some elements may be enlarged or exaggerated for the purpose of clarity. DETAILED DESCRIPTION

[0052] Since the disclosure allows various changes and many embodiments, the example embodiments of the present disclosure will be shown in the drawings and described in detail in the written description. When referring to the example embodiments described with reference to the drawings, the effects and features of the present disclosure and their implementation methods will be obvious. However, the present disclosure can be implemented in many different forms and should not be interpreted as being limited to the specific example embodiments set forth herein.

[0053] Hereinafter, the present disclosure will be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the present disclosure are shown. When describing with reference to the accompanying drawings, the same reference numerals in the drawings represent the same or corresponding elements, and thus repeated description thereof will be omitted.

[0054] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0055] Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list.

[0056] It will be understood that although the terms "first", "second", etc. may be used herein to describe various components, these components should not be limited by these terms. These components are only used to distinguish one component from another component.

[0057] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0058] It will also be understood that the terms “comprises / includes” and / or variations thereof used herein specify the presence of stated features and / or components, but do not preclude the presence or addition of one or more other features and / or components.

[0059] It will be understood that when a layer, region or component is referred to as being "formed on" another layer, region or component, the layer, region or component may be directly or indirectly formed on the other layer, region or component. That is, for example, there may be intervening layers, regions or components.

[0060] In the following examples, the x-axis, y-axis, and z-axis are not limited to the three axes of the rectangular coordinate system, and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. In addition, the x-axis, y-axis, and z-axis can correspond to the first direction D1, the second direction D2, and the third direction D3, respectively.

[0061] When a certain exemplary embodiment is implemented differently, a specific process order may be performed in a different order than described. For example, two processes described successively may be performed substantially simultaneously or in an order opposite to the described order.

[0062] Figure 1 is a plan view of a display device 1 according to an exemplary embodiment of the present disclosure.

[0063] Reference Figure 1 , the display device 1 according to the exemplary embodiment of the present disclosure includes a display area DA displaying an image and a non-display area NDA adjacent to the display area DA. The non-display area NDA is an area in which an image is not displayed. The display area DA may be surrounded by the non-display area NDA. Photos, images of moving images or time, and images such as icons may be displayed in the display area DA.

[0064] Although the exemplary embodiments of the present disclosure illustrate a display device 1 including a flat display surface, the present disclosure is not limited thereto. For example, the display device 1 may include a curved display surface or a three-dimensional display surface. A three-dimensional display surface in which an image is generated within a display volume rather than on a fixed surface may include multiple display areas, such as a multi-prism surface. Multiple display areas may be positioned in different directions.

[0065] Although the display device 1 according to the present exemplary embodiment may include a flexible display device, the present disclosure is not limited thereto, and the display device 1 according to the exemplary embodiment of the present disclosure may include a rigid display device 1. The present exemplary embodiment has shown a display device 1 applicable to a mobile phone as an example. An electronic module, a camera module, a power module, etc. mounted on a mainboard may be arranged in a bracket / casing together with the display device 1 to constitute a mobile phone. The display device 1 according to the exemplary embodiment of the present disclosure may be applicable not only to large electronic devices such as televisions and monitors, but also to small and medium-sized electronic devices such as tablet computers, car navigation devices, game console controllers, and smart watches.

[0066] like Figure 1As shown in , the display area DA of the display device 1 may have a substantially quadrilateral shape. The four corner portions DA-C of the display area DA may have a circular shape with a predetermined curvature. Therefore, a partial area of ​​the touch unit TU to be described may have a predetermined curvature to correspond to the shape of the display area DA. The non-display area NDA may surround the display area DA and may also have a quadrilateral shape with four rounded corners. However, the present disclosure is not limited thereto, and the display area DA and the non-display area NDA may have various shapes and may be designed relatively.

[0067] Figure 2 yes Figure 1 1 is a cross-sectional view of a display device 1 and is simply shown to illustrate the stacking relationship of functional panels and / or functional units constituting the display device 1.

[0068] Reference Figure 2 , the display device 1 according to an exemplary embodiment of the present disclosure may include a display panel DP, a touch unit TU, a polarization unit PU, and a window unit WU, which may be formed sequentially. However, the present disclosure is not limited thereto. At least some of the display panel DP, the touch unit TU, the polarization unit PU, and the window unit WU may be formed by a continuous process or may be bonded to each other by an adhesive member. As an example, Figure 2 An optically clear adhesive OCA is shown as an adhesive member. The adhesive described below may include a common adhesive or a bonding agent. The optically clear adhesive OCA may be formed of a pre-coated film or of a liquid paste. Typically, the optically clear adhesive OCA may require light transmittance and may provide impact resistance. In an exemplary embodiment of the present disclosure, the polarization unit PU and the window unit WU may be replaced by different elements or may be omitted.

[0069] The touch unit TU is directly disposed on the display panel DP. In this specification, when the element B is directly disposed on the element A, no separate adhesive layer / adhesive member is disposed between the element A and the element B. After the element A is formed, the element B is formed on the base surface of the element A through a continuous process.

[0070] The display module DM may be defined by including a display panel DP and a touch unit TU disposed directly on the display panel DP. An optically clear adhesive OCA is disposed between the display module DM and the polarization unit PU and between the polarization unit PU and the window unit WU, respectively.

[0071] The display panel DP generates an image, and the touch unit TU obtains coordinate information of an external input (e.g., a touch event). The display module DM according to an exemplary embodiment of the present disclosure may further include a protective member arranged on the rear surface of the display panel DP. The protective member and the display panel DP may be bonded to each other by an adhesive member.

[0072] The display panel DP according to the exemplary embodiment of the present disclosure may include a light-emitting display panel, and is not specifically limited. For example, in the exemplary embodiment of the present disclosure, the display panel DP may include an organic light-emitting display panel or a quantum dot light-emitting display panel. The emission layer of the organic light-emitting display panel may include an organic light-emitting material. The emission layer of the quantum dot light-emitting display panel may include quantum dots and quantum rods. The quantum dots and quantum rods may be small semiconductor particles of a few nanometers in size. Hereinafter, the display panel DP is described as an organic light-emitting display panel.

[0073] The polarization unit PU reduces the reflectivity of external light incident from above the window unit WU. The polarization unit PU according to the exemplary embodiment of the present disclosure may include a retarder and a polarizer. The retarder may include a film-type retarder or a liquid crystal retarder. The retarder may include a λ / 2 retarder and / or a λ / 4 retarder. In the exemplary embodiment of the present disclosure, the polarization unit PU may include a two-layer retarder, wherein the first retarder has a λ / 2 retardation value, and the second retarder is located below the first retarder and has a λ / 4 retardation value. In addition, the polarizer may include a film-type polarizer or a liquid crystal polarizer. The film-type polarizer may include a stretchable synthetic resin film, and the liquid crystal polarizer may include liquid crystals arranged in a predetermined arrangement. The film-type polarizer may be a uniaxially stretched film or a biaxially stretched film. Each of the retarder and the polarizer may also include a protective film. For example, the polarizer may be interposed between two protective films. The retarder and the polarizer itself or its protective film may be defined as the substrate layer of the polarization unit PU.

[0074] The structures of the display panel DP and the touch unit TU are described in detail below.

[0075] Figure 3 yes Figure 1 1 is a plan view of a display panel DP of a display device 1.

[0076] Reference Figure 3 The display panel DP includes a display unit 10 , a first scan driver 20 , a second scan driver 30 , a terminal unit 40 , a data driver 50 , a driving voltage supply line 60 , and a common voltage supply line 70 , which are arranged on a substrate 100 .

[0077] The substrate 100 may include, for example, silicon oxide (SiO 2 ) as a main component of glass, metal or organic material as an example. In an example embodiment of the present disclosure, the substrate 100 may include a flexible material. For example, although the substrate 100 may include a flexible plastic material such as polyimide, the present disclosure is not limited thereto.

[0078] In example embodiments of the present disclosure, the plastic material may include, for example, polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyacrylate, polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), cellulose acetate propionate (CAP), cycloolefin polymers, and cycloolefin copolymers.

[0079] The display unit 10 includes pixels P each connected to a scan line SL extending in a first direction D1, and a data line DL and a driving voltage line PL extending in a second direction D2 intersecting the first direction D1. For example, the scan lines SL may be spaced apart from each other in the second direction D2 and extend in the first direction D1, and the data lines DL and the driving voltage lines PL may be spaced apart from each other in the first direction D1 and extend in the second direction D2.

[0080] Each pixel P emits light such as red, green, blue or white. In an exemplary embodiment of the present disclosure, each pixel P may include an organic light emitting diode. The display unit 10 generates a predetermined image by light emitted from the pixel P. The display area DA is defined by the pixels P. In an exemplary embodiment of the present disclosure, the pixels P may be arranged in a matrix shape, but the present disclosure is not limited thereto. For example, the pixels P may be arranged in a pentile matrix shape or a diamond shape. In this specification, the non-display area NDA is an area in which the pixels P are not arranged, and is an area in which no image is generated.

[0081] Although the display unit 10 has a generally quadrilateral shape, the present disclosure is not limited thereto. For example, in various exemplary embodiments of the present disclosure, the display unit 10 may be arranged in a polygonal shape, a circular shape, an elliptical shape, or a shape corresponding to a portion of these shapes. In this exemplary embodiment, the display unit 10 has a quadrilateral shape as a whole, and may have a rounded corner portion in which each edge is curved. For example, the display area DA of the display panel DP may include a rounded corner portion. The substrate 100 on which the display unit 10 is arranged may have a curved edge in at least a portion of the outer edge. The display unit 10 may have a flat surface or a curved surface.

[0082] The first scan driver 20 and the second scan driver 30 are both arranged in the non-display area NDA of the substrate 100, and generate a scan signal and transmit the scan signal to each pixel P through the scan line SL. In an exemplary embodiment of the present disclosure, the first scan driver 20 may be arranged on the left side of the display unit 10, and the second scan driver 30 may be arranged on the right side of the display unit 10. Although the present exemplary embodiment shows a structure in which the first scan driver 20 and the second scan driver 30 are respectively arranged on two opposite sides of the display unit 10, according to an exemplary embodiment of the present disclosure, the scan drivers may be arranged only on one side of the display unit 10.

[0083] The terminal unit 40 is disposed on one end of the substrate 100 and includes a plurality of terminals 41, 42, 44 and 45. The terminal unit 40 is not covered by an insulating layer and is exposed and can be electrically connected to a controller such as a flexible printed circuit board or an integrated circuit (IC) chip.

[0084] The controller changes a plurality of video signals transmitted from the outside into a plurality of video data signals, and transmits the changed video signals to the data driver 50 through the terminal 41. In addition, the controller can receive a vertical synchronization signal, a horizontal synchronization signal, and a clock signal, generate a control signal for controlling the driving of the first scan driver 20, the second scan driver 30, and the data driver 50, and transmit the relevant control signal to the relevant elements. For example, the control signal provided by the controller to the first scan driver 20 and the second scan driver 30 may include a vertical synchronization signal for controlling the operation of the first scan driver 20 and the second scan driver 30 and at least one clock signal for determining the output timing of the signal. The controller transmits the driving voltage ELVDD and the common voltage ELVSS to the driving voltage supply line 60 and the common voltage supply line 70 through the terminals 42 and 45, respectively.

[0085] The data driver 50 is disposed in the non-display area NDA of the substrate 100 and generates a data signal and transmits the data signal to each pixel P through the data line DL. The data driver 50 may be disposed on one side of the display unit 10 , for example, between the terminal unit 40 and the display unit 10 .

[0086] The driving voltage supply line 60 is arranged in the non-display area NDA. For example, the driving voltage supply line 60 may be arranged between the data driver 50 and the display unit 10. The driving voltage supply line 60 provides the driving voltage ELVDD to the pixel P. The driving voltage supply line 60 may extend in the first direction D1 and may be connected to a plurality of driving voltage lines PL arranged in the first direction D1 and extending in the second direction D2.

[0087] The common voltage supply line 70 is disposed in the non-display area NDA and supplies a common voltage ELVSS to a common electrode 230 of an organic light emitting diode of a pixel P (see FIG. 2 ). Figures 7 to 9 ). For example, the common voltage supply line 70 has a ring shape in which one side of the common voltage supply line 70 is open and may extend along an edge of the substrate 100 except the terminal unit 40. For example, the ring shape of the common voltage supply line 70 may have one side opened, and the terminal unit 40 is disposed at the opened side.

[0088] The valley portion VP may be arranged in the non-display area NDA along the outer side of the display area DA. The valley portion VP may be arranged between the display unit 10 and the common voltage supply line 70. The valley portion VP overlaps the first scan driver 20 and the second scan driver 30 in a partial area of ​​the valley portion VP (see Figure 7 ), but the present disclosure is not limited thereto. For example, the valley VP may not overlap with the first scan driver 20 and the second scan driver 30. In this specification, when element A is described as overlapping with element B, element A overlaps with element B in the third direction D3. In an exemplary embodiment of the present disclosure, the valley VP may be arranged between the emission control driver and the first scan driver 20 and the second scan driver 30.

[0089] The valley portion VP may have a ring shape in which one side of the valley portion VP is open and may not be formed in a partial area facing the data driver 50. For example, the valley portion VP may surround an outer portion of the display area DA in a plan view and may have a shape in which at least one side of the valley portion VP is open. The valley portion VP is designed to be used for displaying the non-display area NDA by removing the insulating layer ILL (see FIG. Figure 7 ) to block impurities introduced into the display area DA. The insulating layer ILL may also be referred to as an insulating member. Since a plurality of wirings are arranged on a side facing the data driver 50, impurities may be easily blocked. On the contrary, impurities are not easily blocked in the remaining areas. Therefore, a valley VP as in the present exemplary embodiment may be provided. Therefore, the insulating member may include a valley VP, and the valley VP is defined as an opening arranged along the outer side of the display area DA in the non-display area NDA. For example, the valley VP is an opening formed in the insulating member.

[0090] Figure 4 is an equivalent circuit diagram of a pixel P according to an example embodiment of the present disclosure.

[0091] Reference Figure 4 , each pixel P includes a pixel circuit PC connected to a scan line SL and a data line DL and a light emitting diode (eg, an organic light emitting diode OLED) connected to the pixel circuit PC.

[0092] The pixel circuit PC includes a driving thin film transistor T1, a switching thin film transistor T2 and a storage capacitor Cst. The switching thin film transistor T2 is connected to the scan line SL and the data line DL, and transmits a data signal input through the data line DL to the driving thin film transistor T1 in response to a scan signal Sn input through the scan line SL.

[0093] The storage capacitor Cst is connected to the switching thin film transistor T2 and the driving voltage line PL, and stores a voltage corresponding to the difference between the voltage transmitted from the switching thin film transistor T2 and the driving voltage ELVDD supplied to the driving voltage line PL. For example, the storage capacitor Cst may include a first electrode coupled to the switching thin film transistor T2 and a second electrode receiving the driving voltage ELVDD. In addition, the storage capacitor Cst may be charged with a voltage corresponding to the data signal received from the switching thin film transistor T2.

[0094] The driving thin film transistor T1 is connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL through the organic light emitting diode OLED in response to the voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED can emit light with a predetermined brightness by using the driving current.

[0095] although Figure 4 A pixel circuit PC including two thin film transistors T1 and T2 and one storage capacitor Cst is shown, but the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, a pixel P may include a pixel circuit PC including three or more thin film transistors and two or more capacitors.

[0096] Figure 5 is a cross-sectional view of a stacked structure of a display panel DP and a touch unit TU in a display device 1 according to an exemplary embodiment of the present disclosure, Figure 6 is a plan view of a touch unit TU of the display device 1 according to an exemplary embodiment of the present disclosure.

[0097] Figure 5 A cross section of a stacked structure of a display panel DP and a touch unit TU is shown. Figure 5 The display panel DP is simply shown to illustrate the stacking relationship of the touch unit TU. Figure 2 As shown in , the polarization unit PU and the window unit WU may be stacked on the touch unit TU.

[0098] The touch unit TU may have a multilayer structure. The touch unit TU includes a sensing electrode, a signal line connected to the sensing electrode, and at least one insulating layer. For example, the touch unit TU may be directly arranged on the display panel DP, and may include a sensing electrode corresponding to the display area DA and a signal line corresponding to the non-display area NDA and electrically connected to the sensing electrode. For example, the sensing electrode may be mainly arranged in the display area DA, and the signal line may be mainly arranged in the non-display area NDA. The touch unit TU may sense external pressure by using, for example, a capacitive method. In the present disclosure, the operating method of the touch unit TU is not specifically limited. In an exemplary embodiment of the present disclosure, the touch unit TU may sense external pressure by using an electromagnetic induction method or a pressure sensing method.

[0099] like Figure 5 As shown in , the touch unit TU according to the exemplary embodiment of the present disclosure may include a first conductive layer CL1, a first insulating layer IL1, a second conductive layer CL2, and a second insulating layer IL2. Each of the first conductive layer CL1 and the second conductive layer CL2 may have a single-layer structure or a stacked multilayer structure. The conductive layer of the single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include, for example, one of molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), and alloys thereof. The transparent conductive layer may include a transparent conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium tin zinc oxide (ITZO). In addition, the transparent conductive layer may include a conductive polymer (such as poly (3,4-ethylene-dioxythiophene) (PEDOT)), a metal nanowire, and graphene.

[0100] The conductive layer of the multilayer structure may include a multi-metal layer. The multi-metal layer may have a three-layer structure of, for example, titanium / aluminum / titanium (Ti / Al / Ti). The conductive layer of the multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0101] Each of the first conductive layer CL1 and the second conductive layer CL2 includes a plurality of patterns. Hereinafter, it is described that the first conductive layer CL1 includes a first conductive pattern and the second conductive layer CL2 includes a second conductive pattern. Each of the first conductive pattern and the second conductive pattern may include a sensing electrode and a signal line. On the other hand, the sensing electrodes may each include a first conductive layer CL1 and / or a second conductive layer CL2 located in the display area DA. For example, in the display area DA, the sensing electrode may include a first conductive layer CL1, a second conductive layer CL2 arranged on the first conductive layer CL1, a first insulating layer IL1 arranged between the first conductive layer CL1 and the second conductive layer CL2, and a second insulating layer IL2 arranged on the second conductive layer CL2.

[0102] The stacking structure and material of the sensing electrode can be determined by considering the sensing sensitivity. RC delay affects the sensing sensitivity. Since the sensing electrode including the metal layer has a lower resistance than the sensing electrode including the transparent conductive layer, the RC value can be reduced. Therefore, the charging time of the capacitor defined between the sensing electrodes can be reduced. Compared with the sensing electrode including the metal layer, the sensing electrode including the transparent conductive layer is not visible to the user and has an increased input area and thus increases the capacitance.

[0103] In order to prevent the sensing electrode including the metal layer from being seen by the user, as described below, the sensing electrode including the metal layer may have a mesh shape. In addition, the packaging unit 150 (see FIG. 1 ) to be described may be adjusted. Figure 7 ) so that the noise generated by the elements of the display element layer does not affect the touch unit TU. Each of the first insulating layer IL1 and the second insulating layer IL2 may have a single-layer or multi-layer structure. Each of the first insulating layer IL1 and the second insulating layer IL2 may include an inorganic material, an organic material, or a composite material.

[0104] At least one of the first insulating layer IL1 and the second insulating layer IL2 may include an inorganic layer. The inorganic layer may include, for example, aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), silicon oxide (SiO 2 ), silicon oxynitride (SiON), zirconium oxide (ZrO 2 ) and hafnium oxide (HfO 2 ) at least one of.

[0105] At least one of the first insulating layer IL1 and the second insulating layer IL2 may include an organic layer. The organic layer may include, for example, at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0106] like Figure 6As shown in, the touch unit TU may include first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5, first signal lines SL1-1, SL1-2, SL1-3, SL1-4 and SL1-5 (hereinafter collectively referred to as "SL1") connected to the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5, respectively, second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4, and second signal lines SL2-1, SL2-2, SL2-3 and SL2-4 (hereinafter collectively referred to as "SL2") connected to the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4, respectively.

[0107] The touch unit TU may further include optical dummy electrodes arranged in boundary regions between the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4.

[0108] Since the thin film encapsulation layer includes the following reference Figure 7 At least one organic encapsulation layer 152 described, therefore, the thin film encapsulation layer can provide a relatively flat substrate surface. Therefore, even if the elements of the touch unit TU are formed by a continuous process, the defect rate can be reduced. Since the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4 are arranged in the display area DA with a reduced step difference, the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4 can have a uniform thickness. Here, the step difference may refer to the vertical portion of the step between the steps. The vertical portion may have a vertical surface or an inclined surface. The stress applied to the region overlapping with the step difference between the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4 can be reduced. Alternatively or additionally, the first signal lines SL1-1, SL1-2, SL1-3, SL1-4 and SL1-5 and the second signal lines SL2-1, SL2-2, SL2-3 and SL2-4 can be arranged in the non-display area NDA with reduced step difference so that they can have uniform thickness. The stress applied to the region overlapping with the step difference between the first signal lines SL1-1, SL1-2, SL1-3, SL1-4 and SL1-5 and the second signal lines SL2-1, SL2-2, SL2-3 and SL2-4 can be reduced.

[0109] The first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 intersect with the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4. The first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 may be arranged to be spaced apart from each other in the second direction D2, and each of the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 may extend in the first direction D1. The second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 may be arranged to be spaced apart from each other in the first direction D1, and each of the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 may extend in the second direction D2.

[0110] Each of the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 includes a first sensor SP1 and a first connector CP1. Each of the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 includes a second sensor SP2 and a second connector CP2. Two first sensors SP1, respectively arranged at two opposite ends of the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 among the first sensors SP1, may have a size smaller than that of the first sensor SP1 arranged at the center (e.g., half the size). Two second sensors SP2, respectively arranged at two opposite ends of the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 among the second sensors SP2, may have a size smaller than that of the second sensor SP2 arranged at the center (e.g., half the size).

[0111] although Figure 6 The first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 according to the example embodiment of the present disclosure are shown, but their shapes are not limited. In the example embodiment of the present disclosure, the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 may have a shape (e.g., a bar shape) in which the sensor and the connector are not distinguished. Although the first sensor SP1 and the second sensor SP2 each having a rhombus shape are shown as an example, the present disclosure is not limited thereto. For example, the first sensor SP1 and the second sensor SP2 may have other polygonal shapes.

[0112] The first sensors SP1 in each of the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 are aligned in the first direction D1, and the second sensors SP2 in each of the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 are aligned in the second direction D2. Each first connector CP1 connects the first sensors SP1 adjacent to each other, and each second connector CP2 connects the second sensors SP2 adjacent to each other.

[0113] The first signal lines SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5 are connected to one end of the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5, respectively. The second signal lines SL2-1, SL2-2, SL2-3, and SL2-4 are connected to two opposite ends of the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4. However, the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, the first signal lines SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5 may also be connected to two opposite ends of the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5. In addition, in an exemplary embodiment of the present disclosure, the second signal lines SL2-1, SL2-2, SL2-3, and SL2-4 may be connected to only one end of the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4, respectively.

[0114] Compared with the touch unit TU including the second signal lines SL2-1, SL2-2, SL2-3 and SL2-4 connected to only one end of the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4, respectively, according to Figure 6 In the present exemplary embodiment shown in , the second signal lines SL2-1, SL2-2, SL2-3 and SL2-4 are connected to two opposite ends of the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4, so that the sensing sensitivity can be enhanced. Since the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4 are longer than the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5, a voltage drop of the detection signal (or transmission signal) occurs, thereby reducing the sensing sensitivity. According to the present exemplary embodiment, by providing the detection signal (or transmission signal) through the second signal lines SL2-1, SL2-2, SL2-3 and SL2-4 connected to two opposite ends of the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4, the voltage drop of the detection signal (or transmission signal) can be prevented, thereby preventing the reduction of the sensing sensitivity.

[0115] In an exemplary embodiment of the present disclosure, Figure 6 Unlike shown in the figure, the first sensing electrodes IE1-1 to IE1-n can be formed to be longer than the second sensing electrodes IE2-1 to IE2-m (for example, m>n), and the reduction in sensing sensitivity can be prevented by connecting the first signal lines SL1-1 to SL1-n to two opposite ends of the first sensing electrodes IE1-1 to IE1-n to prevent the voltage drop of the detection signal (or the transmission signal).

[0116] The first signal lines SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5 and the second signal lines SL2-1, SL2-2, SL2-3, and SL2-4 may each be connected to a pad (also referred to as a "pad" or "pad") unit PD located on one side. The pad unit PD may be aligned in the pad area PDA.

[0117] In an exemplary embodiment of the present disclosure, the positions of the first signal lines SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5 and the second signal lines SL2-1, SL2-2, SL2-3, and SL2-4 may be exchanged with each other. Figure 6 Differently, the first signal lines SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5 may be arranged on the left side, and the second signal lines SL2-1, SL2-2, SL2-3, SL2-4 may be arranged on the right side.

[0118] like Figure 6 As shown in FIG, the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4 may have a mesh shape. Since the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4 have a mesh shape, the display panel DP (see FIG. 4 ) may be reduced. Figure 5 ) and the parasitic capacitance between the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4. In addition, as described below, since the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4 are not in contact with the emission area PXA (see Figure 8), so the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4 and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3 and IE2-4 are not seen by a user of the display device.

[0119] The first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 having a mesh shape may include, for example, one of silver (Ag), aluminum (Al), copper (Cu), chromium (Cr), nickel (Ni), and titanium (Ti) that can be processed at a low temperature, but the present disclosure is not limited thereto. Due to the above-mentioned low temperature process, even if the touch unit TU is formed by a continuous process, the organic light emitting diode OLED (see Figure 7 ) damage.

[0120] The anti-static discharge line ESL may be arranged outside the first signal lines SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5 and the second signal lines SL2-1, SL2-2, SL2-3, and SL2-4, that is, arranged at the outermost portion of the touch unit TU. No signal is applied to the anti-static discharge line ESL, but a constant voltage is applied to the anti-static discharge line ESL.

[0121] Figure 7 is a cross-sectional view of a display panel DP of a display device 1 according to an exemplary embodiment of the present disclosure. Figure 7 is along Figure 3 A cross-sectional view taken along line AA'.

[0122] Reference Figure 7 The display device 1 includes a display area DA and a non-display area NDA (see Figures 1 to 3 ). The substrate 100 may include areas corresponding to the display area DA and the non-display area NDA.

[0123] Reference Figure 7 In the display area DA, a buffer layer 101 may be formed on the substrate 100. The buffer layer 101 may block foreign matter or moisture that penetrates through the substrate 100. For example, the buffer layer 101 may include a silicon oxide (SiO x ), silicon nitride (SiN x ) and / or silicon oxynitride (SiON) as examples, and may include a single layer or a multilayer.

[0124] The thin film transistor 130, the storage capacitor, and the organic light emitting diode OLED as the light emitting diode 200 electrically connected to the thin film transistor 130 and the storage capacitor may be positioned over the substrate 100. The thin film transistor 130, the storage capacitor, and the organic light emitting diode OLED are disposed at a position corresponding to the display area DA.

[0125] Figure 7 The thin film transistor 130 may correspond to the reference Figure 4 One of the thin film transistors of the pixel circuit PC is described, for example, the driving thin film transistor T1.

[0126] The thin film transistor 130 includes a semiconductor layer 134 and a gate electrode 136. The semiconductor layer 134 may include, for example, polysilicon. The semiconductor layer 134 may include a channel region 131 overlapped with the gate electrode 136, a source region 132 and a drain region 133 respectively arranged on two opposite sides of the channel region 131, and the source region 132 and the drain region 133 are doped with impurities having a concentration higher than that of the impurities of the channel region 131. Here, the impurities may include N-type impurities or P-type impurities. For example, the N-type impurities may include, for example, phosphorus (P), arsenic (As) or antimony (Sb), and the P-type impurities may include, for example, aluminum (Al), boron (B) or indium (In). The source region 132 and the drain region 133 may be understood as the source electrode and the drain electrode of the thin film transistor 130, respectively.

[0127] Although the present exemplary embodiment describes the case where the semiconductor layer 134 includes polysilicon, the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, the semiconductor layer 134 may include amorphous silicon or an organic semiconductor material.

[0128] The gate insulating layer 103 may be disposed between the semiconductor layer 134 and the gate electrode 136. The gate insulating layer 103 may include an inorganic insulating layer including SiON, SiO x and / or SiN x The gate insulating layer 103 may include a high-k dielectric material, which may have a higher dielectric strength than silicon oxide (SiO x ) has a high dielectric constant. For example, the high-k dielectric material may include, for example, hafnium oxide (HfO 2 ), Hafnium Silicon Oxide (HfSiO 4 ), lanthanum oxide (La 2 O 3 )、ZrO 2 ), zirconium oxide silicon (ZrSiO 4 ), Tantalum Oxide (Ta 2 O 5 ), titanium oxide (TiO 2), barium strontium titanium oxide (BaSrTi 2 O 6 ), barium titanium oxide (BaTiO 3 ), Strontium Titanium Oxide (SrTiO 3 ), yttrium oxide (Y 2 O 3 ), aluminum oxide (Al 2 O 3 ), lead scandium tantalum oxide (Pb(Sc,Ta)O 3 ) and lead zinc niobate (Pb(Zn 1 / 3 Nb 2 / 3 ) 3 ) at least one of.

[0129] The interlayer insulating layer 107 may be disposed on the gate electrode 136. The interlayer insulating layer 107 may include SiON, SiO x and / or an inorganic insulating layer of SiNx, and may include a single layer or a plurality of layers.

[0130] The thin film transistor 130 may include a source electrode 138S and a drain electrode 138D respectively connected to the source region 132 and the drain region 133 of the semiconductor layer 134. The source electrode 138S and the drain electrode 138D may be respectively electrically connected to the source region 132 and the drain region 133 of the semiconductor layer 134 through contact holes passing through the gate insulating layer 103 and the interlayer insulating layer 107.

[0131] Each of the source electrode 138S and the drain electrode 138D may include at least one of Al, Cu, and Ti, and may include a single layer or a multilayer. In an example embodiment of the present disclosure, each of the source electrode 138S and the drain electrode 138D may have a multilayer structure of titanium nitride / aluminum / titanium nitride (TiN / Al / TiN).

[0132] In this exemplary embodiment, the data line DL (see Figure 4 ) and the driving voltage line PL (see Figure 4 ) may be formed on the same layer on which the source electrode 138S and the drain electrode 138D are arranged, and may include the same material as that of the source electrode 138S and the drain electrode 138D.

[0133] The thin film transistor 130 may be covered by a protective layer 109. The protective layer 109 may prevent wirings including metals such as aluminum (Al) that may be damaged by etchants from being exposed to an etching environment during a process of manufacturing the display device 1. The protective layer 109 may extend to the non-display area NDA.

[0134] The planarization layer 113 is arranged on the protective layer 109 and includes an organic insulating material. The organic insulating material may include, for example, an imide-based polymer, a general polymer such as polymethyl methacrylate (PMMA) and polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, or a blend thereof. In an example embodiment of the present disclosure, the planarization layer 113 may include polyimide.

[0135] The pixel electrode 210 is disposed on the planarization layer 113. The pixel defining layer 120 is disposed on the pixel electrode 210 and may include an opening corresponding to each sub-pixel. The pixel defining layer 120 may define a pixel region, that is, may define an emission region PXA (see FIG. 1 ) by including an opening that exposes at least a central portion of the pixel electrode 210. Figure 8 ). In addition, the pixel defining layer 120 can prevent arcing etc. from occurring between the pixel electrode 210 and the common electrode 230 by increasing the distance between the edge of the pixel electrode 210 and the common electrode 230. The pixel defining layer 120 may include, for example, an organic material such as polyimide or a silicon-containing material such as hexamethyldisiloxane (HMDSO).

[0136] The intermediate layer 220 is disposed between the pixel electrode 210 and the common electrode 230 , and may include a low molecular weight material or a polymer material.

[0137] In the case where the intermediate layer 220 includes a low molecular weight material, the intermediate layer 220 may have a structure in which a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), an electron injection layer (EIL), etc. are stacked in a single configuration or a composite configuration. The emission layer (EML) may generate color light corresponding to a pixel and may be interposed between the hole transport layer (HTL) and the electron transport layer (ETL). The intermediate layer 220 may include various organic materials, such as copper phthalocyanine (CuPc), N,N'-di(naphthalene-1-yl)-N,N'-diphenylbenzidine (NPB), and tri-8-hydroxyquinoline aluminum (Alq 3 ) as an example. These layers can be formed by vacuum deposition.

[0138] In the case where the intermediate layer 220 includes a polymer material, the intermediate layer 220 may have a structure including an HTL and an EML. In this case, the HTL may include PEDOT, and the EML may include a polymer material such as a poly(p-phenylene vinylene) (PPV)-based material and / or a polyfluorene-based material.

[0139] The structure of the intermediate layer 220 is not limited thereto and may be various structures. For example, at least one of the layers constituting the intermediate layer 220 may be formed as a whole as the common electrode 230. Alternatively, the intermediate layer 220 may include a patterned layer corresponding to each of the plurality of pixel electrodes 210.

[0140] The common electrode 230 may be arranged in the display area DA and may be arranged on the entire surface of the display area DA. For example, the common electrode 230 may be formed as a whole to cover a plurality of pixels. The common electrode 230 may extend to a portion of the non-display area NDA and may cover the valley VP.

[0141] In an exemplary embodiment of the present disclosure, the display unit 10 may be arranged in the display area DA, and may include a light emitting element such as a light emitting diode 200 electrically connected to the thin film transistor 130. The light emitting element may include a pixel electrode 210, a common electrode 230 arranged on the pixel electrode 210, and an emission layer (EML) arranged between the pixel electrode 210 and the common electrode 230. The pixel defining layer 120 may be arranged on the planarization layer 113, and include an emission area PXA (see FIG. 1 ) defining the light emitting element. Figure 8 ) opening.

[0142] The encapsulation unit 150 may completely cover the display area DA and extend to the non-display area NDA to cover a portion of the non-display area NDA. The encapsulation unit 150 may extend to the outside of the common voltage supply line 70 and may be disposed on the common electrode 230.

[0143] The encapsulation unit 150 may include a first inorganic encapsulation layer 151, a second inorganic encapsulation layer 153, and an organic encapsulation layer 152 disposed between the first inorganic encapsulation layer 151 and the second inorganic encapsulation layer 153. In this case, the encapsulation unit 150 extending to the outside of the common voltage supply line 70 includes the first inorganic encapsulation layer 151 and the second inorganic encapsulation layer 153. The organic encapsulation layer 152 may not extend to the outside of the common voltage supply line 70. In an example embodiment of the present disclosure, the encapsulation unit 150 may include at least one inorganic layer and at least one organic layer, and may be disposed on a light emitting element such as a light emitting diode 200 to encapsulate the light emitting element.

[0144] The touch unit TU may be disposed on the packaging unit 150 (see Figure 8 ). For example, the touch unit TU may be directly disposed on the encapsulation unit 150. According to circumstances, the inorganic insulating layer may be disposed on the encapsulation unit 150, and the touch unit TU may be directly disposed on the inorganic insulating layer (see Figures 10 to 12 ).

[0145] Reference Figure 8, showing the structure of the display panel DP and the touch unit TU corresponding to the display area DA.

[0146] The touch unit TU includes a first conductive layer 310, a second conductive layer 320 disposed on the first conductive layer 310, a first insulating layer 312 disposed between the first conductive layer 310 and the second conductive layer 320, and a second insulating layer 322 disposed on the second conductive layer 320. The first conductive layer 310 and the second conductive layer 320 may correspond to Figure 5 The first conductive layer CL1 and the second conductive layer CL2, the first insulating layer 312 and the second insulating layer 322 may correspond to Figure 5 The first insulating layer IL1 and the second insulating layer IL2 are formed.

[0147] The first conductive layer 310 and the second conductive layer 320 may correspond to Figure 6 As described above, since the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 do not overlap with the emission region PXA, the first sensing electrodes IE1-1, IE1-2, IE1-3, IE1-4, and IE1-5 and the second sensing electrodes IE2-1, IE2-2, IE2-3, and IE2-4 are not visible to the user. The first conductive layer 310 and the second conductive layer 320 may be electrically connected to each other in a partial region through a contact hole defined in the first insulating layer 312.

[0148] Reference Figure 7 In the non-display area NDA, a plurality of dummy pixels DPX may be adjacent to the light emitting diode 200. The dummy pixels DPX do not actually emit light and may include, for example, a patterned intermediate layer. The dummy pixels DPX may be located between the display area DA and the driving circuit area DPC-A.

[0149] The driving circuit area DPC-A is located in the non-display area NDA. For example, the first scan driver 20 is arranged in the driving circuit area DPC-A. The first scan driver 20 may include a thin film transistor TFT-P and a wiring connected to the thin film transistor TFT-P. The thin film transistor TFT-P may be formed during the same process as the process of forming the thin film transistor TFT of the pixel circuit PC. The thin film transistor TFT-P may be covered by a protective layer 109. The buffer layer 101, the gate insulating layer 103, the interlayer insulating layer 107, and the protective layer 109 may extend to the non-display area NDA. The buffer layer 101, the gate insulating layer 103, the interlayer insulating layer 107, and the protective layer 109 may each include an inorganic insulating material. The planarization layer 113 may be arranged on the protective layer 109 and may include an organic insulating material.

[0150] The first scan driver 20 may be covered by the protective layer 109. The protective layer 109 may prevent wirings and the like including metal such as aluminum (Al), which may be damaged by an etchant, from being exposed to an etching environment during a process of manufacturing the display device 1. Figure 7 It is shown in FIG. 1 that the protection layer 109 is also arranged in the display area DA.

[0151] The protective layer 109 may include an inorganic material (such as SiO x 、SiN x In the exemplary embodiment of the present disclosure, the protective layer 109 may include SiN x The protective layer 109 may have a thickness of about To about The thickness of the range.

[0152] The first dam unit DM1 and the second dam unit DM2 are arranged on the protective layer 109. In a plan view, the first dam unit DM1 and the second dam unit DM2 may surround the outside of the display area DA. For example, the first dam unit DM1 may surround the outside of the display area DA, and the second dam unit DM2 may surround the outside of the first dam unit DM1. The first dam unit DM1 and the second dam unit DM2 may prevent the organic encapsulation layer 152 of the encapsulation unit 150 from overflowing to the outside of the substrate 100.

[0153] The first dam unit DM1 may be located above the common voltage supply line 70, and the second dam unit DM2 may be located on one side of the first dam unit DM1 to cover one end of the common voltage supply line 70. One end 75A of the conductive layer 75 may be disposed between the first dam unit DM1 and the common voltage supply line 70. The conductive layer 75 may electrically connect the common voltage supply line 70 and the common electrode 230 to allow a common voltage to be transmitted to the common electrode 230. Here, the one end 75A of the conductive layer 75 may include a portion of the conductive layer 75 directly connected to the common voltage supply line 70 and extending to the one end of the common voltage supply line 70.

[0154] although Figure 7 , the first dam unit DM1 and the second dam unit DM2 may have a single layer structure or a three-layer structure.

[0155] The insulating layer ILL is disposed on the protective layer 109. The insulating layer ILL may include a first insulating layer ILL1 and a second insulating layer ILL2. The first insulating layer ILL1 may be disposed on the protective layer 109, and the second insulating layer ILL2 may be disposed on the first insulating layer ILL1. The conductive layer 75 may be located between the first insulating layer ILL1 and the second insulating layer ILL2.

[0156] The first insulating layer ILL1 may be an extension of the planarization layer 113 in the display area DA, and the second insulating layer ILL2 may be an extension of the pixel definition layer 120 in the display area DA. Therefore, the first insulating layer ILL1 and the planarization layer 113 may be formed in the same process, and the second insulating layer ILL2 and the pixel definition layer 120 may be formed in the same process. Therefore, the first insulating layer ILL1 may include the same layers and materials as those of the planarization layer 113, and the second insulating layer ILL2 may include the same layers and materials as those of the pixel definition layer 120.

[0157] The valley VP may be defined as a portion of the insulating layer ILL. The valley VP may be formed by removing a portion of the first insulating layer ILL1 and the second insulating layer ILL2. Since the insulating layer ILL includes, for example, an organic insulating material, the insulating layer ILL is susceptible to external moisture penetration. Therefore, impurities that may be introduced into the display area DA through the insulating layer ILL may be blocked by removing a portion of the insulating layer ILL outside the display area DA.

[0158] although Figure 7, the valley portion VP is shown to be disposed on the driving circuit region DPC-A, but the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, the valley portion VP may not overlap with the driving circuit region DPC-A.

[0159] The touch unit TU is also arranged on the valley portion VP. Fig.10 The touch unit TU corresponding to the non-display area NDA located above the valley portion VP is described in detail.

[0160] Fig. 9 is a cross-sectional view of a display panel DP′ of a display device 1 according to an exemplary embodiment of the present disclosure. Fig. 9 yes Figure 7 A modified example embodiment of Fig. 9 and Figure 7 The difference lies in the structure of the display element layer below the light emitting diode 200. Figure 7 Repeat the description and mainly describe the differences.

[0161] Reference Fig. 9 The storage capacitor 140 includes a first storage capacitor plate 144 and a second storage capacitor plate 146 stacked on each other. The first interlayer insulating layer 105 may be disposed between the first storage capacitor plate 144 and the second storage capacitor plate 146. The first interlayer insulating layer 105 is a layer having a predetermined dielectric constant and may include, for example, SiON, SiO x and / or SiN x The inorganic insulating layer may include a single layer or multiple layers.

[0162] Fig. 9 The case where the storage capacitor 140 overlaps the thin film transistor 130 and the first storage capacitor plate 144 is used as the gate electrode 136 of the thin film transistor 130 is shown. However, the present disclosure is not limited thereto. For example, in an example embodiment of the present disclosure, the storage capacitor 140 may not overlap the thin film transistor 130, and the first storage capacitor plate 144 may be a separate element independent of the gate electrode 136 of the thin film transistor 130.

[0163] The second interlayer insulating layer 107 may be disposed on the storage capacitor 140. The second interlayer insulating layer 107 may include a layer including, for example, SiON, SiO x and / or SiN x The inorganic insulating layer may include a single layer or multiple layers.

[0164] Driving voltage line PL (see Figure 3 and Figure 4) may be disposed on the first planarization layer 111. The first planarization layer 111 may be disposed on the protective layer 109 and may include an organic insulating material. The driving voltage line PL may include at least one of Al, Cu, and Ti, and may include a single layer or multiple layers. In an example embodiment of the present disclosure, the driving voltage line PL may have a multilayer structure of Ti / Al / Ti.

[0165] Fig. 9 The structure is shown in which a lower driving voltage line PL1 disposed under the first planarization layer 111 is further provided. The lower driving voltage line PL1 may be electrically connected to the driving voltage line PL through a contact hole passing through the first planarization layer 111 to prevent a voltage drop of the driving voltage ELVDD provided through the driving voltage line PL.

[0166] The lower driving voltage line PL1 may include the same material as that of the data line DL. For example, the lower driving voltage line PL1 and the data line DL may include at least one of, for example, Al, Cu, and Ti, and may include a single layer or multiple layers. In an example embodiment of the present disclosure, the lower driving voltage line PL1 and the data line DL may have a multilayer structure of Ti / Al / Ti or titanium nitride / aluminum / titanium (TiN / Al / Ti).

[0167] The first planarization layer 111 includes an organic insulating material. The organic insulating material may include, for example, an imide-based polymer, a general polymer such as polymethyl methacrylate (PMMA) and polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, or a blend thereof. In an exemplary embodiment of the present disclosure, the first planarization layer 111 may include polyimide.

[0168] The driving voltage line PL is covered by the second planarization layer 113. The second planarization layer 113 may include an organic insulating material, such as an imide-based polymer, a general polymer such as polymethyl methacrylate (PMMA) and polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, or a blend thereof. In an exemplary embodiment of the present disclosure, the second planarization layer 113 may include polyimide.

[0169] The pixel electrode 210 is disposed on the second planarization layer 113. The pixel defining layer 120 may be disposed on the pixel electrode 210, and may define an emission area PXA by including an opening corresponding to each sub-pixel (ie, an opening exposing at least a central portion of the pixel electrode 210).

[0170] Reference Fig. 9In the non-display area NDA, the first dam unit DM1 and the second dam unit DM2 are arranged on the outermost portion of the substrate 100 in the non-display area NDA. In a plan view, the first dam unit DM1 and the second dam unit DM2 may surround the outside of the display area DA. For example, the first dam unit DM1 may surround the outside of the display area DA, and the second dam unit DM2 may surround the outside of the first dam unit DM1.

[0171] The first dam unit DM1 and the second dam unit DM2 may prevent the organic encapsulation layer 152 of the encapsulation unit 150 from overflowing to the outside of the substrate 100. Fig. 9 For example, in an exemplary embodiment of the present disclosure, the first dam unit DM1 and the second dam unit DM2 may have a single-layer structure, a double-layer structure, or a five-layer or more structure.

[0172] The first dam unit DM1 may be located above the common voltage supply line 70, and the second dam unit DM2 may be located on one side of the first dam unit DM1 to cover one end of the common voltage supply line 70. The connection line 72 may be disposed between the first dam unit DM1 and the common voltage supply line 70. For example, the connection line 72 may include the same material as that of the driving voltage line PL of the display area DA.

[0173] The conductive layer 75 may be disposed between the second insulating layer ILL2 and the third insulating layer ILL3. One end 75A of the conductive layer 75 may extend to the second dam unit DM2. One side of the conductive layer 75 may contact the common electrode 230 extending to the non-display area NDA, and the other side of the conductive layer 75 may contact the connection line 72 to electrically connect the common voltage supply line 70 and the common electrode 230, thereby transmitting the common voltage to the common electrode 230.

[0174] The insulating layer ILL is disposed on the protective layer 109 and may include first, second, and third insulating layers ILL1, ILL2, and ILL3. The first insulating layer ILL1 may be disposed on the protective layer 109, the second insulating layer ILL2 may be disposed on the first insulating layer ILL1, and the third insulating layer ILL3 may be disposed on the second insulating layer ILL2.

[0175] The first insulating layer ILL1 may include an extension of the first planarization layer 111 of the display area DA, the second insulating layer ILL2 may include an extension of the second planarization layer 113 of the display area DA, and the third insulating layer ILL3 may include an extension of the pixel definition layer 120 of the display area DA. Therefore, the first insulating layer ILL1 and the first planarization layer 111 may be formed in the same process, the second insulating layer ILL2 and the second planarization layer 113 may be formed in the same process, and the third insulating layer ILL3 and the pixel definition layer 120 may be formed in the same process. Therefore, the first insulating layer ILL1 may include the same layers and materials as those of the first planarization layer 111, the second insulating layer ILL2 may include the same layers and materials as those of the second planarization layer 113, and the third insulating layer ILL3 may include the same layers and materials as those of the pixel definition layer 120.

[0176] The valley VP may be defined as a partial region of the insulating layer ILL and may be formed by removing a portion of the first insulating layer ILL1, the second insulating layer ILL2, and the third insulating layer ILL3. Since the insulating layer ILL includes, for example, an organic insulating material, the insulating layer ILL is susceptible to external moisture penetration. Therefore, impurities that may be introduced into the display area DA through the insulating layer ILL may be blocked by removing a portion of the insulating layer ILL outside the display area DA.

[0177] Despite Fig. 9 2 shows that the valley portion VP is disposed above the driving circuit region DPC-A, but the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, the valley portion VP may be formed not to overlap the driving circuit region DPC-A.

[0178] The touch unit TU is arranged on the valley portion VP. Fig.10 The valley portion VP and the touch unit TU located above the valley portion VP and corresponding to the non-display area NDA are described in detail.

[0179] Fig.10 and Fig.11 are cross-sectional views of a portion of a display device 1 , each according to an exemplary embodiment of the present disclosure. Fig.12 is a cross-sectional view of a portion of a display device 1 according to an exemplary embodiment of the present disclosure. Fig.10 and Fig.11 Corresponds to Figure 7 VP of Tanibe, Fig.12 Corresponds to Fig. 9 VP of the Valley Department.

[0180] Figures 10 to 12A structure is shown in which the touch unit TU is disposed on the encapsulation unit 150 and the inorganic layer 160 is provided between the touch unit TU and the encapsulation unit 150. Alternatively, the touch unit TU may be directly disposed on the second inorganic encapsulation layer 153. The polarization unit PU may be disposed on the touch unit TU.

[0181] Reference Fig.10 and Fig.11 The valley VP may be located in the insulating layer ILL. The valley VP may be formed by removing a portion of the insulating layer ILL. The portion in which the valley VP is formed may be defined as a valley area VPA.

[0182] The valley VP may include a first opening OP1 defined in the first insulating layer ILL1 and a second opening OP2 defined in the second insulating layer ILL2. A width WO2 of the second opening OP2 may be greater than a width WO1 of the first opening OP1. Thus, the valley VP may have a stepped structure of two or more steps. The valley VP may have, for example, an irregular shape or a stepped shape.

[0183] The inner surface of each of the first and second openings OP1 and OP2 constituting the valley VP may be provided in a tapered inclined surface. Since it is difficult to form the inner surface of the opening at an exact 90° during a process of patterning the opening in the insulating layer, the inner surfaces of most openings have a tapered inclined surface.

[0184] Because light introduced from the outside is reflected by the inclined surface and / or the step difference of the valley VP due to such a shape and thus polarization of the light changes, light leakage in which light is not absorbed by the polarization unit PU and leaks to the outside may occur.

[0185] The display device 1 according to the present exemplary embodiment may prevent light leakage in which polarized light leaks to the outside due to the valley portion VP by covering the valley portion VP with the anti-reflection unit 330 of the touch unit TU disposed over the display panel DP.

[0186] The anti-reflection unit 330 may include a first conductive layer 310 (see FIG. Figure 8 ) and / or the second conductive layer 320 (see Figure 8 ) of the same layers and materials. Fig.10 and Fig.11A structure in which the anti-reflection unit 330 includes the same layers and materials as the layers and materials of the second conductive layer 320 of the touch unit TU is shown, but the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, the anti-reflection unit 330 may include the same layers and materials as the layers and materials of the first conductive layer 310 of the touch unit TU. In addition, in an exemplary embodiment of the present disclosure, the anti-reflection unit 330 may be arranged as a double layer and may include the same layers and materials as the layers and materials of the first conductive layer 310 and the second conductive layer 320 of the touch unit TU.

[0187] The width W2 of the anti-reflection unit 330 may be greater than the width W1 of the valley VP. Since the anti-reflection unit 330 is designed to cover the valley VP from external light, it is preferred that the anti-reflection unit 330 has a width greater than the width of the valley VP. As a comparative example, it may be assumed that the width W2 of the anti-reflection unit 330 is the same as the width W1 of the valley VP. In this case, obliquely incident light cannot be blocked, so light leakage may occur. In other words, the anti-reflection unit 330 not only needs to overlap with the entire valley VP, but also needs another area surrounding the portion overlapping with the valley VP to block the obliquely incident light. For example, in an exemplary embodiment of the present disclosure, in a plan view, the anti-reflection unit 330 may include at least a first portion overlapping with the entire valley VP and a second portion surrounding the first portion and not overlapping with the valley VP.

[0188] Fig.10 The anti-reflection unit 330 is shown to be provided as a separate dummy layer DML (see Figures 13 to 15 ), Fig.11 The anti-reflection unit 330 is shown as being provided as a wiring unit (for example, referring to Figures 13 to 18 Detailed description of signal lines, protection lines GDL, anti-static discharge lines ESL, etc. (see Figures 16 to 18 In an example embodiment of the present disclosure, the anti-reflection unit 330 may include at least one of a portion of the signal line, a portion of the protection line GDL, a portion of the anti-static discharge line ESL, and a portion of the dummy layer DML arranged on one side of the signal line.

[0189] Reference Figure 6 In an example embodiment of the present disclosure, a dummy layer DML may be disposed between a first signal line (e.g., SL1-1) arranged at an outermost portion among a plurality of first signal lines (e.g., SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5) and a second signal line (e.g., SL2-1) arranged at an outermost portion among a plurality of second signal lines (e.g., SL2-1, SL2-2, SL2-3, and SL2-4).

[0190] Reference Fig.12 The valley VP is located in the insulating layer ILL. The valley VP is formed by removing a portion of the insulating layer ILL, wherein the portion where the valley VP is formed may be defined as a valley area VPA.

[0191] The valley VP may include a first opening OP1 defined in the first insulating layer ILL1, a second opening OP2 defined in the second insulating layer ILL2, and a third opening OP3 defined in the third insulating layer ILL3. The width WO2 of the second opening OP2 may be greater than the width WO1 of the first opening OP1, and the width WO3 of the third opening OP3 may be greater than the width WO2 of the second opening OP2. Therefore, the valley VP may have a step structure of three or more steps. In addition, the inner surface of each of the first opening OP1 to the third opening OP3 constituting the valley VP may be set in a tapered inclined surface.

[0192] The width W2 of the anti-reflection unit 330 may be greater than the width W1 of the valley VP. Since the anti-reflection unit 330 is designed to cover the valley VP from external light, it is preferred that the anti-reflection unit 330 has a width greater than the width of the valley VP. Therefore, obliquely incident light can be blocked and light leakage does not occur.

[0193] The anti-reflection unit 330 may include a first conductive layer 310 (see FIG. Figure 8 ) and / or the second conductive layer 320 (see Figure 8 ) and the first conductive layer 310 (see Figure 8 ) and / or the second conductive layer 320 (see Figure 8 ) is the same as one or more materials. Fig.11 , Fig.12 1 shows a structure in which the anti-reflection unit 330 may include the same layers and materials as those of the second conductive layer 320 of the touch unit TU. Fig.12 The anti-reflection unit 330 is shown as a case where it is provided as a separate dummy layer DML, but Fig.11 As shown in , the anti-reflection unit 330 may be provided as an extension of, for example, a signal line, a protection line GDL, an anti-static discharge line ESL, etc. In an example embodiment of the present disclosure, at least a portion of the signal line may overlap with the valley VP, and the anti-reflection unit 330 may include at least a portion of the signal line.

[0194] Figures 13 to 18 is a plan view of a portion of a display device 1 according to an exemplary embodiment of the present disclosure. Figures 13 to 18 can roughly correspond to Figure 6of part AA, part BB, part CC, part DD and part EE, and Fig.16 and Fig.17 The two roughly correspond to Figure 6 Therefore, in Figures 13 to 18 In each plan view of the structure, the thickness, shape and position of each component can be changed. Specifically, the width of the signal wiring can be changed according to the concentration of the signal wiring. For example, in an area where the density of the signal wiring is low, each signal wiring can have a relatively large width. In an area where the density of the signal wiring is high, each signal wiring can have a relatively small width.

[0195] Reference Figures 13 to 18 , the anti-reflection unit 330 may include at least a portion of the dummy layer DML, the anti-static discharge line ESL, and the guard line GDL. Figures 13 to 15 4 shows a case where the dummy layer DML is set as the anti-reflection unit 330. Fig.16 and Fig.18 2 shows a case where an anti-electrostatic discharge line ESL is provided as an anti-reflection unit 330. Fig.17 A case where the guard line GDL is provided as the anti-reflection unit 330 is shown.

[0196] Fig.13 can roughly correspond to Figure 6 The upper right end, that is, part AA. In addition, Fig.13 The line B-B' can correspond to Fig.10 or Fig.12 cross section.

[0197] Reference Fig.13 The dummy layer DML is disposed between the first signal line SL1 and the anti-static discharge line ESL. The dummy layer DML may have an isolated structure without being connected to any wiring.

[0198] Reference Figure 6, the upper right end of the touch unit TU may be understood as a portion in which at least the first signal lines SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5 are arranged. In addition, the upper right end of the touch unit TU may be a portion in which at least the second signal lines SL2-1, SL2-2, SL2-3, and SL2-4 are arranged. Only the first signal line SL1-1 and the second signal line SL2-1 may be arranged in the corner area at the upper right end of the touch unit TU, the first signal line SL1-1 being arranged at the outermost portion among the plurality of first signal lines (e.g., SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5), and the second signal line SL2-1 being arranged at the outermost portion among the plurality of second signal lines (e.g., SL2-1, SL2-2, SL2-3, and SL2-4). Therefore, compared with the corner area where the first signal lines SL1-1, SL1-2, SL1-3, SL1-4, and SL1-5 or the second signal lines SL2-1, SL2-2, SL2-3, and SL2-4 provided as a plurality of signal lines are densely arranged, the valley VP is directly exposed at the corner area at the upper right end of the touch unit TU. Therefore, in the corner area at the upper right end of the touch unit TU, a dummy layer DML may be further provided between the first signal line SL1 and the anti-static discharge line ESL and between the second signal line SL2 and the anti-static discharge line ESL.

[0199] exist Fig.13 In the example embodiment of the present disclosure, the dummy layer DML may be formed as a whole according to the area of ​​the region in which the dummy layer DML is arranged.

[0200] A portion of the dummy layer DML may be provided as the anti-reflection unit 330 , and the remaining portion of the dummy layer DML may be provided to adjust the density of wiring in a region between the first signal line SL1 and the anti-electrostatic discharge line ESL.

[0201] The anti-reflection unit 330 may include a dummy layer DML. Fig.13 In the embodiment, the valley portion VP located in the valley area VPA is arranged to extend in the second direction D2 and located on one side of the anti-static discharge line ESL. Since the valley portion VP is covered by the dummy layer DML, the problem that the valley portion VP is visible to the outside due to external light reflection can be prevented.

[0202] Despite Fig.13 , a separate dummy layer DML is shown disposed on the valley VP to cover the valley VP, but the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, when the valley VP is adjacent to the anti-static discharge line ESL, a portion of the anti-static discharge line ESL may extend to cover the valley VP.

[0203] Fig.14 can roughly correspond to Figure 6 The upper left end, that is, part BB. In addition, Fig.15 can roughly correspond to Figure 6 The lower left end, that is, part CC. Fig.14 and Fig.15 The line B-B' can correspond to Fig.10 or Fig.12 cross section.

[0204] Reference Fig.14 and Fig.15 The dummy layer DML is arranged between the second signal lines SL2-1, SL2-2, SL2-3 and SL2-4 and the anti-static discharge line ESL. The dummy layer DML may be as follows: Fig.14 As shown in FIG. 1 , it is only arranged on the valley VP and can be Fig.15 As shown in FIG. 1 , the arrangement is to fill the space between the second signal lines SL2 - 1 , SL2 - 2 , SL2 - 3 and SL2 - 4 and the anti-static discharge line ESL.

[0205] The anti-reflection unit 330 may include a dummy layer DML or a portion of the dummy layer DML. Fig.10 or Fig.12 The anti-reflection unit 330 may overlap the valley portion VP. As described above, the anti-reflection unit 330 may prevent the valley portion VP from being seen from the outside due to external light reflection by covering the valley portion VP.

[0206] Fig.16 can roughly correspond to Figure 6 The lower right end, that is, part DD. In addition, Fig.16 The line C-C' can correspond to Fig.11 cross section.

[0207] Reference Fig.16 , the anti-reflection unit 330 may include an anti-static discharge line ESL. Although the valley VP partially overlaps with the anti-static discharge line ESL, a partial area of ​​the valley VP does not overlap with the anti-static discharge line ESL. In this case, a portion of the anti-static discharge line ESL extends to cover the valley VP. For example, at least a portion of the anti-static discharge line ESL may overlap with the valley VP. In other words, the valley VP may be covered by a portion of the anti-static discharge line ESL.

[0208] exist Fig.11In the embodiment, the wiring unit may include, for example, at least one of a signal line, a protection line GDL, and an anti-static discharge line ESL. The wiring unit may include a double layer including a first conductive layer 310 and a second conductive layer 320. The first conductive layer 310 and the second conductive layer 320 constituting the wiring unit may be connected to each other through a contact hole defined in the first insulating layer 312.

[0209] The anti-reflection unit 330 may be provided by extending the second conductive layer 320 of the wiring unit. Fig.16 In the embodiment, a portion of the second conductive layer 320 of the anti-static discharge line ESL extends in the first direction D1 to completely cover the valley portion VP.

[0210] Fig.17 yes Fig.16 2 and 3. A modified example embodiment of the present invention illustrates a case where the anti-reflection unit 330 includes a guard line GDL. Fig.17 can roughly correspond to Figure 6 The lower right end, that is, part DD.

[0211] The protection line GDL may be arranged at the outermost portion of the first signal lines SL1-1, SL1-2, ..., SL1-5 (i.e., one side of the first signal line SL1-1). The protection line GDL may prevent the signals of the first signal lines SL1-1, SL1-2, ..., SL1-5 from being interfered with by signals of other wirings. For example, the protection line GDL may prevent signal interference to the signal line SL1. Alternatively, the protection line GDL may be arranged at the outermost portion of the second signal lines SL2-1, SL2-2, ..., SL2-4, and between the first signal lines SL1-1, SL1-2, ..., SL1-5 and the second signal lines SL2-1, SL2-2, ..., SL2-4.

[0212] Since the protection line GDL is arranged at the outermost portion of the first signal lines SL1-1, SL1-2, . . . , SL1-5, a portion of the protection line GDL may extend and may be used as Fig.17 The anti-reflection unit 330 shown in FIG. The protection line GDL may extend to the valley VP in the first direction D1. Fig.11 and Fig.16 As described, the protection line GDL is provided as a double layer including a first conductive layer 310 and a second conductive layer 320, and a portion of the second conductive layer 320 may extend to overlap with the valley VP. For example, at least a portion of the protection line GDL may overlap with the valley VP, and the anti-reflection unit 330 may include at least a portion of the protection line GDL. In other words, the valley VP may be covered by a portion of the protection line GDL.

[0213] Considering the above description, portions of the signal line, the guard line GDL, and / or the anti-electrostatic discharge line ESL of the wiring unit adjacent to the valley VP may extend and may function as the anti-reflection unit 330 according to the position of the valley VP.

[0214] Fig.18 can roughly correspond to Figure 6 The upper right end, that is, part EE.

[0215] Reference Fig.18 , as referenced Figure 6 As described above, the upper right end of the touch unit TU can be understood as a portion where at least the first signal lines SL1-1, SL1-2, SL1-3, SL1-4 and SL1-5 are arranged, and can also be understood as a portion where at least the second signal lines SL2-1, SL2-2, SL2-3 and SL2-4 are arranged. Fig.18 As shown in FIG. 1 , the dummy layer DML may be widely arranged inside the anti-static discharge line ESL.

[0216] The anti-reflection unit 330 may include an anti-static discharge line ESL. Fig.18 In the embodiment, the anti-electrostatic discharge line ESL may completely overlap the valley portion VP. Therefore, as described above, the anti-reflection portion 330 may prevent the valley portion VP from being seen from the outside due to external light reflection by covering the valley portion VP.

[0217] Since light introduced from the outside is reflected by the inclined surface and / or the step difference of the valley VP due to such a shape and thus polarization of the light changes, light leakage in which light is not absorbed by the polarization unit PU and leaks to the outside may occur.

[0218] The display device 1 according to the present exemplary embodiment may prevent light leakage in which polarized light leaks to the outside due to the valley VP by covering the valley VP with the anti-reflection unit 330 of the touch unit TU disposed over the display panel DP.

[0219] Although only the display device has been mainly described so far, the present disclosure is not limited thereto. For example, a method of manufacturing a display device also falls within the scope of the present disclosure.

[0220] According to the exemplary embodiments of the present disclosure, a display device in which defects caused by external light reflection in a non-display area are minimized can be realized. However, the scope of the present disclosure is not limited to this effect.

[0221] Although the present disclosure has been described with reference to example embodiments shown in the drawings, these example embodiments are provided only as examples, and those skilled in the art will understand that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure as defined by the appended claims and their equivalents.

Claims

1. A display device, comprising: a display panel, a touch unit arranged on the display panel, and a polarization unit arranged on the touch unit, Wherein, the display panel comprises: A substrate including a display area and a non-display area arranged around the display area; an insulating member including a valley portion defined as an opening arranged along an outer side of the display area in the non-display area; and A display unit is arranged in the display area and includes a light emitting element electrically connected to the thin film transistor, and Wherein, the touch unit comprises: The anti-reflection unit overlaps the valley portion and is configured to reduce reflectivity of external light.

2. The display device according to claim 1, wherein: The touch unit is directly arranged on the display panel and includes: A sensing electrode corresponding to the display area; and A signal line corresponds to the non-display area and is electrically connected to the sensing electrode.

3. The display device according to claim 2, wherein: The sensing electrode comprises: a first conductive layer; a second conductive layer, arranged on the first conductive layer; A first insulating layer disposed between the first conductive layer and the second conductive layer; and The second insulating layer is arranged on the second conductive layer.

4. The display device according to claim 3, wherein: The anti-reflection unit includes the same material as that of the second conductive layer.

5. The display device according to claim 2, wherein: The sensing electrodes have a grid shape.

6. The display device according to claim 2, wherein: The sensing electrode includes: a first sensing electrode; and a second sensing electrode intersecting with the first sensing electrode, and The signal line includes: a first signal line connected to the first sensing electrode; and a second signal line connected to the second sensing electrode.

7. The display device according to claim 2, wherein: At least a portion of the signal line overlaps the valley portion.

8. The display device according to claim 7, wherein: The anti-reflection unit includes at least a portion of the signal line.

9. The display device according to claim 2, wherein: The touch unit further includes: A dummy layer to which an electrical signal is not applied is disposed on an outer side of the signal line, and at least a portion of the dummy layer overlaps the valley portion.

10. The display device according to claim 9, wherein: The anti-reflection unit includes at least a portion of the dummy layer.

11. The display device according to claim 2, wherein: The touch unit further includes: An anti-static discharge line is arranged on the outer side of the signal line, and at least a portion of the anti-static discharge line overlaps the valley portion.

12. The display device according to claim 11, wherein: The anti-reflection unit includes at least a portion of the anti-static discharge line.

13. The display device according to claim 2, wherein: The touch unit further includes: A guard line is arranged at an outermost portion of the signal line and is configured to prevent signal interference with the signal line, and at least a portion of the guard line overlaps the valley portion.

14. The display device according to claim 13, wherein: The anti-reflection unit includes at least a portion of the protection line.

15. The display device according to claim 1, wherein: The width of the anti-reflection unit is greater than the width of the valley portion.

16. The display device according to claim 1, wherein: The light emitting element comprises: a pixel electrode; a common electrode arranged on the pixel electrode; and an emission layer arranged between the pixel electrode and the common electrode. The display panel further includes: an encapsulation unit arranged on the common electrode, the encapsulation unit comprising: a first inorganic encapsulation layer; a second inorganic encapsulation layer arranged on the first inorganic encapsulation layer; and an organic encapsulation layer arranged between the first inorganic encapsulation layer and the second inorganic encapsulation layer, and The touch unit is disposed on the second inorganic encapsulation layer.

17. The display device according to claim 16, wherein: The common electrode extends to a portion of the non-display area and covers the valley.

18. The display device according to claim 1, wherein: The display area of ​​the display panel includes a rounded corner portion.

19. The display device according to claim 18, wherein: A partial area of ​​the touch unit has a predetermined curvature to correspond to a shape of the display area.

20. The display device according to claim 1, wherein: The insulating member further comprises: a first insulating layer; and a second insulating layer, arranged on the first insulating layer, The valley portion includes a first opening defined in the first insulating layer and a second opening defined in the second insulating layer.

21. The display device according to claim 20, wherein: The display unit further comprises: a planarization layer disposed on the thin film transistor to cover the thin film transistor; and a pixel defining layer disposed on the planarization layer and comprising an opening defining an emission area of ​​the light emitting element, wherein the first insulating layer comprises the same material as that of the planarization layer, and The second insulating layer includes the same material as that of the pixel defining layer.

22. The display device according to claim 1, wherein: The insulating member further includes: a first insulating layer; a second insulating layer disposed on the first insulating layer; and a third insulating layer disposed on the second insulating layer, and The valley includes: a first opening defined in a first insulating layer; a second opening defined in the second insulating layer; and a third opening defined in the third insulating layer.

23. The display device according to claim 22, wherein: The display unit further comprises: A first planarization layer is arranged on the thin film transistor to cover the thin film transistor; A second planarization layer disposed on the first planarization layer; and a pixel defining layer disposed on the second planarization layer and comprising an opening defining an emission area of ​​the light emitting element, wherein the first insulating layer comprises the same material as that of the first planarization layer, The second insulating layer includes the same material as that of the second planarization layer, and The third insulating layer includes the same material as that of the pixel defining layer.

24. The display device according to claim 1, wherein: The valley portion surrounds an outer portion of the display area in a plan view, and has a shape in which at least one side of the valley portion is open.

25. The display device according to claim 1, wherein: The valley portion has a stepped structure of two or more steps.

26. The display device according to claim 1, wherein: The inner surface of the valley portion has a tapered inclined surface.

27. A display device, comprising: A substrate including a display area and a non-display area arranged around the display area; a display unit arranged in the display area and including a light emitting element electrically connected to a thin film transistor; an insulating member extending from the display area and including a valley portion, the valley portion being defined as an opening arranged along an outer side of the display area, and at least a portion of the insulating member being arranged in the non-display area; an encapsulation unit, comprising at least one inorganic layer and at least one organic layer, and arranged on the light-emitting element to encapsulate the light-emitting element; as well as A touch unit is arranged on the packaging unit and includes a sensing electrode corresponding to the display area, a signal line corresponding to the non-display area and connected to the sensing electrode, and a dummy layer arranged on one side of the signal line, wherein the dummy layer overlaps the valley portion and covers the valley portion.

28. The display device according to claim 27, wherein: The sensing electrodes include a plurality of first sensing electrodes and a plurality of second sensing electrodes. The signal lines include a plurality of first signal lines respectively connected to the plurality of first sensing electrodes and a plurality of second signal lines respectively connected to the plurality of second sensing electrodes, and The dummy layer is provided between a first signal line arranged at an outermost portion among the plurality of first signal lines and a second signal line arranged at an outermost portion among the plurality of second signal lines.

29. A display device, comprising: A substrate including a display area and a non-display area arranged around the display area; a display unit arranged in the display area and including a light emitting element electrically connected to a thin film transistor; an insulating member extending from the display area and including a valley portion, the valley portion being defined as an opening arranged along an outer side of the display area, and at least a portion of the insulating member being arranged in the non-display area; an encapsulation unit, comprising at least one inorganic layer and at least one organic layer, and arranged on the light-emitting element to encapsulate the light-emitting element; as well as a touch unit disposed on the packaging unit and including an anti-reflection unit configured to reduce reflectivity of external light, Wherein, in a plan view, the anti-reflection unit at least includes a first portion overlapping with the entirety of the valley portion and a second portion surrounding the first portion and not overlapping with the valley portion.

30. The display device according to claim 29, wherein: The touch unit comprises: A sensing electrode corresponding to the display area; and a signal line corresponding to the non-display area and electrically connected to the sensing electrode; The anti-reflection unit includes at least one of a portion of the signal line, a portion of the protection line, a portion of the anti-static discharge line, and a portion of the dummy layer arranged on one side of the signal line.

Images