A three-wire series electronic water gauge circuit

Abstract

The invention discloses a three-wire series electronic water gauge circuit, which includes a cascade of water level detection subcircuits arranged at equal intervals, a voltage divider circuit, and a microprocessor. The water level detection subcircuit is composed of a PMOS tube, a resistor, a detection electrode, and a common electrode. Whether the water body contacts the detection electrode is used to determine the conduction and cutoff of the PMOS tube, and then determine whether a low-impedance path is provided for the detection signal transmission. After multi-stage series transmission, the microprocessor MCU finally uses AD to perform analog-to-digital conversion to obtain a voltage value and compare it with a reference voltage to obtain water level information. The three-wire system of the invention replaces the previous four-wire system, and the analog signal replaces the digital signal. It has the characteristics of ultra-low power consumption, wide power supply voltage range, wide operating temperature range, light weight, small size, fast response speed, strong anti-interference, strong corrosion resistance, etc. It can reach IP68 through soft glue filling for waterproof treatment, and is further processed into a flexible electronic water gauge.

Description

Technical Field

[0001] The present invention relates to the technical field of water level measurement, and particularly to a three - wire series electronic water gauge circuit. Background Art

[0002] An electronic water gauge (electrode - type water level sensor) is a water level measurement sensor. Utilizing the conductivity of water, it collects water depth information through signal detection electrodes arranged in equal - spacing series. The signal detection electrodes of the acquisition circuit can judge whether the electrode contacts the water body according to the potential level. The water depth is judged according to the number of electrodes immersed in water. Most of the electronic water gauges on the market are composed of a circuit board, a common electrode, detection electrodes, epoxy resin, a metal shell, etc. Among them, the common electrode is connected to the metal shell, the detection electrodes are connected to the PCB circuit board, and the common electrode and the detection electrodes are exposed to make good contact with water.

[0003] Electronic water gauges generally consist of components such as digital logic chips, resistors, and capacitors. The power consumption of the chips is in the order of hundreds of micro - amperes, with low cost and large surface - mount area (belonging to integrated circuits), being easy to integrate on the PCB board. Similar to a voltage comparator, it also belongs to a low - power water - encounter monitoring circuit, specifically as follows:

[0004] (1) Telemetry electronic water gauge, invention patent, publication (announcement) number: CN201520716037.4: The circuit part includes a digital logic circuit board, a wireless transmission module, a rechargeable battery, a voltage - stabilizing circuit board, and probes (electrodes) electrically connected to the digital logic circuit board.

[0005] (2) A new type of electronic water gauge, invention patent, publication (announcement) number: CN201721276232.5: The sensing and measuring body uses a mechanical method to position and sense water level changes, and through an analog - to - digital conversion module for digital coding processing, it realizes digital graduation, digital sampling, and digital transmission, converting the analog signal into a digital signal and then transmitting it to the central controller.

[0006] (3) Integrated multi - segment retrieval type intelligent electronic water gauge, invention patent, publication (announcement) number: CN201520468625.0: The data acquisition unit sensing and acquisition module includes multiple contacts (electrodes), and the contacts include a contact power - supply module, a contact level - high - low acquisition module, and a signal feedback module.

[0007] Since the above - mentioned solutions use digital logic chips, they require relatively complex timing circuits and multiple interface pins of a micro - processor (MCU). Excessive cascading levels of detection electrodes will reduce the water level acquisition speed and anti - interference performance, making it difficult to adapt to occasions with a high data update frequency. Therefore, it is necessary to develop a new type of electronic water gauge to solve the problems existing in the prior art. Summary of the Invention

[0008] In view of the above defects of the prior art, the technical problem to be solved by the present invention is to provide a three-wire series electronic water gauge circuit to solve the deficiencies of the prior art.

[0009] To achieve the above object, the present invention provides a three-wire series electronic water gauge circuit, including cascaded water level detection sub-circuits arranged at equal intervals, a voltage division circuit, and a microprocessor; the first-stage water level detection sub-circuit of the cascaded water level detection sub-circuits is composed of a PMOS transistor M1, resistors S1, R1, and R2, a detection electrode X1, and a common electrode G1. The detection electrode X1 is simultaneously connected to one end of the resistor R1 and R2. The other end of the resistor R1 is connected to the source (S pole) of the PMOS transistor and simultaneously connected to the power supply V0. The other end of the resistor R2 is connected to the gate (G pole) of the PMOS transistor. The drain (D pole) of the PMOS transistor is the water level detection signal V1. The resistor S1 is connected between the source and the drain of the PMOS transistor; the subsequent stages of the water level detection sub-circuits of the first-stage water level detection sub-circuit have the same structure as the first-stage water level detection sub-circuit. When the detection electrode X1 of the first-stage water level detection sub-circuit does not contact water, the M1 transistor is cut off, and V0 becomes the water level detection signal V1 (with attenuation) through S1; conversely, when X1 contacts water, the M1 transistor is turned on, and V0 becomes the water level detection signal V1 (almost without attenuation) through the M1 transistor;... and so on for other stages of the water level detection sub-circuits.

[0010] Preferably, the drain of the PMOS transistor of the previous stage of each stage of the water level detection sub-circuit is connected to the source of the next stage.

[0011] Preferably, the water level detection signal Vn of the last-stage water level detection sub-circuit of the cascaded water level detection sub-circuit provides power for the voltage division circuit, and the voltage division point of the voltage division circuit is connected to the microprocessor.

[0012] Preferably, the microprocessor integrates an AD conversion circuit.

[0013] Preferably, the cascaded water level detection sub-circuits are arranged on a flexible circuit board.

[0014] Preferably, the resistance between the source of the PMOS transistor of each stage of the water level detection sub-circuit and the detection electrode is adjustable to sufficiently turn on the PMOS transistor when contacting water according to different working voltages and the resistance value R0 of the water body, otherwise the PMOS transistor is cut off.

[0015] The beneficial effects of the present invention are:

[0016] The present invention uses discrete components, is implemented by a combinational logic circuit, replaces the previous four-wire system with a three-wire system, and replaces digital signals with analog signals. It has the characteristics of ultra-low power consumption, a wide power supply voltage range, a wide operating temperature range, light weight, small size, fast response speed, strong anti-interference ability, and strong anti-corrosion ability. Through soft potting for waterproof treatment, it can reach IP68 and can be further processed into a flexible electronic water gauge.

[0017] The concept, specific structure and technical effects of the present invention will be further described below in conjunction with the accompanying drawings to fully understand the purpose, features and effects of the present invention. Description of the Drawings

[0018] Figure 1 It is the schematic diagram of the water level detection sub-circuit of the present invention.

[0019] Figure 2 It is the schematic diagram of the three-wire series electronic water gauge circuit of the present invention.

[0020] Figure 3 It is the schematic diagram of the cuttable three-wire series electronic water gauge circuit of the present invention.

[0021] Figure 4 It is the schematic diagram of the three-wire series electronic water gauge circuit of the present invention using proportional resistors. Detailed Embodiment

[0022] The present invention discloses a three-wire series electronic water gauge circuit, which includes cascaded water level detection sub-circuits arranged at equal intervals, a voltage division circuit and a microprocessor. The first-stage water level detection sub-circuit of the cascaded water level detection sub-circuits is at the lowest water level and consists of a PMOS transistor M1, resistors S1, R1, R2, a detection electrode X1 and a common electrode G1, etc. In the circuit, the signal Water1 is connected to both the resistor R1 and the resistor R2 at the same time. The other end of the resistor R1 and the source electrode of the PMOS transistor are both connected to the power supply V0 at the same time. The other end of the resistor R2 is connected to the gate of the PMOS transistor. The drain of the PMOS transistor is the water level detection signal V1. The resistor S1 is connected between the source electrode and the drain of the PMOS transistor. Among them,

[0023] When the detection electrode X1 and the common electrode (power supply negative electrode GND) G1 do not come into contact with water, the voltage between the gate and the source of the PMOS transistor is approximately equal to 0V, and the PMOS transistor is cut off and does not conduct. The power supply V0 passes through S1 to become the water level detection signal V1. Since the resistance value of S1 is relatively large, the voltage drop cannot be ignored, and the attenuated signal V1 of V0 obtained is weak; if the detection electrode X1 and G1 are submerged in water, the voltage of the signal Water1 of the detection electrode X1 changes from high to low, and its magnitude is the voltage division value of the resistor R1 and the water body resistance R0. The voltage between the gate and the source of the PMOS transistor is less than the conduction threshold voltage (negative voltage) of the PMOS transistor, and the PMOS transistor conducts. The conduction impedance is very small (tens of milliohms, much smaller than the resistance value of the resistor S1). The power supply V0 passes through the low-impedance path (PMOS transistor) to become the signal V1, and its voltage drop can be ignored. The current passing through S1 by the power supply V0 can be ignored.

[0024] As analyzed above, when the detection electrode X2 of the second-level water level detection sub-circuit does not come into contact with water, the M2 transistor is cut off, and V1 becomes the water level detection signal V2 (attenuated) through S2; conversely, when X2 comes into contact with water, the M2 transistor is turned on, and V1 becomes the water level detection signal V2 (almost unattenuated) through the M2 transistor;... and so on for other-level water level detection sub-circuits.

[0025] To further implement the present invention, the circuit uses discrete components, is implemented by a combinational logic circuit, replaces the previous four-wire system with a three-wire system, and replaces digital signals with analog signals, having characteristics such as ultra-low power consumption, a wide power supply voltage range, a wide operating temperature range, light weight, small size, fast response speed, strong anti-interference ability, and strong anti-corrosion ability.

[0026] To further implement the present invention, the circuit is composed of multiple levels of water level detection sub-circuits connected in series at equal intervals to form an electronic water level gauge circuit. Whether the water body contacts the detection electrode is used to determine the on and off of the PMOS transistor, and further determine whether to provide a low-impedance path for the water level signal transmission. After multiple levels of cascaded transmission, finally, the microprocessor MCU uses AD for analog-to-digital conversion to obtain the voltage value and compares it with the reference voltage to obtain the water level information.

[0027] To further implement the present invention, the water level detection sub-circuit adjusts the sizes of the bias resistors R1, R4,..., R(3n - 2) according to different operating voltages and the water body resistance R0 (determined by the contact area and distance between the detection electrode X1 and the common electrode G1 and the water body conductivity), and multiple common electrodes G1 can be used and evenly distributed to ensure that the PMOS transistor can be sufficiently turned on when contacting water, otherwise the PMOS transistor is cut off.

[0028] To further implement the present invention, the water level detection sub-circuit is composed of miniaturized components. Multiple levels of cascading can be processed into an FPC flexible circuit board (also known as a flexible circuit board or a flexible printed circuit board, having excellent characteristics such as high wiring density, light weight, thin thickness, bending and folding, etc.). Waterproof treatment can be achieved by pouring soft silicone rubber to reach IP68, and it can be further processed into a flexible electronic water level gauge to meet the installation in different occasions.

[0029] To further implement the present invention, the present invention uses discrete components, is implemented by a combinational logic circuit, replaces the previous four-wire system with a three-wire system, and replaces digital signals with analog signals, having characteristics such as ultra-low power consumption, a wide power supply voltage range, a wide operating temperature range, light weight, small size, fast response speed, strong anti-interference ability, and strong anti-corrosion ability.

[0030] To further illustrate the principle and application of the present invention, specific embodiments are given below to illustrate the present invention:

[0031] Embodiment 1

[0032] The present invention discloses a three - wire series electronic water gauge circuit, which includes cascaded water level detection sub - circuits arranged at equal intervals, a voltage - dividing circuit, and a micro - processor. The water level detection sub - circuit consists of a PMOS transistor M1, resistors S1, R1, R2, a detection electrode X1, and a common electrode G1, etc. In the circuit, the signal Water1 is simultaneously connected to resistors R1 and R2. The other end of resistor R1 and the source electrode of the PMOS transistor are simultaneously connected to the power supply V0. The other end of resistor R2 is connected to the gate electrode of the PMOS transistor. The drain electrode of the PMOS transistor is the water level detection signal V1. Resistor S1 is connected between the source electrode and the drain electrode of the PMOS transistor.

[0033] PMOS transistor selection: Considering that there are many cascaded levels in the water level detection sub - circuit, it is advisable to select a power - type PMOS transistor with a low on - resistance Rds (tens of milliohms), a small size, a low on - threshold voltage, and a low price as much as possible. The on - resistance of multiple cascaded PMOS transistors is relatively low, and the overall on - voltage drop is small.

[0034] The on - and off - conditions of the PMOS transistor in the water level detection sub - circuit: It depends on the magnitude of the on - threshold voltage Vgs(th) between the gate and source electrodes of the PMOS transistor. Vgs(th) is related to R1 and the resistance value of the water body R0 (determined by the contact area and distance between the detection electrode X1 and the common electrode G1 and the conductivity of the water body). Vgs=-V0*R1 / (R1 + R0). When Vgs is less than the on - threshold voltage Vgs(th) (negative voltage) of this PMOS transistor, first determine the range of the water body resistance value R0 according to the actual application situation, and then determine the size of R1. Adjust the size of resistor R2 according to the parameters of the PMOS transistor. R2 is a gate - limiting resistor to avoid excessive current between the gate and source electrodes of the PMOS transistor when the contact points X1 and G2 are short - circuited, which may burn out the PMOS transistor.

[0035] When the detection electrode X1 and the common electrode (the negative power supply terminal GND) G1 are not in contact with water, the voltage between the gate and source electrodes of the PMOS transistor is approximately equal to 0V, and the PMOS transistor is cut off and does not conduct. The power supply V0 passes through S1 to become the water level detection signal V1. Since the resistance value of S1 is large, the voltage drop cannot be ignored, and the attenuated signal V1 of V0 obtained is weak. If the detection electrode X1 and G1 are submerged in water, the voltage of the signal Water1 of the detection electrode X1 changes from high to low, and its magnitude is the voltage - dividing value of resistor R1 and the water body resistance R0. The voltage between the gate and source electrodes of the PMOS transistor is less than the on - threshold voltage (negative voltage) of the PMOS transistor, and the PMOS transistor conducts. The on - resistance Rds is very small (tens of milliohms, much smaller than the resistance value of resistor S1). The power supply V0 passes through the low - impedance path (the PMOS transistor) to become signal V1, and its voltage drop can be ignored. The current of the power supply V0 passing through S1 can be ignored.

[0036] From the above analysis, when the detection electrode X2 of the second-level water level detection sub-circuit does not come into contact with water, the M2 transistor is cut off, and V1 becomes the water level detection signal V2 (attenuated) through R2; conversely, when X2 comes into contact with water, the M2 transistor is turned on, and V1 becomes the water level detection signal V2 (almost no attenuation) through the M2 transistor. The same applies to other levels of water level detection sub-circuits.

[0037] Value of resistor S1: Considering the convenience of data processing by the MCU after the AD converter conversion, it is preferred that the current-limiting resistors of each level of water level detection sub-circuit have the same size, that is, S1 = S2 = S3 =...... = Sn = R, R(2n + 2) = R, R(2n + 1) = m*R. The value of m depends on the power supply VCC and the operating voltage VDD of the microprocessor MCU to prevent the voltage VCC from directly entering the MCU and causing damage. m = VCC / VDD and rounded down (e.g., if VCC = 12V, VCC = 3.3V, then m = 3). Generally, VCC = VDD, that is, m = 0. Since a general AD converter needs to draw a certain amount of current to work properly, the total value of the current-limiting resistors: (n + m + 1)*R. The value range depends on the current drawn by the AD converter. Rds is in the order of tens of milliohms (much smaller than the resistance value R). If n = 100, n*Rds is a few ohms, which can be ignored compared to (n + m + 1)*R. If the total value of the current-limiting resistors is too large, the AD conversion voltage error will increase; if it is too small, the power consumption of the current-limiting resistor will be large. Therefore, the value of R must be appropriately compromised to meet the usage requirements, and high-precision resistors are preferred.

[0038] The calculation and analysis process is as follows: When no water is detected, the power supply V0 is connected in series through S1, S2, S3,......, Sn to become the water level detection signal Vn, and the voltage signal divided by the MCU is Vn_AD = V0 / (n + m + 1);

[0039] When water is detected at the first level, the power supply V0 is connected in series through M1, S2, S3,......, Sn to become the water level detection signal Vn, and the voltage signal divided by the MCU is Vn_AD = V0 / (n + m);

[0040] When water is detected at the second level, the power supply V0 is connected in series through M1, M2, S3,......, Sn to become the water level detection signal Vn, and the voltage signal divided by the MCU is Vn_AD = V0 / (n - 1 + m);

[0041] When water is detected at the Nth (0 ≤ N ≤ n) level, the power supply V0 is connected in series through M1, M2,......, MN,....., Sn to become the water level detection signal Vn, and the voltage signal divided by the MCU is Vn_AD = V0 /

[0042] (n + 1 + m - N).

[0043] AD Converter: Currently, multiple ADCs (M = 12 / 14 / 16 bits) are built into the microcontroller. To ensure the resolution, the voltage difference between when there is no water and the first-stage quantization satisfies: V0 / (n + m) - V0 / (n + m + 1) ≥ V0 / 2 M , for M = 12, n + m ≤ 63; for M = 14, n + m ≤ 127; for M = 16, n + m ≤ 255. When m = 0, the number of quantization levels is 63, 127, and 255 respectively. If the arrangement spacing of the signal detection electrodes is 1 cm, the measurement ranges can reach 63 cm, 127 cm, and 255 cm respectively. Currently, the cascading level of the electronic water gauge is about n = 100 to meet the requirements.

[0044] Therefore, we can judge the level of the detection electrode based on the voltage signal collected by the MCU, and then obtain the water level information.

[0045] According to Figure 3 We can also cut the electronic water gauge: When not cutting, K1 needs to be soldered with a 0-ohm resistor, and resistors K2 - Kn are not soldered; when cutting the first stage, K2 needs to be soldered with a 0-ohm resistor and waterproof treatment is done, and resistors K3 - Kn are not soldered; when cutting the second stage, K3 needs to be soldered with a 0-ohm resistor and waterproof treatment is done, and resistors K4 - Kn are not soldered... When cutting the Nth (0 ≤ N ≤ n) stage, KN needs to be soldered with a 0-ohm resistor, and resistors K(N - 1) - Kn are not soldered. For the cut circuit, only the internal parameters of the MCU need to be modified, without changing other hardware circuits, which greatly expands the application range.

[0046] Embodiment 2

[0047] The difference between Embodiment 2 and Embodiment 1 lies in the selection and calculation method of the current-limiting resistor.

[0048] Currently, the E48, E96, and E192 series resistors used in electronic products are equal-ratio resistors, with their common ratios q being 1.052, 1.025, and 1.012 respectively, and their precision errors being ±2%, ±1%, and ±0.5% / 0.2% / 0.1% respectively. The E192 resistor has high precision and is more expensive. We prefer to use the E96 resistor with high cost performance.

[0049] According to the geometric sequence formula, the common ratio q = 1.025, and the nth-stage resistor Sn = S1 * q n-1 , the total resistance Sum = S1 + S2 + S3 +...... + Sn = S1(1 - q n ) / (1 - q). Considering the actual situation, V0 = VCC, that is, R(2n + 1) = 0, m = 0.

[0050] For the convenience of derivation and calculation, we have re-numbered the current-limiting resistors and sampling resistors to obtain Sn......S3, S2, S1, S0. Resistor K1 needs to be soldered with a 0-ohm resistor, and resistors K2 - Kn are not soldered. Specifically, as shown in Figure 4 shown below.

[0051] According to Figure 4 the calculation and analysis process is as follows: When no water is detected, the power supply V0 passes through Sn......S3, S2, S1 to become the water level detection signal Vn. According to the voltage division principle, the voltage signal obtained by the MCU is:

[0052]

[0053] When water is detected at the first level, the power supply V0 passes through M1, Sn - 1......S3, S2, S1 to become the water level detection signal Vn. The voltage signal obtained by the MCU is:

[0054]

[0055] When water is detected at the second level, the power supply V0 passes through M1, M2, Sn - 2......S3, S2, S1 to become the water level detection signal Vn. The voltage signal obtained by the MCU is:

[0056]

[0057] When water is detected at the Nth (0 ≤ N ≤ n) level, the power supply V0 passes through M1, M2......MN.....Sn to become the water level detection signal Vn. The voltage signal obtained by the MCU is:

[0058]

[0059] AD converter: Currently, the microcontroller has multiple built-in ADCs (M = 12 / 14 / 16 bits). To ensure the resolution, the quantization voltage difference between when there is no water and when water is detected at the first level satisfies:

[0060]

[0061] Let X = q n , we have Equation (6):

[0062]

[0063] After arrangement, we get Equation (7):

[0064]

[0065] After eliminating the denominator, we get Equation (8):

[0066] qX 2+1 - [1 + q + (2 M - 1)(q - 1) 2 ≤ 0 (8)

[0067] Solving according to the quadratic equation of one variable gives Equation (9):

[0068]

[0069] If M = 14 and q = 1.025, the value range of n is as follows:

[0070] -101.2 ≤ n = logq(X) ≤ 100.2 (10)

[0071] Considering the actual value, that is, 0 ≤ n ≤ 100. The value range of the cascade series number n in other cases is shown in Table 1 below.

[0072] Table 1 Value range of cascade series number n

[0073] M = 12 bit M = 14 bit M = 16 bit M = 18 bit M = 20 bit E48, q = 1.052 49 74 101 128 155 E96, q = 1.025 58 100 151 205 261 E192, q = 1.012 62 117 202 307 420

[0074] If the arrangement spacing of the signal detection electrodes is 1 cm, M = 14 and q = 1.025 are selected. Currently, the cascade series number n = 100 of the electronic water gauge just meets the requirements. The disadvantage is that 100 types of resistors need to be welded. For the same ADC bit number, the cascade series number obtained is less than that of the first implementation mode with the same current-limiting resistor. The first implementation mode is preferably selected.

[0075] This circuit is externally connected with: power supply V0, water level signal Vn_AD, and the negative pole of the power supply. Therefore, only a three-core cable is required, and the three-wire system replaces the previous four-wire system (positive pole of power supply V, 485+ / 232TX, 485- / 232RX, negative pole of power supply); the water level signal Vn_AD is an analog signal and needs to be processed by ADC. Therefore, the analog signal replaces the digital signal, with the characteristics of ultra-low power consumption and strong anti-interference.

[0076] The preferred specific embodiments of the present invention have been described in detail above. It should be understood that those of ordinary skill in the art can make many modifications and variations according to the concept of the present invention without creative work. Therefore, all technical solutions that can be obtained by those skilled in the art in the technical field of the present invention based on the concept of the present invention through logical analysis, reasoning or limited experiments on the basis of the prior art should be within the protection scope determined by the claims.

Claims

1. A three - wire series - connected electronic water gauge circuit, characterized in that: It includes cascaded water level detection sub - circuits arranged at equal intervals, a voltage - dividing circuit, and a micro - processor; the first - stage water level detection sub - circuit of the cascaded water level detection sub - circuits consists of a PMOS transistor M1, resistors S1, R1, R2, a detection electrode X1, and a common electrode G1. The detection electrode X1 is simultaneously connected to one end of the resistors R1 and R2. The other end of the resistor R1 is connected to the source electrode of the PMOS transistor, and the other end of the resistor R1 is also connected to the power supply V0. The other end of the resistor R2 is connected to the gate of the PMOS transistor. The drain of the PMOS transistor is the water level detection signal V1. One end of the resistor S1 is connected to the source electrode of the PMOS transistor, and the other end of the resistor S1 is connected to the drain of the PMOS transistor; the subsequent stages of the water level detection sub - circuits of the first - stage water level detection sub - circuit have the same structure as the first - stage water level detection sub - circuit. When the detection electrode X1 of the first - stage water level detection sub - circuit does not contact water, the M1 transistor is cut off, and V0 becomes the water level detection signal V1 through S1; conversely, when X1 contacts water, the M1 transistor is turned on, and V0 becomes the water level detection signal V1 through the M1 transistor. The same applies to other - stage water level detection sub - circuits.

2. A three - wire series - connected electronic water gauge circuit according to claim 1, characterized in that: The drain of the PMOS transistor of the previous stage of each stage of the water level detection sub - circuit is connected to the source of the next stage.

3. A three - wire series - connected electronic water gauge circuit according to claim 1, characterized in that: The water level detection signal Vn of the last - stage water level detection sub - circuit of the cascaded water level detection sub - circuits provides power for the voltage - dividing circuit, and the voltage - dividing point of the voltage - dividing circuit is connected to the micro - processor.

4. A three - wire series - connected electronic water gauge circuit according to claim 3, characterized in that: The micro - processor integrates an AD conversion circuit.

5. A three - wire series - connected electronic water gauge circuit according to claim 1, characterized in that: The cascaded water level detection sub - circuits are arranged on a flexible circuit board.

6. A three - wire series - connected electronic water gauge circuit according to claim 1, characterized in that: The resistance between the source electrode of the PMOS transistor and the detection electrode of each stage of the water level detection sub - circuit is adjustable to ensure that the PMOS transistor can be sufficiently turned on when contacting water according to different working voltages and the resistance value R0 of the water body, otherwise the PMOS transistor is cut off.

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