Display panel

Abstract

The display panel includes: a substrate including a first region, a second region, and a third region between the first region and the second region; a display element disposed in the second region and including a pixel electrode, a counter electrode, and an intermediate layer; a multilayer film disposed between the substrate and the pixel electrode and including an organic insulating layer and an inorganic layer on the organic insulating layer; and at least one groove formed in the multilayer film and disposed in the third region, wherein at least one organic material layer is included in the intermediate layer and is disconnected by the at least one groove.

Description

[0001] Cross - reference to related applications

[0002] This application claims the benefit of Korean Patent Application Nos. 10 - 2019 - 0006924, filed on January 18, 2019, and 10 - 2019 - 0053907, filed on May 8, 2019, with the Korean Intellectual Property Office, the entire contents of each of which are incorporated herein by reference. Technical field

[0003] One or more aspects of embodiments of the present disclosure relate to a display panel including a first region inside a display area, and a display device including the display panel. Background art

[0004] Recently, the purposes of display devices have become more diverse. Moreover, as display devices have become thinner and lighter, their range of use has gradually expanded.

[0005] As the display area of display devices has increased, functions that can be combined or associated with the display devices have been added. As a way of adding various functions while increasing the display area, research is being conducted on display devices in which various components can be arranged in the display area. Summary of the invention

[0006] One or more aspects of embodiments of the present disclosure relate to a display panel including a first region and a display device including the display panel, where the first region can be used for various purposes, such as a region for arranging various components inside the display area. However, it should be understood that the embodiments described herein should be considered as being of a descriptive nature only and not for limiting the present disclosure.

[0007] Additional aspects will be set forth in the following description, and some will be apparent from the description, or may be learned by practice of the presented embodiments.

[0008] According to one or more embodiments, the display panel includes: a substrate including a first region in which a through - hole is formed, a second region, and a third region between the first region and the second region; a display element disposed in the second region and including a pixel electrode, a counter electrode, and an intermediate layer between the pixel electrode and the counter electrode; a multilayer film between the substrate and the pixel electrode and including an organic insulating layer and an inorganic layer on the organic insulating layer; and at least one groove formed in the multilayer film and in the third region, where at least one organic material layer included in the intermediate layer is disconnected by the at least one groove.

[0009] The inorganic layer may include at least one of a metal layer or an inorganic insulating layer.

[0010] The display panel may further include: a pixel circuit including a thin-film transistor and a storage capacitor each electrically connected to a display element, wherein the inorganic layer may include the same material as that of a contact metal layer connecting the pixel circuit and the thin-film transistor.

[0011] At least one organic material layer may include one or more selected from a hole transport layer, a hole injection layer, an electron injection layer, and an electron transport layer.

[0012] The organic insulating layer may include at least one opening adjacent to the groove, and the inorganic layer may directly contact a lower layer disposed under the organic insulating layer through the at least one opening.

[0013] At least one opening of the organic insulating layer may include a first opening and a second opening, at least one groove is between the first opening and the second opening, and the inorganic layer may directly contact the lower layer through the first opening and the second opening.

[0014] The lower layer may include an inorganic insulating layer.

[0015] The lower layer may include a metal layer.

[0016] The lower layer may include the same material as that of the inorganic layer.

[0017] At least one groove may include: a first hole defined in the inorganic layer; and a second hole or recess defined in the organic insulating layer.

[0018] The multi-layer film may include at least one lower insulating layer disposed under the organic insulating layer, and the at least one lower insulating layer includes an inorganic insulating layer.

[0019] The bottom surface of at least one groove may be disposed on a virtual surface between the top surface of the substrate and the top surface of the at least one lower insulating layer.

[0020] At least one lower insulating layer may have an opening overlapping with the at least one groove.

[0021] The multi-layer film may further include at least one top insulating layer disposed on the organic insulating layer, and the at least one top insulating layer includes a hole overlapping with the at least one groove.

[0022] At least one top insulating layer may cover a side surface of the inorganic layer defining the at least one groove.

[0023] According to one or more embodiments, a display panel includes: a substrate including a first region, a second region where pixels are disposed, and a third region between the first region and the second region; thin film transistors disposed in the second region; a multilayer film disposed in the third region and including an organic insulating layer and an inorganic layer, a part of the organic insulating layer covering the thin film transistors, and the inorganic layer being on the organic insulating layer; at least one groove defined in the multilayer film; and a stack disposed on the multilayer film and including a pixel electrode, a counter electrode, and an intermediate layer, the pixel electrode corresponding to the pixels, and the intermediate layer being between the pixel electrode and the counter electrode, wherein the intermediate layer may include at least one organic material layer disconnected around the at least one groove.

[0024] The at least one groove may have an undercut shape.

[0025] The inorganic layer of the multilayer film may include at least one of a metal or an inorganic insulating material.

[0026] The at least one organic material layer may include one or more selected from a hole transport layer, a hole injection layer, an electron injection layer, and an electron transport layer.

[0027] The third region may include an inorganic contact region adjacent to the at least one groove.

[0028] The organic insulating layer may include at least one opening disposed in the third region and adjacent to the at least one groove, and the inorganic layer may define the inorganic contact region by directly contacting a lower inorganic layer disposed under the organic insulating layer through the at least one opening.

[0029] The lower inorganic layer may include an inorganic insulating layer.

[0030] The lower inorganic layer may include a metal layer.

[0031] The at least one groove may include a first groove and a second groove separated from each other, and the inorganic contact region may be between the first groove and the second groove.

[0032] The multilayer film may further include at least one top insulating layer disposed on the inorganic layer, and the at least one top insulating layer may include holes corresponding to the at least one groove.

[0033] The at least one top insulating layer may cover a side surface of an end of the inorganic layer facing the center of the at least one groove.

[0034] The at least one top insulating layer may include at least one of an organic insulating layer or an inorganic insulating layer.

[0035] The at least one groove may include a first hole defined in the inorganic layer; and a second hole or recess defined in the organic insulating layer.

[0036] The multilayer film may include at least one lower insulating layer disposed under the organic insulating layer, and the at least one lower insulating layer includes an inorganic insulating layer.

[0037] The at least one lower insulating layer may have an opening overlapping with at least one groove.

[0038] In conjunction with the accompanying drawings, these and / or other aspects will become apparent and be more readily appreciated from the following description of the embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In conjunction with the accompanying drawings, these and / or other aspects will become apparent and be more readily appreciated from the following description of the embodiments, in which:

[0040] Figure 1 is a perspective view of a display device according to an embodiment;

[0041] Figure 2A and Figure 2B is a cross-sectional view of a display device according to an embodiment;

[0042] Figures 3A-3D is a cross-sectional view of a display panel according to an embodiment;

[0043] Figures 4A-4D is a cross-sectional view of a display panel according to another embodiment;

[0044] Figure 5 is a plan view of a display panel according to an embodiment;

[0045] Figure 6 is an equivalent circuit diagram of one of the pixels of a display panel according to an embodiment;

[0046] Figure 7 is a plan view of a part of a display panel according to an embodiment;

[0047] Figure 8 is a cross-sectional view of a display panel according to an embodiment;

[0048] Figures 9A-9D is a cross-sectional view of an operation of a process for manufacturing a display panel according to an embodiment;

[0049] Fig. 10A is a cross-sectional view of an intermediate region of a display panel according to another embodiment;

[0050] Fig. 10B is a cross-sectional view of an intermediate region of a display panel according to another embodiment;

[0051] Fig.11A 、 Fig. 11B and Fig. 11Cis a cross-sectional view of the operation of a process for manufacturing a display panel according to an embodiment;

[0052] Fig.12 is a cross-sectional view of an intermediate region of a display panel according to another embodiment;

[0053] Fig.13A and Fig. 13B is a cross-sectional view of the operation of a process for manufacturing a display panel according to an embodiment;

[0054] Fig.14 is a cross-sectional view of an intermediate region of a display panel according to another embodiment;

[0055] Fig.15A and Figures 15D-15F is a cross-sectional view of the operation of a process for manufacturing a display panel according to an embodiment;

[0056] Fig. 15B and Fig. 15C is a modified Fig.15A cross-sectional view of an embodiment;

[0057] Figure 15G is a cross-sectional view of a modified embodiment of a display panel according to Fig.15F ;

[0058] Fig.16 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0059] Fig.17 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0060] Fig.18 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0061] Fig.19 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0062] Fig. 20 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0063] Fig.21 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0064] Fig. 22 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0065] Fig.23 is a cross-sectional view of a groove of a display panel according to another embodiment;

[0066] Fig.24is a cross-sectional view of a slot of a display panel according to another embodiment;

[0067] Fig.25 is a cross-sectional view of a display panel according to another embodiment;

[0068] Fig.26 is a cross-sectional view of a display panel according to another embodiment;

[0069] Fig. 27 is a cross-sectional view of a display panel according to another embodiment;

[0070] Fig.28 is a cross-sectional view of a display panel according to another embodiment;

[0071] Fig.29 is a cross-sectional view of a display panel according to another embodiment; and

[0072] Fig.30 is a cross-sectional view of a display panel according to another embodiment. Detailed Embodiments

[0073] Reference will now be made in more detail to embodiments shown in the accompanying drawings, in which like reference numerals refer to the same elements throughout. In this regard, the present embodiments may have different forms and should not be construed as limited to the description set forth herein. Accordingly, the embodiments are described below only by reference to the drawings to explain aspects of the present description. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. In this specification, "A and / or B" represents A or B, or A and B. Throughout the disclosure, the expression "at least one of a, b, or c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variants thereof. Further, when describing embodiments of the present invention, the use of "may" refers to "one or more embodiments of the present invention".

[0074] Hereinafter, the present disclosure will be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the present disclosure are shown. When described with reference to the accompanying drawings, like reference numerals in the drawings indicate the same or corresponding elements, and repeated descriptions thereof will not be provided.

[0075] It should be understood that although terms such as "first", "second", etc. may be used herein to describe various components, these components should not be limited by these terms. These components are only used to distinguish one component from another.

[0076] As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0077] It should be further understood that the terms “comprises”, “includes”, “comprising” and / or “including” as used herein indicate the presence of the recited features or components, but do not preclude the presence or addition of one or more other features or components.

[0078] It should be understood that when a layer, region or component is referred to as being “formed on” or “on” another layer, region or component, it can be formed directly or indirectly on the other layer, region or component. That is, for example, there may be intermediate layers, regions or components. In contrast, when a layer, region or component is referred to as being “directly formed on” or “directly on” another layer, region or component, there may be no intermediate layers, regions or components.

[0079] For ease of explanation, the dimensions of the elements in the drawings may be exaggerated. In other words, since the dimensions and thicknesses of the components in the drawings are arbitrarily shown for ease of explanation, the following embodiments are not limited thereto.

[0080] When a certain embodiment can be implemented differently, the specific process sequence can be carried out differently from the described sequence. For example, two consecutively described processes can be carried out substantially simultaneously or in the reverse order of the described sequence.

[0081] It should be understood that when a layer, region or component is referred to as being “connected” to another layer, region or component, it can be “directly connected” to the other layer, region or component, or can be “indirectly connected” to the other layer, region or component, with other layers, regions or components inserted between the layer, region or component and the other layer, region or component. For example, it should be understood that when a layer, region or component is referred to as being “connected to or electrically connected” to another layer, region or component, it can be “directly electrically connected” to the other layer, region or component, or can be “indirectly connected or indirectly electrically connected” to the other layer, region or component with other layers, regions or components inserted between the layer, region or component and the other layer, region or component.

[0082] Figure 1 is a perspective view of a display device 1 according to an embodiment.

[0083] Reference Figure 1 , the display device 1 includes a first region OA and a display region DA (which may be referred to herein as a second region) that at least partially surrounds the first region OA. The display device 1 can provide a predetermined (or set) image by using light emitted from a plurality of pixels arranged in the display region DA. Figure 1 As shown in, a first region OA is arranged inside the display region DA, and the first region OA can be entirely surrounded by the display region DA. The first region OA can be a region in which the following will be referred to with reference to Figure 2A and Figure 2B the region of the component described.

[0084] The middle region MA may be arranged as a third region between the first region OA and the display region DA as the second region. The display region DA may be surrounded by the outer peripheral region PA as the fourth region. The middle region MA and the outer peripheral region PA may be non-display regions in which no pixels are arranged. The middle region MA may be entirely surrounded by the display region DA, and the display region DA may be entirely surrounded by the outer peripheral region PA (for example, the outer peripheral region PA may be completely around the display region DA).

[0085] Hereinafter, although the organic light-emitting display device is exemplarily described as the display device 1 according to the embodiment, the display device 1 is not limited thereto. In another embodiment, a display device such as a quantum dot light-emitting display may be used.

[0086] Although Figure 1 as shown in, a first region OA is provided and is generally circular, but the present disclosure is not limited thereto. The number of the first regions OA may be two or more, and the shape of each first region OA may be a circular shape, an elliptical shape, a polygonal shape, a star shape, and / or a rhombic shape, and may be variously modified.

[0087] Although Figure 1 as shown in, the first region OA is arranged on the upper left side of the display region DA, but the present disclosure is not limited thereto. In other embodiments, the first region OA may be arranged on the upper right side, the lower left side, the lower right side, or the center (for example, the upper center of the display region DA) of the display region DA, without limitation. Although Figure 1 as shown in, the display region DA has a substantially rectangular shape, but the present disclosure is not limited thereto. The shape of the display region DA may be a circular shape, an elliptical shape, a polygonal shape, a star shape, and / or a rhombic shape, and may be variously modified.

[0088] Figure 2A and Figure 2B is a cross-sectional view of the display device 1 according to the embodiment taken along the line II-II’. Figure 1 of

[0089] Referring to Figure 2A , the display device 1 may include a display panel 10, an input sensing layer 40 arranged on the display panel 10, and an optical function layer 50. These layers may be covered by a window 60. The display device 1 may be included in various electronic devices such as a mobile phone, a laptop computer, and / or a smart watch.

[0090] The display panel 10 can display images. The display panel 10 includes pixels arranged in the display area DA. Each pixel can include a display element and a pixel circuit connected to the display element. The display element can include an organic light-emitting diode and / or a quantum dot light-emitting diode.

[0091] The input sensing layer 40 obtains coordinate information corresponding to an external input, for example, a touch event. The input sensing layer 40 can include sensing electrodes (or touch electrodes) and trace lines connected to the sensing electrodes. The input sensing layer 40 can be arranged on the display panel 10. The input sensing layer 40 can sense external inputs using the mutual capacitance method and / or the self-capacitance method.

[0092] The input sensing layer 40 can be directly formed on the display panel 10, or can be separately formed and then coupled to the display panel 10 by using an adhesive layer, such as an optically clear adhesive. For example, the input sensing layer 40 can be successively formed after the process of forming the display panel 10. In this case, the input sensing layer 40 can be a part of the display panel 10, and the adhesive layer may not be arranged between the input sensing layer 40 and the display panel 10. Although Figure 2A shown, the input sensing layer 40 is arranged between the display panel 10 and the optical function layer 50, in another embodiment, the input sensing layer 40 can be arranged on the optical function layer 50.

[0093] The optical function layer 50 can include an anti-reflection layer. The anti-reflection layer can reduce the reflectivity of light (external light) incident from the outside toward the display panel 10 through the window 60. The anti-reflection layer can include a retarder and a polarizer. The retarder can include a film retarder or a liquid crystal retarder. The retarder can include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer can include a film polarizer or a liquid crystal polarizer. The film polarizer can include a stretchable synthetic resin film, and the liquid crystal polarizer can include liquid crystals arranged in a predetermined (or set) arrangement. Each of the retarder and the polarizer can further include a protective film. The protective films of the retarder and the polarizer can be defined as the base layers of the anti-reflection layer.

[0094] In one or more embodiments, the anti-reflection layer can include a black matrix and a color filter. The color filter can be arranged by considering the colors of light emitted from the pixels of the display panel 10 respectively. In another embodiment, the anti-reflection layer can include a destructive interference structure. The destructive interference structure can include a first reflection layer and a second reflection layer arranged on different layers respectively. The first reflected light and the second reflected light reflected by the first reflection layer and the second reflection layer respectively can produce destructive interference, and thus the reflectivity of external light can be reduced.

[0095] The optical functional layer 50 may include a lens layer. The lens layer may improve the emission efficiency of light emitted from the display panel 10 or reduce the color deviation of the light. The lens layer may include a layer having a concave lens shape or a convex lens shape and / or include a plurality of layers having different refractive indexes respectively. The optical functional layer 50 may include both an anti-reflection layer and a lens layer, or include one of the anti-reflection layer and the lens layer.

[0096] In one or more embodiments, the optical functional layer 50 may be successively formed after the process of forming the display panel 10 and / or the input sensing layer 40. In this case, an adhesive layer may not be disposed between the optical functional layer 50 and the input sensing layer 40 and / or the display panel 10.

[0097] The display panel 10, the input sensing layer 40, and / or the optical functional layer 50 may include an opening (hole or through hole). In this regard, Figure 2A as shown, the display panel 10, the input sensing layer 40, and the optical functional layer 50 respectively include first to third openings 10H, 40H, and 50H, and the first to third openings 10H, 40H, and 50H overlap each other. The first opening 10H may pass through the uppermost surface to the lowermost surface of the display panel 10, the second opening 40H may pass through the uppermost surface to the lowermost surface of the input sensing layer 40, and the third opening 50H may pass through the uppermost surface to the lowermost surface of the optical functional layer 50. The first to third openings 10H, 40H, and 50H are set to correspond to the first region OA. In one or more embodiments, at least one selected from the display panel 10, the input sensing layer 40, and the optical functional layer 50 may not include an opening. For example, one or two selected from the display panel 10, the input sensing layer 40, and the optical functional layer 50 may not include an opening. For example, as Figure 2B shown, the display panel 10, the input sensing layer 40, and the optical functional layer 50 may not include an opening.

[0098] The first region OA may be a component region where components 20 for adding various functions to the display device 1 are provided (for example, may include components such as sensors, cameras, speakers, etc.). As Figure 2A shown, the components 20 may be provided in the first to third openings 10H, 40H, and 50H. Alternatively, as Figure 2B shown, the components 20 may be provided under the display panel 10.

[0099] Component 20 may include electronic components. For example, component 20 may include electronic components that use light or sound. For example, the electronic component may be a sensor that emits and / or receives light, such as an infrared sensor, a camera that receives light and captures an image, a sensor that outputs and senses light or sound to measure distance or identify a fingerprint, a small lamp that outputs light, or a speaker that outputs sound. The electronic component that uses light may use light in various wavelength bands, such as visible light, infrared light, and / or ultraviolet light. In one or more embodiments, the first region OA may be a transmission region, and light and / or sound output from component 20 to the outside or propagating from the outside toward the electronic component may pass through the transmission region.

[0100] In one or more embodiments, when the display device 1 is used as a smartwatch or an instrument panel for a vehicle, component 20 may be a member including the hands of a clock or the hands indicating predetermined (or set) information (such as the speed of a vehicle, etc.). When the display device 1 includes component 20, such as the hands of a clock and / or an instrument panel for a vehicle, component 20 may be exposed to the outside through window 60, and window 60 may include an opening corresponding to the first region OA.

[0101] As described above, component 20 may include element(s) related to the function of display panel 10, or element(s) such as accessories that increase the aesthetic appeal of display panel 10. For example, an optically transparent adhesive or the like may be provided between window 60 and optical function layer 50.

[0102] FIG. 3A to FIG. 3D is a cross-sectional view of display panel 10 according to one or more embodiments.

[0103] Reference Figure 3A , display panel 10 includes a display layer 200 disposed on a substrate 100. Substrate 100 may include a glass material and / or a polymer resin. Substrate 100 may include (have) a multilayer structure. For example, as shown in the enlarged view of Figure 3A , substrate 100 may include a first base layer 101, a first barrier layer 102, a second base layer 103, and a second barrier layer 104.

[0104] Each of the first base layer 101 and the second base layer 103 may include a polymer resin. For example, each of the first base layer 101 and the second base layer 103 may include a polymer resin, such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), triacetyl cellulose (TAC), and / or cellulose acetate propionate (CAP). The polymer resin may be transparent.

[0105] The first barrier layer 102 and the second barrier layer 104 are barrier layers for preventing (or reducing) the penetration of external foreign substances, and may include a single layer or multiple layers, the single layer or multiple layers including an inorganic material such as silicon nitride (SiN x , x>0), silicon oxynitride (SiON), and / or silicon oxide (SiO x , x>0).

[0106] The display layer 200 may include a plurality of pixels. The display layer 200 may include a display element layer 200A and a pixel circuit layer 200B. The display element layer 200A may include display elements respectively disposed in the pixels, and the pixel circuit layer 200B may include an insulating layer and a pixel circuit disposed in each pixel. Each pixel circuit may include a thin film transistor and a storage capacitor, and each display element may include an organic light emitting diode.

[0107] The display elements of the display layer 200 may be covered by an encapsulation member such as a thin film encapsulation layer 300. The thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In the case where the display panel 10 includes a substrate 100 and a thin film encapsulation layer 300 (the substrate 100 includes a polymer resin, and the thin film encapsulation layer 300 includes an inorganic encapsulation layer and an organic encapsulation layer), the flexibility of the display panel 10 may be improved.

[0108] The display panel 10 may include a first opening 10H passing through the display panel 10. The first opening 10H may be provided in the first region OA (for example, may overlap with the first region OA). In this case, the first region OA may include an opening region. Figure 3A As shown in, the substrate 100 and the thin film encapsulation layer 300 respectively include through holes 100H and 300H corresponding to the first opening 10H of the display panel 10. The display layer 200 may also include a through hole 200H corresponding to the first region OA.

[0109] In one or more embodiments, as Figure 3B shown in, the substrate 100 may not include a through hole corresponding to the first region OA. The display layer 200 may include a through hole 200H corresponding to the first region OA. The thin film encapsulation layer 300 may not include a through hole corresponding to the first region OA. In one or more embodiments, as Figure 3C shown in, the display layer 200 may not include a through hole 200H corresponding to the first region OA, and the display element layer 200A may not be provided in the first region OA.

[0110] Although FIG. 3A to FIG. 3C shown in, the display element layer 200A is not disposed in the first region OA, the present disclosure is not limited thereto. In one or more embodiments, as Figure 3DAs shown, the auxiliary display element layer 200C can be disposed in the first region OA. The auxiliary display element layer 200C can include display elements having a structure different from that of the display elements of the display element layer 200A and / or operating in a different manner.

[0111] In one or more embodiments, the display element layer 200A can include pixels, each pixel including an active organic light-emitting diode, and the auxiliary display element layer 200C can include pixels, each pixel including a passive organic light-emitting diode. In the case where the auxiliary display element layer 200C includes a passive organic light-emitting diode as a display element, there may be no elements constituting the pixel circuit underlying the relevant (corresponding) passive organic light-emitting diode. For example, a part of the pixel circuit layer 200B below the auxiliary display element layer 200C does not include transistors and storage capacitors.

[0112] In one or more embodiments, although the auxiliary display element layer 200C can include display elements of the same type (or kind) as the display elements of the display element layer 200A (e.g., active organic light-emitting diodes), the structure of the pixel circuit thereunder can be different. For example, the pixel circuit (e.g., a pixel circuit including a light-blocking layer between the substrate and the transistor) below the auxiliary display element layer 200C can include a structure different from that of the pixel circuit below the display element layer 200A. In one or more embodiments, the display elements of the auxiliary display element layer 200C can operate according to control signals different from those of the display elements of the display element layer 200A. Components that do not require a relatively high transmittance (e.g., an infrared sensor) can be arranged (placed) in the first region OA in which the auxiliary display element layer 200C is arranged. In this case, the first region OA can be understood as (e.g., can be used as) a component region and an auxiliary display region.

[0113] 4A to 4D is a cross-sectional view of a display panel 10' according to one or more embodiments. Different from the display panel 10 including the thin film encapsulation layer 300 described with reference to FIG. 3A to FIG. 3D the display panel 10' 4A to 4D can include a package substrate 300A and a sealant 340.

[0114] As FIG. 4A to FIG. 4C shown, at least one selected from the substrate 100, the display layer 200, and the package substrate 300A can include through holes 100H, 200H, and 300AH corresponding to the first region OA. The display element layer 200A may not be disposed in the first region OA, or as Figure 4D shown, the auxiliary display element layer 200C can be disposed in the first region OA. The auxiliary display element layer 200C is the same as the auxiliary display element layer 200C described with reference to Figure 3D ​

[0115] Figure 5 is a plan view of a display panel 10 according to one or more embodiments, and Figure 6 is an equivalent circuit diagram of one of the pixels of the display panel 10 according to one or more embodiments.

[0116] Referring to Figure 5 , the display panel 10 may include a first region OA, a display region DA (which is a second region), an intermediate region MA (which is a third region), and a peripheral region PA (which is a fourth region). Figure 5 It can be understood as a diagram of the substrate 100 of the display panel 10. For example, it can be understood that the substrate 100 includes a first region OA, a display region DA, an intermediate region MA, and a peripheral region PA.

[0117] The display panel 10 includes a plurality of pixels P arranged in the display region DA. As Figure 6 shown, each pixel P may include a pixel circuit PC and an organic light-emitting diode OLED connected to the pixel circuit PC as a display element. The pixel circuit PC may include a first thin-film transistor T1, a second thin-film transistor T2, and a storage capacitor Cst. Each pixel P may emit, for example, red light, green light, or blue light, or red light, green light, blue light, or white light through the organic light-emitting diode OLED.

[0118] The second thin-film transistor T2 is a switching thin-film transistor and is connected to a scan line SL and a data line DL, and may transfer a data voltage input from the data line DL to the first thin-film transistor T1 in response to a switching voltage input from the scan line SL. The storage capacitor Cst may be connected to the second thin-film transistor T2 and a driving voltage line PL, and may store a voltage corresponding to the difference between the voltage transferred from the second thin-film transistor T2 and a first power supply voltage ELVDD supplied to the driving voltage line PL.

[0119] The first thin-film transistor T1 is a driving thin-film transistor and may be connected to the driving voltage line PL and the storage capacitor Cst, and may control a driving current flowing through the organic light-emitting diode OLED from the driving voltage line PL in response to a voltage value stored in the storage capacitor Cst. The organic light-emitting diode OLED may emit light with a predetermined (or set) brightness by using the driving current. The opposite electrode (e.g., cathode) of the organic light-emitting diode OLED may receive a second power supply voltage ELVSS.

[0120] Although Figure 6As shown, the pixel circuit PC includes two thin film transistors and a storage capacitor, but the present disclosure is not limited thereto. Depending on the design of the pixel circuit PC, the number of thin film transistors and the number of storage capacitors can be differently modified. For example, in addition to two thin film transistors, the pixel circuit PC can further include four or five or more thin film transistors.

[0121] Referring again to Figure 5 , in the plan view, the intermediate region MA can surround the first region OA. The intermediate region MA is a region where display elements, such as organic light emitting diodes OLEDs, are not arranged. Trace lines configured to supply signals to the pixels P arranged around the first region OA can cross the intermediate region MA. A scan driver 1100 configured to supply a scan signal to each pixel P, a data driver 1200 configured to supply a data signal to each pixel P, a main power supply wiring configured to supply a first power voltage and a second power voltage, etc. can be arranged in the peripheral region PA. Although Figure 5 as shown in, the data driver 1200 is adjacent to one side of the substrate 100, but according to one or more embodiments, the data driver 1200 can be arranged on a flexible printed circuit board (FPCB) that is electrically connected to pads arranged on one side of the display panel 10.

[0122] Figure 7 is a plan view of a part of the display panel 10 according to one or more embodiments.

[0123] Referring to Figure 7 , the pixels P can be arranged around the first region OA in the display region DA. Some pixels P can be spaced apart from each other around the first region OA, and the first region OA can be defined between the pixels P. For example, Figure 7 in the plan view of, the pixels P can be spaced apart vertically around the first region OA, or spaced apart horizontally around the first region OA.

[0124] Among the trace lines configured to supply signals to the pixels P, the trace lines adjacent to the first region OA can go around (or bypass) the first region OA. Figure 7 In the plan view of, at least one of the data lines DL crossing the display region DA can extend in the y - direction to supply data signals to the pixels P arranged vertically (the first region OA is between the vertically arranged pixels P), and can go around along the edge of the first region OA in the intermediate region MA. At least one of the scan lines SL crossing the display region DA can extend in the x - direction to supply scan signals to the pixels P arranged horizontally (the first region OA is between the horizontally arranged pixels P), and can go around along the edge of the first region OA in the intermediate region MA.

[0125] The detour portion (bypass portion or bypassing portion) SL-D of the scan line SL may be provided on the same layer as the layer on which the extending portion SL-L that traverses the display area DA is disposed, and may be formed integrally with the extending portion SL-L. The bypassing portion DL-D1 of at least one of the data lines DL may be disposed on a layer different from the layer on which the extending portion DL-L1 that traverses the display area DA is disposed. The bypassing portion DL-D1 of the data line DL may be connected to the extending portion DL-L1 through a contact hole. The bypassing portion DL-D2 of at least one of the data lines DL may be provided on the same layer as the layer on which the extending portion DL-L2 is disposed, and may be formed integrally with the extending portion DL-L2.

[0126] One or more grooves G may be disposed between the area of the first region OA and the intermediate region MA where the scan line SL and the data line DL bypass. In a plan view, the groove G may have an annular shape surrounding the first region OA. The grooves G may be spaced apart from each other.

[0127] Figure 8 is a cross-sectional view of the display panel 10-1 according to one or more embodiments, and may correspond to a cross-section taken along the Figure 7 line VIII-VIII’. 9A to 9D is a cross-sectional view of the actions of a process for manufacturing the display panel 10-1 according to one or more embodiments, and shows the intermediate region MA.

[0128] Reference Figure 8 to the display area DA, the substrate 100 may include a glass material and / or a polymer resin. In one or more embodiments, as shown in the Figure 3A magnified view, the substrate 100 may include a plurality of sub-layers.

[0129] A buffer layer 201 may be provided on the substrate 100. The buffer layer 201 is configured to prevent or block the penetration of impurities into the semiconductor layer “Act” of the thin film transistor TFT. The buffer layer 201 may include an inorganic insulating material (such as, silicon nitride, silicon oxynitride, and / or silicon oxide), and may include a single layer or multiple layers including the above inorganic insulating materials.

[0130] The pixel circuit PC may be disposed on the buffer layer 201. The pixel circuit PC includes a thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. Figure 8 The thin film transistor TFT shown in Figure 6The described driving thin film transistor. The data line DL of the pixel circuit PC can be electrically connected to the switching thin film transistor included in the pixel circuit PC. Although the present embodiment shows a top-gate type (or kind) thin film transistor in which the gate electrode GE is disposed above the semiconductor layer Act (the gate insulating layer 203 is between the gate electrode GE and the semiconductor layer Act), according to one or more embodiments, the thin film transistor TFT can be a bottom-gate type (or kind) thin film transistor.

[0131] The semiconductor layer Act can include polysilicon. In one or more embodiments, the semiconductor layer Act can include amorphous silicon, an oxide semiconductor, and / or an organic semiconductor. The gate electrode GE can include a low-resistance metal material. The gate electrode GE can include a conductive material such as Mo, Al, Cu, and / or Ti. The gate electrode GE can include a single layer or multiple layers including any one of the above materials.

[0132] The gate insulating layer 203 between the semiconductor layer Act and the gate electrode GE can include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and / or hafnium oxide. The gate insulating layer 203 can include a single layer or multiple layers including any one of the above materials.

[0133] The source electrode SE and the drain electrode DE can be disposed on the same layer as the layer on which the data line DL is disposed, and can include the same material as the data line DL. The source electrode SE, the drain electrode DE, and the data line DL can include a material having excellent conductivity. The source electrode SE and the drain electrode DE can include a conductive material including Mo, Al, Cu, and / or Ti. The source electrode SE and the drain electrode DE can include a single layer or multiple layers including any one of the above materials. In one or more embodiments, the source electrode SE, the drain electrode DE, and the data line DL can have a multilayer structure of Ti / Al / Ti.

[0134] The storage capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 that overlap each other, and a first interlayer insulating layer 205 is between the lower electrode CE1 and the upper electrode CE2. The storage capacitor Cst can overlap with the thin film transistor TFT. In this regard, Figure 8 as shown, the gate electrode GE of the thin film transistor TFT serves as the lower electrode CE1 of the storage capacitor Cst. In one or more embodiments, the storage capacitor Cst may not overlap with the thin film transistor TFT. The storage capacitor Cst can be covered by a second interlayer insulating layer 207. The upper electrode CE2 of the storage capacitor Cst can include a conductive material including Mo, Al, Cu, and / or Ti, and can include a single layer or multiple layers including any one of the above materials.

[0135] The first interlayer insulating layer 205 and the second interlayer insulating layer 207 may include an inorganic insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and / or hafnium oxide. The first interlayer insulating layer 205 and the second interlayer insulating layer 207 may include a single layer or multiple layers, and the single layer or multiple layers include any one of the above materials.

[0136] The pixel circuit PC including the thin film transistor TFT and the storage capacitor Cst may be covered by the first organic insulating layer 209. The first organic insulating layer 209 may include a generally (substantially) flat top surface.

[0137] The pixel circuit PC may be electrically connected to the pixel electrode 221. For example, as Figure 8 shown, the contact metal layer CM may be disposed between the thin film transistor TFT and the pixel electrode 221. The contact metal layer CM may be connected to the thin film transistor TFT through a contact hole formed in the first organic insulating layer 209, and the pixel electrode 221 may be connected to the contact metal layer CM through a contact hole formed in the second organic insulating layer 211. The contact metal layer CM may include a conductive material, and the conductive material includes Mo, Al, Cu, and / or Ti, and may include a single layer or multiple layers, and the single layer or multiple layers include any one of the above materials. In one or more embodiments, the contact metal layer CM may include a multilayer of Ti / Al / Ti.

[0138] The first organic insulating layer 209 and the second organic insulating layer 211 may each independently include an organic insulating material, and the organic insulating material includes a general polymer (such as polymethyl methacrylate (PMMA) and / or polystyrene (PS)), a polymer derivative having a phenol group, an acryloyl polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluoropolymer, a parylene polymer, a polyvinyl alcohol polymer, or a blend thereof. In one or more embodiments, the first organic insulating layer 209 and the second organic insulating layer 211 may include polyimide.

[0139] The pixel electrode 221 may be formed on the second organic insulating layer 211. The pixel electrode 221 may include a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3) indium gallium oxide (IGO) and / or aluminum zinc oxide (AZO). In one or more embodiments, the pixel electrode 221 may include a reflective layer, the reflective layer including Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, and / or compounds thereof. In one or more embodiments, the pixel electrode 221 may further include a layer above and / or below the reflective layer, the layer including ITO, IZO, ZnO, and / or In 2 O 3 .

[0140] A pixel defining layer 215 may be formed on the pixel electrode 221. The pixel defining layer 215 may include an opening that exposes the top surface of the pixel electrode 221 and covers the edge of the pixel electrode 221. The pixel defining layer 215 may include an organic insulating material. In one or more embodiments, the pixel defining layer 215 may include an inorganic insulating material, such as silicon nitride (SiN x ,x>0), silicon oxynitride (SiON), and / or silicon oxide (SiO x ,x>0). In one or more embodiments, the pixel defining layer 215 may include an organic insulating material and an inorganic insulating material.

[0141] The intermediate layer 222 includes an emission layer 222b. The intermediate layer 222 may include a first functional layer 222a disposed below the emission layer 222b and / or a second functional layer 222c disposed on the emission layer 222b. The emission layer 222b may include a low molecular weight organic material or a polymeric organic material that emits light of a predetermined (or set) color.

[0142] The first functional layer 222a may include a single layer or multiple layers. For example, when the first functional layer 222a includes a polymeric organic material, the first functional layer 222a includes a hole transport layer (HTL) having a single layer structure and may include poly-(3,4)-ethylenedioxythiophene (PEDOT) and / or polyaniline (PANI). When the first functional layer 222a includes a low molecular weight organic material, the first functional layer 222a may include a hole injection layer (HIL) and / or a hole transport layer (HTL).

[0143] The second functional layer 222c may be omitted. However, when the first functional layer 222a and the emission layer 222b include polymeric organic materials, preferably, the second functional layer 222c is provided. The second functional layer 222c may be a single layer or multiple layers. The second functional layer 222c may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0144] The emission layer 222b of the intermediate layer 222 can be disposed in all pixels in the display area DA. The emission layer 222b can be patterned to correspond to the pixel electrode 221. Different from the emission layer 222b, the first functional layer 222a and / or the second functional layer 222c of the intermediate layer 222 can extend toward the intermediate area MA, such that the first functional layer 222a and / or the second functional layer 222c are provided not only in the display area DA but also in the intermediate area MA.

[0145] The counter electrode 223 can be disposed on the second functional layer 222c. The counter electrode 223 can include a conductive material having a low work function. For example, the counter electrode 223 can include a (semi)transparent layer including Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, and / or an alloy thereof. In one or more embodiments, the counter electrode 223 can further include a layer on the (semi)transparent layer including any one of the above-mentioned materials, and the layer includes ITO, IZO, ZnO, and / or In 2 O 3 . The counter electrode 223 can be provided not only in the display area DA but also in the intermediate area MA. The first functional layer 222a, the second functional layer 222c, and the counter electrode 223 can each be independently formed by a thermal deposition method.

[0146] The capping layer 230 can be disposed on the counter electrode 223. For example, the capping layer 230 can include LiF and can be formed by a thermal deposition method. In one or more embodiments, the capping layer 230 can be omitted.

[0147] The spacers 217 can be provided on the pixel defining layer 215. The spacers 217 can include an organic insulating material such as polyimide. In one or more embodiments, the spacers 217 can include an inorganic insulating material, or include an organic insulating material and an inorganic insulating material.

[0148] The spacers 217 can include a material different from that of the pixel defining layer 215, or include the same material as that of the pixel defining layer 215. In one or more embodiments, the pixel defining layer 215 and the spacers 217 can include polyimide. The pixel defining layer 215 and the spacers 217 can be formed simultaneously (or in parallel) during a mask process using a halftone mask.

[0149] The organic light-emitting diode OLED is covered by a thin film encapsulation layer 300. The thin film encapsulation layer 300 can include at least one organic encapsulation layer and at least one inorganic encapsulation layer. In one or more embodiments, Figure 8As shown, the thin film encapsulation layer 300 includes a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330. In one or more embodiments, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the stacking order can be modified.

[0150] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can include one or more inorganic materials, such as aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can include a single layer or multiple layers, and the single layer or multiple layers include any one of the above materials. The organic encapsulation layer 320 can include a polymer material. The polymer material can include acrylic resins, such as PMMA, polyacrylic acid, epoxy resins, polyimide, and / or polyethylene. In one or more embodiments, the organic encapsulation layer 320 can include an acrylate polymer.

[0151] The materials of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be different from each other. For example, the first inorganic encapsulation layer 310 can include silicon oxynitride, and the second inorganic encapsulation layer 330 can include silicon nitride. The thicknesses of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be different from each other. The thickness of the first inorganic encapsulation layer 310 can be greater than the thickness of the second inorganic encapsulation layer 330. Optionally, the thickness of the second inorganic encapsulation layer 330 can be greater than the thickness of the first inorganic encapsulation layer 310, or the thicknesses of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be the same.

[0152] Reference Figure 8 to the middle area MA, the middle area MA can include a first sub-middle area SMA1 relatively far from the first area OA, and a second sub-middle area SMA2 relatively close to the first area OA. The line bypassing the first area OA and the groove G can be arranged in the middle area MA.

[0153] As Figure 8 shown, a line, for example, a data line DL, can be arranged in the first sub-middle area SMA1. Figure 8 The data line DL in the first sub-middle area SMA1 shown corresponds to the bypass portions DL-D1 and DL-D2 of the data line described in Figure 7 the reference. The first sub-middle area SMA1 can be a line area or a bypass area where a line, such as a data line DL, can bypass.

[0154] The data lines DL can be alternately arranged, and the insulating layer is between the alternately arranged data lines DL. For example, since one of the adjacent data lines DL can be arranged below the insulating layer (e.g., the first organic insulating layer 209), and the other of the adjacent data lines DL can be arranged on the insulating layer (e.g., the first organic insulating layer 209), the data lines DL can be alternately arranged. In the case where the data lines DL are alternately arranged and the insulating layer is between the alternately arranged data lines DL, the distance Δd (pitch) between the data lines DL can be reduced. Although Figure 8 it is shown that the data lines DL are arranged in the first sub-middle area SMA1, but with reference to Figure 7 the scan lines SL described, for example, the bypass portion of the scan lines SL can also be arranged in the first sub-middle area SMA1.

[0155] One or more grooves G can be arranged in the second sub-middle area SMA2. The organic material layers included in the intermediate layer 222, e.g., the first functional layer 222a and the second functional layer 222c, can be disconnected (or separated, or interrupted) by the grooves G. The second sub-middle area SMA2 can be a groove area or a disconnection area (or separation area) of the organic material layer.

[0156] The groove G can be formed in the multilayer film ML arranged between the substrate 100 and the pixel electrode 221. The multilayer film ML can include at least two layers, and the at least two layers include different materials. The multilayer film ML can include a first sub-layer and a second sub-layer (e.g., a metal layer and / or an inorganic insulating layer), the first sub-layer includes an organic layer, and the second sub-layer includes an inorganic layer. The inorganic layer can include an inorganic material. The inorganic material can include a conductive inorganic material and / or a non-conductive inorganic material. The conductive inorganic material can include a metal material, and the non-conductive inorganic material can include an inorganic insulating material. The groove G includes a recess or a hole formed in the first sub-layer and a hole formed in the second sub-layer.

[0157] In one or more embodiments, Figure 8 as shown, the multilayer film ML includes the first organic insulating layer 209 as an organic layer and the metal layer 210 as an inorganic layer. The metal layer 210 can be arranged on the same layer as the layer on which the contact metal layer CM is arranged, and can be formed during the same mask process as the mask process for forming the contact metal layer CM.

[0158] The metal layer 210 can include the same material as the material of the contact metal layer CM. For example, the metal layer 210 can have a structure in which a titanium layer, an aluminum layer, and a titanium layer (Ti / Al / Ti) are stacked.

[0159] With reference to Figure 8 and Fig. 9A, the groove G of the multilayer film ML can be formed before the process of forming the intermediate layer 222. The groove G can have an undercut structure (or shape). The groove G can be formed by removing a part of the multilayer film ML. Since the width of the hole in the metal layer 210 is formed to be smaller than the hole (or recess) in the first organic insulating layer 209, the groove G having an undercut structure can be formed. In one or more embodiments, Fig. 9A shows that the first hole 210h formed in the metal layer 210 and the second hole 209h formed in the first organic insulating layer 209 overlap each other and constitute the groove G. The bottom surface of the groove G can be disposed on a virtual surface between the top surface of the substrate 100 and the top surface of the first organic insulating layer 209. In this regard, Fig. 9A shows that the bottom surface of the groove G is disposed on the same virtual surface as the top surface of the second interlayer insulating layer 207.

[0160] Compared with the inner side surface of the first organic insulating layer 209 disposed under the metal layer 210, the end of the metal layer 210 defining the first hole 210h can protrude further toward the center of the groove G. For example, the first width W1 of the first hole 210h can have a value smaller than the second width W2 of the second hole 209h. Here, the second width W2 of the second hole 209h can be measured at a part of the first organic insulating layer 209 directly below the end of the metal layer 210 defining the first hole 210h. The end of the metal layer 210 protruding toward the center of the groove G and / or the first hole 210h can constitute a pair of eaves (or a pair of protruding tips, or tips PT). The protruding length d1 of each tip PT can be smaller than the depth h1 of the second hole 209h described below. For example, the protruding length d1 of each tip PT can be smaller than 2 μm. For example, the length d1 of each tip PT can be smaller than 2.0 μm. In one or more embodiments, the protruding length d1 can be about 1 μm to about 1.5 μm.

[0161] As described above, the first end of the metal layer 210 constituting the tip PT can be exposed, but the other end, for example, the second end disposed opposite to the first end, can be covered by the second organic insulating layer 211, as Fig. 9A shows.

[0162] The depth h1 of the second hole 209h can be the same as the thickness t1 of the first organic insulating layer 209. The depth h1 of the second hole 209h can correspond to the depth of the groove G. In one or more embodiments, the depth of the groove G can be 1.5 μm or greater. For example, the depth of the groove G can be 2 μm or greater.

[0163] The first organic insulating layer 209 can include an opening 209OD. The opening 209OD can be adjacent to the groove G and spaced apart from the groove G by a predetermined (or set) interval. In one or more embodiments, as Fig. 9AAs shown, the opening 209OD can be arranged on two opposite sides of the groove G. For example, around the groove G, one opening 209OD can be arranged on the side of the display area DA, and the other opening 209OD can be arranged on the side of the first area OA.

[0164] The metal layer 210 can directly contact the underlying inorganic layer through the opening 209OD. For example, the second interlayer insulating layer 207 under the first organic insulating layer 209. The metal layer 210 and the second interlayer insulating layer 207 that are in contact with each other through the opening 209OD can form an inorganic contact region ICR.

[0165] Among the layers above the substrate 100, the layer including the organic material can be used as a path through which moisture advances. In one or more embodiments, as Figure 8 As shown, in the case where the display panel 10-1 includes the first opening 10H corresponding to the first area OA, moisture can advance in a direction (x-direction, hereinafter referred to as the lateral direction) parallel to the top surface of the substrate 100 through the first opening 10H. However, since the intermediate area MA includes the inorganic contact region ICR, the advancement of moisture through the first organic insulating layer 209 toward the display area DA can be blocked or reduced.

[0166] The partition wall PW can be arranged between the grooves G. The partition wall PW can include a plurality of sub-organic insulating layers stacked in sequence. In one or more embodiments, as Fig. 9A As shown, the partition wall PW can have a structure in which a portion 209P of the first organic insulating layer 209, a portion 211P of the second organic insulating layer 211, a portion 215P of the pixel defining layer 215, and a portion 217P of the spacer 217 are stacked. In one or more embodiments, at least one of the portion 209P of the first organic insulating layer 209, the portion 211P of the second organic insulating layer 211, the portion 215P of the pixel defining layer 215, and the portion 217P of the spacer 217 can be omitted. In this case, the height from the substrate 100 to the top surface of the partition wall PW can be less than the height from the substrate 100 to the top surface of the spacer 217.

[0167] Refer to Figure 8 and Fig. 9B and, the intermediate layer 222 can be formed after forming the groove G. Each of the first functional layer 222a and / or the second functional layer 222c of the intermediate layer 222 can be formed by using an open mask such that each of the first functional layer 222a and / or the second functional layer 222c is provided in the display area DA and the intermediate area MA. In this case, the first functional layer 222a and / or the second functional layer 222c can be disconnected or separated (or interrupted, or patterned) by the groove G.

[0168] In a layer above the substrate 100, a layer including an organic material can be used as a path through which moisture advances. Since the first functional layer 222a and / or the second functional layer 222c includes an organic material, the first functional layer 222a and / or the second functional layer 222c can be used as a moisture transfer path. However, since the first functional layer 222a and / or the second functional layer 222c is disconnected or separated (or interrupted, or patterned) by the groove G, the advancement of moisture through the first functional layer 222a and / or the second functional layer 222c toward the organic light-emitting diode OLED can be prevented or reduced.

[0169] Similar to the first functional layer 222a and / or the second functional layer 222c, the counter electrode 223 formed by a thermal deposition method can be disconnected by the groove G. The capping layer 230 including LiF can also be disconnected by the groove G.

[0170] In one or more embodiments, in the case where the capping layer 230 includes an inorganic material such as silicon nitride, silicon oxynitride, and / or silicon oxide, as Fig. 9C shown, the capping layer 230 can be continuously formed without being disconnected by the groove G. In one or more embodiments, the capping layer 230 can be omitted. For ease of description, although Fig. 9B shown, the capping layer 230 is disconnected by the groove G, the structure described with reference to Fig. 9C is suitable for other embodiments described below and embodiments derived therefrom.

[0171] Referring to Figure 8 and Fig.9D , a thin film encapsulation layer 300 can be formed. By covering the organic light-emitting diode OLED in the display area DA, the thin film encapsulation layer 300 can prevent (or substantially prevent) the organic light-emitting diode OLED from being damaged or deteriorated by external impurities.

[0172] The thin film encapsulation layer 300 can include at least one organic encapsulation layer and at least one inorganic encapsulation layer. Compared with the first functional layer 222a, the second functional layer 222c, and the counter electrode 223, the first inorganic encapsulation layer 310 formed by chemical vapor deposition (CVD) can have relatively excellent (or suitable) step coverage. As Fig.9D shown, the first inorganic encapsulation layer 310 can be continuously formed. For example, the first inorganic encapsulation layer 310 can cover the entire inner surface of the groove G.

[0173] The organic encapsulation layer 320 can be formed by coating a monomer and hardening the monomer. In some embodiments, the organic encapsulation layer 320 can be formed by coating a polymer. The end of the organic encapsulation layer 320 facing the first region OA can be adjacent to one side of the partition wall PW.

[0174] The second inorganic encapsulation layer 330 may be disposed on the organic encapsulation layer 320. In a partial region of the middle area MA, the second inorganic encapsulation layer 330 may directly contact the first inorganic encapsulation layer 310. For example, as Figure 8 and Fig.9D show, in a partial region of the middle area MA adjacent to the first area OA, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may contact each other.

[0175] Although Figure 8 shows that the display panel 10-1 includes a first opening 10H corresponding to the first area OA, as described in reference FIG. 3B to FIG. 3D , the display panel 10-1 may not include the first opening 10H corresponding to the first area OA. The above features also apply to the display panel(s) described in reference FIG. 10A to FIG. 30 .

[0176] Figure 8 The cross-section of the display panel 10-1 shown in Figure 7 may be understood as a structure surrounding the first area OA. For example, as Figure 8 shows, when observed in a direction perpendicular (or orthogonal) to the top surface of the substrate 100, each of the grooves in Figure 8 may have an annular shape surrounding the first area OA. Similarly, when observed in a direction perpendicular to the top surface of the substrate 100, the partition wall PW may also have an annular shape surrounding the first area OA. Similarly, when observed in a direction perpendicular to the top surface of the substrate 100, the elements shown in FIG. 10A to FIG. 30 , for example, the elements provided to the middle area MA (e.g., the inorganic layer 210, etc.), may have an annular shape surrounding the first area OA. The above features also apply to the display panel(s) described in reference FIG. 10A to FIG. 30 .

[0177] Fig. 10A is a cross-sectional view of the middle area MA of the display panel 10-2 according to one or more embodiments, and Fig. 10B is a cross-sectional view of the middle area MA of the display panel 10-2' according to one or more embodiments.

[0178] Although Figures 8 to 9D shows that in the display panel 10-1, in the inorganic contact region ICR, the metal layer 210 contacts the second interlayer insulating layer 207 which is an inorganic insulating layer, the present disclosure is not limited thereto. In one or more embodiments, Fig. 10A and Fig. 10B show that the display panels 10-2 and 10-2' may include a metal layer (hereinafter referred to as the lower metal layer 208) disposed in the middle area MA, and in the inorganic contact region ICR, the metal layer 210 may contact the lower metal layer 208.

[0179] Reference Fig. 10A , the lower metal layer 208 may be disposed between the second interlayer insulating layer 207 and the first organic insulating layer 209. The lower metal layer 208 may be provided only in the middle area MA. The lower metal layer 208 may include the same materials as those of the data line DL, the source electrode SE, and / or the drain electrode DE included in the pixel circuit PC described in the reference Figure 8 . For example, the lower metal layer 208 may include three sub-layers of Ti / Al / Ti.

[0180] The metal layer 210 may directly contact the top surface of the lower metal layer 208 through the opening 209OD formed in the first organic insulating layer 209. The metal layer 210 and the lower metal layer 208 in contact with each other may constitute an inorganic contact region ICR. As described in the reference Figure 8 , the metal layer 210 may include the same material as that of the contact metal layer CM. Since both the metal layer 210 and the lower metal layer 208 include metals, the adhesion / coupling force between the metal layer 210 and the lower metal layer 208 may be appropriate (e.g., relatively excellent). For example, the metal layer 210 may include the same material as that of the lower metal layer 208.

[0181] As Fig. 10A shows, in the middle area MA, the lower metal layer 208 as a single body may overlap with the opening 209OD and the groove G of the first organic insulating layer 209. In some embodiments, as Fig. 10B shows, the lower metal layer 208 of the display panel 10-2’ may include an opening 208OP overlapping with the groove G, and may also include a plurality of components spaced apart from each other around the opening 208OP. The width of the opening 208OP may be greater than the width of a part of the groove G passing through the first organic insulating layer 209 (e.g., the second width W2). In the opening 208OP of the lower metal layer 208, the first organic insulating layer 209 may contact the second interlayer insulating layer 207.

[0182] Although Fig. 10A and Fig. 10B respectively show cross-sections of the display panels 10-2 and 10-2’, when observed in a direction perpendicular to the top surface of the substrate 100 of the display panels 10-2 and 10-2’, the lower metal layer 208 may be understood to have an annular shape surrounding the first area OA. In one or more embodiments, in a plan view, the lower metal layer 208 may include a single ring having a predetermined (or set) width (see Fig. 10A ), or may include a plurality of sub-rings formed by components spaced apart from each other while forming the opening 208OP (see Fig. 10B ).

[0183] The contact between the metal layer 210 and the lower metal layer 208 is different from the contact for electrical connection. Since each of the metal layer 210 and the lower metal layer 208 is disposed in the intermediate region MA and has an annular shape when viewed in a direction perpendicular to the top surface of the substrate 100, the contact between the metal layer 210 and the lower metal layer 208 is different from the contact between a metal and a metal intended to apply an electrical signal and / or a set or predetermined voltage to an element disposed in the display region DA.

[0184] As Fig. 10A shown, the bottom surface of the groove G may be disposed on the top surface of the lower metal layer 208, and the depth h1' of the groove G may be less than the thickness t1 of the first organic insulating layer 209. In one or more embodiments, the lower metal layer 208 may overlap the opening 209OD of the first organic insulating layer 209, and the depth h1' of the groove G may be equal to or less than the thickness t1 of the first organic insulating layer 209. In one or more embodiments, Fig. 10B shown, the bottom surface of the groove G is disposed in the same plane as the top surface of the second interlayer insulating layer 207.

[0185] Fig.11A 、 Fig. 11B and Fig. 11C are cross-sectional views of operations of a process for manufacturing a display panel according to one or more embodiments, and show the intermediate region MA.

[0186] Referring to Fig.11A and Fig. 11B , a groove G is formed in a multilayer film ML including three or more layers. For example, the multilayer film ML may include a first sublayer including an organic layer; a second sublayer disposed on the first sublayer and including an inorganic layer; and at least one lower insulating layer (or third sublayer) disposed below the organic layer, the at least one lower insulating layer including an inorganic insulating layer. In one or more embodiments, as Fig.11A shown, the multilayer film ML may include a first organic insulating layer 209, a metal layer 210 on the first organic insulating layer 209, and a second interlayer insulating layer 207 below the first organic insulating layer 209. In one or more embodiments, as Fig. 11B shown, the multilayer film ML may include a first organic insulating layer 209, a metal layer 210 on the first organic insulating layer 209, and a gate insulating layer 203, a first interlayer insulating layer 205, and a second interlayer insulating layer 207 below the first organic insulating layer 209.

[0187] During the process of forming the groove G, a part of at least one inorganic insulating layer disposed under the first organic insulating layer 209 may be etched. For example, while etching a part of the second interlayer insulating layer 207, a third hole 207h may be formed in the second interlayer insulating layer 207 (see Fig.11A ). In some embodiments, when etching parts of the second interlayer insulating layer 207, the first interlayer insulating layer 205, and the gate insulating layer 203, a third hole 207h may be formed in the second interlayer insulating layer 207, a fourth hole 205h may be formed in the first interlayer insulating layer 205, and a recess 203r may be formed in the gate insulating layer 203 (see Fig. 11B ). In one or more embodiments, instead of forming the third hole 207h passing through the second interlayer insulating layer 207, a recess may be formed in the second interlayer insulating layer 207 as shown in Fig.11A . In one or more embodiments, instead of the recess 203r, a hole may be formed in the gate insulating layer 203 as shown in Fig. 11B .

[0188] Since the groove is formed while removing a part of at least one inorganic insulating layer disposed under the first organic insulating layer 209, the depth h2 of the groove G may be greater than the thickness t1 of the first organic insulating layer 209 (h2>t1), and less than the sum of the thickness t1 of the first organic insulating layer 209 and the thickness t2 of at least one inorganic insulating layer (t1 + t2>h2). The bottom surface of the groove G may be provided on a virtual surface which is provided between the top surface of the substrate 100 and the top surface of the second interlayer insulating layer 207. The depth h2 of the groove G may be 1.5 μm or greater. For example, the depth h2 of the groove G may be 2 μm or greater, or 2.5 μm or greater, or 3 μm or greater, or 3.5 μm or greater.

[0189] The groove G may have an undercut shape, and the tip PT of the metal layer 210 may extend toward the center of the groove G and may form an eaves shape. The protruding length d1 of the tip PT may be equal to or less than 2.0 μm and, for example, may be about 1 μm to about 1.5 μm.

[0190] Next, as shown in Fig. 11C , an intermediate layer 222, a counter electrode 223, and a capping layer 230 may be sequentially formed above the substrate 100 in which the groove is formed. In one or more embodiments, the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the capping layer 230 may each be disconnected (or separated, or patterned) by the groove G in the intermediate region MA. In one or more embodiments, the capping layer 230 may be omitted, or as described with reference to Fig. 9C , the capping layer 230 may be continuously formed without being disconnected by the groove G.

[0191] The partition wall PW can be arranged between the trenches G, and the features of other elements of the display panel 10-3 (e.g., the end of the organic encapsulation layer 320 is adjacent to one side of the partition wall PW adjacent to the display area DA) are the same as those in the reference Figures 8 to 9D described features.

[0192] Fig.12 is a cross-sectional view of the middle area MA of the display panel 10-4 according to one or more embodiments.

[0193] Reference Fig.12 , the display panel 10-4 may include a lower metal layer 208 arranged in the middle area MA. The lower metal layer 208 may be arranged between the second interlayer insulating layer 207 and the first organic insulating layer 209.

[0194] The metal layer 210 may directly contact the top surface of the lower metal layer 208 through the opening 209OD of the first organic insulating layer 209. The metal layer 210 and the lower metal layer 208 in contact with each other may constitute an inorganic contact region ICR.

[0195] The lower metal layer 208 may include materials the same as those of the data line DL, the source electrode SE and / or the drain electrode DE included in the pixel circuit PC described in the reference Figure 8 described. For example, the lower metal layer 208 may include three sub-layers of Ti / Al / Ti. The metal layer 210 may include the same material as that of the lower metal layer 208.

[0196] The lower metal layer 208 may not be formed in the region corresponding to the trench G. For example, the lower metal layer 208 may include an opening 208OP formed in the region corresponding to the trench G. The width of the opening 208OP may be greater than the width of a part of the trench G passing through the first organic insulating layer 209 (e.g., the second width W2). In the opening 208OP of the lower metal layer 208, the first organic insulating layer 209 may contact the second interlayer insulating layer 207.

[0197] The bottom surface of the trench G may be provided on a virtual surface between the top surface of the substrate 100 and the top surface of the lower metal layer 208. In one or more embodiments, Fig.12 as shown in, the bottom surface of the trench G is provided below the bottom surface of the lower metal layer 208, for example, provided on the same virtual surface as the top surface of the first interlayer insulating layer 205. Depending on the etching degree of the inorganic insulating layer (s) below the first organic insulating layer 209 during the process of forming the trench G, the bottom surface of the trench G may be provided on one of the virtual surfaces provided between the top surface of the substrate 100 and the top surface of the second interlayer insulating layer 207.

[0198] Fig.12The cross-sectional structure shown can be understood as a structure surrounding the first region OA. As described above, for example, when observed in a direction perpendicular to the top surface of the substrate 100, Fig.12 The elements shown in the plan view may have an annular shape surrounding the first region OA.

[0199] Fig.13A and Fig. 13B are cross-sectional views of the actions of a process for manufacturing a display panel according to one or more embodiments, and show the intermediate region MA.

[0200] Referring to Fig.13A , a groove G can be formed in the multilayer film ML including the first organic insulating layer 209 and the metal layer 210. The first hole 210h formed in the metal layer 210 and the recess 209r formed in the first organic insulating layer 209 can constitute the groove G. The depth of the groove G, for example, the depth h3 of the recess 209r can be less than the thickness t1 of the first organic insulating layer 209. The depth h3 of the recess 209r can be 1.5 μm or more, for example, 2 μm or more.

[0201] As Fig.13A shown, in the case where the depth h3 of the recess 209r is less than the thickness t1 of the first organic insulating layer 209, the bottom surface of the groove G can be provided on a virtual surface between the top surface and the bottom surface of the first organic insulating layer 209. In this case, a part of the first organic insulating layer 209 below the bottom surface of the groove G can provide a path through which moisture can penetrate. However, according to one or more embodiments, since the openings 209OD are respectively arranged on two opposite sides of the groove G, and the metal layer 210 and the inorganic insulating layer, for example, the second interlayer insulating layer 207, are in direct contact with each other through the openings 209OD, and thus constitute an inorganic contact region ICR, the above moisture transfer problem can be prevented or reduced.

[0202] The groove G can have an undercut structure. The ends of the metal layer 210 protruding toward the center of the groove G and / or the first hole 210h can constitute a pair of eaves (or a pair of protruding tips, or tips PT). The protruding length d1 of each tip PT can be about 1 μm to about 1.5 μm.

[0203] Referring to Fig. 13B , an intermediate layer 222, a counter electrode 223, and a capping layer 230 can be sequentially formed above the substrate 100 in which the groove G is formed. In the intermediate region MA, a part of the intermediate layer 222, for example, the first functional layer 222a and / or the second functional layer 222c can be disconnected or separated by the groove G. Similarly, in the intermediate region MA, the counter electrode 223 and the capping layer 230 can be disconnected or separated. In one or more embodiments, the capping layer 230 can be omitted, or as in reference Fig. 9CAs described, the capping layer 230 including an inorganic insulating layer can be continuously formed. Thereafter, the thin film encapsulation layer 300 can be formed.

[0204] The partition wall PW can be disposed between the grooves G. Here, the feature that one side of the partition wall PW adjacent to the end of the organic encapsulation layer 320 is adjacent to the display area DA, and the features of the elements of the display device 10-5 (for example, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330) are the same as those in the reference Figures 8 to 9D described features.

[0205] Wherein the reference Fig.13A described groove G includes the recess 209r of the first organic insulating layer 209 and the first hole 210h of the metal layer 210, and the feature that the depth of the groove G (i.e., the depth h3 of the recess 209r is less than the thickness t1 of the first organic insulating layer 209), and the feature that the bottom surface of the groove G is between the bottom surface and the top surface of the first organic insulating layer 209 also apply to the reference Figures 8 to 12 described embodiments and / or one or more embodiments described below with reference to Figures 14 to 30 described.

[0206] Fig.14 is a cross-sectional view of the middle area MA of the display panel 10-6 according to one or more embodiments.

[0207] Reference Fig.14 , the display panel 10-6 may include a lower metal layer 208 disposed in the middle area MA. The lower metal layer 208 may be disposed between the second interlayer insulating layer 207 and the first organic insulating layer 209. The lower metal layer 208 may include the same material (or materials) as the material (or materials) included in the data line DL, the source electrode SE, and / or the drain electrode DE of the thin film transistor TFT included in the pixel circuit PC described in the reference Figure 8 described. For example, the lower metal layer 208 may include three sub-layers of Ti / Al / Ti. The metal layer 210 may include the same material as the material of the lower metal layer 208.

[0208] The lower metal layer 208 may include an opening 208OP formed in the area corresponding to the groove G, and the width of the opening 208OP may be greater than the width of a part of the groove G passing through the first organic insulating layer 209 (for example, the second width W2).

[0209] In one or more embodiments, as described in the reference Fig. 10A described, the lower metal layer 208 may be formed integrally with a predetermined (or set) width so as to correspond to the middle area MA excluding the opening 208OP.

[0210] Fig.15A , FIG. 15D to FIG. 15FA cross-sectional view of the operation of a process for manufacturing a display panel according to one or more embodiments. Fig. 15B and Fig. 15C corresponds to a cross-section of an embodiment according to a modified Fig.15A and Figure 15G corresponds to an embodiment of a display panel according to a modified Fig.15F .

[0211] The multilayer film ML in which the groove G is formed may include a first sublayer that is an organic layer; a second sublayer disposed on the first sublayer and including an inorganic layer; and at least one top insulating layer (or fourth sublayer) disposed on the second sublayer, the at least one top insulating layer including an organic insulating layer, an inorganic insulating layer, or an organic insulating layer and an inorganic insulating layer.

[0212] In one or more embodiments, as Fig.15A shown, the multilayer film ML may include a first organic insulating layer 209, a metal layer 210 on the first organic insulating layer 209, and a second organic insulating layer 211 on the metal layer 210. As described above, the metal layer 210 may be disposed on the same layer as the layer on which the contact metal layer CM is disposed and may include the same material as the material of the contact metal layer CM.

[0213] In one or more embodiments, as Fig. 15B shown, the at least one top insulating layer may include an inorganic insulating layer 212 and a second organic insulating layer 211. Thus, the multilayer film ML may include the first organic insulating layer 209, the metal layer 210, the inorganic insulating layer 212, and the second organic insulating layer 211 stacked in sequence.

[0214] In one or more embodiments, as Fig. 15C shown, the at least one top insulating layer may include an inorganic insulating layer 212. In this case, the multilayer film ML may include the first organic insulating layer 209, the metal layer 210, and the inorganic insulating layer 212 stacked in sequence.

[0215] Hereinafter, for convenience of description, a process for the case (one or more embodiments) where the multilayer film ML includes the first organic insulating layer 209, the metal layer 210 on the first organic insulating layer 209, and the second organic insulating layer 211 as shown in Fig.15A is described.

[0216] The groove G of the multilayer film ML may be formed by an etching process (e.g., isotropic etching, etc.). As Fig.15DAs shown, the first hole 210h of the metal layer 210 that overlaps with each other, the second hole 209h of the first organic insulating layer 209, and the fifth hole 211h of the second organic insulating layer 211 can form a groove G. The protruding length d1 of each of a pair of tips PT extending toward the center of the groove G, the first width W1 of the first hole 210h of the metal layer 210, and the width (e.g., the second width W2) of a part of the groove G passing through the first organic insulating layer 209 are the same as the above-described features. Compared with the pair of tips PT, the side surfaces of the second organic insulating layer 211 that define the fifth hole 211h may not protrude further toward the center of the groove G. In other words, the width W3 (referred to as the third width) of the fifth hole 211h may be equal to or greater than the first width W1 of the first hole 210h of the metal layer 210. In the case where the side surfaces of the second organic insulating layer 211 have inclined surfaces, it can be understood that the third width W3 of the fifth hole 211h is the minimum value between the side surfaces of the second organic insulating layer 211 that define the fifth hole 211h.

[0217] For example, as Fig.15D shown, the groove G may include the fifth hole 211h of the second organic insulating layer 211, the first hole 210h of the metal layer 210, and the second hole 209h of the first organic insulating layer 209. The bottom surface of the groove G may be provided on the same virtual surface as the bottom surface of the first organic insulating layer 209.

[0218] In one or more embodiments, the groove G may include the first hole 210h of the metal layer 210, the first recess 209r of the first organic insulating layer 209 (see Fig.13A ) and the fifth hole 211h of the second organic insulating layer 211. In this case, the bottom surface of the groove G may be provided on a virtual surface between the bottom surface and the top surface of the first organic insulating layer 209.

[0219] The inorganic insulating layer provided under the first organic insulating layer 209, for example, the second interlayer insulating layer 207 and / or the first interlayer insulating layer 205, may respectively include openings 207OP and 205OP that overlap with the groove G. In this case, the depth of the groove G may become correspondingly deeper. In one or more embodiments, as Figures 8 to 14 shown, the inorganic insulating layer provided under the first organic insulating layer 209, for example, the second interlayer insulating layer 207 and / or the first interlayer insulating layer 205, may not include the openings 207OP and 205OP that overlap with the groove G.

[0220] Referring to FIG. 15A to FIG. 15D , before the etching process for forming the groove G, the top insulating layer, for example, FIG. 15A to FIG. 15C the inorganic insulating layer 212 and / or the second organic insulating layer 211 shown in Fig.15D) the end of the metal layer 210. Therefore, the end of the metal layer 210 corresponding to the tip PT can be prevented (or avoided) from being damaged during the process of manufacturing the display panel.

[0221] The partition wall PW can be adjacent to the groove G. For example, the partition wall PW can be formed on a part of the multilayer film ML constituting the groove G, for example, on the second organic insulating layer 211. In one or more embodiments, the partition wall PW can be formed while stacking a part 211P of the second organic insulating layer 211, a part 215P of the pixel defining layer 215, and a part 217P of the spacer 217. A part of the metal layer 210 disposed below the part 211P of the second organic insulating layer 211 can also constitute the partition wall PW.

[0222] The first organic insulating layer 209 can include an opening 209OD. The metal layer 210 and the inorganic layer below the first organic insulating layer 209, for example, the second interlayer insulating layer 207, can be in direct contact with each other through the opening 209OD, thereby constituting an inorganic contact region ICR.

[0223] Reference Fig.15E , the intermediate layer 222, the counter electrode 223, and the capping layer 230 can be sequentially formed above the substrate 100 on which the groove G can be formed. In the intermediate region MA, the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the capping layer 230 can be disconnected or separated by the groove G. In one or more embodiments, the capping layer 230 can be omitted, or as described in Reference Fig. 9C , the capping layer 230 can be continuously formed without being disconnected by the groove G.

[0224] Reference Fig.15F , a thin film encapsulation layer 300 is formed above the substrate 100. For example, the first inorganic encapsulation layer 310, the organic encapsulation layer 320, and the second inorganic encapsulation layer 330 can be sequentially formed. Since the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 have appropriate (e.g., relatively excellent) step coverage, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can cover the entire inner surface of the groove G. The end of the organic encapsulation layer 320 can be adjacent to one side of the partition wall PW.

[0225] Although Fig.15F shows that in the display panel 10-7, the inorganic contact region ICR is disposed on one side of the groove G (e.g., on the left side of the groove G disposed in the middle), the present disclosure is not limited thereto. In one or more embodiments, Reference Fig.15F In the middle), but the present disclosure is not limited to this. In one or more embodiments, Reference Figure 15GFor the display panel 10-8, the inorganic contact region ICR can be respectively disposed on two opposite sides around the groove G, that is, on the first side adjacent to the display area DA and on the second side adjacent to the first area OA. In the inorganic contact region ICR, the metal layer 210 can contact the inorganic insulating layer, for example, the top surface of the second interlayer insulating layer 207 exposed through the opening of the first organic insulating layer 209. A partial region of the metal layer 210 can correspond to a part of a sub-layer of the partition wall PW including multiple layers.

[0226] Although in the display panel 10-7 described in references Fig.15A , Fig.15D , Fig.15E and Fig.15F the at least one top insulating layer of the multi-layer film ML includes the second organic insulating layer 211, the above process is equally applicable to the embodiments including the top insulating layer described in references Fig. 15B or Fig. 15C . For example, as shown in Figures 16 to 24 , depending on the stacking structure of the insulating layers disposed on the metal layer 210 and the process for forming the same, the structure of the multi-layer film ML and the structure of the groove G can be modified differently.

[0227] Fig.16 and Fig.17 are cross-sectional views of the selection of the groove G of the display panel according to one or more embodiments.

[0228] Referring to Fig.16 , the groove G is formed in the multi-layer film ML disposed above the substrate 100. The multi-layer film ML can include the first organic insulating layer 209, the metal layer 210, and the second organic insulating layer 211. The groove G can include the second hole 209h or recess of the first organic insulating layer 209, the first hole 210h of the metal layer 210, and the fifth hole 211h of the second organic insulating layer 211 that overlap with each other.

[0229] Although Fig.15D shows in the embodiment that the width W3 (see Fig.15D ) of the fifth hole 211h of the second organic insulating layer 211 is greater than the first width W1 of the first hole 210h of the metal layer 210, Fig.16As shown, the width W3 of the fifth hole 211h of the second organic insulating layer 211 is smaller than the first width W1 of the first hole 210h of the metal layer 210. The side surface of the end of the metal layer 210 that defines the first hole 210h can be covered by the second organic insulating layer 211, and the end of the metal layer 210 and the end of the second organic insulating layer 211 can form a tip PT. The protruding length d1 of the tip PT is, in the horizontal direction, the distance from the inner surface of the first organic insulating layer 209 disposed directly below the tip PT to the end of the tip PT. The protruding length d1 can be the distance from the inner surface of the first organic insulating layer 209 to the side surface of the second organic insulating layer 211.

[0230] In one or more embodiments, referring to Fig.17 , the third width W3 of the fifth hole 211h of the second organic insulating layer 211 can be substantially equal to the first width W1 of the first hole 210h of the metal layer 210. The second organic insulating layer 211 can cover the top surface of the end of the metal layer 210 that defines the first hole 210h, but may not cover the side surface of the end of the metal layer 210. In this case, the protruding length d1 of the tip PT can be the distance from the inner surface of the first organic insulating layer 209 disposed directly below the tip PT to the side surface of the metal layer 210.

[0231] Figures 18 to 20 is a selected cross-sectional view of the groove G of the display panel according to one or more embodiments.

[0232] Referring to Figures 18 to 20 , the groove G can be formed in the multilayer film ML disposed above the substrate 100. The multilayer film ML can include a first organic insulating layer 209, a metal layer 210, an inorganic insulating layer 212, and a second organic insulating layer 211. The holes or recesses formed in the first organic insulating layer 209, the holes of the metal layer 210, the holes of the inorganic insulating layer 212, and the holes of the second organic insulating layer 211 can overlap with each other and form the groove G.

[0233] Referring to Fig.18 , the third width W3 of the hole of the second organic insulating layer 211 can be smaller than the fourth width W4 of the hole of the inorganic insulating layer 212 and the first width W1 of the first hole 210h of the metal layer 210. The fourth width W4 of the hole of the inorganic insulating layer 212 can be smaller than the first width W1 of the hole of the metal layer 210. The side surface of the end of the metal layer 210 facing the center of the groove G can be sequentially covered by the inorganic insulating layer 212 and the second organic insulating layer 211. The end of the metal layer 210 facing the center of the groove G, the end of the inorganic insulating layer 212, and the end of the second organic insulating layer 211 can form a tip PT. The protruding length d1 of the tip PT corresponds to the horizontal distance from the inner surface of the first organic insulating layer 209 to the side surface of the second organic insulating layer 211.

[0234] Referring to Fig.19 The side surface of the end of the metal layer 210 facing the center of the groove G may be covered by the inorganic insulating layer 212, but may not be covered by the second organic insulating layer 211. For example, the second organic insulating layer 211 may only cover the top surface of the inorganic insulating layer 212 and may not cover the side surface of the end of the inorganic insulating layer 212. The end of the metal layer 210 and the end of the inorganic insulating layer 212 may form a tip PT, and the protruding length d1 of the tip PT corresponds to the horizontal distance from the inner surface of the first organic insulating layer 209 directly below the tip PT to the end of the inorganic insulating layer 212.

[0235] Reference Fig. 20 The inorganic layers, such as the metal layer 210 and the inorganic insulating layer 212, may be sequentially stacked and may extend further toward the center of the groove G compared to the inner surface of the first organic insulating layer 209. The inorganic insulating layer 212 may only cover the top surface of the metal layer 210.

[0236] The end of the inorganic layer facing the groove G (for example, the end of the stacked structure including the metal layer 210 and the inorganic insulating layer 212) may be covered by the second organic insulating layer 211. The protruding length d1 of the tip PT corresponds to the horizontal distance from the inner surface of the first organic insulating layer 209 to the end of the second organic insulating layer 211.

[0237] Figure 21 to Figure 24 is a selected cross-sectional view of a display panel according to one or more embodiments.

[0238] Reference Fig.21 The multilayer film ML may include the first organic insulating layer 209 as an organic layer, and the metal layer 210 and the inorganic insulating layer 212 as inorganic layers. Each of the metal layer 210 and the inorganic insulating layer 212 may form an inorganic layer, which is the second sublayer of the multilayer film ML.

[0239] A groove G is formed in the multilayer film ML, and the tip PT of the groove G is formed by a stacked structure including inorganic layers, such as the metal layer 210 and the inorganic insulating layer 212. For example, the stacked structure including the metal layer 210 and the inorganic insulating layer 212 may protrude from the inner surface of the first organic insulating layer 209 to the center of the groove G, thereby forming the tip PT.

[0240] Reference Fig. 22 The multilayer film ML may include the first organic insulating layer 209 as an organic layer, and the inorganic insulating layer 212 as an inorganic layer.

[0241] The second hole 209h of the first organic insulating layer 209 and the sixth hole 212h of the inorganic insulating layer 212 may overlap each other and form the groove G formed in the multilayer film ML. Although Fig. 22 shown in, the second hole 209h is formed in the first organic insulating layer 209, but as shown in reference Fig.13A As described, in one or more embodiments, a first recess 209r that does not penetrate the first organic insulating layer 209 may be formed in the first organic insulating layer 209.

[0242] The end of the inorganic insulating layer 212 that defines the sixth hole 212h may protrude from the inner surface of the first organic insulating layer 209 to form a tip PT. As described above, the protruding length d1 of the tip PT may be about 1 μm to about 1.5 μm.

[0243] Reference Fig.23 and Fig.24 , as the top insulating layer, the second organic insulating layer 211 may be disposed on the inorganic insulating layer 212.

[0244] In one or more embodiments, as shown in Fig.23 , the third width W3 of the fifth hole 211h of the second organic insulating layer 211 may be equal to or greater than the fifth width W5 of the sixth hole 212h of the inorganic insulating layer 212. In this case, the second organic insulating layer 211 may only cover the top surface of the end of the inorganic insulating layer 212.

[0245] In one or more embodiments, as shown in Fig.24 , the third width W3 of the fifth hole 211h of the second organic insulating layer 211 may be less than the fifth width W5 of the sixth hole 212h of the inorganic insulating layer 212. In this case, the side surface of the end of the inorganic insulating layer 212 that defines the sixth hole 212h may be covered by the second organic insulating layer 211. The end of the inorganic insulating layer 212 and the end of the second organic insulating layer 211 may form a tip PT. The protruding length d1 of the tip PT corresponds to the horizontal distance from the inner surface of the first organic insulating layer 209 to the end of the second organic insulating layer 211.

[0246] Fig.25 is a cross-sectional view of a display panel 10-9 according to one or more embodiments.

[0247] Reference Fig.25 , in the display panel 10-9, the characteristics of other elements outside the groove G disposed in the middle area MA are substantially the same as those of the display panel 10-1 described in reference Figure 8 .

[0248] The display panel 10-9 may include three or more grooves G disposed in the middle area MA. The inorganic contact region ICR may be disposed between adjacent grooves G. The first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 may be disconnected by each groove G. Although Fig.25 shows that the groove G and the inorganic contact region ICR have the same as those in reference Figures 8 to 9DThe described structure is basically the same structure, but the present disclosure is not limited thereto. In one or more embodiments, the groove G, the partition wall PW, and / or the inorganic contact region ICR may have the same structure as or a structure derived from the structure of the described embodiment(s). FIG. 10A to FIG. 24 The structure of the described embodiment(s).

[0249] The display panel 10-9 may include a first opening 10H provided in the first region OA. The first opening 10H may be formed by a scribing or cutting process by removing the elements provided in the first region OA. The scribing or cutting process may be performed along the first line SCL1, and Fig.25 shows the display panel 10-9 on which a scribing or cutting process or the like has been performed along the first line SCL1.

[0250] One of the grooves G in the groove G, i.e., G', may pass through the first line SCL1. In this case, the stack including the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the capping layer 230 may each be disconnected (or separated, or patterned) by the groove G' facing the first opening 10H. In one or more embodiments, the first line SCL1 may be provided between two adjacent grooves G in the groove G. In this case, the side surface of the display panel defining the first opening 10H may be the same as Figure 8 the side surface of the display panel defining the first opening 10H shown in. For example, as shown in Figure 8 the structure provided in the inorganic contact region ICR may face the first opening 10H.

[0251] Fig.26 is a cross-sectional view of the display panel 10-10 according to one or more embodiments.

[0252] Reference Fig.26 , an organic element SW as a crack prevention (or reduction) structure may be provided in a part of the intermediate region MA, for example, in a partial region of the second sub-intermediate region SMA2 adjacent to the first region OA. The organic element SW may include a part 209P2 of the stacked first organic insulating layer 209 and a part 211P2 of the second organic insulating layer 211.

[0253] As described above, the first opening 10H of the display panel 10-10 may be formed by a scribing or cutting process by removing the elements provided in the first region OA. Although Fig.26 shows that a scribing or cutting process has been performed along the first line SCL1, in one or more embodiments, the cutting process may be performed along one of the first line SCL1 to the nth line SCLn. The region within the range from the first line SCL1 to the nth line SCLn may be understood as the scribing or cutting region CA.

[0254] One or more organic elements SW may be disposed in the scribing or cutting area CA. The organic elements SW may absorb or buffer impacts that may occur during the above scribing or cutting process and / or impacts that may occur during the manufacture of the display panel 10-10 or after manufacturing the display panel 10-10. Thus, the occurrence of cracks in the layer(s) including inorganic materials can be prevented, reduced, or minimized.

[0255] A portion 209P2 of the first organic insulating layer 209 and a portion 211P2 of the second organic insulating layer 211 included in the organic element SW may be in direct contact with each other. In one or more embodiments, since a hole is formed in the portion 209P2 of the first organic insulating layer 209 and the portion 211P2 of the second organic insulating layer 211 is disposed in the formed hole, the contact area thereof can be increased.

[0256] As described above, the first opening 10H of the display panel 10-10 may be formed by a scribing or cutting process. The cutting process may use a laser. When a layer including a metal is disposed between the portion 209P2 of the first organic insulating layer 209 and the portion 211P2 of the second organic insulating layer 211, the laser may be reflected and thus it may be difficult to form the first opening 10H. In contrast, according to the present disclosure, since the portion 211P2 of the second organic insulating layer 211 is in direct contact with the portion 209P2 of the first organic insulating layer 209, the reflection problem can be prevented or reduced.

[0257] The partition wall PW disposed between adjacent grooves G in the intermediate area MA may include multiple layers. Above, although Fig.25 shown, the partition wall PW is disposed on the first organic insulating layer 209 and a part of the first organic insulating layer 209 is an element of the partition wall PW, referring to Fig.26 , the first organic insulating layer 209 may not be provided in the area where the partition wall PW is disposed. For example, the first organic insulating layer 209 may include a spaced portion 209V that overlaps with the partition wall PW. The spaced portion 209V includes an opening (e.g., a hole or a through hole) in the first organic insulating layer 209. The width of the spaced portion 209V may be greater than the width PW-W of the partition wall PW. The partition wall PW may be spaced from the side surface of the first organic insulating layer 209 that defines the spaced portion 209V.

[0258] The partition wall PW may have a structure in which a portion 211P of the second organic insulating layer 211, a portion 215P of the pixel defining layer 215, and a portion 217P of the spacer 217 are stacked. The height of the partition wall PW may be determined by the above portions.

[0259] Fig. 27 is a cross-sectional view of a display panel 10-11 according to one or more embodiments.

[0260] Referring to Fig. 27 , except for the slots G arranged in the middle area MA, the features of the other components of the display panel 10-11 are substantially the same as those of the display panel 10-10 described in the reference. Fig.26 For example, the display panel 10-11 may include an organic component SW disposed in the middle area MA and adjacent to the first opening 10H. The area where the organic component SW is disposed is the cutting area CA. Depending on the line (e.g., the first line SCL1 to the nth line SCLn) along which the scribing or cutting process is performed while manufacturing the display panel 10-11, the display panel 10-11 may or may not include the organic component SW.

[0261] The slots G may be arranged in the middle area MA and disposed between the organic component SW and the organic light-emitting diodes OLEDs in the display area DA. Each of the slots G in the multilayer film ML including the first organic insulating layer 209, the metal layer 210, and the second organic insulating layer 211 may be formed. Its specific structure may have a structure according to the embodiments described in the reference Fig.15F , Figure 15G to Figure 17 or embodiments derived therefrom.

[0262] The partition walls PW may be arranged between adjacent slots G. The first organic insulating layer 209 and the second organic insulating layer 211 may respectively include respective spaced portions 209V and 211V corresponding to the partition walls PW (e.g., overlapping the area where the partition walls PW are provided). Each of the spaced portions 209V and 211V is an opening (e.g., a hole or a through hole).

[0263] The spaced portion 209V of the first organic insulating layer 209 and the spaced portion 211V of the second organic insulating layer 211 may overlap with the partition walls PW. The width of the spaced portion 209V of the first organic insulating layer 209 may be greater than the width of the spaced portion 211V of the second organic insulating layer 211. The width of the spaced portion 211V of the second organic insulating layer 211 may be greater than the width PW-W of the partition walls PW. The partition walls PW may be spaced apart from the side surfaces of the first organic insulating layer 209 and the second organic insulating layer 211 that respectively define the spaced portions 209V and 211V.

[0264] Fig.28 is a cross-sectional view of a display panel 10-12 according to one or more embodiments.

[0265] Reference Fig.28 , the same as the display panel 10-11 described in the reference Fig. 27 , the display panel 10-12 includes an organic component SW, slots G, and partition walls PW arranged in the middle area MA. Since the structures of the organic component SW and the slots G are the same as the above structures, the structure of the partition walls PW will be mainly described below.

[0266] The partition wall PW is disposed between adjacent grooves G. The first organic insulating layer 209 and the second organic insulating layer 211 may respectively include spaced portions 209V and 211V that respectively overlap the partition wall PW. The partition wall PW may have a structure in which a portion 211P of the second organic insulating layer 211, a portion 215P of the pixel defining layer 215, and a portion 217P of the spacer 217 are stacked. In this case, the portion 211P of the second organic insulating layer 211 may correspond to a sublayer of the multilayer film ML that constitutes the groove G.

[0267] Fig.29 is a cross-sectional view of the display panel 10-13 according to one or more embodiments.

[0268] Reference Fig.29 , the display panel 10-13 may include grooves G disposed in the intermediate region MA. The grooves G may be formed in the multilayer film ML including the first organic insulating layer 209 and the inorganic insulating layer 212. The inorganic insulating layer 212 is a layer disposed between the first organic insulating layer 209 and the second organic insulating layer 211, and may be provided in the display region DA and the intermediate region MA. The inorganic insulating layer 212 may cover a part of the contact metal layer CM in the display region DA. Since the specific structure of the groove G is the same as that of the embodiment described in the reference Fig. 22 , a repeated description thereof is not provided here. In one or more embodiments, the display panel 10-13 may have a structure of one of the embodiments described in the reference Fig.18 , Fig.21 , Fig.23 and Fig.24 .

[0269] The display panel 10-13 may include an organic element SW disposed in the intermediate region MA and adjacent to the first opening 10H. Depending on the scribing or cutting process, the organic element SW may or may not be present in the display panel 10-13. Fig.30 is a cross-sectional view of the display panel 10-14 according to one or more embodiments.

[0270] Reference Fig.30 , the display panel 10-14 may include a planarization layer 420 disposed above the thin film encapsulation layer 300 and provided in the intermediate region MA. In one or more embodiments, the planarization layer 420 may be disposed only in the intermediate region MA.

[0271] The planarization layer 420 may include an organic insulating layer. The planarization layer 420 may include a polymer material. For example, the planarization layer 420 may include a silicone resin, an acrylic resin, an epoxy resin, a polyimide, and / or polyethylene. In one or more embodiments, the planarization layer 420 may include a material different from that of the organic encapsulation layer 320.

[0272] The planarization layer 420 may cover at least one groove G provided in the middle region MA. The planarization layer 420 may increase the flatness of the display panel 10-14 around the first opening OA by covering the region in the middle region MA that is not covered by the organic encapsulation layer 320. Thus, the separation or floating problems of the input sensing layer 40 (see Figure 2A and / or 2B) and / or the optical function layer 50 (see Figure 2A and / or 2B) can be prevented or reduced. A part of the planarization layer 420 may overlap with the organic encapsulation layer 320. One end of the planarization layer 420, for example, the first edge 420e adjacent to the display area DA, may be disposed above the organic encapsulation layer 320.

[0273] The planarization layer 420 may be formed in the middle region MA through an exposure and development process or the like. In some processes of forming the planarization layer 420 (such as a rinsing process), when external foreign substances (such as moisture) advance in the lateral direction of the display panel 10-14, the organic light-emitting diodes OLEDs in the display area DA may be damaged. On the contrary, according to an embodiment, since the insulating layers (such as the first insulating layer 410 and the second insulating layer 430) are respectively disposed under and on the planarization layer 420, the above problems of adjacent layers caused by moisture penetration and / or floating and the like can be prevented or reduced during and after the process of forming the planarization layer 420.

[0274] The first insulating layer 410 and the second insulating layer 430 may directly contact the bottom surface and the top surface of the planarization layer 420 respectively. The first insulating layer 410 and the second insulating layer 430 may each independently include an inorganic insulating material, such as silicon oxide, silicon nitride, and / or silicon oxynitride. Each of the first insulating layer 410 and the second insulating layer 430 may include a single layer or multiple layers, and the single layer or multiple layers include any one of the above materials.

[0275] The planarization layer 420 may have a step difference with respect to the layer(s) below it. A part of the planarization layer 420 including the first edge 420e may have a step difference with respect to the top surface of the first insulating layer 410. During and / or after the process of manufacturing the display panel 10-14, in order to prevent or reduce the separation or floating of the planarization layer 420 from the layer below it due to the step difference, a covering layer 440 may be disposed above the first edge 420e.

[0276] The cover layer 440 may include a metal. Each of the first insulating layer 410, the second insulating layer 430, and a third insulating layer 450 described below extends not only to the intermediate region MA but also to the display region DA. In contrast, the cover layer 440 may cover the first edge 420e of the planarization layer 420 with a predetermined (or set) width. The cover layer 440 above the planarization layer 420 may extend toward the display region DA beyond the first edge 420e of the planarization layer 420, but may not extend toward the display region DA.

[0277] The third insulating layer 450 may be disposed on the cover layer 440. The third insulating layer 450 may include an organic insulating material. For example, the organic insulating material of the third insulating layer 450 may include a photoresist (negative photoresist or positive photoresist) and / or a polymeric organic material, and may extend toward the display region DA to cover the display region DA.

[0278] Reference Fig.30 The features described also apply equally to the display panels of the embodiments described according to Reference Figures 8 to 29 and the embodiments derived therefrom.

[0279] The display panel according to an embodiment may block or reduce external foreign substances, such as moisture, that may damage the display elements around the first region OA. However, this effect is provided as an example, and the embodiments of the present disclosure are not limited thereto.

[0280] As used herein, the terms "use", "using", and "used" may be regarded as synonymous with the terms "utilize", "utilizing", and "utilized", respectively.

[0281] In addition, the terms "substantially", "about", and similar terms are used as approximate terms and not as terms of degree, and are intended to account for the inherent deviations of measured or calculated values that would be recognized by those skilled in the art.

[0282] In addition, any numerical range recited herein is intended to include all sub-ranges having the same numerical precision falling within the recited range. For example, a range of "1.0 to 10.0" is intended to include all sub-ranges between the recited minimum value of 1.0 and the recited maximum value of 10.0 (and including 1.0 and 10.0), that is, all sub-ranges having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as, for example, 2.4 to 7.6. Any maximum numerical limit recited herein is intended to include all lower numerical limits falling therein, and any minimum numerical limit recited in this specification is intended to include all upper numerical limits falling therein. Accordingly, the applicant reserves the right to amend this specification, including the claims, to expressly recite any sub-ranges that fall within the ranges expressly recited herein.

[0283] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and not for purposes of limitation. The description of each feature or aspect in each embodiment is generally to be considered as available for other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those of ordinary skill in the art will understand that various changes may be made in their form and details without departing from the spirit and scope of the disclosure as defined by the following claims and their equivalents.

Claims

1. A display panel, the display panel comprising: a substrate including a first region in which a through hole is formed, and a second region and a third region, the third region being between the first region and the second region; display elements in the second region and including pixel electrodes, counter electrodes, and an intermediate layer between the pixel electrodes and the counter electrodes; a multilayer film between the substrate and the pixel electrodes and including an organic insulating layer and an inorganic layer on the organic insulating layer; and at least one groove formed in the multilayer film and in the third region, wherein at least one organic material layer is in the intermediate layer and is disconnected by the at least one groove, and wherein the at least one groove includes: a first hole defined in the inorganic layer, and a second hole or recess defined in the organic insulating layer, the first hole being above the second hole or the recess, and wherein ends of the inorganic layer defining the first hole protrude towards the center of the at least one groove beyond an inner side of the organic insulating layer facing the second hole or the recess.

2. The display panel according to claim 1, wherein, the inorganic layer includes at least one of a metal layer or an inorganic insulating layer.

3. The display panel according to claim 1, further comprising: a pixel circuit including thin film transistors and storage capacitors each electrically connected to the display elements, wherein a part of the organic insulating layer of the multilayer film is above the thin film transistors, and the inorganic layer of the multilayer film is directly on the organic insulating layer.

4. The display panel according to claim 3, wherein the inorganic layer includes the same material as a material of a contact metal layer connecting the pixel circuit to the thin film transistors.

5. The display panel according to claim 1, wherein, the at least one organic material layer includes one or more selected from a hole transport layer, a hole injection layer, an electron injection layer, and an electron transport layer.

6. The display panel according to claim 1, wherein, the organic insulating layer has at least one opening adjacent to the groove, and the inorganic layer directly contacts a lower layer below the organic insulating layer through the at least one opening.

7. The display panel according to claim 6, wherein, the at least one opening of the organic insulating layer includes a first opening and a second opening, the at least one groove being between the first opening and the second opening, and the inorganic layer directly contacts the lower layer through the first opening and the second opening.

8. The display panel according to claim 6, wherein, the lower layer includes an inorganic insulating layer.

9. The display panel according to claim 6, wherein, the lower layer includes a metal layer.

10. The display panel according to claim 9, wherein, the lower layer includes the same material as the material of the inorganic layer.

11. The display panel according to claim 1, wherein, The multi-layer film includes at least one lower insulating layer below the organic insulating layer, and the at least one lower insulating layer includes an inorganic insulating layer.

12. The display panel according to claim 11, wherein, a bottom surface of the at least one groove is on a virtual surface between a top surface of the substrate and a top surface of the at least one lower insulating layer.

13. The display panel according to claim 11, wherein, the at least one lower insulating layer includes an opening overlapping with the at least one groove.

14. The display panel according to claim 1, wherein, the multi-layer film further includes at least one top insulating layer disposed on the organic insulating layer, and the at least one top insulating layer includes a hole overlapping with the at least one groove.

15. The display panel according to claim 14, wherein, the at least one top insulating layer covers a side surface of the inorganic layer defining the at least one groove.

16. A display panel, comprising: a substrate including a first region in which a through hole is formed, and a second region and a third region, the third region being between the first region and the second region; a display element in the second region, and including a pixel electrode, a counter electrode, and an intermediate layer between the pixel electrode and the counter electrode; and a multi-layer structure in the third region, the multi-layer structure including a metal layer, the metal layer including a protruding tip protruding laterally beyond a lower layer below the metal layer, wherein at least one organic material layer of the intermediate layer is disconnected by the multi-layer structure.

17. The display panel according to claim 16, further comprising: a neighboring multi-layer structure adjacent to the multi-layer structure in the third region, wherein the neighboring multi-layer structure includes a metal layer, the metal layer including a protruding tip protruding laterally beyond a lower layer below the metal layer.

18. The display panel according to claim 16, wherein, the counter electrode is disconnected by the multi-layer structure.

19. The display panel according to claim 17, wherein, the protruding tip of the multi-layer structure and the protruding tip of the neighboring multi-layer structure face each other, with a gap between the protruding tip of the multi-layer structure and the protruding tip of the neighboring multi-layer structure.

20. The display panel according to claim 19, wherein, a part of the at least one organic material layer is disconnected by the protruding tips facing each other, and the part of the at least one organic material layer is in a region below the protruding tips facing each other.

21. The display panel according to claim 20, wherein, a part of the counter electrode is disconnected by the protruding tips facing each other, and the part of the counter electrode is in a region below the protruding tips facing each other.

22. The display panel according to claim 21, wherein, the part of the counter electrode overlaps with the part of the at least one organic material layer located in the region.

23. The display panel according to claim 20, wherein, The other parts of the at least one organic material layer disconnected by the protruding tips facing each other are respectively located above the protruding tips facing each other.

24. The display panel according to claim 23, wherein, The other parts of the opposing electrodes disconnected by the protruding tips facing each other are respectively located above the protruding tips facing each other.

25. The display panel according to claim 24, wherein, The other parts of the opposing electrodes overlap with the other parts of the at least one organic material layer in the region above the protruding tips.

26. The display panel according to claim 16, wherein, The material of the metal layer is different from the material of the underlying layer below the metal layer.

27. The display panel according to claim 16, further comprising: A first inorganic encapsulation layer on the display element and extending towards the third region, wherein a part of the first inorganic encapsulation layer is located on the top surface, side surface and bottom surface of the protruding tip.

28. The display panel according to claim 27, wherein, The part of the first inorganic encapsulation layer extends continuously so as to be located on the top surface, the side surface and the bottom surface of the protruding tip.

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