Residual current operated circuit breaker circuit with self-check function

By designing a residual current operation circuit breaker circuit with self-test function, it automatically detects circuit failures and triggers the thyristor to turn off and trip, solving the problem of failure of circuit breaker failures in the existing technology, and achieving dual guarantees of automatic power outage and equipment safety.

CN111525505BActive Publication Date: 2025-07-01ZHONGOU ELECTRIC CO LTD
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Patent Information

Application Number
CN201910929132.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-09-28
Publication Date
2025-07-01
Estimated Expiration
2039-09-28

AI Technical Summary

Technical Problem

The existing residual current operation circuit breaker cannot self-check when it fails, resulting in the failure of the leakage protection function and the risk of electric shock in manual detection.

Method used

A residual current operation circuit breaker circuit with self-test function is designed, including power supply circuit, op amp input and output circuit, clock circuit, LED indicator circuit, open self-test circuit, thyristor loop detection circuit, timer reset circuit, enable self-test circuit and drive switch trip circuit, which can automatically detect circuit failure and trigger the thyristor to turn off power trip.

Benefits of technology

It realizes automatic power off and tripping when the circuit fails, ensuring the safety of power consumption, and does not require manual participation through the self-test function, improving the safety of circuit breaker equipment.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a residual current operated circuit breaker circuit with a self-checking function, which includes a power supply circuit, an operational amplifier input and output circuit, a clock circuit, an LED indication circuit, a tripping self-checking circuit, a thyristor loop detection circuit, a timer reset circuit, an enabling self-checking circuit, and a driving switch tripping circuit. The power supply circuit, the operational amplifier input and output circuit, the clock circuit, and the LED indication circuit are respectively connected to designated pins of a main control chip; the tripping self-checking circuit is connected to the designated pins of the main control chip, and is connected to an external power supply and the power supply circuit; the thyristor loop detection circuit is connected to the designated pins of the main control chip, and is connected to the timer reset circuit; the timer reset circuit is connected to the designated pins of the main control chip, and is connected to the driving switch tripping circuit; the enabling self-checking circuit is connected to the designated pins of the main control chip; the driving switch tripping circuit is connected to the designated pins of the main control chip, and is connected to the power supply circuit; the power supply circuit is connected to the external power supply.
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Description

Technical Field

[0001] The present invention relates to a circuit for controlling a circuit breaker, and more particularly to a residual current operated circuit breaker circuit with a self-checking function. Background Art

[0002] A residual current operated circuit breaker is an important protection device for preventing electrical equipment from being damaged by electric leakage in a low-voltage power distribution system. However, if the residual current operated circuit breaker itself fails, it cannot play the role of electric leakage protection. The existing method for testing whether the electric leakage protection function of a residual current operated circuit breaker is normal and effective usually tests the ability of the circuit breaker to respond to a grounding fault by manually operating a test button provided on the circuit breaker. However, in actual situations, few technicians will regularly and actively perform electric leakage detection operations on the circuit breaker, and if the circuit breaker itself leaks electricity due to a fault, manual operation is likely to cause electric shock hazards. Summary of the Invention

[0003] In view of the above-mentioned technical problems, the purpose of the present invention is to provide a residual current operated circuit breaker circuit with a self-checking function to solve the above-mentioned technical problems.

[0004] The technical solution adopted by the present invention to solve its technical problems is to provide a residual current operated circuit breaker circuit with a self-checking function, including a power supply circuit, an operational amplifier input-output circuit, a clock circuit, an LED indication circuit, a tripping self-checking circuit, a thyristor loop detection circuit, a timer reset circuit, an enabling self-checking circuit, and a driving switch tripping circuit.

[0005] The first output terminal E1 of the power supply circuit is connected to the fourth pin of a main control chip; the second output terminal E2 of the power supply circuit is connected to the seventh pin of the main control chip.

[0006] The first output terminal F1 of the operational amplifier input-output circuit is connected to the first pin of the main control chip; the second output terminal F2 of the operational amplifier input-output circuit is connected to the second pin of the main control chip; the third output terminal F3 of the operational amplifier input-output circuit is connected to the third pin of the main control chip.

[0007] The output terminal G of the clock circuit is connected to the ninth pin of the main control chip.

[0008] The output terminal H of the LED indication circuit is connected to the eleventh pin of the main control chip.

[0009] The first output terminal I1 of the tripping self-checking circuit is connected to the twelfth pin of the main control chip; the second output terminal I2 of the tripping self-checking circuit is connected to the power supply terminal N2 of an external power supply; the third output terminal I3 of the tripping self-checking circuit is connected to the second input terminal J2 of the power supply circuit.

[0010] The first output terminal K1 of the thyristor loop detection circuit is connected to the thirteenth pin of the main control chip; the second output terminal K2 of the thyristor loop detection circuit is connected to the second output terminal L2 of the timer reset circuit;

[0011] The first output terminal L1 of the timer reset circuit is connected to the fourteenth pin of the main control chip; the second output terminal L2 of the timer reset circuit is simultaneously connected to the second output terminal M2 of the drive switch tripping circuit;

[0012] The output terminal N of the enable self-checking circuit is connected to the fifteenth pin of the main control chip;

[0013] The first output terminal M1 of the drive switch tripping circuit is connected to the sixteenth pin of the main control chip; the second output terminal M2 of the drive switch tripping circuit is simultaneously connected to the second output terminal L2 of the timer reset circuit and the second output terminal K2 of the thyristor loop detection circuit; the third output terminal M3 of the drive switch tripping circuit is connected to the first input terminal J1 of the power supply circuit;

[0014] The first input terminal J1 of the power supply circuit is connected to the power supply terminal L of the external power supply;

[0015] The second input terminal J2 of the power supply circuit is successively connected to the power supply terminal L of the external power supply through a switch and a resistor R13;

[0016] The fifth pin and the sixth pin of the main control chip are both grounded; the eighth pin and the tenth pin of the main control chip are both floating.

[0017] Further, the specific model of the main control chip is LT6713V.

[0018] Further, the power supply circuit includes a bidirectional trigger diode RV1, a diode D1, a bridge rectifier diode DB1, a resistor R6, a resistor R6A, a resistor R7, a resistor R7A, a capacitor C6, and a capacitor C7,

[0019] One end of the bidirectional trigger diode RV1 is connected to the power supply terminal L of the external power supply, and the other end of the bidirectional trigger diode RV1 is connected to the N1 end of the switch;

[0020] The positive electrode of the diode D1 is connected to the second input terminal DB12 of the bridge rectifier diode DB1 and is connected to the ground terminal; the negative electrode of the diode D1 is connected to the N1 end of the switch and is connected to the first input terminal DB11 of the bridge rectifier diode DB1;

[0021] The third input terminal DB13 of the bridge rectifier diode DB1 is connected to the power terminal L of the external power supply and is connected to the third output terminal M3 of the drive switch tripping circuit;

[0022] The fourth input terminal DB14 of the bridge rectifier diode DB1 is sequentially connected to the fourth pin of the main control chip through the serially connected resistor R6 and resistor R6A;

[0023] The fourth input terminal DB14 of the bridge rectifier diode DB1 is simultaneously sequentially connected to the seventh pin of the main control chip through the serially connected resistor R7 and resistor R7A;

[0024] The fourth pin of the main control chip is simultaneously connected to the ground terminal through the capacitor C6; the seventh pin of the main control chip is simultaneously connected to the ground terminal through the capacitor C7.

[0025] Further, the operational amplifier input-output circuit includes a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C13, and a solenoid L2,

[0026] One end of the capacitor C13 is grounded, and the other end of the capacitor C13 is connected to the third pin of the main control chip;

[0027] One end of the solenoid L2 is connected to the third pin of the main control chip, and the other end of the solenoid L2 is sequentially connected to the first pin of the main control chip through the serially connected resistor R2 and resistor R3;

[0028] The capacitor C1 is connected in parallel across the solenoid L2;

[0029] The resistor R1 is connected in parallel across the capacitor C1;

[0030] The second pin of the main control chip is connected to the connection point P where the resistor R2 and the resistor R3 intersect.

[0031] Further, the clock circuit includes a capacitor C9, one end of the capacitor C9 is connected to the ninth pin of the main control chip, and the other end of the capacitor C9 is grounded.

[0032] Further, the LED indication circuit includes a light-emitting diode LED1 and a resistor R8, one end of the resistor R8 is connected to the eleventh pin of the main control chip, the other end of the resistor R8 is connected to the positive electrode of the light-emitting diode LED1, and the negative electrode of the light-emitting diode LED1 is grounded.

[0033] Further, the opening self-checking circuit includes a resistor R9, a resistor R21, a capacitor C21, a triode Q3, a triode Q1, a resistor R11, a diode D8, a resistor R9A, a triode Q2, a resistor R11A, a diode D9, a capacitor C3A, an R13, and an AND gate device Y1.

[0034] One end of the resistor R9 is connected to the twelfth pin of the main control chip, and the other end of the resistor R9 is connected to the base of the triode Q1; the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected to one end of the resistor R11, the other end of the resistor R11 is connected to the negative electrode of the diode D8, and the positive electrode of the diode D8 is connected to the power supply terminal N2 of the external power supply.

[0035] One end of the resistor R21 is connected to the twelfth pin of the main control chip, and the other end of the resistor R21 is connected to the base of the triode Q3. The collector of the triode Q3 is connected to the base of the triode Q1, and the emitter of the triode Q3 is grounded.

[0036] One end of the capacitor C21 is connected to the base of the triode Q3, and the other end of the capacitor C21 is grounded.

[0037] One end of the resistor R9A is connected to the twelfth pin of the main control chip, and the other end of the resistor R9A is connected to the base of the triode Q2. The collector of the triode Q2 is connected to one end of the resistor R11A, the other end of the resistor R11A is connected to the negative electrode of the diode D9, and the positive electrode of the diode D9 is connected to the N1 end of the switch.

[0038] The emitter of the triode Q2 is connected to the ground terminal through the capacitor C3A, and the emitter of the triode Q2 is also connected to the first input terminal Y11 of the AND gate device Y1.

[0039] The second input terminal Y12 of the AND gate device Y1 is grounded.

[0040] Further, the thyristor loop detection circuit includes a diode D7. The positive electrode of the diode D7 is connected to the thirteenth pin of the main control chip, and the negative electrode of the diode D7 is connected to the second output terminal L2 of the timer reset circuit.

[0041] Further, the timer reset circuit includes a resistor R12 and a capacitor C10.

[0042] One end of the capacitor C10 is connected to the fourteenth pin of the main control chip, and the other end of the capacitor C10 is grounded.

[0043] One end of the resistor R12 is connected to the fourteenth pin of the main control chip, and the other end of the resistor R12 is simultaneously connected to the second output end M2 of the drive switch tripping circuit and the second output end K2 of the thyristor loop detection circuit.

[0044] Further, the enable self-checking circuit includes a capacitor C11. One end of the capacitor C11 is connected to the fifteenth pin of the main control chip, and the other end of the capacitor C11 is grounded.

[0045] Further, the drive switch tripping circuit includes a resistor R10, a capacitor C12, a thyristor T1, a diode D5, and a solenoid L1.

[0046] One end of the resistor R10 is connected to the sixteenth pin of the main control chip, the other end of the resistor R10 is connected to the control end of the thyristor T1, and the first end T11 of the thyristor T1 is grounded;

[0047] One end of the capacitor C12 is connected to the control end of the thyristor T1, and the other end of the capacitor C12 is grounded;

[0048] The second end T12 of the thyristor T1 is connected to the negative electrode of the diode D5, and the positive electrode of the diode D5 is connected to the power supply end L of the external power supply through the solenoid L1; the second end T12 of the thyristor T1 is simultaneously connected to the second output end L2 of the timer reset circuit and the second output end K2 of the thyristor loop detection circuit.

[0049] When the residual current operated circuit breaker circuit with self-checking function provided by the present invention detects a circuit fault, it will trigger the thyristor to conduct, thereby causing the release connected to the thyristor to trip and cut off the power to ensure electrical safety. Moreover, the residual current operated circuit breaker circuit provided by the present invention can perform self-checking and alarm on the loop, and the entire self-checking process does not require manual participation, ensuring the safety of the circuit breaker itself during use. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 is a circuit block diagram of the residual current operated circuit breaker circuit provided by the embodiment of the present invention;

[0051] Figure 2 is a circuit diagram of the residual current operated circuit breaker circuit provided by the embodiment of the present invention;

[0052] Figure 3 is an internal structure diagram of the main control chip in the residual current operated circuit breaker circuit;

[0053] Figure 4 is a function description table for each pin of the main control chip. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0054] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without any creative work belong to the scope of protection of the present invention.

[0055] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments may be combined with each other.

[0056] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but it is not limited to the present invention.

[0057] A residual current operated circuit breaker circuit with a self-checking function provided by an embodiment of the present invention is referred to Figure 1 and Figure 2 , and includes a power supply circuit, an operational amplifier input / output circuit, a clock circuit, an LED indication circuit, a tripping self-checking circuit, a thyristor loop detection circuit, a timer reset circuit, an enabling self-checking circuit, and a switch tripping circuit.

[0058] The first output terminal E1 of the power supply circuit is connected to the fourth pin of the main control chip; the second output terminal E2 of the power supply circuit is connected to the seventh pin of the main control chip;

[0059] The first output terminal F1 of the operational amplifier input / output circuit is connected to the first pin of the main control chip; the second output terminal F2 of the operational amplifier input / output circuit is connected to the second pin of the main control chip; the third output terminal F3 of the operational amplifier input / output circuit is connected to the third pin of the main control chip;

[0060] The output terminal G of the clock circuit is connected to the ninth pin of the main control chip;

[0061] The output terminal H of the LED indication circuit is connected to the eleventh pin of the main control chip;

[0062] The first output terminal I1 of the tripping self-checking circuit is connected to the twelfth pin of the main control chip; the second output terminal I2 of the tripping self-checking circuit is connected to the power supply terminal N2 of an external power supply; the third output terminal I3 of the tripping self-checking circuit is connected to the second input terminal J2 of the power supply circuit;

[0063] The first output terminal K1 of the thyristor loop detection circuit is connected to the thirteenth pin of the main control chip; the second output terminal K2 of the thyristor loop detection circuit is connected to the second output terminal L2 of the timer reset circuit;

[0064] The first output terminal L1 of the timer reset circuit is connected to the fourteenth pin of the main control chip; the second output terminal L2 of the timer reset circuit is simultaneously connected to the second output terminal M2 of the drive switch trip circuit;

[0065] The output terminal N of the enable self-check circuit is connected to the fifteenth pin of the main control chip;

[0066] The first output terminal M1 of the drive switch trip circuit is connected to the sixteenth pin of the main control chip; the second output terminal M2 of the drive switch trip circuit is simultaneously connected to the second output terminal L2 of the timer reset circuit and the second output terminal K2 of the thyristor loop detection circuit; the third output terminal M3 of the drive switch trip circuit is connected to the first input terminal J1 of the power supply circuit;

[0067] The first input terminal J1 of the power supply circuit is connected to the power supply terminal L of the external power supply;

[0068] The second input terminal J2 of the power supply circuit is successively connected to the power supply terminal L of the external power supply through a switch S and a resistor R13;

[0069] The fifth pin and the sixth pin of the main control chip are both grounded; the eighth pin and the tenth pin of the main control chip are both floating.

[0070] In the above technical solution, the specific model of the main control chip is LT6713V. Please refer to Figure 3 , and the main control chip includes:

[0071] A digital logic controller 1121 and a voltage regulator rectifier 1122, a ground fault controller 1123, an SCR trigger 1124, a delay trigger 1125, a timer 1126, a low dropout linear regulator 1127, and an LED indicator controller 1128 that are respectively connected to the digital logic controller 1121;

[0072] The second pin of the main control chip 112 is connected to the negative input pin of a first operational amplifier 1129;

[0073] The third pin of the main control chip 112 is connected to the positive input pin of the first operational amplifier 1129;

[0074] The output terminal of the first operational amplifier 1129 is connected to the input terminal of a second operational amplifier 1130, and the positive and negative input pins of the second operational amplifier 1130 are short-circuited; the output terminal of the first operational amplifier 1129 is simultaneously connected to the first pin of the main control chip 112;

[0075] The output terminal of the second operational amplifier 1130 is connected to the delay trigger 1125;

[0076] The delay trigger 1124 is connected in series with the SCR trigger 1124;

[0077] The SCR trigger 1124 is connected to the sixteenth pin of the main control chip;

[0078] The intersection point of the delay trigger 1125 and the SCR trigger 1124 is connected to the first port 100 of the digital logic controller 1121;

[0079] The second port 200 of the digital logic controller 1121 is connected to the fifteenth pin of the main control chip 112;

[0080] The third port 300 of the digital logic controller 1121 is connected to the fourteenth pin of the main control chip 112 through a main level detector;

[0081] The fourth port 400 of the digital logic controller 1121 is connected to the thirteenth pin of the main control chip 112;

[0082] The fifth port 500 of the digital logic controller 1121 is connected to the twelfth pin of the main control chip 112 through the ground fault controller 1123;

[0083] The sixth port 600 of the digital logic controller 1121 is connected to the eleventh pin of the main control chip 112 through the LED indicator controller 1128;

[0084] The seventh port 700 of the digital logic controller 1121 is connected to the ninth pin of the main control chip 112 through the timer 1126;

[0085] The eighth port 800 of the digital logic controller 1121 is connected to the seventh pin of the main control chip 112 through the first output terminal of the low dropout linear regulator 1127, and is connected to the eighth pin of the main control chip 112 through the second output terminal of the low dropout linear regulator 1127.

[0086] Please refer to Figure 4 and Figure 3 ,

[0087] Figure 3 The VFB (negative input pin of the operational amplifier) in corresponds to the second pin of the main control chip;

[0088] Figure 3 The V+ (positive input pin of the operational amplifier) in corresponds to the third pin of the main control chip;

[0089] Figure 3 The VCC (analog power supply) in corresponds to the fourth pin of the main control chip;

[0090] Figure 3 The A-GND (analog ground) in corresponds to the fifth pin of the main control chip;

[0091] Figure 3 The D-GND (digital ground) in corresponds to the sixth pin of the main control chip;

[0092] Figure 3 The VDD (digital power supply) in it corresponds to the seventh pin of the main control chip;

[0093] Figure 3 The VREF1 (reference voltage) in it corresponds to the eighth pin of the main control chip;

[0094] Figure 3 The CAP (clock capacitor pin) in it corresponds to the ninth pin of the main control chip;

[0095] The tenth pin of the main control chip is floating;

[0096] Figure 3 The LED (LED indicating the working state of the GFCI) in it corresponds to the eleventh pin of the main control chip;

[0097] Figure 3 The GF-test (loop self-checking test square wave, simulating the ground fault state) in it corresponds to the twelfth pin of the main control chip;

[0098] Figure 3 The SCR-test (GFCI loop SCR detection feedback pin) in it corresponds to the thirteenth pin of the main control chip;

[0099] Figure 3 The MLD (main level detection, touching the ground can trigger manual self-checking and reset the timer) in it corresponds to the fourteenth pin of the main control chip;

[0100] Figure 3 The EN (self-checking enable pin, grounding can turn off the digital logic controller) in it corresponds to the fifteenth pin of the main control chip;

[0101] Figure 3 The SCR-drv (when a ground fault is detected, drive the thyristor to trip) in it corresponds to the sixteenth pin of the main control chip;

[0102] Figure 3 The Amp Out in it corresponds to the first pin of the main control chip.

[0103] Please refer to Figure 2 , the power supply circuit includes a diac RV1, a diode D1, a bridge rectifier diode DB1, a resistor R6, a resistor R6A, a resistor R7, a resistor R7A, a capacitor C6 and a capacitor C7,

[0104] One end of the diac RV1 is connected to the power supply terminal L of the external power supply, and the other end of the diac RV1 is connected to the N1 end of the switch S;

[0105] The positive electrode of diode D1 is connected to the second input terminal DB12 of bridge rectifier diode DB1 and is connected to the ground terminal; the negative electrode of diode D1 is connected to the N1 terminal of switch S and is connected to the first input terminal DB11 of bridge rectifier diode DB1;

[0106] The third input terminal DB13 of bridge rectifier diode DB1 is connected to the power terminal L of the external power supply and is connected to the third output terminal M3 of the driving switch tripping circuit;

[0107] The fourth input terminal DB14 of bridge rectifier diode DB1 is sequentially connected to the fourth pin of the main control chip through resistors R6 and R6A connected in series;

[0108] The fourth input terminal BD14 of bridge rectifier diode DB1 is simultaneously sequentially connected to the seventh pin of the main control chip through resistors R7 and R7A connected in series;

[0109] The fourth pin of the main control chip is simultaneously connected to the ground terminal through capacitor C6; the seventh pin of the main control chip is simultaneously connected to the ground terminal through capacitor C7.

[0110] Please continue to refer to Figure 2 , the operational amplifier input and output circuit includes resistors R1, R2, R3, capacitor C1, capacitor C13 and solenoid L2,

[0111] One end of capacitor C13 is grounded, and the other end of capacitor C13 is connected to the third pin of the main control chip;

[0112] One end of solenoid L2 is connected to the third pin of the main control chip, and the other end of solenoid L2 is sequentially connected to the first pin of the main control chip through resistors R2 and R3 connected in series;

[0113] Capacitor C1 is connected in parallel across solenoid L2;

[0114] Resistor R1 is connected in parallel across capacitor C1;

[0115] The second pin of the main control chip is connected to the connection point P where resistors R2 and R3 intersect.

[0116] Please refer to Figure 2 , the clock circuit includes capacitor C9, one end of capacitor C9 is connected to the ninth pin of the main control chip, and the other end of capacitor C9 is grounded.

[0117] Please refer to Figure 2 , the LED indication circuit includes light-emitting diode LED1 and resistor R8, one end of resistor R8 is connected to the eleventh pin of the main control chip, the other end of resistor R8 is connected to the positive electrode of light-emitting diode LED1, and the negative electrode of light-emitting diode LED1 is grounded.

[0118] Please continue to refer to Figure 2 The opening self-checking circuit includes resistor R9, resistor R21, capacitor C21, triode Q3, triode Q1, resistor R11, diode D8, resistor R9A, triode Q2, resistor R11A, diode D9, capacitor C3A, R13 and AND gate device Y1.

[0119] One end of resistor R9 is connected to the twelfth pin of the main control chip, and the other end of resistor R9 is connected to the base of triode Q1; the emitter of triode Q1 is grounded, the collector of triode Q1 is connected to one end of resistor R11, the other end of resistor R11 is connected to the negative pole of diode D8, and the positive pole of diode D8 is connected to the power supply terminal N2 of the external power supply.

[0120] One end of resistor R21 is connected to the twelfth pin of the main control chip, the other end of resistor R21 is connected to the base of triode Q3, the collector of triode Q3 is connected to the base of triode Q1, and the emitter of triode Q3 is grounded.

[0121] One end of capacitor C21 is connected to the base of triode Q3, and the other end of capacitor C21 is grounded.

[0122] One end of resistor R9A is connected to the twelfth pin of the main control chip, the other end of resistor R9A is connected to the base of triode Q2, the collector of triode Q2 is connected to one end of resistor R11A, the other end of resistor R11A is connected to the negative pole of diode D9, and the positive pole of diode D9 is connected to the N1 end of switch S.

[0123] The emitter of triode Q2 is connected to the ground terminal through capacitor C3A, and the emitter of triode Q2 is also connected to the first input terminal Y11 of AND gate device Y1.

[0124] The second input terminal Y12 of AND gate device Y1 is grounded.

[0125] Please continue to refer to Figure 2 The thyristor loop detection circuit includes diode D7. The positive pole of diode D7 is connected to the thirteenth pin of the main control chip, and the negative pole of diode D7 is connected to the second output terminal L2 of the timer reset circuit.

[0126] Please refer to Figure 2 The timer reset circuit includes resistor R12 and capacitor C10.

[0127] One end of capacitor C10 is connected to the fourteenth pin of the main control chip, and the other end of capacitor C10 is grounded.

[0128] One end of resistor R12 is connected to the fourteenth pin of the main control chip, and the other end of resistor R12 is simultaneously connected to the second output terminal M2 of the drive switch tripping circuit and the second output terminal K2 of the thyristor loop detection circuit.

[0129] Please refer to Figure 2 , the self-checking circuit enables including capacitor C11. One end of capacitor C11 is connected to the fifteenth pin of the main control chip, and the other end of capacitor C11 is grounded.

[0130] The driving switch tripping circuit includes resistor R10, capacitor C12, thyristor T1, diode D5, and solenoid L1.

[0131] One end of resistor R10 is connected to the sixteenth pin of the main control chip, and the other end of resistor R10 is connected to the control end of thyristor T1. The first end T11 of thyristor T1 is grounded.

[0132] One end of capacitor C12 is connected to the control end of thyristor T1, and the other end of capacitor C12 is grounded.

[0133] The second end T12 of thyristor T1 is connected to the negative electrode of diode D5. The positive electrode of diode D5 is connected to the power supply terminal L of the external power supply through solenoid L1. The second end T12 of thyristor T1 is also connected to the second output terminal L2 of the timer reset circuit and the second output terminal K2 of the thyristor loop detection circuit.

[0134] The working principle of the residual current operated circuit breaker with self-checking function provided in this embodiment is briefly described as follows:

[0135] First, the 220V voltage provided by the external power supply is rectified, filtered, and current-limited by the power supply circuit to supply power to the fourth pin and the seventh pin of the main control chip. After current-limiting and filtering, the working power supply of the main control chip is 13V.

[0136] After the main control chip is normally powered by 13V, it enters the main level detection pin. The rising edge of the main level detection waveform (MLD waveform) determines the starting point of self-checking. During normal operation, the fourteenth pin (MLD main level detection pin) of the main control chip outputs a constant high level (>2.6V is sufficient). Grounding the main level detection pin once can simulate a manual self-check once. When the solenoid works normally, the power-on logic of the main level detection pin is normal, and the main control chip starts to self-check other devices in the residual current operated circuit breaker, such as thyristor SCR, current transformer, leakage controller, etc. After successful self-checking, the LED flashes once and then goes out.

[0137] If the solenoid self-check fails, that is, the state initialization of the main level detection pin fails, the twelfth pin (GF-test) of the main control chip triggers a 30% duty cycle square wave, and the loop enters a repeated self-check failure state. The LED light is in a flashing state, accompanied by a buzzer alarm. Due to the open circuit of the solenoid, the residual current operated circuit breaker has no forced tripping ability at this time.

[0138] When the main level detection pin is initialized and in the normal state, the loop enters the normal self-check process. The twelfth pin (GF-test) of the main control chip sends a self-check loop test waveform, creating an analog leakage current in the negative half cycle of the L line (the sufficiency of the analog leakage current is jointly determined by R11 and the current transformer). If the analog leakage current, after being processed by the current transformer, reaches the trigger threshold of the leakage controller (formed by the first, second, third, and sixteenth pins of the main control chip) (the trigger threshold is determined by resistor R3), it will cause the sixteenth pin (SCRdrv) to trigger a high level in the negative half cycle of the L line. In this negative half cycle of the L line, the high level of SCRdrv is used to reset the state of SCRtest (the thirteenth pin of the main control chip), completing the self-check of the entire loop (basically, all self-check failures can be expressed by the failure to reset SCRtest).

[0139] If any of the above devices such as the thyristor SCR, current transformer, leakage controller, etc. fails, it will cause the loop to fail the self-check state. Different component damages in the loop will correspond to different self-check alarm states and self-check results. For example, in the case of a current transformer failure, the circuit will continuously alarm for 60s and trigger a forced tripping. In the case of a thyristor SCR failure, at this time, the circuit breaker no longer has the function of forced tripping, so the self-check alarm state of the circuit is continuous LED flashing and buzzer alarm.

[0140] In summary, when the residual current operated circuit breaker circuit with self-check function provided by the present invention detects a circuit fault, it will trigger the thyristor to conduct, thereby causing the tripping device connected to the thyristor to trip and cut off the power, ensuring electrical safety. Moreover, the residual current operated circuit breaker circuit provided by the present invention can self-check and alarm the loop, and the entire self-check process does not require manual participation, ensuring the safe use of the circuit breaker itself.

[0141] The above are only the preferred embodiments of the present invention, and do not limit the implementation manners and protection scope of the present invention accordingly. For those skilled in the art, it should be able to realize that any equivalent replacements and obvious changes made by using the description and illustrations of the present invention should be included in the protection scope of the present invention.

Claims

1. A residual current operated circuit breaker circuit with a self-checking function, characterized in that, It includes a power supply circuit, an operational amplifier input and output circuit, a clock circuit, an LED indication circuit, a trip self-check circuit, a thyristor loop detection circuit, a timer reset circuit, an enable self-check circuit, and a drive switch trip circuit. The first output terminal E1 of the power supply circuit is connected to the fourth pin of a main control chip; the second output terminal E2 of the power supply circuit is connected to the seventh pin of the main control chip. The first output terminal F1 of the operational amplifier input and output circuit is connected to the first pin of the main control chip; the second output terminal F2 of the operational amplifier input and output circuit is connected to the second pin of the main control chip; the third output terminal F3 of the operational amplifier input and output circuit is connected to the third pin of the main control chip. The output terminal G of the clock circuit is connected to the ninth pin of the main control chip. The output terminal H of the LED indication circuit is connected to the eleventh pin of the main control chip. The first output terminal I1 of the trip self-check circuit is connected to the twelfth pin of the main control chip; the second output terminal I2 of the trip self-check circuit is connected to the power supply terminal N2 of an external power supply; the third output terminal I3 of the trip self-check circuit is connected to the second input terminal J2 of the power supply circuit. The first output terminal K1 of the thyristor loop detection circuit is connected to the thirteenth pin of the main control chip; the second output terminal K2 of the thyristor loop detection circuit is connected to the second output terminal L2 of the timer reset circuit. The first output terminal L1 of the timer reset circuit is connected to the fourteenth pin of the main control chip; the second output terminal L2 of the timer reset circuit is simultaneously connected to the second output terminal M2 of the drive switch trip circuit. The output terminal N of the enable self-check circuit is connected to the fifteenth pin of the main control chip. The first output terminal M1 of the drive switch trip circuit is connected to the sixteenth pin of the main control chip; the second output terminal M2 of the drive switch trip circuit is simultaneously connected to the second output terminal L2 of the timer reset circuit and the second output terminal K2 of the thyristor loop detection circuit; the third output terminal M3 of the drive switch trip circuit is connected to the first input terminal J1 of the power supply circuit. The first input terminal J1 of the power supply circuit is connected to the power supply terminal L of the external power supply. The second input terminal J2 of the power supply circuit is successively connected to the power supply terminal L of the external power supply through a switch and a resistor R13. The fifth pin and the sixth pin of the main control chip are both grounded; the eighth pin and the tenth pin of the main control chip are both floating.

2. The residual current operated circuit breaker circuit according to claim 1, wherein The specific model of the main control chip is LT6713V.

3. The residual current operated circuit breaker circuit according to claim 1, characterized in that, The power supply circuit includes a diac RV1, a diode D1, a bridge rectifier diode DB1, a resistor R6, a resistor R6A, a resistor R7, a resistor R7A, a capacitor C6, and a capacitor C7. One end of the diac RV1 is connected to the power supply terminal L of the external power supply, and the other end of the diac RV1 is connected to the N1 end of the switch. The positive electrode of the diode D1 is connected to the second input terminal DB12 of the bridge rectifier diode DB1 and is connected to the ground terminal; the negative electrode of the diode D1 is connected to the N1 terminal of the switch and is connected to the first input terminal DB11 of the bridge rectifier diode DB1; The third input terminal DB13 of the bridge rectifier diode DB1 is connected to the power supply terminal L of the external power supply and is connected to the third output terminal M3 of the driving switch tripping circuit; The fourth input terminal DB14 of the bridge rectifier diode DB1 is sequentially connected to the fourth pin of the main control chip through the series-connected resistor R6 and the resistor R6A; The fourth input terminal DB14 of the bridge rectifier diode DB1 is simultaneously sequentially connected to the seventh pin of the main control chip through the series-connected resistor R7 and the resistor R7A; The fourth pin of the main control chip is simultaneously connected to the ground terminal through the capacitor C6; the seventh pin of the main control chip is simultaneously connected to the ground terminal through the capacitor C7.

4. The residual current operated circuit breaker circuit according to claim 1, characterized in that, The operational amplifier input-output circuit includes a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C13, and a solenoid L2, One end of the capacitor C13 is grounded, and the other end of the capacitor C13 is connected to the third pin of the main control chip; One end of the solenoid L2 is connected to the third pin of the main control chip, and the other end of the solenoid L2 is sequentially connected to the first pin of the main control chip through the series-connected resistor R2 and the resistor R3; The capacitor C1 is connected in parallel across the solenoid L2; The resistor R1 is connected in parallel across the capacitor C1; The second pin of the main control chip is connected to the connection point P where the resistor R2 and the resistor R3 intersect.

5. The residual current operated circuit breaker circuit according to claim 1, characterized in that, The clock circuit includes a capacitor C9, one end of the capacitor C9 is connected to the ninth pin of the main control chip, and the other end of the capacitor C9 is grounded.

6. The residual current operated circuit breaker circuit according to claim 1, wherein, The LED indication circuit includes a light-emitting diode LED1 and a resistor R8, one end of the resistor R8 is connected to the eleventh pin of the main control chip, the other end of the resistor R8 is connected to the positive electrode of the light-emitting diode LED1, and the negative electrode of the light-emitting diode LED1 is grounded.

7. The residual current operated circuit breaker circuit according to claim 1, wherein, The opening self-checking circuit includes a resistor R9, a resistor R21, a capacitor C21, a triode Q3, a triode Q1, a resistor R11, a diode D8, a resistor R9A, a triode Q2, a resistor R11A, a diode D9, a capacitor C3A, R13, and an AND gate device Y1, One end of the resistor R9 is connected to the twelfth pin of the main control chip, the other end of the resistor R9 is connected to the base of the triode Q1; the emitter of the triode Q1 is grounded, the collector of the triode Q1 is connected to one end of the resistor R11, the other end of the resistor R11 is connected to the negative electrode of the diode D8, and the positive electrode of the diode D8 is connected to the power supply terminal N2 of the external power supply; One end of the resistor R21 is connected to the twelfth pin of the main control chip, the other end of the resistor R21 is connected to the base of the triode Q3, the collector of the triode Q3 is connected to the base of the triode Q1, and the emitter of the triode Q3 is grounded; One end of the capacitor C21 is connected to the base of the triode Q3, and the other end of the capacitor C21 is grounded; One end of the resistor R9A is connected to the twelfth pin of the main control chip, the other end of the resistor R9A is connected to the base of the triode Q2, the collector of the triode Q2 is connected to one end of the resistor R11A, the other end of the resistor R11A is connected to the negative electrode of the diode D9, and the positive electrode of the diode D9 is connected to the N1 end of the switch; The emitter of the triode Q2 is connected to the ground terminal through the capacitor C3A, and the emitter of the triode Q2 is also connected to the first input terminal Y11 of the AND gate device Y1; The second input terminal Y12 of the AND gate device Y1 is grounded.

8. The residual current operated circuit breaker circuit according to claim 1, characterized in that, The thyristor loop detection circuit includes a diode D7, the positive electrode of the diode D7 is connected to the thirteenth pin of the main control chip, and the negative electrode of the diode D7 is connected to the second output terminal L2 of the timer reset circuit.

9. The residual current operated circuit breaker circuit according to claim 1, wherein The timer reset circuit includes a resistor R12 and a capacitor C10, One end of the capacitor C10 is connected to the fourteenth pin of the main control chip, and the other end of the capacitor C10 is grounded; One end of the resistor R12 is connected to the fourteenth pin of the main control chip, and the other end of the resistor R12 is simultaneously connected to the second output terminal M2 of the drive switch tripping circuit and the second output terminal K2 of the thyristor loop detection circuit.

10. The residual current operated circuit breaker circuit according to claim 1, characterized in that, The enable self-check circuit includes a capacitor C11, one end of the capacitor C11 is connected to the fifteenth pin of the main control chip, and the other end of the capacitor C11 is grounded.

11. The residual current operated circuit breaker circuit according to claim 1, characterized in that, The drive switch tripping circuit includes a resistor R10, a capacitor C12, a thyristor T1, a diode D5, and a solenoid L1, One end of the resistor R10 is connected to the sixteenth pin of the main control chip, the other end of the resistor R10 is connected to the control terminal of the thyristor T1, and the first end T11 of the thyristor T1 is grounded; One end of the capacitor C12 is connected to the control terminal of the thyristor T1, and the other end of the capacitor C12 is grounded; The second end T12 of the thyristor T1 is connected to the negative electrode of the diode D5, the positive electrode of the diode D5 is connected to the power supply terminal L of the external power supply through the solenoid L1; the second end T12 of the thyristor T1 is also connected to the second output terminal L2 of the timer reset circuit and the second output terminal K2 of the thyristor loop detection circuit.

Citation Information

Patent Citations

  • Residual current operated circuit breaker circuit with self-checking function

    CN210468781U