LED Epitaxial Structure, LED Chip and Preparation Method of Epitaxial Structure

Abstract

The present invention provides a substrate-peelable LED epitaxial structure, an LED chip, and a method for preparing the substrate-peelable LED epitaxial structure. The substrate-peelable LED epitaxial structure includes a GaAs substrate, a GaAs buffer layer, an AlAs sacrificial layer, and a semiconductor layer. The GaAs buffer layer is disposed on the GaAs substrate, and the AlAs sacrificial layer is disposed on the GaAs buffer layer; a plurality of recesses are provided on the AlAs sacrificial layer, and the semiconductor layer is disposed on the AlAs sacrificial layer. Compared with the prior art, the beneficial effects of the present technical solution are as follows: by providing recesses on the AlAs sacrificial layer, the plurality of recesses form a wavy cross-sectional edge on the cross-section of the epitaxial structure, so that the lower surfaces of the semiconductor layers are attached together through the uneven contact surfaces, and the uneven contact surfaces are used to improve the etching effect and reduce the stress between the AlAs sacrificial layer and the semiconductor layer, thereby realizing the easy peeling of the GaAs substrate, and thus reducing the production cost.

Description

Technical Field

[0001] The present invention relates to the technical field of light-emitting diode preparation, and relates to an LED epitaxial structure with an easily peelable substrate, an LED chip provided with the epitaxial structure, and a preparation method corresponding to the LED epitaxial structure with an easily peelable substrate. Background Art

[0002] LED, that is, a light-emitting diode, emits light by the recombination of electrons and holes, and can efficiently convert electrical energy into light energy, having multiple advantages such as small volume, rich colors, low energy consumption, and long service life. Based on the above advantages, LED light sources are considered to be the next-generation new solid-state light sources entering the general lighting field and have received extensive attention in the industry.

[0003] In red light LEDs or infrared LEDs using a GaAs substrate, the epitaxial structure mainly includes an N-type GaAs buffer layer, an N-type DBR reflection layer, an N-type confinement layer, an MQW light-emitting layer, a P-type confinement layer, and a P-type GaP current spreading layer on the GaAs substrate. A red light LED or an infrared LED can be prepared by sequentially growing each layer on the GaAs substrate. However, the substrate of this structure cannot be peeled off, and the substrate can only be used once, resulting in a relatively high cost. At present, the conventional AlAs sacrificial layer technology has the problem that it is difficult to peel off the GaAs substrate, and the epitaxial layer is extremely likely to be torn during the process of peeling off the GaAs substrate, which makes the GaAs substrate in the prior art can only be used once, and the cost is too high, restricting the development of the LED industry. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a substrate-peelable LED epitaxial structure, an LED chip, and a preparation method of a substrate-peelable LED epitaxial structure, which can achieve the easy peeling of the GaAs substrate, thereby reducing the production cost, in view of the above-mentioned defects of the prior art.

[0005] The technical solution adopted by the present invention to solve the technical problem is as follows:

[0006] A substrate-peelable LED epitaxial structure, comprising:

[0007] A GaAs substrate;

[0008] A GaAs buffer layer, the GaAs buffer layer is disposed on the GaAs substrate;

[0009] An AlAs sacrificial layer, the AlAs sacrificial layer is disposed on the GaAs buffer layer, and a plurality of recessed portions are provided on the AlAs sacrificial layer;

[0010] A semiconductor layer, the semiconductor layer is disposed on the AlAs sacrificial layer.

[0011] Compared with the prior art, the beneficial effects of the present technical solution are as follows: By providing a recessed portion on the AlAs sacrificial layer, a plurality of recessed portions form a wavy cross-sectional edge on the cross-section of the epitaxial structure, so that the lower surfaces of the semiconductor layers are joined together through an uneven contact surface. By means of the uneven contact surface, the etching effect is improved and the stress between the AlAs sacrificial layer and the semiconductor layer is reduced, thereby realizing the easy peeling of the GaAs substrate and reducing the production cost.

[0012] Further, the recessed portion is a conical recessed portion.

[0013] The beneficial effects of adopting the above solution are as follows: By providing a plurality of conical recessed portions on the AlAs sacrificial layer, a plurality of conical recessed portions form a sawtooth-like cross-sectional edge on the cross-section of the epitaxial structure. The semiconductor layer and the AlAs sacrificial layer are combined through the sawtooth-like edge. When the substrate needs to be peeled off, on the one hand, the sawtooth-like cross-sectional edge can improve the etching effect on the AlAs sacrificial layer, and on the other hand, it can also reduce the stress received by the AlAs sacrificial layer, enabling the easy peeling of the GaAs substrate and thus reducing the production cost of the epitaxial structure.

[0014] Further, the semiconductor layer sequentially includes a low-temperature P-type GaP layer, a high-temperature P-type GaP layer, a P-type AlInP confinement layer, an MQW multi-quantum well light-emitting layer, an N-type AlInP confinement layer, and an N-type GaAs contact layer from bottom to top;

[0015] A plurality of conical protrusions are provided on the lower surface of the low-temperature P-type GaP layer, and the plurality of conical protrusions are respectively embedded in the plurality of conical recessed portions.

[0016] The beneficial effects of adopting the above solution are as follows: By providing conical protrusions corresponding to the conical recessed portions on the lower surface of the low-temperature P-type GaP layer, the low-temperature P-type GaP layer is disposed on the AlAs sacrificial layer through the mutual engagement of the conical protrusions and the conical recessed portions, which can increase the contact area between the low-temperature P-type GaP layer and the AlAs sacrificial layer, thereby achieving the effects of improving the etching effect and reducing the stress.

[0017] Further, the thickness of the GaAs buffer layer is 100 - 1000 nm, and the thickness of the low-temperature P-type GaP layer is 100 - 1000 nm.

[0018] The beneficial effects of adopting the above solution are as follows: By setting the thickness of the GaAs buffer layer to 100 - 1000 nm, a good buffering effect can be obtained at a relatively low cost; and by setting the thickness of the low-temperature P-type GaP layer to 100 - 1000 nm, the low-temperature P-type GaP layer can be more easily separated from the AlAs sacrificial layer.

[0019] Furthermore, the bottom diameter of the conical recess is 5 - 40 nm, and the height of the conical recess is 5 - 40 nm.

[0020] The beneficial effects of adopting the above - mentioned solution are as follows: By setting the bottom diameter and height of the conical recess to 5 - 40 nm, on the one hand, it has the advantage of being easy to form, and on the other hand, it enables the etching solution to enter the interior of the epitaxial structure more efficiently, achieving a better etching effect, and further enabling the low - temperature P - type GaP layer to be more easily separated from the AlAs sacrificial layer.

[0021] Furthermore, the thickness of the AlAs sacrificial layer is greater than the height of the conical recess.

[0022] The beneficial effects of adopting the above - mentioned solution are as follows: It ensures that a serrated cross - sectional edge that interlocks with each other can be formed between the low - temperature P - type GaP layer and the AlAs sacrificial layer.

[0023] Furthermore, the thickness of the AlAs sacrificial layer is 10 - 50 nm.

[0024] The beneficial effects of adopting the above - mentioned solution are as follows: On the premise of ensuring that a serrated cross - sectional edge that interlocks with each other can be formed between the low - temperature P - type GaP layer and the AlAs sacrificial layer, it can also reduce the manufacturing cost.

[0025] Furthermore, the bottom surface of the conical recess is located on the upper surface of the AlAs sacrificial layer, and the conical recess is a conical depression with a larger upper part and a smaller lower part formed on the AlAs sacrificial layer.

[0026] The beneficial effects of adopting the above - mentioned solution are as follows: It has the effect of being easy to form.

[0027] Furthermore, the bottom surfaces of two adjacent conical recesses are tangent to each other.

[0028] The beneficial effects of adopting the above - mentioned solution are as follows: It increases the contact area between the low - temperature P - type GaP layer and the AlAs sacrificial layer, thereby maximizing the etching effect of the AlAs sacrificial layer and reducing the stress on the AlAs sacrificial layer.

[0029] The technical solution adopted by the present invention to solve the technical problem is as follows:

[0030] An LED chip, in which the above - mentioned substrate - peelable LED epitaxial structure is provided.

[0031] Compared with the prior art, the beneficial effects of the present technical solution are as follows: Compared with the LED chips in the prior art, the epitaxial structure adopted by the present LED chip is provided with a plurality of recesses on the AlAs sacrificial layer, and the plurality of recesses form a wavy cross-sectional edge on the cross-section of the epitaxial structure. The semiconductor layer and the AlAs sacrificial layer are combined through the wavy edge. When the substrate needs to be peeled off, on the one hand, the wavy cross-sectional edge can improve the etching effect on the AlAs sacrificial layer, and on the other hand, it can reduce the stress on the AlAs sacrificial layer, enabling the easy peeling of the GaAs substrate, thereby reducing the production cost of the LED chip.

[0032] A method for preparing a substrate-peelable LED epitaxial structure, the substrate-peelable LED epitaxial structure being the substrate-peelable LED epitaxial structure as described above, and the preparation method includes the following steps:

[0033] Grow a GaAs buffer layer on the GaAs substrate;

[0034] Grow an AlAs sacrificial layer on the GaAs buffer layer;

[0035] Etch a plurality of recesses on the AlAs sacrificial layer;

[0036] Grow a semiconductor layer on the AlAs sacrificial layer.

[0037] Compared with the prior art, the beneficial effects of the present technical solution are as follows: By etching, a plurality of tapered recesses are formed on the AlAs sacrificial layer, and the plurality of tapered recesses form a wavy cross-sectional edge on the cross-section of the epitaxial structure. The semiconductor layer and the AlAs sacrificial layer are combined through the wavy edge. When the substrate needs to be peeled off, on the one hand, the wavy cross-sectional edge can improve the etching effect on the AlAs sacrificial layer, and on the other hand, it can reduce the stress on the AlAs sacrificial layer, enabling the easy peeling of the GaAs substrate, thereby reducing the production cost of the epitaxial structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 is a partial structural schematic diagram of a substrate-peelable LED epitaxial structure of the present invention before etching the tapered recesses.

[0039] Figure 2 is a partial structural schematic diagram of a substrate-peelable LED epitaxial structure of the present invention after etching the tapered recesses.

[0040] Figure 3 is an overall structural schematic diagram of a substrate-peelable LED epitaxial structure of the present invention after etching the tapered recesses.

[0041] Figure 4It is a more specific overall structural schematic diagram after etching the tapered recess in a substrate-peelable LED epitaxial structure of the present invention.

[0042] Figure 5 It is an overall structural schematic diagram after substrate peeling in a substrate-peelable LED epitaxial structure of the present invention.

[0043] In the figure, the list of components represented by each label is as follows:

[0044] GaAs substrate 1, GaAs buffer layer 2, AlAs sacrificial layer 3, low-temperature P-type GaP layer 4, high-temperature P-type GaP layer 5, P-type AlInP confinement layer 6, MQW multi-quantum well light-emitting layer 7, N-type AlInP confinement layer 8, N-type GaAs contact layer 9;

[0045] Semiconductor layer 101; tapered recess 301;

[0046] Tapered protrusion 401. Specific embodiments

[0047] To make the objectives, technical solutions and advantages of the present invention clearer and more definite, the following further elaborates on the present invention with reference to the accompanying drawings and by way of examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0048] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by terms such as "center", "upper", "lower", "front", "rear", "left", "right", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0049] In the description of the present invention, it should be noted that unless otherwise clearly specified and defined, the terms "installation", "connection", and "coupling" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal communication of two components. When a component is referred to as "fixed to" or "disposed on" another element, it can be directly on another component or there can also be an intermediate component. When a component is considered to be "connected" to another element, it can be directly connected to another element or there may be an intermediate element at the same time. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0050] In the prior art, red light LEDs or infrared LEDs are fabricated by successively growing various layers on a GaAs substrate. In theory, after adding an AlAs sacrificial layer, the GaAs substrate can be reused. Only by etching the sacrificial layer with an etching solution can the GaAs substrate be separated and then peeled off for recycling. However, in the existing peeling technology, there is a problem that it is difficult to peel the GaAs substrate from the epitaxial structure. The etching solution can only penetrate into the sacrificial layer at the edge part. For the sacrificial layer far from the edge, the etching solution is difficult to work effectively. Therefore, during the process of peeling the GaAs substrate, the epitaxial layer is very likely to be torn. It can be seen that this will not only cause the peeled GaAs substrate to be unable to be reused, but also may damage the LED epitaxial layer during the peeling process, resulting in great waste. Therefore, in the prior art, the red light LED epitaxial wafers are still mainly in the form of non-peeled substrate wafers, and the GaAs substrate can only be used once, with too high cost, which restricts the development of the LED industry.

[0051] To solve the above problems, the present invention provides a substrate-peelable LED epitaxial structure, an LED chip, and a method for preparing a substrate-peelable LED epitaxial structure, aiming to change the LED epitaxial structure so that the etching solution can fully penetrate into the sacrificial layer, thereby achieving the purpose of easily separating the GaAs substrate.

[0052] As Figure 1 、 Figure 2 and Figure 3 shown, a substrate-peelable LED epitaxial structure includes a GaAs substrate 1, a GaAs buffer layer 2, an AlAs sacrificial layer 3, and a semiconductor layer 101. The GaAs buffer layer 2 is disposed on the GaAs substrate 1, the AlAs sacrificial layer 3 is disposed on the GaAs buffer layer 2, and the semiconductor layer 101 is disposed on the AlAs sacrificial layer 3. The GaAs buffer layer 2, the AlAs sacrificial layer 3, and the semiconductor layer 101 can be obtained by successively epitaxially growing on the GaAs substrate 1.

[0053] Before the substrate needs to be peeled, the AlAs sacrificial layer needs to be etched off with an etching solution first. Generally, in the prior art, the sacrificial layer is a flat layer structure, that is, the sacrificial layer is a flat layer structure, which will cause the etching solution to be difficult to penetrate deep into the center of the substrate, resulting in poor etching effect, and thus it is difficult to peel the semiconductor layer from the AlAs sacrificial layer.

[0054] As Figure 2 and Figure 3As shown, in order to improve the etching effect, the present invention creatively provides a plurality of recesses on the AlAs sacrificial layer 3; correspondingly, the shape of the lower surface of the semiconductor layer 101 corresponds to the plurality of recesses, so that the lower surface of the semiconductor layer 101 and the upper surface of the AlAs sacrificial layer 3 are engaged with each other to form a complete structure.

[0055] By providing recesses on the AlAs sacrificial layer, the lower surfaces of the semiconductor layers are bonded together through uneven contact surfaces, and the uneven contact surfaces are used to improve the etching effect and reduce the stress between the AlAs sacrificial layer and the semiconductor layer, enabling the easy peeling of the GaAs substrate, thereby reducing the production cost.

[0056] Specifically, the recesses can be spherical recesses, square recesses or irregular recesses. In the process of implementing the technical solution of the present invention, for cost considerations, various-shaped recesses can be randomly etched on the AlAs sacrificial layer. As long as there are recesses on the AlAs sacrificial layer, compared with the prior art, the substrate peeling operation can be realized more simply and efficiently.

[0057] Preferably, the recesses are provided as conical recesses 301. By providing conical recesses, a serrated contact edge will be formed between the semiconductor layer and the AlAs sacrificial layer. This serrated contact edge is a regular pattern, which can ensure the uniform distribution of the etching solution, so that the etching degree of the contact surface between the semiconductor layer and the AlAs sacrificial layer remains consistent, avoiding the need to apply large and small forces during the peeling process.

[0058] A plurality of conical recesses are formed on the AlAs sacrificial layer by etching. The plurality of conical recesses form a serrated cross-sectional edge on the cross-section of the epitaxial structure. The semiconductor layer and the AlAs sacrificial layer are combined through the serrated edge. When the substrate needs to be peeled, the serrated cross-sectional edge can, on the one hand, improve the etching effect on the AlAs sacrificial layer, and on the other hand, reduce the stress on the AlAs sacrificial layer, enabling the easy peeling of the GaAs substrate, thereby reducing the production cost of the epitaxial structure.

[0059] Such as Figure 4As shown, the semiconductor layer 101 sequentially includes a low-temperature P-type GaP layer 4, a high-temperature P-type GaP layer 5, a P-type AlInP confinement layer 6, an MQW multiple quantum well light-emitting layer 7, an N-type AlInP confinement layer 8, and an N-type GaAs contact layer 9 from bottom to top to form a complete LED epitaxial structure. In order to improve the etching effect, the present invention creatively provides a plurality of tapered recesses 301 on the AlAs sacrificial layer 3; correspondingly, a plurality of tapered protrusions 401 are provided on the lower surface of the low-temperature P-type GaP layer 4, and the plurality of tapered protrusions 401 are respectively embedded in the plurality of tapered recesses 301. Specifically, the bottom surface of the tapered recess 301 is located on the upper surface of the AlAs sacrificial layer 3, and the tapered recess 301 is a conical recess with a large upper part and a small lower part formed on the AlAs sacrificial layer 3.

[0060] By providing a plurality of tapered recesses 301 on the upper surface of the AlAs sacrificial layer 3 and corresponding tapered protrusions 401 on the lower surface of the low-temperature P-type GaP layer 4, the low-temperature P-type GaP layer 4 is disposed on the AlAs sacrificial layer 3 through the mutual engagement of the tapered protrusions 401 and the tapered recesses 301. The plurality of tapered recesses 301 form a serrated cut edge on the cross-section of the epitaxial structure. When the substrate needs to be peeled off, the serrated cut edge can, on the one hand, improve the etching effect on the AlAs sacrificial layer 3, and on the other hand, reduce the stress on the AlAs sacrificial layer 3, enabling the easy peeling of the GaAs substrate 1, thereby reducing the production cost of the epitaxial structure. The peeled LED epitaxial structure is as Figure 5 shown.

[0061] Generally speaking, the present invention provides an LED epitaxial structure. The epitaxial structure is a GaAs buffer layer 2, an AlAs sacrificial layer 3, a low-temperature P-type GaP layer 4, a high-temperature P-type GaP layer 5, a P-type AlInP confinement layer 6, an MQW multi-quantum well light-emitting layer 7, an N-type AlInP confinement layer 8, and an N-type GaAs contact layer 9 grown in sequence on a GaAs substrate 1. The implementation process of the above structure is as follows: First, place the GaAs substrate 1 in the MOCVD reaction chamber to grow the GaAs buffer layer 2, then grow the AlAs sacrificial layer 3, then take out the GaAs substrate 1, the GaAs buffer layer 2, and the AlAs sacrificial layer 3 as a whole, and etch a plurality of conical recesses 301 on the AlAs sacrificial layer 3; after the etching is completed, put the substrate into the MOCVD reaction chamber again, and grow the low-temperature P-type GaP layer 4, the high-temperature P-type GaP layer 5, the P-type AlInP confinement layer 6, the MQW multi-quantum well light-emitting layer 7, the N-type AlInP confinement layer 8, and the N-type GaAs contact layer 9 in sequence to obtain a complete LED epitaxial structure. For the epitaxial layer grown in this way, when etching the AlAs sacrificial layer 3, the serrated edge formed at the joint of the AlAs sacrificial layer 3 and the low-temperature P-type GaP layer 4 above it enables the etching solution to more easily penetrate into the center of the substrate interior, achieving a better etching effect, while reducing the stress between the AlAs sacrificial layer 3 and the low-temperature P-type GaP layer 4. When peeling, it is easier to separate the AlAs sacrificial layer 3 and the low-temperature P-type GaP layer 4, and the substrate can be reused repeatedly for many times, achieving the purpose of reducing costs.

[0062] Preferably, the thickness of the GaAs buffer layer 2 is 100 - 1000 nm, and the thickness of the low-temperature P-type GaP layer 4 is 100 - 1000 nm. If the GaAs buffer layer 2 is set too thick, it can achieve a good buffering effect, but it will increase the cost. Setting the thickness of the GaAs buffer layer 2 to 100 - 1000 nm can achieve a good buffering effect at a lower cost. And setting the thickness of the low-temperature P-type GaP layer 4 to 100 - 1000 nm makes it easier for the low-temperature P-type GaP layer 4 to be separated from the AlAs sacrificial layer 3.

[0063] More preferably, the thickness of the GaAs buffer layer 2 is 300 nm. The function of the GaAs buffer layer 2 is to play a buffering role structurally. Therefore, it cannot be set too thin. However, this does not mean that the thicker the GaAs buffer layer 2 is, the better. If the GaAs buffer layer 2 is set too thick, on the one hand, it will affect the overall structure of the epitaxial layer, and on the other hand, it will increase the cost. A large amount of experimental data shows that when the thickness of the GaAs buffer layer 2 is set to 300 nm, a quite ideal buffering effect can be achieved. If the thickness is further increased on this basis, the buffering effect will indeed be more prominent, but it will cause a substantial increase in cost. Therefore, considering the buffering effect and manufacturing cost comprehensively, in the present invention, the thickness of the GaAs buffer layer 2 is set to 300 nm.

[0064] Preferably, the bottom diameter of the tapered recess 301 is 5 - 40 nm, and the height of the tapered recess 301 is 5 - 40 nm. The thickness of the AlAs sacrificial layer 3 is greater than the height of the tapered recess 301. Specifically, the thickness of the AlAs sacrificial layer 3 is 10 - 50 nm.

[0065] Setting the bottom diameter and height of the tapered recess 301 to 5 - 40 nm has the advantage of being easy to form on the one hand, and on the other hand, it enables the etching solution to enter the interior of the epitaxial structure more efficiently, achieving a better etching effect, and thus making it easier for the low-temperature P-type GaP layer 4 to be separated from the AlAs sacrificial layer 3. The thickness of the AlAs sacrificial layer 3 being greater than the height of the tapered recess 301 can ensure that a serrated cut surface edge that meshes with each other can be formed between the low-temperature P-type GaP layer 4 and the AlAs sacrificial layer 3. Correspondingly, the thickness of the AlAs sacrificial layer 3 is set to 10 - 50 nm, which can reduce the preparation cost while ensuring that a serrated cut surface edge that meshes with each other can be formed between the low-temperature P-type GaP layer 4 and the AlAs sacrificial layer 3. More preferably, the thickness of the AlAs sacrificial layer is 20 nm. Correspondingly, the height of the tapered recess is 10 nm.

[0066] Preferably, on the AlAs sacrificial layer 3, the bottoms of two adjacent tapered recesses 301 are tangent to each other. In this way, the contact area between the low-temperature P-type GaP layer 4 and the AlAs sacrificial layer 3 can be increased, thereby maximizing the etching effect of the AlAs sacrificial layer 3 and reducing the stress on the AlAs sacrificial layer 3.

[0067] The present invention also provides an LED chip, in which the above-mentioned substrate-peelable LED epitaxial structure is provided. Compared with the LED chips in the prior art, the epitaxial structure adopted by the present LED chip has a plurality of recesses provided on the AlAs sacrificial layer 3, and the plurality of recesses form a wavy cross-sectional edge on the cross-section of the epitaxial structure. When the substrate needs to be peeled off, the wavy cross-sectional edge can, on the one hand, improve the etching effect on the AlAs sacrificial layer 3, and on the other hand, reduce the stress on the AlAs sacrificial layer 3, enabling the easy peeling of the GaAs substrate 1, thereby reducing the production cost of the LED chip. Specifically, the recess is a conical recess.

[0068] As Figure 1 , Figure 2 , Figure 3 shown, the present invention also provides a method for preparing a substrate-peelable LED epitaxial structure, and the preparation method specifically includes the following steps:

[0069] Put the GaAs substrate 1 into the MOCVD reaction chamber, and grow a GaAs buffer layer 2 on the GaAs substrate 1. Specifically, the thickness of the GaAs substrate 1 is 100 - 1000 um; for example, the thickness of the GaAs substrate 1 can be set to 150, 200, 250,..., 850, 900, 950 um.

[0070] Grow an AlAs sacrificial layer 3 on the GaAs buffer layer 2. Specifically, the thickness of the AlAs sacrificial layer 3 is 10 - 50 nm; for example, the thickness of the AlAs sacrificial layer 3 can be set to 10 nm, 20 nm, 30 nm, 40 nm, and 50 nm.

[0071] Take out the whole of the GaAs substrate 1, the GaAs buffer layer 2, and the AlAs sacrificial layer 3, and etch a plurality of recesses on the AlAs sacrificial layer 3. Preferably, the recess is a conical recess 301. The bottom diameter of the conical recess 301 is 5 - 40 nm, and the height of the conical recess 301 is 5 - 40 nm. Grow a semiconductor layer 101 on the AlAs sacrificial layer 3.

[0072] Specifically, the semiconductor layer 101 includes, from bottom to top, a low-temperature P-type GaP layer, a high-temperature P-type GaP layer, a P-type AlInP confinement layer, an MQW multi-quantum well light-emitting layer, an N-type AlInP confinement layer, and an N-type GaAs contact layer.

[0073] As Figure 4As shown, the growth of the semiconductor layer 101 includes the following steps: putting the whole of the etched GaAs substrate 1, GaAs buffer layer 2, and AlAs sacrificial layer 3 back into the MOCVD reaction chamber, and growing a low-temperature P-type GaP layer 4 on the AlAs sacrificial layer 3. Specifically, the thickness of the low-temperature P-type GaP layer 4 is 100 - 1000 nm. For example, the thickness of the low-temperature P-type GaP layer 4 can be set to 150 nm, 200 nm, 250 nm, …… 850, 900 nm, 950 nm. When growing the low-temperature P-type GaP layer 4, the temperature of the MOCVD reaction chamber is set to 500 - 700 degrees Celsius. For example, when growing the low-temperature P-type GaP layer 4, the temperature of the MOCVD reaction chamber is set to 500, 550, 600, 650, 700 degrees Celsius.

[0074] Grow a high-temperature P-type GaP layer 5 on the low-temperature P-type GaP layer 4. Specifically, when growing the high-temperature P-type GaP layer 5, the temperature of the MOCVD reaction chamber is set to 700 - 850 degrees Celsius. For example, when growing the high-temperature P-type GaP layer 5, the temperature of the MOCVD reaction chamber is set to 700, 750, 800, 850 degrees Celsius.

[0075] Grow a P-type AlInP confinement layer 6 on the high-temperature P-type GaP layer 5.

[0076] Grow an MQW multi-quantum well light-emitting layer 7 on the P-type AlInP confinement layer 6.

[0077] Grow an N-type AlInP confinement layer 8 on the MQW multi-quantum well light-emitting layer 7.

[0078] Grow an N-type GaAs contact layer 9 on the N-type AlInP confinement layer 8. Thus, the substrate-peelable LED epitaxial structure as shown in Figure 4 is obtained.

[0079] In the MOCVD reaction chamber, grow a GaAs buffer layer 2 on the GaAs substrate 1, then grow an AlAs sacrificial layer 3, then take out the substrate, etch a plurality of conical recesses 301 on the AlAs layer of the substrate, and then put the substrate back into the MOCVD reaction chamber to grow structures such as a low-temperature P-type GaP layer 4, a high-temperature P-type GaP layer 5, a P-type AlInP confinement layer 6, an MQW multi-quantum well light-emitting layer 7, an N-type AlInP confinement layer 8, and an N-type GaAs contact layer 9. As shown in Figure 5 For the LED epitaxial structure obtained by the above solution, a serrated edge is formed at the junction of the AlAs sacrificial layer 3 and the low-temperature P-type GaP layer 4. The AlAs sacrificial layer 3 can be effectively etched by the etching solution, so as to peel off the GaAs substrate 1 and the GaAs buffer layer 2, realizing the recycling of the substrate, and further achieving the purpose of reducing costs.

[0080] In summary, the present invention provides a substrate-peelable LED epitaxial structure, an LED chip, and a method for preparing a substrate-peelable LED epitaxial structure. The core of the technical solution is that: a plurality of conical recesses 301 are provided on the upper surface of the AlAs sacrificial layer 3, and conical protrusions 401 corresponding to the conical recesses 301 are provided on the lower surface of the low-temperature P-type GaP layer 4. The low-temperature P-type GaP layer 4 is disposed on the AlAs sacrificial layer 3 through the mutual engagement of the conical protrusions 401 and the conical recesses 301. The plurality of conical recesses 301 form a sawtooth-like cross-sectional edge on the cross-section of the epitaxial structure. When the substrate needs to be peeled off, the sawtooth-like cross-sectional edge can, on the one hand, improve the etching effect on the AlAs sacrificial layer 3, and on the other hand, reduce the stress on the AlAs sacrificial layer 3, enabling the easy peeling of the GaAs substrate 1, thereby reducing the production cost of the epitaxial structure.

[0081] It should be understood that the application of the present invention is not limited to the above examples. For those of ordinary skill in the art, improvements or variations can be made according to the above description, and all such improvements and variations should fall within the protection scope of the appended claims of the present invention.

Claims

1. A substrate-peelable LED epitaxial structure, characterized in that, Comprising: GaAs substrate; GaAs buffer layer, the GaAs buffer layer is disposed on the GaAs substrate; AlAs sacrificial layer, the AlAs sacrificial layer is disposed on the GaAs buffer layer, and a plurality of periodically arranged tapered recesses are provided on the AlAs sacrificial layer, the bottom surfaces of two adjacent tapered recesses are tangent to each other, the tapered bottom surface diameter of the tapered recess is 5 - 40 nm, and the height of the tapered recess is 5 - 40 nm; Semiconductor layer, the semiconductor layer is disposed on the AlAs sacrificial layer.

2. The substrate-peelable LED epitaxial structure according to claim 1, wherein: The semiconductor layer sequentially includes a low-temperature P-type GaP layer, a high-temperature P-type GaP layer, a P-type AlInP confinement layer, an MQW multi-quantum well light-emitting layer, an N-type AlInP confinement layer, and an N-type GaAs contact layer from bottom to top; A plurality of tapered protrusions are provided on the lower surface of the low-temperature P-type GaP layer, and the plurality of tapered protrusions are respectively embedded in the plurality of tapered recesses.

3. The substrate-peelable LED epitaxial structure according to claim 2, wherein: The thickness of the GaAs buffer layer is 100 - 1000 nm, and the thickness of the low-temperature P-type GaP layer is 100 - 1000 nm.

4. The substrate-peelable LED epitaxial structure according to claim 1 or 2, wherein: The thickness of the AlAs sacrificial layer is greater than the height of the tapered recess, and the thickness of the AlAs sacrificial layer is 10 - 50 nm.

5. The substrate-peelable LED epitaxial structure according to claim 1, wherein: The bottom surface of the tapered recess is located on the upper surface of the AlAs sacrificial layer, and the tapered recess is a conical recess with a larger upper part and a smaller lower part formed on the AlAs sacrificial layer.

6. The substrate-peelable LED epitaxial structure according to claim 5, wherein: The bottom surfaces of two adjacent tapered recesses are tangent to each other.

7. An LED chip, characterized in that, The LED chip is provided with the substrate-peelable LED epitaxial structure according to any one of claims 1 - 6.

8. A method for preparing a substrate - peelable LED epitaxial structure, wherein the substrate - peelable LED epitaxial structure is the substrate - peelable LED epitaxial structure according to any one of claims 1 - 6, characterized in that, The preparation method includes the following steps: Growing a GaAs buffer layer on the GaAs substrate; Growing an AlAs sacrificial layer on the GaAs buffer layer; Providing a plurality of periodically arranged tapered recesses on the AlAs sacrificial layer, the bottom surfaces of two adjacent tapered recesses are tangent to each other, the tapered bottom surface diameter of the tapered recess is 5 - 40 nm, and the height of the tapered recess is 5 - 40 nm; Growing a semiconductor layer on the AlAs sacrificial layer.

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