An adaptive charging circuit for massager

Abstract

The present invention relates to the field of massagers, and discloses an adaptive charging circuit for massagers, including a TYPEC interface, a boost circuit, a linear voltage regulator and a single-chip microcomputer; the TYPEC interface is connected to the boost circuit, and the TYPEC interface is connected to the single-chip microcomputer through the linear voltage regulator; the output interface of the boost circuit is a second adapter, and the boost circuit includes a power chip; the VDD pin and the EN pin on the power chip are both connected to the first adapter, and the first adapter is grounded through three capacitors respectively; the CND pin and the EPAD pin on the power chip are grounded; the SW pin on the power chip is connected to the second adapter through a voltage stabilizing diode, and is also connected to the first adapter through an inductor; the FB pin on the power chip is grounded through a first resistor, and is connected to the second adapter through a second resistor, and the second adapter is grounded through another three capacitors. In the above manner, the present invention can be applied to all chargers with TYPEC interfaces on the market.

Description

Technical Field

[0001] The invention relates to the field of massagers, and in particular to an adaptive charging circuit for massagers. Background Art

[0002] Existing massagers are charged through dedicated chargers, mainly in the following two types:

[0003] 1. A dedicated 12V charger with a 5mm DC interface.

[0004] 2. A dedicated 24V charger with a 5mm DC interface.

[0005] These two special chargers are not easy to purchase after being damaged or lost; and the cost of the product is increased due to the need for additional matching.

[0006] At present, chargers with TYPEC interface (USB Type-C) are popular on the market. The TYPEC interface chargers are used for mobile phones. Due to the popularity of mobile phones, almost everyone has a TYPEC interface charger. Even if you don’t have one, you can buy it easily.

[0007] Therefore, it is necessary to design an adaptive charging circuit for a massager so as to be compatible with chargers with TYPEC interfaces on mobile phones on the market. Summary of the invention

[0008] The main technical problem solved by the present invention is to provide an adaptive charging circuit for a massager, which can be applicable to all chargers with TYPEC interfaces on the market.

[0009] In order to solve the above technical problems, a technical solution adopted by the present invention is: to provide an adaptive charging circuit of a massager, comprising: a TYPEC interface, a boost circuit, a linear regulator and a single-chip microcomputer; the TYPEC interface is connected to the boost circuit, and the TYPEC interface is also connected to the single-chip microcomputer through the linear regulator, and the TYPEC interface can supply power to the boost circuit and the single-chip microcomputer respectively; the VBUS pin on the TYPEC interface is connected to the first adapter, and the GND pin on the TYPEC interface is grounded; the output interface of the boost circuit is the second adapter, and the boost circuit comprises a power chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a voltage regulator diode, an inductor, a first capacitor resistor and a second resistor; the VDD pin on the power chip and the EN pin on the power chip are both connected to the first adapter, and the first adapter is grounded through the first capacitor, the second capacitor and the third capacitor respectively; the CND pin on the power chip and the EPAD pin on the power chip are both grounded; the SW pin on the power chip is connected to the second adapter through the voltage regulator diode, and the SW pin on the power chip is also connected to the first adapter through the inductor; the FB pin on the power chip is grounded through the first resistor, and the FB pin on the power chip is also connected to the second adapter through the second resistor, and the second adapter is grounded through the fourth capacitor, the fifth capacitor and the sixth capacitor respectively; the single-chip computer is connected with a debugging serial port and a burning port.

[0010] Preferably, there are four VBUS pins on the TYPEC interface, namely, a first VBUS pin, a second VBUS pin, a third VBUS pin and a fourth VBUS pin; there are four GND pins on the TYPEC interface, namely, a first GND pin, a second GND pin, a third GND pin and a fourth GND pin; the TYPEC interface also includes a vacant TX1+ pin, a TX1- pin, a CC1 pin, a D+ pin, a D- pin, a SUB1 pin, a RX2- pin, a RX2+ pin, a TX2+ pin, a TX2- pin, a CC2 pin, a RX1- pin and a RX1+ pin.

[0011] Preferably, there are two SW pins on the power chip, namely the first SW pin and the second SW pin; there are two VDD pins on the power chip, namely the first VDD pin and the second VDD pin; and the CND pin on the power chip is the fifth CND pin.

[0012] Preferably, the linear regulator includes a transistor, a seventh capacitor, an eighth capacitor, a ninth capacitor and a tenth capacitor; the input end of the transistor is connected to the first adapter, and the input end of the transistor is also grounded through the seventh capacitor C23 and the eighth capacitor C29 respectively; the output end of the transistor is connected to the third adapter, and the output end of the transistor is also grounded through the ninth capacitor and the tenth capacitor respectively; the ground end of the transistor is grounded.

[0013] Preferably, the VDD pin on the single-chip microcomputer is connected to the third adapter interface, and the VDD pin on the single-chip microcomputer is also grounded through an eleventh capacitor C7; the PA2 pin on the single-chip microcomputer and the PA3 pin on the single-chip microcomputer are both connected to the debugging serial port; the PA1 / DAT pin on the single-chip microcomputer and the PA0 / CLK pin on the single-chip microcomputer are both connected to the burning port; the PA5 pin on the single-chip microcomputer is connected to the analog-to-digital converter ADC; the PA4 pin on the single-chip microcomputer is grounded in turn through a third resistor and a light-emitting diode; the VSS pin on the single-chip microcomputer is directly grounded.

[0014] Preferably, the VDD pin on the single chip microcomputer is a third VDD pin.

[0015] Preferably, the first pin of the debug serial port is directly grounded, the second pin of the debug serial port is connected to the PA2 pin on the single chip microcomputer through a fourth resistor, and the third pin of the debug serial port is connected to the PA3 pin on the single chip microcomputer through a fifth resistor R21.

[0016] Preferably, the first pin of the burning port is directly grounded, the second pin of the burning port is connected to the PA0 / CLK pin on the single-chip microcomputer, the third pin of the burning port is connected to the PA1 / DAT pin on the single-chip microcomputer, and the fourth pin of the burning port is connected to the third adapter port.

[0017] The beneficial effect of the present invention is that the present invention can make the product applicable to all chargers with TYPEC interfaces on the market, and there is no need to match the product with a dedicated charger, which can save costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of a TYPEC interface part in an adaptive charging circuit of a massager of the present invention;

[0019] Figure 2 It is a schematic diagram of a boost circuit part in an adaptive charging circuit of a massager of the present invention;

[0020] Figure 3 It is a schematic diagram of a linear voltage regulator part in an adaptive charging circuit of a massager of the present invention;

[0021] Figure 4 It is a schematic diagram of a single chip microcomputer part in an adaptive charging circuit of a massager of the present invention;

[0022] Figure 5 It is a schematic diagram of a debugging serial port J6 part in an adaptive charging circuit of a massager of the present invention;

[0023] Figure 6 It is a schematic diagram of the burning port J7 part in the adaptive charging circuit of a massager of the present invention. DETAILED DESCRIPTION

[0024] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more definite definition of the protection scope of the present invention.

[0025] See also Figures 1 to 6 , the embodiment of the present invention includes:

[0026] An adaptive charging circuit for a massager includes: a TYPEC interface, a boost circuit, a linear regulator LDO and a single-chip microcomputer U1. The TYPEC interface is connected to the boost circuit, and the TYPEC interface is also connected to the single-chip microcomputer U1 through the linear regulator LDO. The TYPEC interface can supply power to the boost circuit and the single-chip microcomputer U1 respectively. The output interface (power supply interface) of the boost circuit is a second transfer interface VDD_2. The single-chip microcomputer is connected to a debugging serial port J6 and a burning port J7.

[0027] The TYPEC interface includes a first VBUS pin, a second VBUS pin, a third VBUS pin, a fourth VBUS pin, a first GND pin, a second GND pin, a third GND pin, a fourth GND pin, and multiple other pins (TX1+ pin, TX1- pin, CC1 pin, D+ pin, D- pin, SUB1 pin, RX2- pin, RX2+ pin, TX2+ pin, TX2- pin, CC2 pin, RX1- pin, RX1+ pin), the first VBUS pin, the second VBUS pin, the third VBUS pin and the fourth VBUS pin are all connected to the first transfer interface VCC_IN, the first GND pin, the second GND pin, the third GND pin and the fourth GND pin are all grounded, and the other multiple pins on the TYPEC interface are all vacant.

[0028] The boost circuit includes a power chip AH8681, a first capacitor C10, a second capacitor C11, a third capacitor C12, a fourth capacitor C14, a fifth capacitor C15, a sixth capacitor C16, a voltage stabilizing diode D3, an inductor L1, a first resistor R22, and a second resistor R23. The power chip AH8681 includes a first SW pin, a second SW pin, a first VDD pin, a second VDD pin, an EN pin, a FB pin, a fifth CND pin, and an EPAD pin. The first VDD pin, the second VDD pin, and the EN pin are all connected to the first transfer interface VCC_IN; the first transfer interface VCC_IN (the first VDD pin, the second VDD pin, and the EN pin) are grounded through the first capacitor C10, the second capacitor C11, and the third capacitor C12, respectively. The fifth CND pin and the EPAD pin are both grounded. The first SW pin and the second SW pin are both connected to the second transfer interface VDD_2 through the voltage stabilizing diode D3; the first SW pin and the second SW pin are also connected to the first transfer interface VCC_IN through the inductor L1; the second transfer interface VDD_2 is grounded through the fourth capacitor C14, the fifth capacitor C15 and the sixth capacitor C16 respectively. The FB pin is grounded through the first resistor R22, and the FB pin is also connected to the second transfer interface VDD_2 through the second resistor R23.

[0029] The linear regulator LDO includes a transistor HT7533, a seventh capacitor C23, an eighth capacitor C29, a ninth capacitor C21 and a tenth capacitor C22. The input terminal 2 (B base) of the transistor HT7533 is connected to the first transfer interface VCC_IN; the input terminal 2 of the transistor HT7533 is also grounded through the seventh capacitor C23 and the eighth capacitor C29, that is, the input terminal 2 of the transistor HT7533 is grounded through the seventh capacitor C23 and the eighth capacitor C29 connected in parallel. The output terminal 3 (C collector) of the transistor HT7533 is connected to the third transfer interface VCC_3; the output terminal 3 (C collector) of the transistor HT7533 is also grounded through the ninth capacitor C21 and the tenth capacitor C22, that is, the output terminal 3 of the transistor HT7533 is grounded through the ninth capacitor C21 and the tenth capacitor C22 connected in parallel. The ground terminal 1 (E emitter) of the transistor HT7533 is grounded.

[0030] The single-chip computer U1 has a third VDD pin, a PA2 pin, a PA1 / DAT pin, a PA3 pin, a PA0 / CLK pin, a PA5 pin, a PA4 pin and a VSS pin. The third VDD pin is connected to the third transfer interface VCC_3 (output terminal 3 of the transistor HT7533); the third VDD pin is also grounded through the eleventh capacitor C7. The PA2 pin and the PA3 pin are connected to the debugging serial port J6. The PA1 / DAT pin and the PA0 / CLK pin are connected to the burning port J7. The PA5 pin is connected to the analog-to-digital converter ADC. The PA4 pin is grounded in turn through the third resistor R19 and the light-emitting diode D1, that is, the third resistor R19 and the light-emitting diode D1 are connected in series in the circuit where the PA4 pin is grounded. The VSS pin is directly grounded.

[0031] The first pin of the debugging serial port J6 is grounded, the second pin of the debugging serial port J6 is connected to the PA2 pin via a fourth resistor R20, and the third pin of the debugging serial port J6 is connected to the PA3 pin via a fifth resistor R21.

[0032] The first pin of the burning port J7 is grounded, the second pin of the burning port J7 is connected to the PA0 / CLK pin, the third pin of the burning port J7 is connected to the PA1 / DAT pin, and the fourth pin of the burning port J7 is connected to the third adapter VCC_3.

[0033] After the charger with TYPEC interface is inserted, the system is powered on; the linear regulator LDO converts the voltage to 3.3V to power the microcontroller U1, and the input voltage is boosted by the boost circuit to charge the battery; the microcontroller U1 can detect the voltage on the load resistor and convert it into charging current to understand whether the charging is completed. In addition, in order to facilitate the charging personnel to intuitively understand the charging status, an indicator light can be set. When charging, the indicator light flashes, and when fully charged, the indicator light is always on.

[0034] The present invention can make the product applicable to all TYPEC interface chargers (5V / 9V / 12V) on the market, and there is no need to match the product with a dedicated charger, which can save costs and improve purchasing power.

[0035] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An adaptive charging circuit for a massager, characterized in that: include: TYPEC interface, boost circuit, linear regulator and microcontroller; The TYPEC interface is connected to the boost circuit, and the TYPEC interface is also connected to the single-chip microcomputer through the linear regulator. The TYPEC interface can supply power to the boost circuit and the single-chip microcomputer respectively; the VBUS pin on the TYPEC interface is connected to the first adapter, and the GND pin on the TYPEC interface is grounded; the output interface of the boost circuit is the second adapter, and the boost circuit includes a power chip, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a voltage regulator diode, an inductor, a first resistor and a second resistor; the VDD pin on the power chip and the EN pin on the power chip are both connected to The first transfer interface is connected, and the first transfer interface is grounded through the first capacitor, the second capacitor and the third capacitor respectively; the CND pin on the power chip and the EPAD pin on the power chip are both grounded; the SW pin on the power chip is connected to the second transfer interface through the voltage regulator diode, and the SW pin on the power chip is also connected to the first transfer interface through the inductor; the FB pin on the power chip is grounded through the first resistor, and the FB pin on the power chip is also connected to the second transfer interface through the second resistor, and the second transfer interface is grounded through the fourth capacitor, the fifth capacitor and the sixth capacitor respectively; the single-chip computer is connected with a debugging serial port and a burning port; There are four VBUS pins on the TYPEC interface, namely, a first VBUS pin, a second VBUS pin, a third VBUS pin and a fourth VBUS pin; there are four GND pins on the TYPEC interface, namely, a first GND pin, a second GND pin, a third GND pin and a fourth GND pin; the TYPEC interface also includes a vacant TX1+ pin, a TX1- pin, a CC1 pin, a D+ pin, a D- pin, a SUB1 pin, a RX2- pin, a RX2+ pin, a TX2+ pin, a TX2- pin, a CC2 pin, a RX1- pin and a RX1+ pin; There are two SW pins on the power chip, namely the first SW pin and the second SW pin; there are two VDD pins on the power chip, namely the first VDD pin and the second VDD pin; the CND pin on the power chip is the fifth CND pin; The linear voltage regulator includes a transistor, a seventh capacitor, an eighth capacitor, a ninth capacitor and a tenth capacitor; the input end of the transistor is connected to the first transfer interface, and the input end of the transistor is also grounded through the seventh capacitor C23 and the eighth capacitor C29 respectively; the output end of the transistor is connected to the third transfer interface, and the output end of the transistor is also grounded through the ninth capacitor and the tenth capacitor respectively; the grounding end of the transistor is grounded; The VDD pin on the single-chip microcomputer is connected to the third transfer interface, and the VDD pin on the single-chip microcomputer is also grounded through the eleventh capacitor C7; the PA2 pin on the single-chip microcomputer and the PA3 pin on the single-chip microcomputer are both connected to the debugging serial port; the PA1 / DAT pin on the single-chip microcomputer and the PA0 / CLK pin on the single-chip microcomputer are both connected to the burning port; the PA5 pin on the single-chip microcomputer is connected to the analog-to-digital converter ADC; the PA4 pin on the single-chip microcomputer is grounded in turn through the third resistor and the light-emitting diode; the VSS pin on the single-chip microcomputer is directly grounded; The VDD pin on the single chip microcomputer is a third VDD pin; The first pin of the debug serial port is directly grounded, the second pin of the debug serial port is connected to the PA2 pin on the single-chip computer through a fourth resistor, and the third pin of the debug serial port is connected to the PA3 pin on the single-chip computer through a fifth resistor R21; The first pin of the burning port is directly grounded, the second pin of the burning port is connected to the PA0 / CLK pin on the single-chip microcomputer, the third pin of the burning port is connected to the PA1 / DAT pin on the single-chip microcomputer, and the fourth pin of the burning port is connected to the third adapter port.

Images