Display device

Abstract

A display device including a display area and a non-display area is provided. The display device includes: a plurality of data wirings disposed in the display area and the non-display area; a plurality of connection wirings disposed in the display area and connected to the plurality of data wirings; a plurality of dummy patterns disposed in the same layer as the plurality of connection wirings in the display area; and a shielding pattern disposed on the plurality of connection wirings. A first gap is defined between the plurality of connection wirings and the plurality of dummy patterns, and the shielding pattern overlaps with the first gap.

Description

[0001] This application claims priority to the benefit of Korean Patent Application No. 10-2019-0016318, filed on Feb. 12, 2019, which is hereby incorporated by reference in its entirety for all purposes as if fully set forth herein. Technical Field

[0002] Exemplary embodiments of the invention generally relate to a display device. Background Art

[0003] With the development of multimedia, display devices have become increasingly important. Accordingly, various display devices such as liquid crystal display (LCD) devices, organic light emitting diode (OLED) display devices, etc. have been developed.

[0004] Specifically, an OLED display device uses an OLED that generates light by combining electrons and holes to display an image. The OLED display device has a fast response speed, high brightness, and a wide viewing angle and can be driven at low power.

[0005] A typical display device displays an image only at its front, and recently, a display device capable of displaying an image on a side surface of the display device has been developed.

[0006] The above information disclosed in this background art section is only for understanding the background of the inventive concept, and thus, it may include information that does not constitute the prior art. Summary of the Invention

[0007] Exemplary embodiments of the invention provide a display device capable of minimizing the size of a non-display area and preventing deterioration of display quality.

[0008] Additional features of the inventive concept will be set forth in the description below, and in part will be apparent from the description, or may be learned by practice of the inventive concept.

[0009] Exemplary embodiments of the invention provide a display device including a display area and a non-display area, the display device including: a plurality of data wirings disposed in the display area and the non-display area; a plurality of connection wirings disposed in the display area and connected to the plurality of data wirings; a plurality of dummy patterns disposed in the same layer as the plurality of connection wirings in the display area; and a shielding pattern disposed on the plurality of connection wirings. A first gap is defined between the plurality of connection wirings and the plurality of dummy patterns, and the shielding pattern overlaps the first gap.

[0010] It will be understood that the foregoing general description and the following detailed description are both exemplary and explanatory and are intended to provide further explanation of the claimed invention. Brief Description of the Drawings

[0011] The accompanying drawings, which are included to provide a further understanding of the invention and constitute a part of this specification, illustrate exemplary embodiments of the invention and, together with the description, serve to explain the inventive concept.

[0012] Figure 1 is a perspective view of a display device according to an exemplary embodiment of the invention.

[0013] Figure 2 is Figure 1 an exploded view of the display device of

[0014] Figure 3 is a cross-sectional view taken along line III-III' of Figure 2 of

[0015] Figure 4 is a plan view of a touch sensing layer according to an exemplary embodiment of the invention.

[0016] Figure 5 is Figure 4 an enlarged plan view of region FF1 of

[0017] Figure 6 is Figure 1 a plan view of the display device of

[0018] Figure 7 is a cross-sectional view taken along line VII-VII' of Figure 6 of

[0019] Figure 8 is Figure 6 an enlarged plan view of region A of

[0020] Figure 9 is a plan view showing how the touch sensing layer is arranged on the structure of Figure 8 of

[0021] Figure 10 is a cross-sectional view taken along line X-X' of Figure 9 of

[0022] Figure 11 is a plan view of a display device according to another exemplary embodiment of the invention.

[0023] Figure 12 is Figure 11 an enlarged plan view of region A of

[0024] Figure 13 is a plan view of a display device according to another exemplary embodiment of the invention.

[0025] Figure 14 isFigure 13 An enlarged plan view of region A.

[0026] Figure 15 It is a plan view of a display device according to another exemplary embodiment of the invention.

[0027] Figure 16 It is Figure 15 An enlarged plan view of region A.

[0028] Figure 17 It is a plan view of a display device according to another exemplary embodiment of the invention.

[0029] Figure 18 It is a cross-sectional view taken along line XVIII-XVIII' of Figure 17 An exemplary cross-sectional view taken along line XVIII-XVIII' of

[0030] Figure 19 It is a cross-sectional view taken along line XVIII-XVIII' of Figure 17 Another exemplary cross-sectional view taken along line XVIII-XVIII' of Detailed Description of the Invention

[0031] The features of the inventive concept and the method of implementing the inventive concept can be more easily understood by referring to the following detailed description of the exemplary embodiments and the accompanying drawings. However, the inventive concept can be implemented in many different forms and should not be construed as limited to the exemplary embodiments set forth herein. On the contrary, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art, and the inventive concept will be defined only by the appended claims.

[0032] When an element or layer is referred to as being "on", "connected to", or "coupled to" another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or intervening elements or layers may be present. However, when an element or layer is referred to as being "directly on", "directly connected to", or "directly coupled to" another element or layer, no intervening elements or layers are present. For this reason, the term "connected" can refer to physical, electrical, and / or fluid connections with or without intervening elements. Additionally, the D1 axis, D2 axis, and D3 axis are not limited to the three axes of a rectangular coordinate system (such as the X-axis, Y-axis, and Z-axis), and can be interpreted in a broader sense. For example, the D1 axis, D2 axis, and D3 axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z (such as XYZ, XYY, YZ, and ZZ for example). As used herein, the term "and / or" includes any combination and all combinations of one or more of the associated listed items.

[0033] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, a first element discussed below could be termed a second element without departing from the teachings of the disclosure.

[0034] For descriptive purposes, spatial relative terms such as "beneath", "below", "under", "lower", "above", "upper", "on top of", "higher", "side" (e.g., as in "sidewall") etc. may be used herein to describe the relationship of one element to another as shown in the figures. Spatial relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, an element described as "beneath" or "below" another element or feature would then be oriented "above" the other element or feature. Thus, the exemplary term "beneath" can include both an orientation above and below. Additionally, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and the spatial relative descriptors used herein may be interpreted accordingly.

[0035] The terms used herein are for the purpose of describing particular embodiments and are not intended to be limiting. As used herein, unless the context clearly dictates otherwise, the singular forms "a", "an" and "the" are also intended to include the plural forms. Additionally, when the terms "comprises" and / or "comprising" are used in this specification, they specify the presence of the stated features, integers, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It is also noted that, as used herein, the terms "substantially", "about" and other similar terms are used as approximate terms and not as terms of degree, and are thus used to interpret the inherent deviations of measured, calculated, and / or provided values that would be recognized by one of ordinary skill in the art.

[0036] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic illustrations of idealized exemplary embodiments and / or intermediate structures. As such, shape variations due to, for example, manufacturing techniques and / or tolerances are to be expected. Accordingly, the exemplary embodiments disclosed herein should not necessarily be construed as limited to the particular shapes shown in the figures, but will include deviations in shapes due to, for example, manufacturing. In this manner, the regions shown in the figures are schematic in nature, and the shapes of these regions may not reflect the actual shape of the regions of the device, and thus are not necessarily intended to be limiting.

[0037] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Terms such as those defined in a general dictionary should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0038] It will be understood that when an element or layer is referred to as being "on", "connected to" or "coupled to" another element or layer, it can be directly on, directly connected to or directly coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on", "directly connected to" or "directly coupled to" another element or layer, no intervening elements or layers are present. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0039] For ease of description, spatial relative terms, such as "under", "below", "lower", "above", and "upper", may be used herein to describe the relationship of one element or feature to another (other) element or (other) feature as shown in the figures. It will be understood that the spatial relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is flipped, an element described as "under" or "below" another element or feature will then be oriented "above" the other element or feature. Thus, the exemplary term "under" can include both an orientation of above and below. The device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and the spatial relative descriptors used herein may be interpreted accordingly.

[0040] It will be understood that although terms such as "first", "second", etc. may be used herein to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, a first element, first component, first region, first layer, or first part discussed below may be referred to as a second element, second component, second region, second layer, or second part without departing from the teachings of the inventive concept.

[0041] Hereinafter, exemplary embodiments of the invention will be described with reference to the accompanying drawings.

[0042] Figure 1 is a perspective view of a display device according to an exemplary embodiment of the invention. Figure 2 is Figure 1 an exploded view of the display device of

[0043] Referring to Figure 1 and Figure 2 , the display device 1 may display an image. For example, the display device 1 may be an organic light emitting diode (OLED) display device, a liquid crystal display (LCD) device, a plasma display panel (PDP) device, a field emission display (FED) device, or an electrophoretic display (EPD) device. Hereinafter, the display device 1 will be described as an OLED display device, for example, but the inventive concept is not limited thereto.

[0044] The display device 1 can be applied not only to portable electronic devices (such as mobile phones, smartphones, tablet personal computers (PCs), smartwatches, watch phones, mobile communication terminals, electronic notebooks, e-book readers, portable multimedia players (PMPs), navigation devices, or ultra-mobile PCs (UMPCs)), but also to various other products (such as televisions (TVs), notebook computers, monitors, billboards, or Internet of Things (IoT) devices).

[0045] The display device 1 may include a main display surface 10 and a plurality of sub-display surfaces 11 to 14.

[0046] The main display surface 10 may generally have a plate shape and may be disposed on one plane of the display device 1, and may occupy the largest area (or size) among all the display surfaces of the display device 1. For example, the main display surface 10 may be located on the top surface of the display device 1. The main display surface 10 may have various planar shapes such as a polygonal shape (e.g., a rectangular shape), a circular shape, or an oval shape.

[0047] The plurality of sub-display surfaces 11 to 14 may be located on planes different from the main display surface 10. Each of the plurality of sub-display surfaces 11 to 14 may have an area smaller than the area of the main display surface 10, and the plurality of sub-display surfaces 11 to 14 may be located on different planes from each other. The plurality of sub-display surfaces 11 to 14 may be connected to the side edges of the main display surface 10, and may be bent or folded from the main display surface 10 (or from the side edges of the main display surface 10).

[0048] For example, in the case where the main display surface 10 has a rectangular shape, the display device 1 may include a first sub-display surface 11 to a fourth sub-display surface 14, and the first sub-display surface 11 to the fourth sub-display surface 14 may be connected to the four side edges of the main display surface 10.

[0049] The first sub-display surface 11 may be connected to the first long side edge of the main display surface 10, and may be bent vertically from the main display surface 10 to form the left side surface of the display device 1. Similarly, the second sub-display surface 12 may be connected to the second long side edge of the main display surface 10, and may be bent vertically from the main display surface 10 to form the right side surface of the display device 1. The third sub-display surface 13 may be connected to the first short side edge of the main display surface 10 to form the upper side surface of the display device 1, and the fourth sub-display surface 14 may be connected to the second short side edge of the main display surface 10 to form the lower side surface of the display device 1.

[0050] In this case, the display device 1 may be a three-dimensional display device capable of displaying images on its top surface and side surfaces. Figure 2The bottom surface of the display device 1 is shown not to include a display surface, but the inventive concept is not limited thereto. Optionally, the display device 1 may include a bottom surface capable of displaying an image.

[0051] The display device 1 may include a display area DA and a non-display area NDA. The display area DA, which is an area where an image is displayed, may include a plurality of pixels PX that are the smallest units for displaying an image. The non-display area NDA, which is an area where no image is displayed, may not include the pixels PX, and the non-display area NDA will be described in detail later.

[0052] The display area DA may include a main display area DA0 and first to fourth sub-display areas DA1 to DA4.

[0053] The main display area DA0 may be located on the main display surface 10. For example, the main display surface 10 may only include the main display area DA0. The first sub-display area DA1 may be located on the first sub-display surface 11 and may be connected to the main display area DA0. Similarly, the second to fourth sub-display areas DA2 to DA4 may be located on the second to fourth sub-display surfaces 12 to 14, respectively, and may be connected to the main display area DA0.

[0054] In the developed view of the display device 1, the non-display area NDA may be provided along the side edges of the display area DA (or along the outermost edges of the display area DA including the main display surface 10 and the first to fourth sub-display surfaces 11 to 14). In the non-display area NDA, driving wirings and driving circuits may be provided. The non-display area NDA may include decorative ink and a black matrix for preventing light leakage, but the inventive concept is not limited thereto.

[0055] The non-display area NDA may include first to fourth non-display areas NDA1 to NDA4 (or first to fourth sub-non-display areas NDA1 to NDA4). The first non-display area NDA1 may be located on the first sub-display surface 11. Similarly, the second to fourth non-display areas NDA2 to NDA4 may be located on the second to fourth sub-display surfaces 12 to 14, respectively.

[0056] The non-display area NDA may include first to fourth corner wings 21 to 24. The first to fourth corner wings 21 to 24 may be provided adjacent to the corners of the main display surface 10 (where the paired adjacent side edges of the main display surface 10 meet). Except for the positions of the first to fourth corner wings 21 to 24, they may be substantially the same. Hereinafter, the characteristics of the first to fourth corner wings 21 to 24 will be described taking the first corner wing 21 as an example.

[0057] The first corner wing 21 can protrude outward from one of the corners of the main display surface 10. The first corner wing 21 can be disposed between the first sub-display surface 11 and the fourth sub-display surface 14 (or between the first sub-display area DA1 and the fourth sub-display area DA4), and can soften the angle between the first sub-display surface 11 and the fourth sub-display surface 14 into an obtuse angle. One end of the first corner wing 21 can be disposed on the first sub-display surface 11, and the other end of the first corner wing 21 can be disposed on the fourth sub-display surface 14.

[0058] The first corner wing 21 can provide a space for arranging signal wirings or for signal wirings to pass through. In the case where the first sub-display surface 11 and the fourth sub-display surface 14 are bent, the first corner wing 21 can be folded inward (i.e., in the direction toward the internal space of the display device 1 or toward the center of gravity of the display device 1). In this case, the first corner wing 21 can be bent along the bending line 20 such that the two ends of the first corner wing 21 adjacent to the first sub-display surface 11 and the fourth sub-display surface 14 can face each other. The two ends of the first corner wing 21 can be placed in contact with each other or can be joined together by a bonding layer or the like.

[0059] When the first sub-display surface 11 and the fourth sub-display surface 14 are bent, since the first corner wing 21 is folded inward, the first corner wing 21 may not be exposed. Similarly, the second corner wing 22, the third corner wing 23, and the fourth corner wing 24 may also not be exposed. Therefore, the first corner wing 21 to the fourth corner wing 24 can be included in the non-display area NDA.

[0060] The non-display area NDA may further include a driving area 30, and the driving area 30 can be connected to at least one of the first sub-display surface 11 to the fourth sub-display surface 14. For example, the driving area 30 can be connected to one side of the fourth sub-display surface 14 (e.g., the lower side of the fourth sub-display surface 14 in the developed view of the display device 1).

[0061] As Figure 1 shown, when the fourth sub-display surface 14 is bent vertically from the main display surface 10, the driving area 30 can be further bent vertically from the fourth sub-display surface 14 (i.e., bent at an angle of 180° with respect to the main display surface 10), and thus can be disposed below the main display surface 10 in the thickness direction of the main display surface 10. The driving area 30 can be superimposed on the main display surface 10 and can be parallel to the main display surface 10.

[0062] The display device 1 may include a driver chip 40 (or a pad (or referred to as "bond pad", "pad") portion in which the driver chip 40 is provided and electrically connected to the driver chip 40), and the driver chip 40 may be provided in the driving region 30. The driver chip 40 may generate a driving signal for driving the pixel PX and may provide the generated driving signal to the display area DA (or to the pixel PX). For example, the driver chip 40 may generate a data signal for determining the emission luminance of the pixel PX, and may provide the data signal to the pixel PX via driving wirings (not shown) formed in the driving region 30 and via data wirings (not shown) formed in the main display surface 10 and the first to fourth sub-display surfaces 11 to 14.

[0063] The display device 1 may further include a touch driving circuit (not shown). The touch driving circuit may be connected to the touch electrodes of the touch sensing layer TSL ( Figure 3 ). The touch driving circuit applies a driving signal to the touch electrodes and measures the static capacitance of the touch electrodes. The driving signal may be a signal having a plurality of driving pulses. The touch driving circuit can not only determine the presence of a touch input based on the static capacitance of the touch electrodes, but also calculate the touch coordinates of the position where the touch input enters.

[0064] Figure 3 is a cross-sectional view taken along the Figure 2 line III-III'.

[0065] Referring to Figure 3 , the display device 1 may include a substrate 101, a thin film transistor (TFT) layer TFTL, a light emitting element layer EML, a thin film encapsulation layer TFEL, and a touch sensing layer TSL.

[0066] The substrate 101 may be a flexible substrate that can be bent, folded, or curled. For example, the flexible substrate may include polyether sulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), cellulose triacetate (CAT), cellulose acetate propionate (CAP), or a combination thereof.

[0067] The TFT layer TFTL may be provided on the substrate 101. In the TFT layer TFTL, TFTs of the pixel PX, scan lines, data lines, power lines, scan control lines, and link lines connecting pads and data lines may be formed. Each of the TFTs of the pixel PX may include a gate electrode, a semiconductor layer, a source electrode, and a drain electrode.

[0068] The TFT layer TFTL can be disposed in the display area DA and the non-display area NDA. Specifically, the TFTs, scan lines, data lines, and power lines of the pixel PX can be disposed in the display area DA, and the scan control lines and link lines can be disposed in the non-display area NDA.

[0069] The light-emitting element layer EML can be disposed on the TFT layer TFTL. The light-emitting element layer EML can include the pixel PX and a pixel defining layer 176 ( Figure 10 ) that defines the pixel PX. Each pixel PX includes a first electrode, an emission layer, and a second electrode. The emission layer can be an organic emission layer including an organic material. In this case, the emission layer can include a hole transport layer, an organic light-emitting layer, and an electron transport layer. In response to a predetermined voltage applied to the first electrode via the TFT layer TFTL and a cathode voltage applied to the second electrode, holes and electrons can move from the hole transport layer and the electron transport layer to the organic light-emitting layer, and can be combined together in the organic light-emitting layer to emit light. The pixel PX of the light-emitting element layer EML can be disposed in the display area DA.

[0070] The thin film encapsulation layer TFEL can be disposed on the light-emitting element layer EML. The thin film encapsulation layer TFEL prevents oxygen or moisture from penetrating into the light-emitting element layer EML. To this end, the thin film encapsulation layer TFEL can include at least one inorganic film. The inorganic film can include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, but the inventive concept is not limited thereto. In addition, the thin film encapsulation layer TFEL protects the light-emitting element layer EML from foreign substances such as dust. To this end, the thin film encapsulation layer TFEL can include at least one organic film. The organic film can include an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a PI resin, but the inventive concept is not limited thereto.

[0071] The thin film encapsulation layer TFEL can be disposed in both the display area DA and the non-display area NDA. Specifically, the thin film encapsulation layer TFEL can be disposed to cover the light-emitting element layer EML in both the display area DA and the non-display area NDA and can be disposed to cover the TFT layer TFTL in the non-display area NDA.

[0072] The touch sensing layer TSL can be disposed on the thin film encapsulation layer TFEL. Since the touch sensing layer TSL can be directly disposed on the thin film encapsulation layer TFEL, the thickness of the display device 1 can be reduced as compared with the case where an additional touch panel including the touch sensing layer TSL is attached to the thin film encapsulation layer TFEL.

[0073] The touch sensing layer TSL can include touch electrodes for capacitively detecting a touch input from a user and touch lines connecting the touch electrodes. For example, the touch sensing layer TSL can detect a touch input from a user in a self-capacitance mode or a mutual-capacitance mode.

[0074] A cover window may be additionally provided on the touch sensing layer TSL. In this case, the touch sensing layer TSL and the cover window may be attached to each other through a transparent adhesive member. Hereinafter, the touch sensing layer TSL will be described.

[0075] Figure 4 is a plan view of a touch sensing layer according to an exemplary embodiment of the invention. Figure 5 is Figure 4 an enlarged plan view of the area FF1 of

[0076] Referring to Figure 4 and Figure 5 , the touch sensing layer TSL includes a touch sensing area TSA for detecting a touch input from a user and a touch peripheral area TPA provided on the periphery of the touch sensing area TSA.

[0077] A first touch signal line TL1, a second touch signal line TL2, a third touch signal line RL, and a touch electrode pad TP may be provided in the touch peripheral area TPA.

[0078] A first end of the first touch signal line TL1 may be connected to a first touch electrode TE provided in the touch sensing area TSA. A second end of the first touch signal line TL1 may be connected to some of the touch electrode pads TP provided in the touch pad area. That is, the first touch signal line TL1 connects the first touch electrode TE provided in the touch sensing area TSA of the fourth sub-display area DA4 and some of the touch electrode pads TP provided in the touch pad area.

[0079] A first end of the second touch signal line TL2 may be connected to a first touch electrode TE provided in the touch sensing area TSA of the third sub-display area DA3. A second end of the second touch signal line TL2 may be connected to some of the touch electrode pads TP provided in the touch pad area via a third non-display area NDA3 and a first non-display area NDA1. That is, the second touch signal line TL2 connects the first touch electrode TE provided in the touch sensing area TSA of the third sub-display area DA3 and some of the touch electrode pads TP provided in the touch pad area.

[0080] A first end of the third touch signal line RL may be connected to a second touch electrode RE provided in the touch sensing area TSA of the second sub-display area DA2. A second end of the third touch signal line RL may be connected to other touch electrode pads TP provided in the touch pad area. That is, the third touch signal line RL connects the second touch electrode RE provided in the touch sensing area TSA of the second sub-display area DA2 and other touch electrode pads TP provided in the touch pad area.

[0081] The touch electrode pad TP can be disposed on one side of the display device 1. The touch circuit board can be attached to the touch electrode pad TP via an anisotropic conductive film. As a result, the touch electrode pad TP can be electrically connected to the touch circuit board.

[0082] The touch sensing area TSA can be disposed in the display area DA and can include a first touch electrode TE, a second touch electrode RE, and a connection electrode BE.

[0083] The first touch electrode TE can be spaced apart from the second touch electrode RE.

[0084] The first touch electrode TE can be arranged in a plurality of columns along the second direction W2, and the second touch electrode RE can be arranged in a plurality of rows along the first direction W1. In each column of the plurality of columns, the first touch electrode TE can be electrically connected along the first direction W1. In each row of the plurality of rows, the second touch electrode RE can be electrically connected along the second direction W2.

[0085] The first touch electrode TE and the second touch electrode RE can be formed in a rhombus shape or a triangle shape in a plan view. Specifically, the first touch electrode TE and the second touch electrode RE can have a triangle shape near the edge of the touch sensing area TSA in a plan view and can have a rhombus shape in the remaining part of the touch sensing area TSA in a plan view.

[0086] As Figure 5 shown, the first touch electrode TE and the second touch electrode RE can be formed as a mesh-type electrode. In the case where the touch sensing layer TSL including the first touch electrode TE and the second touch electrode RE is directly formed on the thin film encapsulation layer TFEL, a very large parasitic capacitance will be generated between the second electrode of the light emitting element layer EML and the first touch electrode TE or the second touch electrode RE of the touch sensing layer TSL because the second electrode of the light emitting element layer EML is too close to the first touch electrode TE or the second touch electrode RE. Therefore, as Figure 5 shown, the first touch electrode TE or the second touch electrode RE can preferably be formed as a mesh-type electrode instead of a non-patterned electrode of a transparent oxide conductive layer (such as an indium tin oxide (ITO) layer or an indium zinc oxide (IZO) layer).

[0087] As Figure 10 shown, the first touch electrode TE and the second touch electrode RE can be stacked with the pixel defining layer 176. As a result, a reduction in the size of the opening of the pixel PX can be prevented.

[0088] The planar shape of the first touch electrode TE and the second touch electrode RE in the touch sensing area TSA is not particularly limited.

[0089] To prevent short - circuiting at the intersection between the first touch electrode TE and the second touch electrode RE, adjacent first touch electrodes TE paired along the first direction W1 can be electrically connected by a connection electrode BE through a first contact hole CNT1. In this case, the first touch electrode TE and the second touch electrode RE can be provided in the same layer, and the connection electrode BE can be provided in a different layer from the first touch electrode TE and the second touch electrode RE. Thus, the first touch electrodes TE electrically connected along the first direction W1 can be electrically insulated from the second touch electrodes RE electrically connected along the second direction W2.

[0090] For example, the first touch electrode TE, the second touch electrode RE, and the connection electrode BE can be stacked with the dummy pattern DP ( Figure 6 ), the connection wiring 146 ( Figure 6 ), or in the gap G between the dummy patterns DP ( Figure 6 ). That is, the gap G formed in the display area DA can be blocked by the first touch electrode TE, the second touch electrode RE, and the connection electrode BE. As a result, reflection of external light by the gap G can be prevented, and smudges caused by the gap G can be prevented from being visible. This will be described in detail later.

[0091] Hereinafter, signal wirings and connection wirings for transmitting drive signals will be described.

[0092] Figure 6 is Figure 1 a plan view of the display device. Figure 7 is a cross - sectional view taken along line VII - VII' of Figure 6 the display device. Figure 8 is Figure 6 an enlarged plan view of region A of the display device. Figure 9 is a plan view showing how the touch - sensing layer is arranged on the structure of Figure 8 the display device. Figure 10 is a cross - sectional view taken along line X - X' of Figure 9 the display device.

[0093] Referring to Figures 6 to 10 , the display device 1 can include a data wiring 136, a connection wiring 146, a drive wiring 60, and a dummy pattern DP.

[0094] The display area DA of the display device 1 can include a first area DAA and a second area DAB. The first area DAA can be an area where the connection wiring 146 is provided. The second area DAB can occupy the remaining part of the display area DA.

[0095] The data wirings 136, connection wirings 146, driving wirings 60, and dummy patterns DP may be symmetrically arranged with respect to a reference axis (not shown) extending along the first direction W1 and passing through the center of the display device 1. The data wirings 136, connection wirings 146, driving wirings 60, and dummy patterns DP will be described below by taking all the data wirings 136, connection wirings 146, driving wirings 60, and dummy patterns DP that are relatively adjacent to the first sub-display surface 11 as an example.

[0096] The data wirings 136 may include a first data wiring D1 to an m-th data wiring Dm (or a first signal wiring D1 to an m-th signal wiring Dm) (where m is an integer greater than or equal to 3).

[0097] The first data wiring D1 to the m-th data wiring Dm may extend along the first direction W1, and may be sequentially arranged at a predetermined distance from each other along the second direction W2. The first data wiring D1 to the m-th data wiring Dm may extend across the display area DA. The first data wiring D1 to the k-th data wiring Dk (where k is an integer greater than or equal to 2 and less than m) may be provided together in a single display surface. In the following description, it is assumed that k is 7 and m is greater than 14.

[0098] The connection wirings 146 may electrically connect some of the data wirings 136 and some of the driving wirings 60. The connection wirings 146 may be provided in a different layer from the data wirings 136, and may be insulated from the data wirings 136 by an insulating layer, which will be described later with reference to Figure 8 to describe the connection wirings 146.

[0099] The connection wirings 146 may include a first connection wiring DM1 to a k-th connection wiring DMk corresponding to the first data wiring D1 to the m-th data wiring Dm. When k = 7, the connection wirings 146 may include a first connection wiring DM1 to a seventh connection wiring DM7. The first connection wiring DM1 to the seventh connection wiring DM7 may respectively correspond to the first data wiring D1 to the seventh data wiring D7 provided on the first sub-display surface 11.

[0100] The first connection wiring DM1 to the k-th connection wiring DMk may extend from the fourth non-display area NDA4 of the fourth sub-display surface 14 (for example, from the lower part of the fourth non-display area NDA4) via the display area DA to the first end of the data wiring 136 (for example, extend to the lower part and the first corner wing 21 of the first non-display area NDA1 of the first sub-display surface 11). The first connection wiring DM1 to the k-th connection wiring DMk may be spaced apart from each other by a predetermined distance. The distance between the first connection wiring DM1 to the k-th connection wiring DMk may be the same as the distance between the data wirings 136.

[0101] The first connection wiring DM1 to the k-th connection wiring DMk may first extend along a first direction W1 (e.g., an upward direction) and then along a second direction W2 (e.g., a leftward direction) from a fourth non-display area NDA4 of the fourth sub-display surface 14 (e.g., the lower portion of the fourth non-display area NDA4) to reach a first end of the data wiring 136 (i.e., extend to the lower portion of the first non-display area NDA1 of the first sub-display surface 11).

[0102] That is, each of the first connection wiring DM1 to the k-th connection wiring DMk may include a first portion extending from the fourth non-display area NDA4 along the first direction W1, a second portion extending from an end of the first portion along the second direction W2, and a third portion extending from an end of the second portion along the first direction W1 (or along a direction opposite to the first direction W1).

[0103] As Figure 6 shown, the first portion of each of the first connection wiring DM1 to the k-th connection wiring DMk may overlap with one of the data wirings 136 in the display area DA. For example, the first portion of the first connection wiring DM1 may overlap with the eighth data wiring D8, and the first portion of the seventh connection wiring DM7 may overlap with the fourteenth data wiring D14. However, the inventive concept is not limited to this example. In another example, the first portions of the first connection wiring DM1 to the k-th connection wiring DMk may not overlap with the data wiring 136 in the display area DA.

[0104] In addition, as Figure 6 shown, the third portion of each of the first connection wiring DM1 to the k-th connection wiring DMk may overlap with one of the data wirings 136. For example, the third portion of the first connection wiring DM1 may overlap with the seventh data wiring D7, and the third portion of the second connection wiring DM2 may overlap with the sixth data wiring D6.

[0105] The connection wiring 146 is shown as being bent at a right angle, but the inventive concept is not limited thereto.

[0106] The connection wirings 146 may not intersect with each other, and instead, the connection wirings 146 relatively far from the first corner wing 21 may be arranged to bypass the connection wirings 146 adjacent to the first corner wing 21. For example, the second connection wiring DM2 may be arranged to bypass the first connection wiring DM1. That is, as the connection wiring 146 gets closer to, for example, the first corner wing 21, the position where the connection wiring 146 is bent becomes closer to the driving area 30, and as the connection wiring 146 gets farther from the first corner wing 21, the position where the connection wiring 146 is bent becomes farther from the driving area 30.

[0107] Since the connection wiring 146 that is relatively far from the first corner wing 21 is arranged to bypass the connection wiring 146 that is relatively close to the first corner wing 21, the connection wiring 146 can have different lengths. For example, the second connection wiring DM2 can be longer than the first connection wiring DM1. That is, the (i + 1)-th connection wiring DMi+1 (where i is a positive integer) can be longer than the i-th connection wiring DMi.

[0108] For example, the connection wiring 146 can have the same resistance. For example, if the second connection wiring DM2 is longer than the first connection wiring DM1, the first connection wiring DM1 can have a smaller width than the second connection wiring DM2.

[0109] The connection wiring 146 can be directly and one-to-one connected to the data wiring 136 via second contact holes CNT2 formed in the non-display area NDA (specifically, formed in the lower part of the first non-display area NDA1 and in the first corner wing 21). For example, the first connection wiring DM1 can be electrically connected to the seventh data wiring D7, and the seventh connection wiring DM7 can be electrically connected to the first data wiring D1. That is, the i-th connection wiring DMi can be electrically connected to the (k + 1 - i)-th data wiring Dk+1-i. For example, as Figure 7 shown, the fifth data wiring D5 can be provided on the third insulating layer 173, and the third connection wiring DM3 to the sixth connection wiring DM6 can be provided on the fourth insulating layer 174 and can be insulated from the fifth data wiring D5 through the fourth insulating layer 174. The third connection wiring DM3 can extend to the first end of the fifth data wiring D5 and can be electrically connected to the fifth data wiring D5 via a second contact hole CNT2 that exposes the first end of the fifth data wiring D5 through the fourth insulating layer 174.

[0110] The driving wiring 60 includes driving wirings (or pad wirings or pad connection wirings) 61a to 67a and 61b to 67b, and the driving wirings 61a to 67a and 61b to 67b can extend from the driver chip 40 (or from the pad portion in which the driver chip 40 is provided) to the fourth non-display area NDA4 of the fourth sub-display surface 14 (or extend to the tangent 51 between the driving area 30 and the fourth sub-display surface 14).

[0111] The driving wirings 61a to 67a and 61b to 67b can be divided into a first driving wiring group 60a and a second driving wiring group 60b.

[0112] The driving wirings 61a to 67a included in the first driving wiring group 60a may be provided in a different layer from the driving wirings 61b to 67b included in the second driving wiring group 60b and may intersect the driving wirings 61b to 67b in a plan view. The driving wirings 61a to 67a may be insulated from the driving wirings 61b to 67b through an insulating layer.

[0113] The driving wirings 61a to 67a may be electrically connected to the first data wiring D1 to the seventh data wiring D7 through the first connection wiring DM1 to the seventh connection wiring DM7 provided on the first sub-display surface 11, respectively. The driving wirings 61b to 67b may be electrically connected to the eighth data wiring D8 to the fourteenth data wiring D14 provided on the main display surface 10, respectively.

[0114] As described above, the display device 1 may include the connection wiring 146 provided to pass through the display area DA, and the image signal may be provided from the driver chip 40 to the data wiring 136 provided on the first sub-display surface 11 (and on the second sub-display surface 12) through the connection wiring 146. Therefore, no additional invalid space is required to directly connect the data wiring 136 provided on the first sub-display surface 11 (and on the second sub-display surface 12) to the driving wiring 60. As a result, an increase in the invalid space can be prevented.

[0115] In addition, since the second contact hole CNT2 that electrically connects the data wiring 136 and the connection wiring 146 is formed in the non-display area NDA, the second contact hole CNT2 can be prevented from interfering with the pixel PX (or the driving signal provided to the pixel PX). Therefore, the display quality of the display device 1 can be improved.

[0116] Hereinafter, the dummy pattern DP will be described.

[0117] The dummy pattern DP may be provided in the first area DAA and the second area DAB of the display area DA. The dummy pattern DP may be provided in the same layer as the connection wiring 146. The dummy pattern DP may include, for example, metal, alloy, metal nitride, conductive metal oxide, and / or transparent conductive material, and these materials may be used alone or in combination with each other. For example, the dummy pattern DP may include the same material as the connection wiring 146, and the dummy pattern DP and the connection wiring 146 may be formed simultaneously.

[0118] For example, the dummy pattern DP may include a first dummy pattern DP1 and a second dummy pattern DP2, and the first dummy pattern DP1 and the second dummy pattern DP2 may be provided in the first area DAA.

[0119] The first dummy pattern DP1 can extend in a first direction W1 in a planar view and can be set parallel to each other.

[0120] The first dummy pattern DP1 can be set between the second part of the first connection wiring DM1 and the second part of the k-th connection wiring DMk. For example, the first dummy pattern DP1 can be set between the second part of the first connection wiring DM1 and the second part of the second connection wiring DM2, and between the second part of the sixth connection wiring DM6 and the second part of the seventh connection wiring DM7.

[0121] As Figure 6 shown, the first dummy pattern DP1 can be superimposed on the first data wiring D1 to the m-th data wiring Dm in a planar view. Therefore, the first dummy pattern DP1 can be aligned with the first connection wiring DM1 to the k-th connection wiring DMk. For example, the first dummy pattern DP1 superimposed on the first data wiring D1 can be aligned with the seventh connection wiring DM7, and the first dummy pattern DP1 superimposed on the seventh data wiring D7 can be aligned with the first connection wiring DM1.

[0122] The first dummy pattern DP1 can be set parallel to the first part of the first connection wiring DM1 to the k-th connection wiring DMk. Additionally, the first dummy pattern DP1 can be set parallel to the third part of the first connection wiring DM1 to the k-th connection wiring DMk.

[0123] The distance between the first dummy patterns DP1 can be the same as the distance between the first connection wiring DM1 to the k-th connection wiring DMk along the second direction W2.

[0124] The second dummy pattern DP2 can extend in a second direction W2 in a planar view and can be set parallel to each other.

[0125] The second dummy pattern DP2 can be set between the first part of the first connection wiring DM1 and the first part of the k-th connection wiring DMk, and between the third part of the first connection wiring DM1 and the third part of the k-th connection wiring DMk. For example, the second dummy pattern DP2 can be set between the first part of the first connection wiring DM1 and the first part of the second connection wiring DM2, and between the first part of the sixth connection wiring DM6 and the first part of the seventh connection wiring DM7. Additionally, the second dummy pattern DP2 can be set between the third part of the first connection wiring DM1 and the third part of the second connection wiring DM2, and between the third part of the sixth connection wiring DM6 and the third part of the seventh connection wiring DM7.

[0126] The second dummy pattern DP2 can be set to be parallel to the second parts of the first connection wiring DM1 to the k-th connection wiring DMk. Additionally, the second dummy pattern DP2 can be aligned with the second parts of the first connection wiring DM1 to the k-th connection wiring DMk.

[0127] The distance between the second dummy patterns DP2 can be the same as the distance between the first connection wiring DM1 to the k-th connection wiring DMk along the first direction W1.

[0128] For example, the first dummy pattern DP1 can have an average length greater than the average length of the second dummy pattern DP2.

[0129] For example, the dummy pattern DP can further include a third dummy pattern DP3 and a fourth dummy pattern DP4, and the third dummy pattern DP3 and the fourth dummy pattern DP4 can be disposed in the second region DAB.

[0130] The third dummy pattern DP3 can extend along the first direction W1 in a plan view and can be set to be parallel to each other. A plurality of the third dummy patterns DP3 can be disposed as island patterns between the fourth dummy patterns DP4.

[0131] As Figure 6 shown, the third dummy pattern DP3 can be superimposed on the first data wiring D1 to the m-th data wiring Dm in a plan view. Accordingly, the third dummy pattern DP3 can be aligned with the first connection wiring DM1 to the k-th connection wiring DMk and / or aligned with the first dummy pattern DP1. For example, the third dummy pattern DP3 superimposed on the first data wiring D1 can be aligned with the seventh connection wiring DM7, and the third dummy pattern DP3 superimposed on the seventh data wiring D7 can be aligned with the first connection wiring DM1. Additionally, the third dummy pattern DP3 superimposed on the first data wiring D1 can be aligned with the first dummy pattern DP1 superimposed on the first data wiring D1.

[0132] The third dummy pattern DP3 can be set to be parallel to the first parts of the first connection wiring DM1 to the k-th connection wiring DMk. Additionally, the third dummy pattern DP3 can be set to be parallel to the third parts of the first connection wiring DM1 to the k-th connection wiring DMk. Additionally, the third dummy pattern DP3 can be set to be parallel to the first dummy pattern DP1.

[0133] The distance between the third dummy patterns DP3 can be the same as the distance between the first connection wiring DM1 to the k-th connection wiring DMk along the second direction W2. Additionally, the distance between the third dummy patterns DP3 can be the same as the distance between the first dummy patterns DP1 along the second direction W2.

[0134] The length of the third dummy pattern DP3 along the first direction W1 may be the same as the length of the first dummy pattern DP1 along the first direction W1.

[0135] The fourth dummy patterns DP4 may extend in a second direction W2 in a plan view and may be arranged parallel to each other.

[0136] The fourth dummy patterns DP4 may be arranged parallel to a second portion of the first connection wiring DM1 to the k-th connection wiring DMk. Additionally, the fourth dummy patterns DP4 may be arranged parallel to the second dummy pattern DP2.

[0137] The distance between the fourth dummy patterns DP4 may be the same as the distance between the first connection wiring DM1 to the k-th connection wiring DMk along the first direction W1. Additionally, the distance between the fourth dummy patterns DP4 may be the same as the distance between the second dummy patterns DP2 along the first direction W1.

[0138] For example, the third dummy pattern DP3 may have an average length smaller than the average length of the fourth dummy pattern DP4.

[0139] As described above, since the dummy pattern DP includes the first dummy pattern DP1, the second dummy pattern DP2, the third dummy pattern DP3, and the fourth dummy pattern DP4, the dummy pattern DP and the connection wiring 146 may form a lattice pattern shape in and across the display area DA. Accordingly, any difference in the shape of the pattern between the first area DAA and the second area DAB can be minimized, and as a result, the connection wiring 146 can be prevented from becoming visible.

[0140] For example, the dummy pattern DP may not overlap with the first connection wiring DM1 to the k-th connection wiring DMk in a plan view. Accordingly, a gap G may be formed between the dummy pattern DP and the first connection wiring DM1 to the k-th connection wiring DMk. For example, as Figure 7 and Figure 8 shown, a gap G may be formed between the first dummy pattern DP1 and a second portion of the first connection wiring DM1 to a second portion of the k-th connection wiring DMk. Additionally, a gap G may be formed between the second dummy pattern DP2 and a first portion (and / or a third portion) of the first connection wiring DM1 to a first portion (and / or a third portion) of the k-th connection wiring DMk. Additionally, a gap G may be formed between the third dummy pattern DP3 and a second portion of the k-th connection wiring DMk.

[0141] The dummy patterns DP may not overlap with each other. Accordingly, gaps G may be formed between the dummy patterns DP. For example, the third dummy pattern DP3 may not overlap with the fourth dummy pattern DP4 in a plan view, and a gap G may be formed between the third dummy pattern DP3 and the fourth dummy pattern DP4. For example, the first dummy pattern DP1 may not overlap with the second dummy pattern DP2 in a plan view, and a gap G may be formed between the first dummy pattern DP1 and the second dummy pattern DP2.

[0142] For example, as Figure 9 shown, the gap G formed in the display device 1 may overlap with the first touch electrode TE, the second touch electrode RE, and the connection electrode BE. That is, the first touch electrode TE, the second touch electrode RE, and the connection electrode BE may block the gap G formed in the display area DA. Accordingly, reflection of external light by the gap G can be prevented, and stains caused by the gap G can be prevented from being visible. As a result, the display quality of the display device 1 can be further improved.

[0143] However, the arrangement in which the first touch electrode TE, the second touch electrode RE, and the connection electrode BE overlap with the gap G is not particularly limited and may vary.

[0144] Hereinafter, a cross-sectional structure of the display device 1 will be described.

[0145] Figure 10 is a cross-sectional view taken along the line X-X' of Figure 9 .

[0146] Referring to Figure 10 , the display device 1 may include a substrate 101, a buffer layer 102, a semiconductor layer 105, a first insulating layer 171, a first gate conductive layer 110, a second insulating layer 172, a second gate conductive layer 120, a third insulating layer 173, a first source / drain conductive layer 130, a fourth insulating layer 174, a second source / drain conductive layer 140, a fifth insulating layer 175, a first electrode layer 150, a light-emitting element layer EML ( Figure 3 ), and a second electrode layer 160. The TFTs of the pixel PX may be formed in the semiconductor layer 105, the first insulating layer 171, the first gate conductive layer 110, the second insulating layer 172, and the second gate conductive layer 120. Accordingly, the semiconductor layer 105, the first insulating layer 171, the first gate conductive layer 110, the second insulating layer 172, and the second gate conductive layer 120 may be collectively referred to as a "driving element layer".

[0147] The substrate 101 may support the layers disposed thereon. The substrate 101 may be formed of an insulating material. The substrate 101 may be formed of an inorganic material such as glass or quartz or may be formed of an organic material such as a PI resin. The substrate 101 may be a rigid substrate or a flexible substrate.

[0148] The buffer layer 102 may be disposed on the substrate 101. The buffer layer 102 may prevent the diffusion of impurity ions and the penetration of moisture or external air, and may perform a surface planarization function. The buffer layer 102 may include silicon nitride, silicon oxide, or silicon oxynitride. Depending on the type of the substrate 101 and how the substrate 101 is manufactured, the buffer layer 102 may not be provided.

[0149] The semiconductor layer 105 may be disposed on the buffer layer 102. The semiconductor layer 105 may form the channel of the TFT of the pixel PX. The semiconductor layer 105 may include polysilicon. The portion of the semiconductor layer 105 connected to the source electrode / drain electrode of the TFT of the pixel PX (e.g., the source region / drain region) may be doped with impurity ions (e.g., p-type impurity ions). A trivalent dopant such as boron (B) may be used as a source of the p-type impurity ions. The semiconductor layer 105 may include single-crystalline silicon, low-temperature polysilicon, amorphous silicon, or an oxide semiconductor (such as indium tin zinc oxide (ITZO) or indium gallium zinc oxide (IGZO)) instead of polysilicon.

[0150] The first insulating layer 171 may be disposed on the semiconductor layer 105. The first insulating layer 171 may be a gate insulating layer having a gate insulating function.

[0151] The first gate conductive layer 110 may be disposed on the first insulating layer 171. The first gate conductive layer 110 may include the gate electrode of the TFT. The first gate conductive layer 110 may include the first electrode of the storage capacitor.

[0152] The first gate conductive layer 110 may include at least one metal selected from molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu).

[0153] The second insulating layer 172 may be disposed on the first gate conductive layer 110. The second insulating layer 172 may be an interlayer insulating layer.

[0154] The second gate conductive layer 120 may be disposed on the second insulating layer 172. The second gate conductive layer 120 may include the second electrode of the storage capacitor. The second gate conductive layer 120 may be disposed to overlap the first gate conductive layer 110, and the second insulating layer 172 is disposed between the first gate conductive layer 110 and the second gate conductive layer 120, and thus a storage capacitor is formed. The second gate conductive layer 120 may include the same material as that of the first gate conductive layer 110.

[0155] The third insulating layer 173 may be disposed on the second gate conductive layer 120.

[0156] The first source / drain conductive layer 130 may be disposed on the third insulating layer 173. The first source / drain conductive layer 130 may include a source electrode 132, a drain electrode 131, and ( Figure 6 ) data wirings 136. The source electrode 132 and the drain electrode 131 may be electrically connected to the semiconductor layer 105 through contact holes that penetrate the second insulating layer 172 and the third insulating layer 173 to expose the semiconductor layer 105.

[0157] The first source / drain conductive layer 130 may include at least one metal selected from among Mo, Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Ca, Ti, Ta, W, and Cu. The first source / drain conductive layer 130 may be a single-layer film or a multi-layer film. For example, the first source / drain conductive layer 130 may be formed to have a stacked structure of Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo, or Ti / Cu.

[0158] The fourth insulating layer 174 may be disposed on the first source / drain conductive layer 130, and the second source / drain conductive layer 140 may be disposed on the fourth insulating layer 174.

[0159] The second source / drain conductive layer 140 may include connection wirings 146 (i.e., the first connection wiring DM1 to the k-th connection wiring DMk). The connection wirings 146 may be disposed to overlap the data wirings 136 (i.e., the first data wiring D1 to the m-th data wiring Dm) in a cross-sectional view.

[0160] The second source / drain conductive layer 140 may include dummy patterns DP. A gap G may be formed between the dummy patterns DP or between the dummy patterns DP and the connection wirings 146.

[0161] The second source / drain conductive layer 140 may include the same metal(s) as the first source / drain conductive layer 130.

[0162] The fifth insulating layer 175 may be disposed on the second source / drain conductive layer 140, and the first electrode layer 150 may be disposed on the fifth insulating layer 175. The first electrode layer 150 may include an anode electrode of the OLED, and the anode electrode may be electrically connected to the drain electrode 131 of the TFT through a contact hole that penetrates the fifth insulating layer 175 and the fourth insulating layer 174.

[0163] The light-emitting element layer EML may be disposed on the first electrode layer 150 and may include a pixel defining layer 176 and an organic layer EL. The pixel defining layer 176 may be disposed on the anode electrode and along the edges of each of the anode electrodes, and may include an opening exposing the first electrode layer 150.

[0164] The organic layer EL may be disposed in the opening of the pixel defining layer 176. The organic layer EL may include an organic light-emitting layer, a hole injection / transport layer, and an electron injection / transport layer. The second electrode layer 160 (or the cathode electrode of the OLED) may be disposed on the organic layer EL and on the pixel defining layer 176. The second electrode layer 160 may be a common electrode disposed in the entire display area DA of the display device 1.

[0165] The passivation layer 180 may be disposed on the second electrode layer 160. The passivation layer 180 may prevent moisture or oxygen from penetrating into the light-emitting element layer EML. The passivation layer 180 may include at least one inorganic film and / or at least one organic film. The inorganic film may include at least one inorganic material selected from, for example, Al x O y , TiO x , ZrO x , SiO x , AlO x N y , Al x N y , SiO x N y , Si x N y , ZnO x and Ta x O y among others. The organic film may be formed by polymerizing at least one monomer selected from the group consisting of pentabromophenyl acrylate, 2-(9H-carbazol-9-yl)ethyl methacrylate, N-vinylcarbazole, bis(methacryloylthienyl)sulfide, and zirconium acrylate. The organic film may be a planarization film.

[0166] The touch sensing layer TSL may be disposed on the passivation layer 180.

[0167] The touch sensing layer TSL may include a first touch conductive layer, a first touch insulating layer 191, a second touch conductive layer, and a second touch insulating layer 192. The touch sensing layer TSL may further include a buffer layer (not shown) disposed under the first touch conductive layer for forming the first touch conductive layer, the first touch insulating layer 191, the second touch conductive layer, and the second touch insulating layer 192, but the inventive concept is not limited thereto.

[0168] Each of the first touch conductive layer and the second touch conductive layer may have a single-layer structure or a multi-layer structure composed of two or more layers. When each of the first touch conductive layer and the second touch conductive layer is formed to have a single-layer structure, it may include a metal layer or a transparent conductive layer. The metal layer may include Mo, Ag, Ti, Cu, Al, or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as ITO, IZO, zinc oxide (ZnO), or ITZO. The transparent conductive layer may also include a conductive polymer such as PEDOT, metal nanowires, or graphene. When each of the first touch conductive layer and the second touch conductive layer is formed to have a multi-layer structure, it may include a plurality of metal layers. The plurality of metal layers may have a three-layer structure of Ti / Al / Ti. When each of the first touch conductive layer and the second touch conductive layer is formed to have a multi-layer structure, it may include at least one metal layer and at least one transparent conductive layer.

[0169] The first touch conductive layer and the second touch conductive layer may have a mesh shape. In this case, the first touch conductive layer and the second touch conductive layer are not visible to the user.

[0170] The first touch conductive layer may include a connection electrode BE. The second touch conductive layer may include a first touch electrode TE and a second touch electrode RE. The first touch electrode TE may be connected to the connection electrode BE through a first contact hole CNT1 that penetrates the first touch insulating layer 191. Thus, short circuit at the intersection between the first touch electrode TE and the second touch electrode RE can be prevented.

[0171] To prevent a decrease in the aperture ratio of the pixel PX, the first touch electrode TE, the second touch electrode RE, and the connection electrode BE may be arranged to overlap with the pixel defining layer 176.

[0172] Each of the first touch insulating layer 191 and the second touch insulating layer 192 may have a single-layer structure or a multi-layer structure. Each of the first touch insulating layer 191 and the second touch insulating layer 192 may include an inorganic material, an organic material, or a combination thereof.

[0173] Each of the first touch insulating layer 191 and the second touch insulating layer 192 may include an organic film and / or an inorganic film. The inorganic film may include at least one of alumina, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The organic film may include at least one of acrylic resin, methacrylic resin, polyisoprene, ethylene resin, epoxy resin, polyurethane resin, cellulose resin, silicone resin, PI resin, PA resin, and perylene resin.

[0174] Hereinafter, a display device according to another exemplary embodiment of the invention will be described. Throughout the present disclosure, the same reference numerals denote the same elements, and thus, the description thereof will be omitted or at least simplified.

[0175] Figure 11 is a plan view of a display device according to another exemplary embodiment of the invention. Figure 12 is Figure 11 an enlarged plan view of region A of

[0176] Referring to Figure 11 and Figure 12 the display device 1_1 is different from the display device 1 of Figures 6 to 10 in the pattern of the arrangement of the dummy pattern DP_1.

[0177] Specifically, the dummy pattern DP_1 may include a third dummy pattern DP3' and a fourth dummy pattern DP4', and the third dummy pattern DP3' and the fourth dummy pattern DP4' may be disposed in a second region DAB of the display area DA.

[0178] The third dummy pattern DP3' may extend in a first direction W1 in a plan view and may be disposed parallel to each other.

[0179] The fourth dummy pattern DP4' may extend in a second direction W2 in a plan view and may be disposed parallel to each other. A plurality of fourth dummy patterns DP4' may be disposed in an island pattern between the third dummy patterns DP3'.

[0180] For example, the third dummy pattern DP3' may have an average length greater than the average length of the fourth dummy pattern DP4'.

[0181] For example, the dummy pattern DP_1 may not overlap with the first connection wiring DM1 to the k-th connection wiring DMk in a plan view. Thus, a gap G may be formed between the dummy pattern DP_1 and the first connection wiring DM1 to the k-th connection wiring DMk.

[0182] The dummy patterns DP_1 may not overlap with each other. Thus, a gap G may also be formed between the dummy patterns DP_1.

[0183] For example, as shown in Figure 12 the gap G formed in the display device 1_1 may overlap with the first touch electrode TE, the second touch electrode RE, and the connection electrode BE of the touch sensing layer TSL.

[0184] As described above, since the dummy pattern DP_1 includes the first dummy pattern DP1, the second dummy pattern DP2, the third dummy pattern DP3', and the fourth dummy pattern DP4', the dummy pattern DP_1 can form a lattice pattern shape in the display area DA together with the connection wiring 146. In addition, as described above, since the first touch electrode TE, the second touch electrode RE, and the connection electrode BE block the gap G formed in the display area DA, reflection of external light by the gap G can be prevented, and smudges caused by the gap G can be prevented from being visible.

[0185] Hereinafter, a display device according to another exemplary embodiment of the invention will be described.

[0186] Figure 13 is a plan view of a display device according to another exemplary embodiment of the invention. Figure 14 is Figure 13 an enlarged plan view of region A of

[0187] Referring to Figure 13 and Figure 14 the display device 1_2 is different from the display device 1 of Figures 6 to 10 in the pattern of the arrangement of the dummy pattern DP_2.

[0188] Specifically, the dummy pattern DP_2 may include a fifth dummy pattern DP5 provided in the second region DAB of the display area DA.

[0189] The fifth dummy pattern DP5 may be arranged in a lattice pattern in the second region DAB and span the second region DAB. That is, the fifth dummy pattern DP5 may include a plurality of column patterns extending in the first direction W1 and a plurality of row patterns extending in the second direction W2. The column patterns may be arranged to intersect and overlap with the row patterns. No gap may be formed in the second region DAB in which the fifth dummy pattern DP5 is provided. The gap G may be formed only at the interface between the first region DAA and the second region DAB between the fifth dummy pattern DP5 and the first connection wiring DM1 to the k-th connection wiring DMk.

[0190] As Figure 14 shown in, the gap G formed in the display area DA may overlap with the first touch electrode TE, the second touch electrode RE, and the connection electrode BE of the touch sensing layer TSL.

[0191] As described above, since the dummy pattern DP_2 includes a fifth dummy pattern DP5 formed in a lattice pattern shape, the fifth dummy pattern DP5 can form a lattice pattern shape in the display area DA together with the connection wiring 146. Additionally, as described above, since the first touch electrode TE, the second touch electrode RE, and the connection electrode BE block the gap G formed in the display area DA, reflection of external light by the gap G can be prevented, and smudges caused by the gap G can be prevented from being visible.

[0192] Hereinafter, a display device according to another exemplary embodiment of the invention will be described.

[0193] Figure 15 is a plan view of a display device according to another exemplary embodiment of the invention. Figure 16 is Figure 15 an enlarged plan view of region A of

[0194] Referring to Figure 15 and Figure 16 , the display device 1_3 is different from the display device 1 of Figures 6 to 10 in that the connection wiring 146' includes a protruding wiring pattern 146P and the dummy pattern DP_3 includes a first protruding dummy pattern DPP1 and a second protruding dummy pattern DPP2.

[0195] Specifically, the connection wiring 146' may include a protruding wiring pattern 146P located in a first region DAA of the display area DA. The protruding wiring pattern 146P may include a first protruding wiring pattern 146P1 protruding in a first direction W1, a second protruding wiring pattern 146P2 protruding in a direction opposite to the first direction W1, a third protruding wiring pattern 146P3 protruding in a second direction W2, and a fourth protruding wiring pattern 146P4 protruding in a direction opposite to the second direction W2.

[0196] The first protruding wiring pattern 146P1 may be parallel to the second protruding wiring pattern 146P2. The columns of the first protruding wiring pattern 146P1 may be aligned with the columns of the second protruding wiring pattern 146P2. The first protruding wiring pattern 146P1 and the second protruding wiring pattern 146P2 may be stacked with the first data wiring D1 to the m-th data wiring Dm.

[0197] The distance between the first protruding wiring patterns 146P1 may be the same as the distance along the second direction W2 between the first connection wiring DM1 to the k-th connection wiring DMk. Additionally, the distance between the first protruding wiring patterns 146P1 may be the same as the distance along the second direction W2 between the first data wiring D1 to the m-th data wiring Dm.

[0198] The distance between the second protruding wiring patterns 146P2 may be the same as the distance between the first protruding wiring patterns 146P1 in the second direction W2.

[0199] The third protruding wiring pattern 146P3 may be parallel to the fourth protruding wiring pattern 146P4. The rows of the third protruding wiring pattern 146P3 may be aligned with the rows of the fourth protruding wiring pattern 146P4.

[0200] The distance between the third protruding wiring patterns 146P3 may be the same as the distance between the first connection wiring DM1 to the k-th connection wiring DMk in the first direction W1.

[0201] The distance between the fourth protruding wiring patterns 146P4 may be the same as the distance between the third protruding wiring patterns 146P3 in the first direction W1.

[0202] The first protruding wiring pattern 146P1 and / or the second protruding wiring pattern 146P2 may form a right angle with the third protruding wiring pattern 146P3 and / or the fourth protruding wiring pattern 146P4.

[0203] The first protruding wiring pattern 146P1 and / or the second protruding wiring pattern 146P2 may have an average length greater than the average length of the third protruding wiring pattern 146P3 and / or the fourth protruding wiring pattern 146P4.

[0204] For example, the dummy pattern DP_3 may include a sixth dummy pattern DP6, a first protruding dummy pattern DPP1, and a second protruding dummy pattern DPP2 in the second region DAB of the display area DA, and the first protruding dummy pattern DPP1 and the second protruding dummy pattern DPP2 may protrude from the sixth dummy pattern DP6.

[0205] Specifically, the sixth dummy pattern DP6 may extend in the second direction W2, the first protruding dummy pattern DPP1 may protrude from the sixth dummy pattern DP6 in the first direction W1, and the second protruding dummy pattern DPP2 may protrude from the sixth dummy pattern DP6 in the opposite direction of the first direction W1.

[0206] The sixth dummy pattern DP6 may be parallel to the second part of the first connection wiring DM1 to the second part of the k-th connection wiring DMk.

[0207] The distance between the sixth dummy patterns DP6 may be the same as the distance between the first connection wiring DM1 to the k-th connection wiring DMk in the first direction W1. Additionally, the distance between the sixth dummy patterns DP6 may be the same as the distance between the third protruding wiring patterns 146P3 and / or the fourth protruding wiring patterns 146P4 in the first direction W1.

[0208] The first protruding dummy pattern DPP1 can be parallel to the second protruding dummy pattern DPP2. The columns of the first protruding dummy pattern DPP1 can be aligned with the columns of the second protruding dummy pattern DPP2. Additionally, the columns of the first protruding dummy pattern DPP1 and the columns of the second protruding dummy pattern DPP2 can be aligned with the columns of the first protruding wiring pattern 146P1 and the columns of the second protruding wiring pattern 146P2.

[0209] The first protruding dummy pattern DPP1 and the second protruding dummy pattern DPP2 can be stacked with the first data wiring D1 to the m-th data wiring Dm.

[0210] The distance between the first protruding dummy patterns DPP1 can be the same as the distance along the second direction W2 between the first connection wiring DM1 to the k-th connection wiring DMk. Additionally, the distance between the first protruding dummy patterns DPP1 can be the same as the distance along the second direction W2 between the first data wiring D1 to the m-th data wiring Dm. Additionally, the distance between the first protruding dummy patterns DPP1 can be the same as the distance along the second direction W2 between the first protruding wiring pattern 146P1 and / or between the second protruding wiring pattern 146P2.

[0211] The distance between the second protruding dummy patterns DPP2 can be the same as the distance along the second direction W2 between the first protruding dummy patterns DPP1.

[0212] For example, the first protruding wiring pattern 146P1 may not be stacked with the second protruding wiring pattern 146P2. Accordingly, a gap G can be formed between the first protruding wiring pattern 146P1 and the second protruding wiring pattern 146P2.

[0213] Additionally, the third protruding wiring pattern 146P3 may not be stacked with the fourth protruding wiring pattern 146P4. Accordingly, a gap G can be formed between the third protruding wiring pattern 146P3 and the fourth protruding wiring pattern 146P4.

[0214] Additionally, the first protruding dummy pattern DPP1 may not be stacked with the second protruding dummy pattern DPP2. Accordingly, a gap G can be formed between the first protruding dummy pattern DPP1 and the second protruding dummy pattern DPP2.

[0215] As Figure 16 shown, the gap G formed in the display device 1_3 can be stacked with the first touch electrode TE, the second touch electrode RE, and the connection electrode BE of the touch sensing layer TSL.

[0216] As described above, since the connection wiring 146' includes the first protruding wiring pattern 146P1, the second protruding wiring pattern 146P2, the third protruding wiring pattern 146P3, and the fourth protruding wiring pattern 146P4, and the dummy pattern DP_3 includes the first protruding dummy pattern DPP1 and the second protruding dummy pattern DPP2 that both protrude from the sixth protruding dummy pattern DP6, a lattice pattern shape can be formed in and across the display area DA. Additionally, as described above, since the first touch electrode TE, the second touch electrode RE, and the connection electrode BE block the gap G formed in the display area DA, reflection of external light by the gap G can be prevented, and smudges caused by the gap G can be prevented from becoming visible.

[0217] Figure 15 and Figure 16 The sixth dummy pattern DP6 is shown extending in the second direction W2, and the first protruding dummy pattern DPP1 and the second protruding dummy pattern DPP2 protruding from the sixth dummy pattern DP6 in the first direction W1, but the inventive concept is not limited thereto. Alternatively, the sixth dummy pattern DP6 may extend in the first direction W1, and the first protruding dummy pattern DPP1 and the second protruding dummy pattern DPP2 may protrude from the sixth dummy pattern DP6 in the second direction W2.

[0218] Hereinafter, a display device according to another exemplary embodiment of the invention will be described.

[0219] Figure 17 is a plan view of a display device according to another exemplary embodiment of the invention. Figure 18 is along Figure 17 an exemplary cross-sectional view taken along line XVIII-XVIII' of.

[0220] Referring to Figure 17 and Figure 18 the display device 1_4 is different from the display device 1 of Figures 6 to 10 in that a shielding pattern BP is further provided on the dummy pattern DP.

[0221] Specifically, the shielding pattern BP may be provided in and across the display area DA. The shielding pattern BP may extend in the first direction W1 in a plan view and may be provided parallel to each other.

[0222] The shielding pattern BP may be provided on the fifth insulating layer 175. The shielding pattern BP may be provided in the same layer as the first electrode layer 150. The shielding pattern BP may include an opaque conductive material. The shielding pattern BP may receive the same voltage as the first power supply voltage applied to the driving transistor.

[0223] The shielding pattern BP may overlap with the gap G formed between the dummy pattern DP and the first connection wiring DM1 to the k-th connection wiring DMk. Additionally, the shielding pattern BP may overlap with the gap G formed between the dummy patterns DP. Thus, since the shielding pattern BP blocks the gap G between the dummy patterns DP and between the dummy pattern DP and the connection wiring 146, it is possible to prevent the stains caused by the gap G from becoming visible.

[0224] Figure 17 and Figure 18 The shielding pattern BP is shown as a column pattern extending along the first direction W1, but the present disclosure is not limited thereto. Optionally, the shielding pattern BP may be formed as a row pattern extending along the second direction W2 or as a lattice pattern composed of a column pattern extending along the first direction W1 and a row pattern extending along the second direction W2.

[0225] Hereinafter, a display device according to another exemplary embodiment of the invention will be described. Figure 19 is another exemplary cross-sectional view taken along the Figure 17 line XVIII-XVIII'.

[0226] Referring to Figure 19 , the display device 1_5 differs from the Figure 17 and Figure 18 display device 1_4 in that a shielding pattern BP' is provided between the fifth insulating layer 175 and the sixth insulating layer 175'.

[0227] The sixth insulating layer 175' may be provided between the fifth insulating layer 175 and the first electrode layer 150. The sixth insulating layer 175' may be formed together with the fifth insulating layer 175 as a via layer.

[0228] As already described above, the shielding pattern BP' may be provided between the fifth insulating layer 175 and the sixth insulating layer 175'. Since the shielding pattern BP' blocks the gap G formed in the display area DA, it is possible to prevent the reflection of external light by the gap G and to prevent the stains caused by the gap G from becoming visible.

[0229] Although certain exemplary embodiments have been described herein, other embodiments and modifications will be apparent from this description. Thus, the inventive concept is not limited to such embodiments, but rather to the broader scope of the appended claims and to various obvious modifications and equivalent arrangements that will be apparent to those of ordinary skill in the art.

Claims

1. A display device including a display area and a non-display area, the display device comprising: A plurality of data wirings disposed in the display area and the non-display area; A plurality of connection wirings disposed in the display area, and disposed on the plurality of data wirings and connected to the plurality of data wirings; A plurality of dummy patterns in the same layer as the plurality of connection wirings in the display area; And A shielding pattern disposed on the plurality of connection wirings and the plurality of data wirings, Wherein: A first gap is defined between the plurality of connection wirings and the plurality of dummy patterns; and The shielding pattern overlaps with the first gap.

2. The display device according to claim 1, wherein: The non-display area includes a first non-display area and a second non-display area; and The plurality of connection wirings extend from the first non-display area and pass through the display area to be connected to the plurality of data wirings in the second non-display area.

3. The display device according to claim 1, wherein: The plurality of dummy patterns include a first dummy pattern disposed between the plurality of connection wirings and a second dummy pattern separated from the first dummy pattern; A second gap is defined between the first dummy pattern and the plurality of connection wirings and between the second dummy pattern and the plurality of connection wirings; and The shielding pattern also overlaps with the second gap.

4. The display device according to claim 3, wherein: The display area includes a first area and a second area, the plurality of connection wirings are disposed in the first area, and the second area occupies the remaining part of the display area; and The plurality of dummy patterns further include a third dummy pattern disposed in the second area and a fourth dummy pattern separated from the third dummy pattern.

5. The display device according to claim 4, wherein: A third gap is defined between the third dummy pattern and the fourth dummy pattern; and The shielding pattern also overlaps with the third gap.

6. The display device according to claim 1, wherein, The shielding pattern is disposed in the display area, and the shielding pattern includes: A plurality of first touch electrodes arranged in a plurality of columns along a first direction; and Connection electrodes connecting the plurality of first touch electrodes.

7. The display device according to claim 6, wherein: The shielding pattern is disposed in the display area and includes a plurality of second touch electrodes arranged in a plurality of rows along a second direction intersecting the first direction; And The plurality of first touch electrodes do not overlap with the plurality of second touch electrodes.

8. The display device according to claim 1, wherein: The plurality of connection wirings include a plurality of protruding wiring patterns protruding from a plurality of sides of the plurality of connection wirings; A fourth gap is defined between the plurality of protruding wiring patterns; and The shielding pattern also overlaps with the fourth gap.

9. The display device according to claim 8, wherein: The plurality of protruding wiring patterns include a first protruding wiring pattern protruding along a first direction and a second protruding wiring pattern protruding in a direction opposite to the first direction; And The fourth gap is disposed between the first protruding wiring pattern and the second protruding wiring pattern.

10. The display device according to claim 8, wherein: The plurality of dummy patterns include a sixth dummy pattern, a first protruding dummy pattern, and a second protruding dummy pattern that all protrude from the sixth dummy pattern; A fifth gap is defined between the first protruding dummy pattern and the second protruding dummy pattern; And The shielding pattern also overlaps with the fifth gap.

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