Advanced load current monitoring circuit and method for class AB amplifiers

Abstract

The present disclosure relates to advanced load current monitoring circuits and methods for class AB amplifiers. In an embodiment, a class AB amplifier includes: an output stage including a pair of half-bridges configured to be coupled to a load; and a current sensing circuit coupled to a first half-bridge of the pair of half-bridges. The current sensing circuit includes a resistive element and is configured to sense a load current flowing through the load by reflecting a current flowing through a first transistor of the first half-bridge to generate a mirror current, passing the mirror current through the resistive element, and sensing the load current based on a voltage across the resistive element. The present disclosure also relates to a digital input class AB amplifier, and a method.

Description

Technical Field

[0001] The present invention generally relates to electronic systems and methods, and in particular embodiments, to an advanced load current monitoring circuit and method for a Class AB amplifier. Background Art

[0002] Power amplifiers are categorized based on the characteristics of their output stage. Specifically, the class is based on the proportion of each input cycle that the output device delivers current. Conventional Class A amplifiers are simpler than Class B and Class AB amplifiers and use a single amplifier transistor that is biased so that it is always on. For differential Class A amplifiers, the bias point is typically chosen to equal the maximum output current to allow amplification of the full range of input signals.

[0003] Conventional Class B amplifiers use two amplifier transistors, each operating in a push-pull configuration for half a cycle. Because the signals from each amplifier device do not overlap, Class B amplifiers typically have high crossover distortion.

[0004] A conventional Class AB amplifier has a push-pull configuration that operates over half a cycle. To operate, a Class AB amplifier uses a bias circuit that is typically more complex than that of a Class A or Class B amplifier. Overlapping helps reduce crossover distortion present in Class B amplifiers at the expense of higher quiescent current.

[0005] Figure 1 Shown are an output stage 102 of a conventional class AB audio power amplifier 100 for driving an audio speaker 106 and a load current sensor circuit 104 for sensing a load current flowing through the audio speaker 106 . Figure 2 A graph showing the impedance of a typical 4Ω audio speaker versus frequency is shown. Summary of the Invention

[0006] According to an embodiment, a class AB amplifier includes an output stage including a pair of half-bridges configured to be coupled to a load, and a current sensing circuit coupled to a first half-bridge of the pair of half-bridges. The current sensing circuit includes a resistive element and is configured to sense a load current flowing through the load by reflecting a current flowing through a first transistor of the first half-bridge to generate a mirror current, causing the mirror current to flow through the resistive element, and sensing the load current based on a voltage across the resistive element.

[0007] According to an embodiment, a digital input class AB amplifier includes: an output stage, the output stage including a pair of half-bridges configured to be coupled to a load; a digital communication interface configured to receive a data stream; a digital core circuit; a digital-to-analog converter (DAC); a drive circuit configured to receive a signal from the DAC and configured to control the output stage based on the received signal; a current sensing circuit coupled to a first half-bridge of the pair of half-bridges, the current sensing circuit including a resistive element and configured to sense a load current flowing through the load by reflecting a current flowing through a first transistor of the first half-bridge to generate a mirror current, causing the mirror current to flow through the resistive element, and sensing the load current based on a voltage of the resistive element; and an analog-to-digital converter (ADC) coupled to the digital core circuit and configured to generate a digital signal based on the sensed load current.

[0008] According to an embodiment, a method includes: driving a load using a class AB amplifier; reflecting a current flowing through a first transistor of an output stage of the class AB amplifier to generate a mirror current; passing the mirror current through a resistance element; and sensing a load current flowing through the load based on a voltage of the resistance element.

[0009] According to an embodiment, a digital input class AB amplifier includes: an output stage including a pair of half-bridges configured to be coupled to an audio speaker; a digital communication interface configured to receive an audio stream; a digital core circuit; a DAC; a driver circuit configured to receive a signal from the DAC and configured to control the output stage based on the received signal; a current sensing circuit including: a second transistor having a control terminal coupled to an output of a first half-bridge of the pair of half-bridges; a third transistor having a control terminal coupled to a current path of the second transistor; a first sensing transistor having a control terminal coupled to the control terminal of the first transistor of the first half-bridge and having a current path coupled to the current path of the third transistor; a first resistor; and a first current mirror coupled between the first sensing transistor and the first resistor, the first current mirror configured to generate a current flowing through the first half-bridge. a first mirror current of the resistor; a fourth transistor having a control terminal coupled to an output of a second half-bridge in the pair of half-bridges; a fifth transistor having a control terminal coupled to the current path of the fourth transistor; a second sensing transistor having a control terminal coupled to the control terminal of the sixth transistor of the second half-bridge and having a current path coupled to the current path of the fifth transistor; a second resistor; a second current mirror coupled between the second sensing transistor and the second resistor, the second current mirror configured to generate a second mirror current flowing through the second resistor; and an analog-to-digital converter (ADC) coupled to the first resistor and the second resistor, the ADC configured to generate a digital signal based on a voltage difference between a first node of the first resistor and a second node of the second resistor, wherein the digital core circuit is configured to estimate the impedance of the audio speaker based on the digital signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] For a more complete understanding of the present invention and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:

[0011] Figure 1 An output stage of a conventional class AB audio power amplifier for driving an audio speaker and a load current sensor circuit for sensing a load current flowing through the audio speaker are shown;

[0012] Figure 2 shows a graph of impedance versus frequency for a typical 4Ω audio speaker;

[0013] Figure 3 A schematic diagram of a digital input class AB audio power amplifier according to an embodiment of the present invention is shown;

[0014] Figure 4 The embodiment according to the present invention is shown Figure 3 Schematic diagram of the load current monitoring circuit in;

[0015] Figure 5 The embodiment according to the present invention is shown Figure 4 A layout diagram of a power transistor and a sense transistor in a load current monitoring circuit; and

[0016] Figure 6 FIG. 4 is a schematic diagram showing a load current monitoring circuit according to an embodiment of the present invention.

[0017] Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated.The figures are drawn to clearly illustrate the relevant aspects of the preferred embodiments and are not necessarily drawn to scale. DETAILED DESCRIPTION

[0018] The following detailed description discusses the formation and use of the disclosed embodiments. However, it should be appreciated that the present invention provides many applicable inventive concepts that can be implemented in a variety of specific contexts. The specific embodiments discussed are merely illustrative of the formation and use of the invention and do not limit the scope of the invention.

[0019] The following description explains various specific details to provide an in-depth understanding of several example embodiments according to this specification. The embodiments can be obtained without one or more specific details or using other methods, components, materials, etc. In other cases, known structures, materials or operations are not shown or described in detail to avoid obscuring different aspects of the embodiments. References to "embodiments" in this specification indicate that the specific configuration, structure or feature described with respect to the embodiment is included in at least one embodiment. Therefore, phrases such as "in one embodiment" that may appear at different points in this specification do not necessarily refer to the same embodiment. In addition, in one or more embodiments, specific configurations, structures or features can be combined in any appropriate manner.

[0020] The present invention will be described with respect to embodiments in a specific context, a load current monitoring circuit and method for a class AB audio power amplifier.Embodiments of the present invention may be used in other circuits (such as, for example, other types of class AB amplifiers).

[0021] In an embodiment of the present invention, a load current flowing through an audio speaker is sensed without using a sense resistor in series with a half-bridge of an output stage of a digital input class AB amplifier. The sensed current is sensed in real time and used to determine (e.g., in real time) the impedance of the audio speaker. The determined impedance of the audio speaker can be advantageously used for real-time speaker protection and real-time audio quality optimization. In some embodiments, a digital interface can be used to stream real-time load current and / or real-time speaker impedance data out of the digital input class AB amplifier, for example, to extend system-level application features.

[0022] As in Figure 1 As shown in FIG, a conventional class AB audio power amplifier 100 monitors the current flowing in each half bridge of the output stage 102 by using corresponding current sensing resistors 110 and 112, and uses a current sensing buffer 108 to generate a voltage V sense To perform load current sensing. The voltage V sense is a voltage proportional to the current flowing through the speaker 106. Due to low power consumption considerations, the current sensing resistors 110 and 112 are typically very small (e.g., on the order of a few mΩ). Therefore, the voltage generated across the current sensing resistors 110 and 112 is also very small, making it difficult to accurately measure smaller load currents.

[0023] As in Figure 2 As shown in , the impedance of an audio speaker can be different for each frequency. For example, the impedance of an audio speaker can be modeled as a resistor in parallel with a capacitor and then in series with an inductor. Therefore, the impedance of an audio speaker varies based on the frequency content of the audio signal reproduced by the speaker.

[0024] The impedance of an audio speaker may also be affected by process variations. Furthermore, the impedance of an audio speaker may change over time (e.g., due to aging) as well as in real time (e.g., due to temperature changes of the speaker). Consequently, conventional audio systems tend to underutilize the audio speaker (e.g., deliver less power to the audio speaker) as a way to ensure that the audio speaker is not damaged during operation (e.g., due to excessive displacement and / or overheating of the audio speaker).

[0025] In an embodiment of the present invention, a current sensing circuit senses the load current without using a sense resistor in series with the half-bridge of the output stage. Avoiding the use of a sense resistor in series with the half-bridge of the output stage advantageously allows for accurate sensing of small currents without sensing very small voltages (e.g., μV to a few mV) across very small sense resistors (e.g., resistors with resistances below 1 mΩ to, for example, 10 mΩ). The sensed load current can be used to estimate the impedance of the audio speaker in real time, thereby allowing for optimized audio power delivery and audio quality while still protecting the audio speaker.

[0026] Figure 3Schematic diagram of a digital input class AB audio power amplifier 302 according to an embodiment of the present invention is shown. The digital input class AB audio power amplifier 302 includes a digital interface 308, a digital core 310, a digital-to-analog converter (DAC) 312, an analog class AB audio power amplifier 304, and a load current monitoring circuit 306. The analog class AB audio power amplifier 304 includes bias and drive circuitry 315 and an output stage 102. The load current monitoring circuit 306 includes a current sensing circuit 318 and an analog-to-digital converter (ADC) 316.

[0027] During normal operation, the digital interface 308 receives a digital audio stream and transmits the audio data to the digital core 310. The digital core 310 receives the audio data from the digital interface 308, processes the audio data, and transmits the processed audio data to the DAC 312. The DAC 312 receives the audio data from the digital core 310 and converts it into an analog signal that drives the bias and drive circuit 314. The bias and drive circuit 314 drives the output stage 102. The load current monitoring circuit 306 senses the output current using the current sensing circuit 318. The load current monitoring circuit 306 uses the ADC 316 to convert the sensed current into digital form and transmit it to the digital core 310.

[0028] As in Figure 3 As shown in FIG. 3 , the current sensing circuit 318 senses the load current without using a resistor in series with the half-bridge of the output stage 102 .

[0029] The current monitoring circuit 306 is capable of continuously and in real time monitoring the load current.

[0030] The digital core 310 can use the sensed load current for various purposes. For example, in some embodiments, the digital core 310 can estimate and monitor the load impedance in real time based on the sensed current. For example, in some embodiments, the digital core 310 determines the impedance R of the audio speaker 106 using the following equation: load :

[0031]

[0032] Among them, I load is the current sensed by the current sensing circuit 318, and V out is the voltage across the audio speaker 106. In some embodiments, the voltage V is measured directly out In other embodiments, for example, the voltage V is estimated by the following equation: out :

[0033] V out =V in·G (2)

[0034] Among them, V in is the input voltage, which can be determined from the digital input audio stream, and G is the gain applied to the input voltage V in The digital or analog gain is also known.

[0035] The real-time load impedance information can be used, for example, as input to an automatic gain control (AGC), also known as automatic volume control (AVC), to adjust the output power and optimize the sound quality for different frequency input signals.

[0036] The digital core 310 can also use the sensed load current to limit the maximum current flowing through the audio speaker 106 to protect the audio speaker 106. For example, in some embodiments, when a high load current is detected (e.g., by comparing the sensed current to a threshold), the digital core 310 can reduce the amplitude of the signal fed to the DAC 312 (e.g., by digitally adjusting the gain) to reduce the load current. In some embodiments, the digital core 310 can use analog circuitry within or outside the bias and drive circuit 314 to reduce the amplitude of the analog signal feeding the bias and drive circuit 314.

[0037] In some embodiments, the digital core 310 does not process the audio data, but instead, the same audio stream received from the digital interface 308 is sent to the DAC 312. In some embodiments, the digital core 310 processes the audio data by filtering, adding delays, performing data integrity operations, and other known audio / data processing techniques.

[0038] The digital interface 308 may be implemented in any manner known in the art. For example, in some embodiments, the digital interface 308 includes an inter-IC sound (IC 2 S) interface, integrated circuit (I 2 C) interface, serial peripheral interface (SPI) and / or any other digital interface.

[0039] As in Figure 3 As shown in FIG, the audio stream is received by the digital interface 308 (e.g., from an external source such as an external controller, processor, or communication circuit). In some embodiments, the audio stream can be generated internally, for example, from corresponding non-volatile memory. Other implementations are also possible.

[0040] In some embodiments, the digital core 310 sends the sensed real-time data of the load current and / or the real-time data of the impedance of the audio speaker 106 to an external user (such as an external controller) via the digital interface 308. For example, in some embodiments, the external controller may use I 2 S communication to read real-time load current data, and can use I 2 C to read real-time load impedance data. Other implementations are also possible.

[0041] Bias and drive circuit 314 is used to drive output stage 102. For example, gate drivers may be used to drive the control terminals of the corresponding high-side transistors and low-side transistors of each half-bridge of output stage 102. Bias and drive circuit 314 may be implemented in any manner known in the art.

[0042] Digital core 310 may be implemented, for example, as custom logic and may include a state machine. In some embodiments, a general purpose controller or processor may be used to perform some or all of the digital core 310 functions.

[0043] DAC 312 and ADC 316 can be implemented in any manner known in the art. For example, ADC 316 can be implemented as a SAR ADC or a sigma-delta ADC. For example, DAC 312 can be implemented as a delta-sigma DAC or a successive approximation DAC. Other implementations are also possible.

[0044] In some embodiments, a single integrated circuit (IC) having a single semiconductor substrate includes: digital interface 308, digital core 310, DAC 312, bias and drive circuit 314, output stage 102, current sensing circuit 318, and ADC 316. In some embodiments, some of the above circuits may be implemented separately. For example, in some embodiments, DAC 312, digital interface 310, and digital core 310 may be implemented outside the IC including current sensing circuit 318. Other implementations are also possible.

[0045] Output stage 102 can be implemented in any manner known in the art. For example, in some embodiments, transistors 120 and 124 are p-type power metal oxide semiconductor field effect transistors (MOSFETs), and transistors 122 and 126 are n-type power MOSFETs arranged in a bridge-tied load (BTL) configuration.

[0046] Figure 4 FIG. 3 is a schematic diagram showing a load current monitoring circuit 306 according to an embodiment of the present invention. Figure 4As shown in FIG. 3 , the load current monitoring circuit includes a current sensing circuit 318 , a fully differential buffer 417 , and an ADC 316 .

[0047] During normal operation, e.g. Figure 3 As depicted, output stage 102 drives audio speaker 106. Sense transistor 410 is used to reflect the current I flowing through power transistor 122 using transistors 404 and 408. 122 The drain of transistor 410 is biased to a voltage equal to the voltage of the output terminal OUTM. Since the gate voltages of transistors 410 and 122 are equal and the drain voltages of transistors 410 and 122 are equal, the sensing current I 410 is the current I 122 , where the scaling factor is based on the relative sizes of transistor 410 and transistor 122. Similarly, sense transistor 430 is used to reflect the current I flowing through power transistor 126 by using transistors 424 and 428. 126 The drain of the transistor 430 is biased to a voltage equal to the voltage of the output terminal OUTP, thereby generating a sensing current I 430 , the sensing current I 430 It is circuit I 126 A scaled copy of .

[0048] By using the current mirror 416, the current I 410 is reflected as the sense current I 414 , the current mirror 416 includes transistors 406 and 412. The sensing current I 414 flows through the sensing resistor 414 to generate a voltage V senseM Similarly, by using the current mirror 436, the current I 430 is reflected as the sense current I 434 , the current mirror 436 includes transistors 426 and 432. The sensing current I 434 flows through the sensing resistor 434 to generate a voltage V senseP .

[0049] The fully differential buffer 417 receives the voltage V senseP and V senseM And their DC bias voltages are level-shifted to be the same as the DC bias voltage of the comparator of ADC 316, wherein the DC bias voltage of the comparator of ADC 316 is based on the reference voltage V ref_adc In some embodiments, the fully differential buffer 417 generates the differential voltage ΔV using a gain different from 1 (e.g., 2, 2.5, 5, 10, or more, or 0.9, 0.75, 0.5, or less). In other embodiments, the fully differential buffer 417 generates the differential voltage ΔV using a gain equal to 1.

[0050] ADC 316 samples the differential voltage ΔV and generates a digital output ADC out , the digital output ADC out is sent to the digital core 310. Figure 4 As shown in FIG, ADC 316 receives a reference voltage V ref_adc Then, the output of ADC 316 is out is the difference voltage ΔV and the reference voltage V ref_adc In some embodiments, by making the reference current I ref flows through resistor 452 to generate a reference voltage V ref_adc In some embodiments, resistor 452 is matched to resistors 414 and 434. By matching resistors 414, 434, and 452, process variations that affect the resistance of resistors 414 and 434 are compensated for, advantageously allowing accurate load current sensing over process variations.

[0051] Matching between resistors 414, 434, and 452 can be achieved in any manner known in the art. For example, in some embodiments, resistors 414, 434, and 452 are arranged next to each other in a layout of an IC having an interdigitated structure. For example, resistors 414, 434, and 452 can be divided into several fingers that are interleaved with each other in a symmetrical manner.

[0052] In some embodiments, the reference current I ref can be trimmed to further improve the accuracy of current sensing.Trimming can be performed during manufacturing and can be performed in a manner known in the art.

[0053] Current sources 402 and 422 are used to bias transistors 404 and 424, respectively. In some embodiments, current sources 402 and 422 each generate a current of approximately 100 μA. Other current magnitudes may be used.

[0054] As in Figure 4 As shown in FIG, sense resistors 414 and 434 are not connected in series with power transistors 120, 122, 124, or 126. Therefore, the sense resistors can have a resistance higher than a few mΩ without affecting the power consumption or output voltage of output stage 102. For example, in some embodiments, sense resistors 414 and 434 have a resistance between 50Ω and 150Ω, or approximately 100Ω. Other resistance values ​​(e.g., higher than 150Ω or lower than 50Ω) may also be used, such as, for example, 10Ω or lower.

[0055] In some embodiments, transistors 122 and 410 and transistors 126 and 430 are matched so that the current I410 Tracking current I 122 , and the current I 126 Tracking current I 430 . Figure 5 Layout diagram 500 of transistors 122 and 410 is shown in accordance with an embodiment of the present invention. Transistors 126 and 430 may be implemented in a similar manner.

[0056] As in Figure 5 As shown in FIG, transistor 122 is disposed in semiconductor substrate 502 and is divided into two portions 122A and 122B (e.g., of the same size). Sense transistor 410 is also divided into two portions 410A and 410B (e.g., of the same size). The two portions of transistor 410 are disposed between the two portions of transistor 122. For example, when transistors 122 and 410 are to be exposed to substantially the same temperature, disposing transistor 410 between the two portions of transistor 122 advantageously achieves good matching between transistor 122 and transistor 410. Disposing transistors 122 and 410 very close together (such as in FIG) can be advantageous. Figure 5 ), also advantageously allows for minimal impact of process variations (ie, any process variation will affect both transistors in a similar manner).

[0057] By achieving good matching between transistor 122 and transistor 410 and between transistor 126 and transistor 430, the current I 410 and I 430 Accurately track the current I 122 and I 126 .

[0058] Advantages of some embodiments include: improving the accuracy of real-time current sensing for both small and large load currents. The sensed current can be used for speaker protection and improved sound quality, which are desirable in applications such as automotive audio systems.

[0059] In some embodiments, the load current monitoring circuit can be configured to perform current measurements for more than one current range. For example, Figure 6A schematic diagram of a load current monitoring circuit 606 according to an embodiment of the present invention is shown. The load current monitoring circuit 606 operates in a similar manner to the load current monitoring circuit 306. However, the load current monitoring circuit 606 includes current mirrors 624, 626, 644, and 646, which can be configured to modify the current mirror ratio. For example, transistors 616, 622, 636, and 642 can be disabled or activated to modify the current mirror ratio. For example, in some embodiments, transistors 616, 622, 636, and 642 are enabled by connecting the gates of transistors 616, 622, 636, and 642 to the gates of transistors 614, 620, 634, and 640, respectively. In such an embodiment, transistors 616 and 636 can be disabled by connecting their gates to GND, and transistors 622 and 642 can be disabled by connecting their gates to PVDD. It should be understood that transistors 616 , 622 , 636 , and 642 may be enabled or disabled independently of one another.

[0060] Modification of the range of current measurement can be controlled by one or more control signals (e.g., by enabling or disabling transistors 616, 622, 636, and 642). Such one or more control signals can be received, for example, from digital interface 308. In some embodiments, such control signals can be generated by digital core 310. For example, in some embodiments, a first range (e.g., 2A) can be initially selected. Upon detecting that the sensed current exceeds or approaches exceeding 2A, the control signal enables / disables one or more of transistors 616, 622, 636, and 642 to change the measurement range to a second range (e.g., 4A).

[0061] Modifying the current mirror ratio advantageously allows for optimization of the accuracy of current sensing for a particular range. For example, in some embodiments, the current mirror ratio can be selected so that the load current monitoring circuit 606 operates within a range of 1 A, 2 A, 4 A, or 8 A. By selecting an optimized range (e.g., selecting 2 A when the maximum expected load current is 2 A), the dynamic range and overall signal-to-noise ratio (SNR) are optimized.

[0062] Example embodiments of the present invention are summarized here. Other embodiments can be understood based on the entire specification and claims presented herein.

[0063] Example 1. A class AB amplifier includes: an output stage including a pair of half-bridges configured to be coupled to a load; and a current sensing circuit coupled to a first half-bridge of the pair of half-bridges, the current sensing circuit including a resistive element and configured to sense a load current flowing through the load by reflecting a current flowing through a first transistor of the first half-bridge to generate a mirror current, causing the mirror current to flow through the resistive element, and sensing the load current based on a voltage across the resistive element.

[0064] Example 2. The class AB amplifier of Example 1, wherein the current sensing circuit further comprises: a second transistor having a control terminal coupled to the output of the first half-bridge; a third transistor having a control terminal coupled to the current path of the second transistor; a sensing transistor having a control terminal coupled to the control terminal of the first transistor and having a current path coupled to the current path of the third transistor; and a current mirror coupled between the sensing transistor and the resistive element, the current mirror being configured to generate a mirrored current.

[0065] Example 3. The class AB amplifier of any of Examples 1 or 2, wherein the first transistor and the sense transistor are matched transistors.

[0066] Example 4. The class AB amplifier of any of Examples 1 to 3, wherein the first transistor has a first portion and a second portion disposed in the semiconductor substrate, and wherein the sensing transistor is disposed between the first portion and the second portion.

[0067] Example 5. The class AB amplifier of any of Examples 1 to 4, wherein the first portion corresponds to a first half of the first transistor, and the second portion corresponds to a second half of the first transistor.

[0068] Example 6. The class AB amplifier of any of Examples 1 to 5, wherein the current mirror comprises a current mirror transistor configured to adjust a mirror ratio of the current mirror based on a control signal.

[0069] Example 7. The class AB amplifier of any one of Examples 1 to 6, wherein the current sensing circuit further comprises: a second current mirror coupled between the sensing transistor and the current mirror, the second current mirror comprising a second current mirror transistor configured to adjust a mirror ratio of the second current mirror based on a second control signal.

[0070] Example 8. The class AB amplifier according to any one of Examples 1 to 7, further comprising: an analog-to-digital converter (ADC) configured to generate a digital signal based on a voltage of the resistance element.

[0071] Example 9. The class AB amplifier of any one of Examples 1 to 8, further comprising: a reference resistor; and a reference current source configured to inject a reference current into the reference resistor to generate a reference voltage, wherein the ADC is configured to receive the reference voltage, wherein the resistive element comprises a first resistor, and wherein the first resistor and the reference resistor are matched resistors.

[0072] Example 10. The class AB amplifier of any one of Examples 1 to 9, further comprising: a fully differential buffer coupled between the resistive element and an ADC, wherein the ADC is configured to receive a reference voltage, and wherein the fully differential buffer is configured to level shift a voltage of the resistive element to have a DC bias voltage substantially equal to a DC bias voltage of a comparator in the ADC, and wherein the DC bias voltage of the comparator in the ADC is based on the reference voltage.

[0073] Example 11. The class AB amplifier of any of Examples 1 to 10, further comprising: a digital core circuit configured to receive a digital signal from the ADC and configured to calculate a load impedance based on the digital signal.

[0074] Example 12. The class AB amplifier of any of Examples 1 to 11, further comprising: a digital core circuit configured to receive a digital signal from the ADC and configured to limit the load current based on the digital signal.

[0075] Example 13. The class AB amplifier of any of Examples 1 to 12, further comprising a load, wherein the load is an audio speaker coupled to the pair of half-bridges.

[0076] Example 14. The class AB amplifier of Examples 1 to 13, wherein the first transistor is a low-side transistor of the pair of half-bridges.

[0077] Example 15. The class AB amplifier of any of Examples 1 to 14, wherein the resistive element comprises a resistor having a resistance of 10Ω or higher.

[0078] Example 16. A digital-input Class AB amplifier includes: an output stage including a pair of half-bridges configured to be coupled to a load; a digital communication interface configured to receive a data stream; a digital core circuit; a digital-to-analog converter (DAC); a driver circuit configured to receive a signal from the DAC and configured to control the output stage based on the received signal; a current sensing circuit coupled to a first half-bridge of the pair of half-bridges, the current sensing circuit including a resistive element and configured to sense a load current flowing through the load by reflecting a current flowing through a first transistor of the first half-bridge to generate a mirror current, causing the mirror current to flow through the resistive element, and sensing the load current based on a voltage across the resistive element; and an analog-to-digital converter (ADC) coupled to the digital core circuit and configured to generate a digital signal based on the sensed load current.

[0079] Example 17. The digital input Class AB amplifier of Example 16, wherein the digital core circuit is configured to receive real-time load current data from the ADC.

[0080] Example 18. The digital input Class AB amplifier of any of Examples 16 or 17, wherein the digital core circuit is further configured to send the real-time load current data to an external user via the digital communication interface.

[0081] Example 19. The digital-input Class AB amplifier of any of Examples 16 to 18, wherein the digital core circuit is further configured to calculate a load impedance of the load based on real-time load current data.

[0082] Example 20. The digital input Class AB amplifier of any of Examples 16 to 19, wherein the digital core circuit is further configured to transmit the load impedance via the digital communication interface.

[0083] Example 21. The digital-input Class AB amplifier of any of Examples 16 to 20, wherein the digital core circuit is further configured to limit the load current based on real-time load current data.

[0084] Example 22. The digital-input Class AB amplifier of any of Examples 16 to 21, wherein the current sensing circuit further comprises: a second transistor having a control terminal coupled to the output of the first half-bridge; a third transistor having a control terminal coupled to the current path of the second transistor; a sensing transistor having a control terminal coupled to the control terminal of the first transistor and having a current path coupled to the current path of the third transistor; and a current mirror coupled between the sensing transistor and the resistive element, the current mirror configured to generate a mirrored current.

[0085] Example 23. The digital input Class AB amplifier of any of Examples 16 to 22, wherein the digital communication interface includes an inter-IC sound (IC 2 S) interface, wherein the data stream includes an audio stream, and wherein I 2 The S interface is configured to receive data streams.

[0086] Example 24. A method includes: driving a load using a class AB amplifier; reflecting a current flowing through a first transistor of an output stage of the class AB amplifier to generate a mirror current; passing the mirror current through a resistive element; and sensing a load current flowing through the load based on a voltage across the resistive element.

[0087] Example 25. The method of Example 24, wherein the load is an audio speaker.

[0088] Example 26. The method of any of Examples 24 or 25, wherein the first transistor is a low-side transistor of the output stage.

[0089] Example 27. The method of any of Examples 24 to 26, wherein the resistive element comprises a resistor having a resistance of at least 10Ω.

[0090] Example 28. The method of any of Examples 24 to 27, wherein the first transistor is a power metal oxide semiconductor field effect transistor (MOSFET).

[0091] Example 29. A digital input class AB amplifier comprises: an output stage including a pair of half-bridges configured to be coupled to an audio speaker; a digital communication interface configured to receive an audio stream; a digital core circuit; a digital-to-analog converter (DAC); a driver circuit configured to receive a signal from the DAC and configured to control the output stage based on the received signal; a current sensing circuit comprising: a second transistor having a control terminal coupled to an output of a first half-bridge of the pair of half-bridges; a third transistor having a control terminal coupled to a current path of the second transistor; a first sensing transistor having a control terminal coupled to the control terminal of the first transistor of the first half-bridge and having a current path coupled to the current path of the third transistor; a first resistor; and a first current mirror coupled between the first sensing transistor and the first resistor, the first current mirror configured to generate a current. a first mirror current flowing through a first resistor; a fourth transistor having a control terminal coupled to an output of a second half-bridge in the pair of half-bridges; a fifth transistor having a control terminal coupled to the current path of the fourth transistor; a second sensing transistor having a control terminal coupled to the control terminal of the sixth transistor of the second half-bridge and having a current path coupled to the current path of the fifth transistor; a second resistor; a second current mirror coupled between the second sensing transistor and the second resistor, the second current mirror being configured to generate a second mirror current flowing through the second resistor; and an analog-to-digital converter (ADC) coupled to the first resistor and the second resistor, the ADC being configured to generate a digital signal based on a voltage difference between a first node of the first resistor and a second node of the second resistor, wherein the digital core circuit is configured to estimate the impedance of the audio speaker based on the digital signal.

[0092] Although the present invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the present invention, will be apparent to those skilled in the art upon reference to this specification. Accordingly, the appended claims are intended to cover any such modifications or embodiments.

Claims

1. A class AB amplifier, comprising: an output stage comprising a first half-bridge and a second half-bridge, the first half-bridge and the second half-bridge being configured to be coupled to a load; as well as a current sensing circuit coupled to the first half-bridge and configured to sense a load current, The current sensing circuit comprises: a first resistance element; a first sensing transistor having a gate terminal coupled to a gate terminal of a first transistor of the first half-bridge, wherein a drain terminal of the first sensing transistor is biased with a voltage equal to a voltage at an output of the first half-bridge, whereby the first sensing transistor generates a first current that is a scaled copy of a current flowing through the first transistor due to a gate voltage of the first transistor being equal to a gate voltage of the first sensing transistor and a drain voltage of the first transistor being equal to a drain voltage of the first sensing transistor; and a current mirror configured to generate a first mirror current by mirroring the first current, and to cause the first mirror current to flow through the first resistance element; The current sensing circuit is further coupled to the second half-bridge, and further comprises: a second resistance element; a second sensing transistor having a gate terminal coupled to a gate terminal of a second transistor of the second half-bridge, wherein a drain terminal of the second sensing transistor is biased with a voltage equal to a voltage at an output of the second half-bridge, whereby the second sensing transistor generates a second current that is a scaled copy of the current flowing through the second transistor due to a gate voltage of the second transistor being equal to a gate voltage of the second sensing transistor and a drain voltage of the second transistor being equal to a drain voltage of the second sensing transistor; another current mirror configured to generate a second mirror current by mirroring the second current and to cause the second mirror current to flow through the second resistive element; a fully differential buffer receiving a first voltage of the first resistive element and a second voltage of the second resistive element and generating a differential voltage having a gain; Each of the current mirror and the further current mirror each includes a first current mirror including two transistors and a first current mirror transistor configured to adjust a mirror ratio of the first current mirror by selectively connecting a gate terminal of the first current mirror transistor to gate terminals of the two transistors based on a first control signal. 2 . The class AB amplifier of claim 1 , wherein the first transistor and the first sensing transistor are matched transistors. 3 . The class AB amplifier according to claim 1 , wherein the first transistor has a first portion and a second portion provided in a semiconductor substrate, and wherein the first sensing transistor and the second sensing transistor are provided between the first portion and the second portion. 4 . The class AB amplifier of claim 3 , wherein the first portion corresponds to a first half of the first transistor, and the second portion corresponds to a second half of the first transistor.

5. The class AB amplifier of claim 1 , wherein each of the current mirror and the further current mirror further comprises: a second current mirror coupled between the corresponding sensing transistor and the current mirror, the second current mirror including two additional transistors and a second current mirror transistor configured to adjust a mirror ratio of the second current mirror by selectively connecting a gate terminal of the second current mirror transistor to the gate terminals of the two additional transistors based on a second control signal.

6. The class AB amplifier of claim 1 , further comprising: The analog-to-digital converter (ADC) is configured to generate a digital signal based on the differential voltage.

7. The class AB amplifier of claim 6 , further comprising: Reference resistor; as well as a reference current source configured to inject a reference current into the reference resistor to generate a reference voltage, wherein the ADC is configured to receive the reference voltage, wherein at least one of the first resistive element and the second resistive element includes a first resistor, and wherein the first resistor and the reference resistor are matched resistors.

8. A class AB amplifier according to claim 6 or 7, wherein the ADC is configured to receive a reference voltage, and wherein the fully differential buffer is configured to level shift the voltage of the first resistive element and the voltage of the second resistive element to have a DC bias voltage substantially equal to a DC bias voltage of a comparator in the ADC, and wherein the DC bias voltage of the comparator in the ADC is based on the reference voltage.

9. The class AB amplifier according to claim 6 or 7, further comprising: The digital core circuit is configured to receive the digital signal from the ADC and to calculate a load impedance based on the digital signal.

10. The class AB amplifier according to claim 6 or 7, further comprising: A digital core circuit is configured to receive the digital signal from the ADC and to limit the load current based on the digital signal.

11. The class AB amplifier of claim 1 or 2, further comprising the load, wherein the load is an audio speaker coupled to the first half-bridge and the second half-bridge. 12 . The class AB amplifier of claim 1 , wherein the first transistor is a low-side transistor of the first half-bridge.

13. The class AB amplifier of claim 1 , wherein at least one of the first resistive element and the second resistive element comprises: A resistor with a resistance of 10Ω or more.

14. A digital input class AB amplifier, comprising: The class AB amplifier according to any one of claims 1 to 13; a digital communication interface configured to receive a data stream; Digital core circuit; Digital-to-analog converter DAC; a driver circuit configured to receive a signal from the DAC and configured to control the output stage of the class AB amplifier based on the received signal; as well as An analog-to-digital converter (ADC) is coupled to the digital core circuit and is configured to generate a digital signal based on the differential voltage produced by the fully differential buffer of the current sensing circuit of the class AB amplifier. 15 . The digital-input Class AB amplifier of claim 14 , wherein the digital core circuit is configured to receive real-time load current data from the ADC. 16 . The digital-input Class AB amplifier of claim 15 , wherein the digital core circuit is further configured to send the real-time load current data to an external user via the digital communication interface. 17 . The digital-input Class AB amplifier of claim 15 , wherein the digital core circuit is further configured to calculate a load impedance of the load based on the real-time load current data. 18 . The digital input Class AB amplifier of claim 17 , wherein the digital core circuit is further configured to transmit the load impedance via the digital communication interface.

19. The digital-input Class AB amplifier of claim 15, wherein the digital core circuit is further configured to limit the load current based on the real-time load current data.

20. The digital input Class AB amplifier of claim 14, wherein the current sensing circuit further comprises: a second transistor having a control terminal coupled to an output of the first half-bridge; a third transistor having a control terminal coupled to the current path of the second transistor; a sense transistor having a control terminal coupled to the control terminal of the first transistor and having a current path coupled to the current path of the third transistor; as well as A current mirror is coupled between the sensing transistor and the resistive element, and is configured to generate the mirror current.

21. The digital input Class AB amplifier of claim 14, wherein the digital communication interface comprises an inter-IC sound interface. 2 S interface, wherein the data stream includes an audio stream, and wherein the I 2 The S interface is configured to receive the data stream.

22. A method for monitoring a load current, comprising: Using the class AB amplifier according to any one of claims 1 to 13 to drive a load; reflecting a current flowing through a first transistor of an output stage of the class AB amplifier to generate a mirror current; allowing the mirror current to flow through a resistive element; as well as A load current flowing through the load is sensed based on the voltage of the resistive element.

23. The method of claim 22, wherein the load is an audio speaker.

24. The method of claim 22, wherein the first transistor is a low-side transistor of the output stage.

25. The method of claim 22, wherein the resistive element comprises a resistor having a resistance of at least 10Ω.

26. The method of claim 22, wherein the first transistor is a power metal oxide semiconductor field effect transistor (MOSFET).

27. A digital input class AB amplifier, comprising: an output stage comprising a pair of half-bridges configured to be coupled to an audio speaker; a digital communication interface configured to receive an audio stream; Digital core circuit; Digital-to-analog converter DAC; a driver circuit configured to receive a signal from the DAC and configured to control the output stage based on the received signal; A current sensing circuit comprising: a second transistor having a control terminal coupled to an output of a first half-bridge of the pair of half-bridges; a third transistor having a control terminal coupled to the current path of the second transistor; a first sensing transistor having a control terminal coupled to a control terminal of the first transistor of the first half-bridge and having a current path coupled to a current path of the third transistor; a first resistor; a first current mirror coupled between the first sensing transistor and the first resistor, the first current mirror configured to generate a first mirror current flowing through the first resistor; a fourth transistor having a control terminal coupled to an output of a second half-bridge of the pair of half-bridges; a fifth transistor having a control terminal coupled to the current path of the fourth transistor; a second sensing transistor having a control terminal coupled to a control terminal of a sixth transistor of the second half-bridge and having a current path coupled to a current path of the fifth transistor; a second resistor; a second current mirror coupled between the second sensing transistor and the second resistor, the second current mirror configured to generate a second mirror current flowing through the second resistor; and an analog-to-digital converter (ADC) coupled to the first resistor and the second resistor, the ADC configured to generate a digital signal based on a voltage difference between a first node of the first resistor and a second node of the second resistor, wherein the digital core circuit is configured to estimate the impedance of the audio speaker based on the digital signal.

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