Capacitor life test system

Abstract

The present invention is applicable to the field of capacitors and provides a capacitor life test system and test method. The system includes performing DC charging and discharging on the capacitor to be tested, and applying a ripple test signal to the capacitor to be tested while charging the capacitor to be tested; collecting relevant electrical parameters during the charging and discharging of the capacitor to be tested as the current simulated working environment; and analyzing the life index of the capacitor to be tested under the current simulated working environment. The DC power supply and ripple test signal used for charging are both adjustable, so that the life of the capacitor can be tested under various working environments, which is convenient for maintenance and replacement, and can also promote targeted improvements in the capacitor production process to increase the service life of the capacitor and improve the quality of the capacitor.

Description

Technical Field

[0001] The invention belongs to the field of capacitors, and in particular relates to a capacitor life testing system. Background Art

[0002] Capacitors are commonly used electronic devices that play an important role in circuits such as tuning, bypassing, coupling, and filtering. The life of capacitors will directly affect the performance of the applied circuits.

[0003] Although capacitors take a long time to fail during actual use, the actual operating environment of capacitors varies greatly and is not necessarily the same as the originally designed operating environment. For example, the difference between the actual operating voltage across the capacitor and the designed voltage, the ambient temperature and humidity of the capacitor, and the ripple passing through the capacitor will ultimately result in different service lives for the capacitor. Taking ripple as an example, in electronic products, the load power borne by the capacitor is proportional to the ripple current. The greater the load power, the greater the ripple current, the greater the heat generated when the internal oxide film decomposes, the more electrolyte is consumed during repair, and the greater the ripple current, the greater the heat generated, which will, to a certain extent, shorten the life of the capacitor.

[0004] Due to the complexity and diversity of operating environments, it is difficult to accurately determine the actual service life of capacitors, which can delay the maintenance of electronic products, affect safe and normal use, and prevent targeted improvements. Therefore, it would be of great practical significance if effective life testing of capacitors could be carried out. Summary of the Invention

[0005] The technical problem to be solved by the present invention is how to perform life testing on capacitors, aiming to provide safety assurance for the use of capacitors.

[0006] To solve the above technical problems, in a first aspect, the present invention provides a capacitor life testing system, comprising:

[0007] A ripple signal generating unit, configured to generate an adjustable ripple test signal;

[0008] A DC power supply, used to provide charging voltage for the capacitor to be tested;

[0009] A test fixture for placing a capacitor to be tested, having at least one capacitor placement position; each capacitor placement position has a test positive electrode and a test negative electrode, the test positive electrode and the test negative electrode being respectively used to electrically connect to the positive electrode and the negative electrode of the capacitor to be tested;

[0010] a charge-discharge channel selection unit connected to the ripple signal generating unit, the DC power supply, and the electrodes of the test fixture, having at least one charge-discharge channel corresponding to the capacitor placement position, each charge-discharge channel being controllably enabled; when a charge-discharge channel is enabled and in a charging mode, the DC power supply charges the capacitor under test through the enabled charge-discharge channel, and the charging voltage and charging current are adjustable. Simultaneously, the ripple test signal acts on the capacitor under test through the enabled charge-discharge channel, and when a charge-discharge channel is enabled and in a discharging mode, the capacitor under test can be discharged through the enabled charge-discharge channel;

[0011] The parameter sampling unit is used to collect relevant electrical parameters when the capacitor to be tested is charged and discharged as the current simulated working environment;

[0012] The analyzing unit is electrically connected to the capacitor to be tested on the capacitor placement position and is used to analyze the life index of the capacitor to be tested under the current simulated working environment.

[0013] In a second aspect, the present invention provides a method for testing a capacitor life test system, comprising the following steps:

[0014] Generate an adjustable ripple test signal;

[0015] Performing DC charging and discharging on the capacitor to be tested, with adjustable charging parameters, and applying the ripple test signal to the capacitor to be tested while charging the capacitor to be tested;

[0016] Collect relevant electrical parameters when the capacitor under test is charging and discharging as the current simulated working environment;

[0017] Analyze the life indicators of the capacitor under test under the current simulated working environment.

[0018] When performing a life test on a capacitor, the present invention applies a ripple test signal to the capacitor during the DC charging process, simulating the impact of ripple current on the capacitor during actual operation in the environment. In addition, the charging voltage, charging current and ripple test signal are all adjustable. Therefore, the life of the capacitor can be tested under various working environments, which is convenient for maintenance and replacement. It can also promote targeted improvements in the capacitor production process to increase the service life of the capacitor and improve the quality of the capacitor. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a structural diagram of a capacitor life test system provided by a first embodiment of the present invention;

[0020] Figure 2 is a structural diagram of a ripple signal generating unit provided by a second embodiment of the present invention;

[0021] Figure 3is a circuit diagram of an R2R DAC resistor network provided by a second embodiment of the present invention;

[0022] Figure 4 is a circuit diagram of an integrating network provided by a second embodiment of the present invention;

[0023] Figure 5 is a circuit diagram of a first voltage follower provided by a second embodiment of the present invention;

[0024] Figure 6 is a circuit diagram of a second embodiment of the present invention using a latch for expansion control;

[0025] Figure 7 is a circuit diagram of an electronic analog switch provided by a second embodiment of the present invention;

[0026] Figure 8 This is a circuit diagram of multiple sets of electronic analog switches connected in series according to the second embodiment of the present invention.

[0027] Figure 9 1 is a circuit diagram of an electronic analog switch using a latch for extended control, provided by a second embodiment of the present invention;

[0028] Figure 10 is a circuit diagram of an amplitude adjustment module provided by a second embodiment of the present invention;

[0029] Figure 11 is a circuit diagram of a single charge and discharge channel selection unit provided by a third embodiment of the present invention;

[0030] Figure 12 1 is a circuit diagram of a charging and discharging channel selection unit designed in pairs provided by a third embodiment of the present invention;

[0031] Figure 13 A circuit diagram of a third embodiment of the present invention for simultaneously monitoring multiple capacitors using multiple charge and discharge channel selection units;

[0032] Figure 14 is a driving circuit diagram of a switch of a charge-discharge channel selection unit provided in a third embodiment of the present invention;

[0033] Figure 15 is a circuit diagram between a capacitor to be tested, a test fixture, and a bridge provided by a third embodiment of the present invention;

[0034] Figure 16 A circuit diagram for simultaneously monitoring multiple capacitors using multiple test fixtures provided by a third embodiment of the present invention;

[0035] Figure 17 is a driving circuit diagram of a switch on a test fixture provided by a third embodiment of the present invention;

[0036] Figure 18 is a circuit diagram of a DC current sampling circuit and a ripple current sampling circuit provided by a fourth embodiment of the present invention;

[0037] Figure 19 Yes Figure 18 The expanded circuit diagram;

[0038] Figure 20 is a circuit diagram of a DC voltage sampling circuit provided by a fourth embodiment of the present invention;

[0039] Figure 21 is a circuit diagram of a DC power supply provided in a fifth embodiment of the present invention;

[0040] Figure 22 yes Figure 21 Simplified circuit diagram of

[0041] Figure 23 FIG. 4 is a flow chart of a testing method of a capacitor life testing system provided by a sixth embodiment of the present invention. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0043] The first embodiment of the present invention provides a structure of a capacitor life test system, referring to Figure 1 , including a ripple signal generating unit 11, a DC power supply 12, a charge and discharge channel selecting unit 14, a test fixture 13, a parameter sampling unit 15 and an analyzing unit 16.

[0044] Among them, the ripple signal generating unit 11 is used to generate an adjustable ripple test signal. The ripple test signal can be any waveform with different frequencies and amplitudes, such as a triangle wave, a sine wave, a square wave, etc. The adjustable frequency and amplitude facilitate the simulation of various ripples that may pass through the capacitor in the actual use environment.

[0045] The DC power supply 12 is used to provide a charging voltage for the capacitor to be tested. Similarly, in order to facilitate the simulation of various actual use environments of the capacitor, the charging voltage and current are adjustable. Moreover, the charging voltage and current are not limited to being adjustable during the charging process, but can also be adjusted before use.

[0046] In addition, during testing, the entire test system can be placed in a preset environment for testing, such as a specific temperature, humidity, electromagnetic interference, etc., to fully simulate the actual working environment of the capacitor.

[0047] The test fixture 13 is used to place the capacitor to be tested and has at least one capacitor placement position. Each capacitor placement position has a positive test electrode and a negative test electrode. When a capacitor is placed in the capacitor placement position, the positive test electrode and the negative test electrode are respectively used to electrically connect to the positive and negative electrodes of the capacitor to be tested. In addition, the test fixture can also be designed with various circuit structures as needed to meet charging and discharging requirements.

[0048] The charge and discharge channel selection unit 14 is connected to the electrodes of the ripple signal generating unit 11, the DC power supply 12, and the test fixture 13, and has at least one charge and discharge channel corresponding to the placement position of the capacitor. Each charge and discharge channel can be controlled to be selected. Generally, when testing a certain capacitor, only the charge and discharge channel corresponding to the capacitor is selected. If there are multiple capacitors to be tested, the corresponding charge and discharge channels can be controlled to be selected in sequence according to a certain order.

[0049] The parameter sampling unit 15 is used to collect relevant electrical parameters, such as charging voltage, charging current, ripple current, etc., when the capacitor to be tested is charged and discharged, as the current simulated working environment, and record them.

[0050] The analysis unit 16 is electrically connected to the capacitor to be tested on the capacitor placement position, and is used to analyze the life index of the capacitor to be tested under the current simulated working environment. When the capacitor is in the charging and discharging state, its life index can be analyzed based on its exhibited properties. The life index can be the capacitor's capacity, loss, etc., to indicate how long the capacitor will take to fail. After the life index is analyzed, it can be associated with the recorded current simulated working environment parameters and stored as a life reference value under the use environment. By continuously adjusting, resampling, and analyzing the charging voltage, charging current, and ripple test signals, life reference values under various use environments can be obtained. These life reference values can be provided to the buyer when the capacitor is sold to facilitate maintenance and replacement during use. Capacitor manufacturers can also more clearly understand the shortcomings of their products, which helps to make targeted improvements.

[0051] The analysis of capacity and loss can be flexibly carried out using various technical means, for example, various existing RCL bridges can be used for testing, without limitation.

[0052] It can be seen that in the first embodiment of the present invention, when performing a life test on a capacitor, a ripple test signal is applied to the capacitor along with the DC charging process, simulating the impact of the ripple current on the capacitor during actual operation in the environment. In addition, the charging voltage, charging current, and ripple test signal are all adjustable, thereby allowing the life of the capacitor to be tested in simulated various ripple working environments, providing safety protection for the use of the capacitor.

[0053] On the basis of the first embodiment, the second embodiment of the present invention provides a structure of the ripple signal generating unit 11, such as Figure 2 As shown, it includes a waveform generating module 111 and an amplitude adjusting module 112, wherein the waveform generating module 111 is used to generate a waveform of a specified frequency, such as a triangle wave, a sine wave, etc., and the waveform frequency is adjustable, and the amplitude adjusting module 112 is connected to the waveform generating module 111, and is used to adjust the amplitude of the waveform to a specified amplitude, thereby providing waveform inputs of different amplitudes for the subsequent test circuit.

[0054] The waveform generation module 111 may specifically include a controller and an R2R DAC resistor network, wherein the R2R DAC resistor network is used to control the conversion of digital signals into analog signals, and the controller is used to provide digital signals to the R2R DAC resistor network and adjust the connection state of the R2R DAC resistor network so that the R2R DAC resistor network outputs an analog waveform of a specified frequency. As an example, Figure 3 The STM32F103C8T6 microcontroller is used as the controller to control the 8-bit R2R DAC resistor network to generate various waveforms, such as sine wave, square wave, triangle wave, etc. It should be understood that the resistor network can also be replaced by 2-bit, 4-bit, 16-bit, etc. R2R DAC.

[0055] like Figure 3 As shown in Figure 1, the R2R resistor network consisting of resistors R46-R53, R56, R58, R59, R60, R62-R64, and R66-R68 forms an 8-bit DAC output circuit. The DAC output value SIN_OUT is changed by changing the output level of IO ports PA0-PA7 on the STM32F103C8T6 microcontroller.

[0056] Furthermore, the waveform generating module 111 further includes a controllable integrating network, which is connected to the R2RDAC resistor network and is used to adjust the waveform output by the R2R DAC resistor network to a waveform of a specified shape. Figure 4 As shown in the figure, capacitors C44-C49 act as integrators, and transistors Q1-Q6 are used as switches. The output levels of IO ports PB2, PB12-PB15, and PA8 of the STM32F103C8T6 microcontroller control the switching states of transistors Q1-Q6. Other components with switching effects, such as MOS tubes, can be used instead. R55, R57, R61, R65, R69, and R71 are transistor base current limiting resistors.

[0057] Furthermore, the waveform generating module 111 further includes a first voltage follower connected to the R2R DAC resistor network for performing voltage following processing on the waveform output by the R2R DAC resistor network, and the waveform after following processing is used as the final waveform output of the frequency adjustable waveform generating module. Figure 5 As shown, the first voltage follower mainly includes operational amplifiers U7 and U8 that function as voltage followers. Capacitors C34, C53, C54, and C50-C52 provide power supply filtering for operational amplifiers U7 and U8 and are optional components and can be omitted. R54 and R74 provide voltage division and can be omitted. R70, R72, and R73 provide current limiting and are optional components and can be omitted.

[0058] Figure 5 In the example, the output levels of IO ports PA0-PA7 are changed by the single-chip microcomputer to adjust the connection state of the R2RDAC resistor network, thereby changing the output voltage at point A. The conduction state of Q1-Q6 is then selected by changing the output levels of IO ports PB2, PB12-PB15, and PA8. The R2R DAC resistor network is adjusted according to the resistance ratio. Changing the resistance value of the resistor or splitting the resistor into multiple resistors in series and parallel can also achieve normal use and function. Therefore, changing the resistance value or splitting the resistor into series and parallel forms also fall within the application scope of the present invention. In addition, because each control IO port is in an independent use state, the positions of the IO ports can be interchanged, and changing the position of the IO port does not change its function, which also falls within the application scope of the present invention.

[0059] like Figure 6 As shown in the schematic, this schematic shows that the direct control of the MCU IO port is replaced by expansion control using various latch chips, including but not limited to the 74HC595. The 74HC595 is used as a serial input and parallel output IO port expansion latch. Using other latches for IO expansion also falls within the application scope of this invention.

[0060] The amplitude adjustment module 112 includes an electronic analog switch or several electronic analog switches connected in series, the input end of each electronic analog switch is connected to the output end of the frequency-adjustable waveform generation module, and the output amplitude of the output end of each electronic analog switch is adjustable. Figure 7As shown, the electronic analog switch uses CD4053, and other types of electronic switches also fall within the application scope of the present invention. VDD of CD4053 is connected to the positive pole of the power supply, which is +5v in this embodiment, and VEE is connected to the negative voltage, which is -9V in this embodiment. The VSS and INH pins are grounded in this example. The waveform generated by the waveform generating module 111 can be directly input into the input end of the electronic analog switch CD4053, or input into the input end of the electronic analog switch after passing through a voltage follower composed of an operational amplifier or a transistor, etc. The voltage following or voltage isolation processing of the input and output does not affect the normal use function of the electronic analog switch CD4053. After the waveform generated by the waveform generating module 111 enters the input end of the electronic analog switch CD4053, it is controlled by the single-chip microcomputer or other data transmission latch modules to control the control terminals A, B, and C of the electronic analog switch CD4053, and then adjusts the output amplitude of OUT1. As shown Figure 7 As shown, R1, R2, R3 and R5, R6, R7 can be expanded to multiple groups of resistors connected in series or in parallel. Changing their resistance values does not affect their application in the embodiment of the present invention. The embodiment of the present invention can increase the adjustment range by connecting multiple groups of analog switches in series.

[0061] like Figure 8 As shown in Figure 1, multiple sets of electronic analog switches connected in series can increase the adjustment amplitude. Figure 9 As shown, the control terminals A, B, and C of the electronic analog switch CD4053 can be directly extended and controlled by the latch controlled by the single chip microcomputer, so the application scheme of port control by latches including 74HC595 is not limited to the application scope of the embodiment of the present invention.

[0062] like Figure 10 As shown, the input and output of the amplitude adjustment module 112 are respectively connected to a second voltage follower U9A and a third voltage follower U9B. The non-inverting input of the second voltage follower U9A receives the waveform before amplitude adjustment, while the inverting input is connected to the output. The non-inverting input of the third voltage follower U9B receives the waveform after amplitude adjustment, while the inverting input is connected to the output. Since adding a follower circuit composed of an op amp to the waveform input and the output of the electronic potentiometer does not affect the normal function of the present invention, adding an isolation circuit to the input port or directly performing voltage following both fall within the scope of application of the present invention.

[0063] Combined with the above embodiments, Figure 11 As shown, the third embodiment of the present invention provides a structure of a charge and discharge channel selection unit, wherein each of the charge and discharge channels includes: a power amplifier channel 1, a first controllable switch K1, a second controllable switch K2, a resistor R1, a resistor R2, and a resistor R3.

[0064] The test positive electrode is connected to the negative electrode of the DC power supply 12 via the first controllable switch K1 and the resistor R1; the positive electrodes of the ripple signal generating unit 11 and the DC power supply 12 are both connected to the test positive electrode via the power amplifier channel and the second controllable switch K2; the first end of the resistor R2 is connected to the negative electrode of the DC power supply 12, the second end of the resistor R2 is connected to the test negative electrode, and the second end of the resistor R2 is also connected to the parameter sampling unit 15 through the resistor R3.

[0065] The output of power amplifier channel 1 is transmitted to the positive terminal of the capacitor under test via the second controllable switch K2. When the second controllable switch K2 is closed, the first controllable switch K1 is opened, and power amplifier channel 1 provides charging current and test ripple to the capacitor under test. After the second controllable switch K2 is opened, the first controllable switch K1 is closed, and the capacitor under test is discharged through resistor R1.

[0066] Further, if Figure 12 As shown, it can also be designed that every two of the charging and discharging channels are integrated on a circuit board and share the first resistor R1, the second resistor R2, and the third resistor R3. In this case, on the test fixture 13, every two adjacent capacitors are placed in a group and share a test negative electrode. In this way, a set of power amplifier channels can provide a ripple excitation signal for a pair of capacitors. Power amplifier channel 2 outputs to the positive electrode of the capacitor under test through the first controllable switch K3. When the first controllable switch K3 is closed, the second controllable switch K4 is opened, and power amplifier channel 2 provides charging current and test ripple to the capacitor under test. After the second controllable switch K4 is closed, the first controllable switch K3 is opened, and discharge is carried out through resistor R1.

[0067] Each switching element can be replaced by an electronic component with a switching function, such as a relay, a reed switch, a transistor, etc. Figure 12 The control pins REL_1-REL_4 of the K1-K4 relays can be driven by a drive module such as ULN2803 / ULN2003 controlled by a microcontroller, or driven by a three-level microcontroller.

[0068] Figure 13 This embodiment is used to monitor multiple capacitors at the same time. Based on this circuit, a circuit for monitoring more capacitors at the same time can be expanded. Each capacitor monitoring has independent ripple data and DC data acquisition functions. When the IO port of the microcontroller is limited, the IO port can be expanded to drive through the latch. Figure 14 As shown, transistors can also be used directly to drive each relay.

[0069] Further, if Figure 15 As shown, for each capacitor placement position, the test positive electrode is connected to the power amplifier channel through the third controllable switch K5 / K12 , and the test negative electrode is connected to the negative electrode of the DC power supply 12 through the fourth controllable switch K6 / K11 .

[0070] Furthermore, since there are many controllable switch devices, and only the switch corresponding to the capacitor currently being tested is operated in each test, this embodiment also includes a scheduling control unit for uniformly controlling the switching state of each controllable switch in a preset manner to avoid confusion. The working state of the scheduling control unit can be controlled by a single-chip microcomputer.

[0071] Furthermore, the analysis unit 16 includes several bridges, such as Figure 15 As shown, the CH+ terminal and L+ terminal of each bridge are connected to the test positive electrode through the fifth controllable switch K1 / K10 and the sixth controllable switch K2 / K9 respectively, and the CH- terminal and L- terminal of the bridge are connected to the test negative electrode through the seventh controllable switch K3 / K8 and the eighth controllable switch K4 / K7 respectively.

[0072] Specifically, Figure 15 The test fixture shown corresponds to a pair of capacitors, that is, the corresponding set of power amplifiers provides test waveforms for the two capacitors. As shown in the figure above, when K5 and K6 are closed and K1-K4 are disconnected, the capacitor C1 to be tested is discharged through the charge and discharge switch board. After discharging, disconnect K5 and K6. Close K1-K4, and then connect to the bridge, which tests the capacity and loss of the capacitor C1 to be tested. K1-K6 and C1 form one set of test circuits, and K7-K12 and C9 form another set of test circuits. The two sets of test circuits cannot be connected to the bridge for capacity and loss testing at the same time, and can only be connected separately. So, Figure 15 REL_1-REL_12 can be driven by a microcontroller-controlled driver module such as ULN2803 or ULN2003, or by a microcontroller-controlled three-stage driver. The switching element can be replaced by an electronic component with a switching function, such as a relay, reed switch, or transistor.

[0073] like Figure 16 As shown, this is the application of this embodiment to monitor multiple capacitors at the same time. Based on this circuit, a circuit for monitoring more capacitors at the same time can be expanded. When the IO port of the microcontroller is limited, the IO port can be expanded to drive through the latch. Figure 17 As shown, when relays are used for each switch, they can be directly driven by transistors.

[0074] In combination with the above embodiments, the fourth embodiment of the present invention provides a structure of the parameter sampling unit 15, such as Figure 18 The above mentioned circuit includes a DC current sampling circuit and a ripple current sampling circuit.

[0075] The DC current sampling circuit includes an operational amplifier U1, a resistor R12, a resistor R13, a resistor R15, a resistor R16, a diode D1, a diode D3, and a capacitor C1; the non-inverting input terminal of the operational amplifier U1 is grounded through the resistor R13, and the DC charging current is input to the inverting input terminal of the operational amplifier U1 through the resistor R12. The inverting input terminal is also connected to the cathode of the diode D1 and the anode of the diode D3, and the anode of the diode D1 and the cathode of the diode D3 are both grounded; a resistor R15 and a capacitor C1 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U1; the output terminal of the operational amplifier U1 outputs a DC current sampling signal through the resistor R16; wherein, the diode D1 and the diode D3 are clamping diodes and can be omitted.

[0076] The ripple current sampling circuit includes an operational amplifier U3, a resistor R18, a resistor R19, a resistor R21, a resistor R22, and a capacitor C6; the ripple test signal is input to the non-inverting input terminal of the operational amplifier U3 through the resistor R19, the inverting input terminal of the operational amplifier U3 is grounded through the resistor R18, and a resistor R21 and a capacitor C6 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U3; the output terminal of the operational amplifier U3 outputs the ripple current sampling signal through the resistor R22.

[0077] When testing multi-channel capacitors, such as Figure 19 As shown, the circuit composed of U1 and U3 can be expanded to any number of ways. To improve the operating stability of components such as operational amplifiers, capacitors can be added to their power pins for filtering. Alternatively, two diodes can be added to the operational amplifier for voltage clamping.

[0078] Figure 18 and Figure 19 If a more accurate DC voltage display is not required, there is no need for an AD (analog-to-digital) converter chip, and the 16-bit DAC resistor network can be directly controlled by the IO port of the single chip.

[0079] like Figure 20As shown, when a more accurate DC voltage is required, the parameter sampling unit 15 also includes a DC voltage sampling circuit, which includes an operational amplifier U12, a resistor R65, a resistor R66, a resistor R67, a diode D11, a diode D12, a capacitor C44 and an analog-to-digital converter; the non-inverting input terminal of the operational amplifier U3 is grounded through the resistor R65, and the DC charging voltage is input to the inverting input terminal of the operational amplifier U12, which is also connected to the cathode of the diode D11 and the anode of the diode D12, and the anode of the diode D11 and the cathode of the diode D12 are both grounded; a resistor R66 and a capacitor C44 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U12; the output terminal of the operational amplifier U12 outputs a DC voltage sampling signal to the analog-to-digital converter for analog-to-digital conversion through the resistor R67, wherein the diode D1 and the diode D3 are clamping diodes and can be omitted, and the capacitor C44 is a compensation capacitor used to increase the stability of the operational amplifier U12 and can also be omitted.

[0080] Figure 20 U14 in the circuit functions as a voltage follower. The DAC output can be directly connected to subsequent circuitry, so U14 can be omitted. If a microcontroller has sufficient I / O ports, a 16-bit DAC resistor network can be controlled directly using the microcontroller's I / O ports, rather than relying on latches like the 74HC595 to expand the I / O ports. Therefore, 2-bit, 4-bit, 8-bit, and 16-bit R2R DAC resistor networks are all within the scope of this invention.

[0081] Further, if Figure 20 As shown, the capacitor life test system also includes a resistor network unit and a voltage divider unit. The resistor network unit is located on the charging circuit of the capacitor to be tested and is used to adjust the DC charging voltage of the capacitor to be tested, that is, Figure 20 The voltage divider unit is located on the charging circuit of the capacitor to be tested and is used to adjust the DC charging current of the capacitor to be tested, that is, Figure 20 The voltage divider circuit composed of R62-R64.

[0082] Combined with the above embodiments, Figure 21As shown, the fifth embodiment of the present invention provides a structure of a DC power supply 12, wherein D1, D2, C1, C2, C8, and C11 form a voltage doubling rectifier circuit. When the output voltage of the application system is not high, voltage doubling rectification is not required and AC input can be used directly. Q1 and Q2 are adjustment tubes. D3 and D4 are freewheeling diodes. R21 is a current sampling resistor. C6 and C30 are output filter capacitors. The capacity must be above 680uf. When the output voltage is low, the two capacitors can be combined into one capacitor, and the R3 and R4 equalizing resistors can be eliminated. R5 and R6 are voltage feedback networks. U2 is a comparator amplifier that directly outputs the adjustment parameters of the voltage. U3 is a current constant current network that directly outputs the constant current regulation of the power supply. As shown Figure 21 As shown in the figure, the circuit composed of D16, Q3, R11, R12, and R13 is a constant current and constant voltage indicator switch. This part of the circuit can be eliminated if constant current and constant voltage indication is not required. R19, R20, and A1 form the automatic overtemperature control circuit and can be removed if this function is not required.

[0083] When the input power is directly DC, the DC power supply 12 can cancel the voltage doubler rectification. Figure 22 The simplified circuit diagram is shown in Figure 2. D13 and D14 are voltage clamping components, which are not essential and can be omitted.

[0084] Figure 23 The following is an implementation flow of a test method for a capacitor life test system provided by a sixth embodiment of the present invention, including:

[0085] Step S231: Generate an adjustable ripple test signal.

[0086] The ripple test signal can be any waveform with different frequencies and amplitudes, such as triangle waves, sine waves, square waves, etc. The adjustable frequency and amplitude facilitate the simulation of various ripples that may pass through the capacitor in actual use environments.

[0087] In step S231 , direct current charging and discharging are performed on the capacitor to be tested, and the charging parameters are adjustable. The ripple test signal is applied to the capacitor to be tested while the capacitor to be tested is being charged.

[0088] To facilitate simulation of various actual capacitor usage environments, the charging voltage and current must be adjustable during the charging process. Furthermore, the entire test system can be placed in a preset environment, such as a specific temperature, humidity, and electromagnetic interference environment, to fully simulate the actual operating environment of the capacitor. When multiple capacitors are to be tested, step S231 is performed on each capacitor individually.

[0089] Step S231 : collecting relevant electrical parameters when the capacitor to be tested is charging and discharging, as the current simulated working environment.

[0090] It mainly includes charging voltage, charging current, ripple current, as well as the capacity and loss of the capacitor. After collection, it can be recorded to facilitate storage in association with subsequent life indicators.

[0091] Step S231 , analyzing the life index of the capacitor to be tested under the current simulated working environment.

[0092] When a capacitor is in a charging or discharging state, its lifespan can be analyzed based on its properties. This lifespan indicator can include capacity, loss, and other indicators, indicating how long it will take for the capacitor to fail. After analyzing the lifespan indicator, it can be correlated with the recorded parameters of the current simulated operating environment and stored as a reference lifespan value for the specific operating environment. By continuously adjusting, reusing, and analyzing the charging voltage, charging current, and ripple test signals, reference lifespan values can be obtained for a variety of operating environments.

[0093] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A capacitor life test system, characterized in that: include: A ripple signal generating unit, configured to generate an adjustable ripple test signal; A DC power supply, used to provide charging voltage for the capacitor to be tested; A test fixture for placing a capacitor to be tested, having at least one capacitor placement position; each capacitor placement position has a test positive electrode and a test negative electrode, the test positive electrode and the test negative electrode being respectively used to electrically connect to the positive electrode and the negative electrode of the capacitor to be tested; a charge and discharge channel selection unit, connected to the ripple signal generating unit, the DC power supply, and the electrodes of the test fixture, having at least one charge and discharge channel corresponding to the placement position of the capacitor, and each charge and discharge channel can be controlled to be selected; When a charge / discharge channel is enabled and in a charging mode, the DC power supply charges the capacitor under test through the enabled charge / discharge channel, and the charging voltage and charging current are adjustable. At the same time, the ripple test signal acts on the capacitor under test through the enabled charge / discharge channel. When a charge / discharge channel is enabled and in a discharging mode, the capacitor under test can be discharged through the enabled charge / discharge channel. The parameter sampling unit includes a DC current sampling circuit and a ripple current sampling circuit, which is used to collect relevant electrical parameters when the capacitor to be tested is charged and discharged as the current simulated working environment; an analyzing unit, electrically connected to the capacitor to be tested on the capacitor placement position, and used to analyze the life index of the capacitor to be tested under the current simulated working environment; Each of the charging and discharging channels includes: a power amplifier channel, a first controllable switch, a second controllable switch, a resistor R1, a resistor R2, and a resistor R3; The test positive electrode is connected to the negative electrode of the DC power supply via the first controllable switch and the resistor R1; the ripple signal generating unit and the positive electrode of the DC power supply are both connected to the test positive electrode via the power amplifier channel and the second controllable switch; the first end of the resistor R2 is connected to the negative electrode of the DC power supply, the second end of the resistor R2 is connected to the test negative electrode, and the second end of the resistor R2 is also connected to the parameter sampling unit via the resistor R3.

2. The capacitor life test system according to claim 1, wherein: The ripple signal generating unit includes: A frequency-adjustable waveform generation module for generating a waveform of a specified frequency; An amplitude adjustment module is connected to the waveform generation module and is used to adjust the amplitude of the waveform to a specified amplitude.

3. The capacitor life test system according to claim 2, wherein: The frequency-adjustable waveform generating module includes: R2R DAC resistor network for controlled conversion of digital signals into analog signals; A controller is configured to provide a digital signal to the R2R DAC resistor network and adjust a connection state of the R2R DAC resistor network so that the R2R DAC resistor network outputs a simulated waveform of a specified frequency.

4. The capacitor life test system according to claim 3, wherein: The frequency-adjustable waveform generating module further includes: A controllable integrating network is connected to the R2R DAC resistor network and is used to adjust the waveform output by the R2R DAC resistor network to a waveform of a specified shape.

5. The capacitor life test system according to claim 3 or 4, characterized in that: The frequency-adjustable waveform generating module further includes: The first voltage follower is connected to the R2R DAC resistor network and is used to perform voltage following processing on the waveform output by the R2R DAC resistor network, and the waveform after following processing is used as the final waveform output of the frequency-adjustable waveform generating module.

6. The capacitor life test system according to claim 2, wherein: The amplitude adjustment module includes an electronic analog switch or a plurality of electronic analog switches connected in series; The input end of each electronic analog switch is connected to the output end of the frequency-adjustable waveform generating module, and the output amplitude of the output end of each electronic analog switch is adjustable.

7. The capacitor life test system according to claim 6, wherein: The input end and the output end of the amplitude adjustment module are respectively connected to the second voltage follower and the third voltage follower.

8. The capacitor life test system according to claim 1, wherein: On the test fixture, every two adjacent capacitors are placed as a group and share a test negative electrode; In the charge-discharge channel selection unit, every two charge-discharge channels are integrated on a circuit board and share the resistor R1 , the resistor R2 , and the resistor R3 .

9. The capacitor life test system according to claim 1 or 8, characterized in that: For each capacitor placement position, the test positive electrode is connected to the power amplifier channel through a third controllable switch, and the test negative electrode is connected to the negative electrode of the DC power supply through a fourth controllable switch.

10. The capacitor life test system according to claim 9, wherein: The capacitor life test system further includes a scheduling control unit for uniformly controlling the switch states of the controllable switches according to a preset manner.

11. The capacitor life test system according to claim 1, wherein: The analysis unit includes several bridges, the CH+ terminal and L+ terminal of each bridge are connected to the test positive electrode through a fifth controllable switch and a sixth controllable switch respectively, and the CH- terminal and L- terminal of the bridge are connected to the test negative electrode through a seventh controllable switch and an eighth controllable switch respectively.

12. The capacitor life test system according to claim 1, wherein: The DC current sampling circuit includes an operational amplifier U1, a resistor R12, a resistor R13, a resistor R15, a resistor R16, and a capacitor C1; the non-inverting input terminal of the operational amplifier U1 is grounded through the resistor R13, and the DC charging current is input to the inverting input terminal of the operational amplifier U1 through the resistor R12; the resistor R15 and the capacitor C1 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U1; the output terminal of the operational amplifier U1 outputs a DC current sampling signal through the resistor R16; The ripple current sampling circuit includes an operational amplifier U3, a resistor R18, a resistor R19, a resistor R21, a resistor R22, and a capacitor C6; the ripple test signal is input to the non-inverting input terminal of the operational amplifier U3 through the resistor R19, the inverting input terminal of the operational amplifier U3 is grounded through the resistor R18, and the resistor R21 and the capacitor C6 are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U3; the output terminal of the operational amplifier U3 outputs the ripple current sampling signal through the resistor R22.

13. The capacitor life test system according to claim 12, wherein: The parameter sampling unit also includes a DC voltage sampling circuit; The DC voltage sampling circuit includes an operational amplifier U12, a resistor R65, a resistor R66, a resistor R67, and an analog-to-digital converter; the non-inverting input terminal of the operational amplifier U3 is grounded through the resistor R65, and the DC charging voltage is input to the inverting input terminal of the operational amplifier U12; the resistor R66 is connected in parallel between the inverting input terminal and the output terminal of the operational amplifier U12; the output terminal of the operational amplifier U12 outputs a DC voltage sampling signal to the analog-to-digital converter through the resistor R67 for analog-to-digital conversion.

14. The capacitor life test system according to claim 1, wherein: The capacitor life test system further includes: a resistor network unit, located on a charging circuit of the capacitor to be tested, and used for adjusting a DC charging voltage of the capacitor to be tested; The voltage dividing unit is located on the charging circuit of the capacitor to be tested and is used to adjust the DC charging current of the capacitor to be tested.

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