Method for driving an optical load and drive circuit for an optical load

Abstract

A drive circuit for generating narrow electrical pulses with a high peak current and a high repetition rate after low pulse ringing to drive an optical load may include a power supply, a first circuit path, and a second circuit path. The first circuit path may be connected to the power supply and may include an inductive element and a switch. The switch in the closed state may charge a current in the inductive element through the first circuit path. The second circuit path may be connected to the optical load and may be connected to the power supply. The second circuit path may include an inductive element and a capacitive element in series with the optical load. The switch transitioning from the closed state to the open state may release the current from the inductive element through the second circuit path to provide an electrical pulse to the optical load.

Description

Technical Field

[0001] The present disclosure generally relates to drive circuits for optical loads, and methods and drive circuits for generating narrow electrical pulses with high peak current and low ringing to drive optical loads. Background Art

[0002] Time-of-flight based measurement systems (such as optical detection and ranging (LIDAR) systems) emit light pulses, detect the reflected light pulses, and determine the distance to an object by measuring the delay between the emitted light pulse and the reflected light pulse. Summary of the Invention

[0003] According to some embodiments, a drive circuit for generating narrow electrical pulses with high peak current and high repetition rate to drive an optical load may include: a DC voltage source; a first circuit path connected to the DC voltage source, wherein the first circuit path includes: a switch having an open state and a closed state, and one or more inductive elements, wherein the switch in the closed state causes current to flow through the first circuit path to charge the one or more inductive elements; and a second circuit path connected to the optical load, wherein the second circuit path is connected to the DC voltage source, and wherein the second circuit path includes: the one or more inductive elements, a resistive element, and a capacitive element in series with the optical load, and wherein the switch in the open state causes the one or more inductive elements to release current through the second circuit path to provide an electrical pulse to the optical load.

[0004] According to some embodiments, an optical device may include: a power supply providing an input; an optical load that emits light when provided with an input greater than a threshold; a first circuit path connected to the power supply, wherein the first circuit path includes: a switch having an open state and a closed state, and one or more inductive elements, wherein the switch in the closed state causes energy to be charged to the one or more inductive elements through the first circuit path; and a second circuit path connected to the optical load and connected to the DC voltage source, and wherein the second circuit path includes: the one or more inductive elements, the optical load, and a capacitive element in series with the optical load, and wherein the switch transitioning from the closed state to the open state causes the one or more inductive elements to release energy through the second circuit path to provide an electrical pulse to the optical load, and wherein in response to the electrical pulse, the width of the light pulse from the optical load is in the range of 30 picoseconds to 1000 picoseconds.

[0005] According to some embodiments, a method for generating a narrow electrical pulse with a high peak current to drive an optical load may include: charging one or more inductive elements with a power source by closing a switch within a first time interval to supply current through a first circuit path; and discharging current from the one or more inductive elements through a second circuit path by opening the switch within a second time interval after the first time interval, thereby driving the optical load to provide an electrical pulse to the optical load, wherein the second circuit path includes a capacitive element in series with the optical load. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a circuit diagram of an example embodiment of a drive circuit and an optical load described herein.

[0007] Figure 2 is a graph showing example curves of electrical and optical signals associated with an example embodiment of a drive circuit and an optical load described herein.

[0008] Figure 3 is a graph showing an example curve of a voltage from an optical detector that receives an optical signal associated with an example embodiment of a drive circuit and an optical load described herein.

[0009] Figure 4 is a graph showing example curves of electrical and optical signals associated with an example embodiment of a drive circuit and an optical load described herein.

[0010] Figure 5 is an example image of a far-field pattern of a VCSEL array optical load including 400 emitters driven by an example implementation of a drive circuit, an example image of a VCSEL array optical load including 400 emitters driven by a conventional drive circuit, and a cross-section of a far-field pattern of a VCSEL array optical load including 400 emitters driven by an example embodiment of a drive circuit described herein.

[0011] Figure 6 is an example image 602 of a near-field pattern of a VCSEL array optical load including 400 emitters driven by an example embodiment of a drive circuit and an example image 604 of a near-field pattern of a VCSEL array optical load including 400 emitters driven by a conventional drive circuit described herein.

[0012] Figure 7 is a graph of a high-resolution spectrum of an optical load driven by an example embodiment of a drive circuit described herein.

[0013] Figure 8 is a flowchart of an example process for driving an optical load. Detailed implementation manners

[0014] The following detailed description of the example implementation refers to the accompanying drawings. The same reference numerals in different drawings may represent the same or similar elements.

[0015] A time-of-flight based measurement system (such as a LIDAR system) requires high-power optical pulses with short durations (e.g., 10 nanoseconds (ns) or shorter). High-power optical pulses can achieve greater ranging. Optical pulses with shorter durations can improve resolution. For laser-based optical loads (such as laser diodes, semiconductor laser diodes, vertical cavity surface emitting lasers (VCSELs), and / or the like), a higher current passing through the optical load corresponds to a higher-power optical pulse. As described above, a time-of-flight based measurement system can determine the distance to an object by measuring the delay between the emitted optical pulse and the reflected optical pulse. Emitting a pulse with a well-defined time origin and a rectangular shape simplifies the measurement. To achieve such a rectangular shape, the emitted optical pulse should have a short rise time (e.g., the time for the power of the optical pulse to rise from zero to peak power) and a short fall time (e.g., the time for the power of the optical pulse to fall from peak power to zero).

[0016] A circuit for driving an optical load is a set of electronic components interconnected by current-carrying conductors (such as traces). Any electronic component and conductor can have parasitic elements (e.g., parasitic inductance, parasitic resistance, and / or parasitic capacitance). These parasitic elements may be undesirable and thus are sought to be minimized. However, it may not be possible to completely eliminate these parasitic elements. When a power supply voltage is provided to the circuit to drive the optical load, the parasitic inductance, parasitic resistance, and / or parasitic capacitance in the circuit cause a delay between when the power supply voltage is provided and when the current reaches its peak. This delay increases the rise time of the electrical pulse, which in turn increases the rise time of the optical pulse. Increasing the power supply voltage reduces the delay, but for a 10-ampere (A) current in a circuit with low inductance (e.g., 10 -9 nanohenries), a 100-volt power supply voltage is required to achieve a 0.1-ns delay. Such a power supply voltage is much higher than the voltages provided by traditional power supplies for portable electronic devices (such as mobile devices, automotive electronics, consumer electronics, etc.). Such a large power supply voltage may also be higher than the rated voltage of switches (such as switching FETs) in the circuit.

[0017] In addition, when the power supply voltage is turned off, the energy (such as magnetic energy) stored by the parasitic inductance, parasitic resistance, and / or parasitic capacitance of the electronic components generates a decaying oscillating (such as ringing) current in the circuit, which increases the fall time of the electrical pulse, which in turn increases the fall time of the optical pulse. Reducing the peak current in the circuit reduces the stored energy but also reduces the power of the optical pulse.

[0018] Some embodiments described herein provide a drive circuit for generating narrow (e.g., less than 1 ns wide) electrical pulses with a high repetition rate (e.g., greater than 90 MHz and up to 1000 megahertz (MHz)), the electrical pulses having a high peak current (e.g., at least 5 A) and a low peak current after pulse ringing (e.g., no second pulse at all after the initial pulse), to drive an optical load. The drive circuit may include a power supply, a first circuit path connected to the power supply to charge one or more inductive elements, and a second circuit path connected to the power supply and to the optical load. In some embodiments, the first circuit path may include one or more inductive elements and a switch having an open state and a closed state, wherein the switch in the closed state charges the one or more inductive elements with current (e.g., 10 ns charge time). In some embodiments, the second circuit path may include a capacitive element, a resistive element, and the one or more inductive elements in series with the optical load, wherein the switch in the open state discharges current from the one or more inductive elements through the second circuit path (e.g., 1 ns pulse discharge time) to provide an electrical pulse to the optical load.

[0019] In some embodiments, the one or more inductive elements may include parasitic elements in the drive circuit (e.g., elements having parasitic inductance, parasitic capacitance, and / or the like), and the parasitic elements may discharge current through the second circuit path to provide an electrical pulse to the optical load. Thus, the drive circuit may use, for example, parasitic inductance to provide electrical pulses with a narrow width and a high peak current at a high repetition rate.

[0020] In some embodiments, the resistive element in the second circuit path may suppress oscillations of the current and / or energy released from the one or more inductive elements. Thus, the drive circuit may reduce after pulseringing.

[0021] Figure 1 is a circuit diagram of an exemplary embodiment 100 of the drive circuit and the optical load described herein. As Figure 1 shown, the optical device may include a power supply 102, an inductive element 104, a first capacitive element 106, an optical load 108, a second capacitive element 110, a first resistive element 112, ground 114, a switch 116, a second resistive element 118, and a third capacitive element 120. In some embodiments, the drive circuit may include the inductive element 104, the first capacitive element 106, the second capacitive element 110, the first resistive element 112, ground 114, the switch 116, the second resistive element 118, and the third capacitive element 120.

[0022] In some embodiments, power supply 102 may supply current to the drive circuit. For example, power supply 102 may be a DC (direct current) voltage source, a DC current source with a resistive load, etc.

[0023] In some embodiments, inductive element 104 may include one or more inductive elements of the drive circuit and / or may simulate the total inductance of the drive circuit. For example, inductive element 104 may simulate current-carrying conductors in the drive circuit, bond wires in the drive circuit, switch 116, second resistive element 118, traces included in the drive circuit to increase the total inductance of the drive circuit, and / or the like. Additionally or alternatively, inductive element 104 may include and / or simulate one or more parasitic elements in the drive circuit. Additionally or alternatively, second resistive element 118 and third capacitive element 120 may simulate the resistance and capacitance of switch 116, respectively.

[0024] In some embodiments, the drive circuit may include a first circuit path 122 that includes inductive element 104, switch 116, and second resistive element 118. Switch 116 may have an open state (e.g., a shut-down state), in which no current flows through switch 116 when switch 116 is in the open state. Additionally, switch 116 may have a closed state (e.g., an on state), in which current may flow through switch 116 when switch 116 is in the closed state. In some embodiments, when switch 116 is in the closed state, current charges inductive element 104 (e.g., including one or more parasitic elements in the drive circuit) through first circuit path 122. For example, as Figure 1 indicated by reference numeral 126 in the figure, when switch 116 is in the closed state, current may flow through switch 116 and charge inductive element 104 (e.g., including one or more parasitic elements in the drive circuit) through first circuit path 122. In some embodiments, when switch 116 is in the closed state, current may flow through switch 116 and charge inductive element 104 through first circuit path 122 during a first time interval (e.g., a charging time), where the first time interval is in the range of 1 ns to 20 ns. In some embodiments, the first time interval is in the range of 1 ns to 10 ns (e.g., because in some embodiments, charging for more than 10 ns may not increase the pulse height).

[0025] In some embodiments, the drive circuit may include a second circuit path 124 connected to the optical load 108, where the second circuit path 124 includes an inductive element 104, a first capacitive element 106, a second capacitive element 110, and a first resistive element 112. In some embodiments, the second capacitive element 110 may help suppress post-pulse ringing by dumping an oscillating voltage on the optical load 108. In some embodiments, when the switch 116 is in the off state, current discharges from the inductive element 104 (e.g., including one or more parasitic elements in the drive circuit) through the second circuit path 124 to provide an electrical pulse to the optical load 108. For example, as Figure 1 shown by reference numeral 128 in the figure, when the switch 116 is in the off state, current does not flow through the switch 116, and current discharges from the inductive element 104 (e.g., including one or more parasitic elements in the drive circuit) through the second circuit path 124 to provide an electrical pulse to the optical load 108. In some embodiments, when the switch 116 is in the off state, current does not flow through the switch 116, and current discharges from the inductive element 104 through the second circuit path 124 to provide an electrical pulse to the optical load 108 during a second time interval (e.g., the discharge time), where the second time interval may be as short as 1 ns.

[0026] In some embodiments, the first capacitive element 106 may be a blocking capacitor, and the optical load 108 may be an AC-coupled optical load. For example, the first capacitive element 106 may be a blocking capacitor that prevents the optical load 108 from emitting light when the switch 116 is in the closed state. In such an example, the power supply 102 may provide an input (e.g., voltage, current, and / or the like) to the drive circuit, where the input is greater than the threshold for the optical load 108 to emit light (e.g., the laser threshold voltage and / or the like). By providing an input greater than the threshold for the optical load 108 to emit light, the power supply 102 and the drive circuit can charge the inductive element 104 with a greater amount of energy in a shorter time compared to the case where the input is limited by the light-emitting threshold of the optical load 108. If the first capacitive element 106 that acts as a blocking capacitor does not exist, the power supply 102 would undesirably cause the optical load 108 to emit light when the switch 106 is closed (e.g., if the input is greater than the threshold of the optical load), or the power supply 102 would be limited to providing an input below the optical load threshold, undesirably reducing the amount of energy and / or time available for charging the inductive element 104.

[0027] Compared with traditional drive circuits, by charging the inductive element 104 with a larger amount of energy, when the inductive element 104 discharges through the second circuit path 124 to provide an electrical pulse to the optical load 108, the power supply 102 and the drive circuit achieve a higher peak current of the electrical pulse. In some embodiments, the higher peak current of the electrical pulse generates the emission of an optical pulse through the optical load 108, which has a higher peak power than the peak power of the optical pulse emitted in response to an electrical pulse with a lower peak current. Thus, the drive circuit can generate a higher-power optical pulse from the optical load 108, which improves the performance of the time-of-flight-based measurement system including the optical load 108.

[0028] Additionally, or alternatively, the higher peak current of the electrical pulse generates the emission of an optical pulse through the optical load 108, which has a higher peak current than the peak current of the optical pulse emitted in response to an electrical pulse with a lower peak current. Thus, the drive circuit can generate an optical pulse with a higher peak current from the optical load 108, which improves the performance of the time-of-flight-based measurement system including the optical load 108.

[0029] Furthermore, or alternatively, a small parasitic inductive element 104 (e.g., in the range of 300 pH to 3000 pH, such as in the range of 600 pH to 2000 pH, and / or the like) can generate short electrical pulses, which can reduce the rise time and fall time of the electrical pulse, and this can also reduce the rise time and fall time of the optical pulse. By reducing the rise time and fall time of the optical pulse, the drive circuit can generate a more rectangular optical pulse from the optical load 108 compared to that achieved with higher rise time and fall time (e.g., traditional drive circuits). Thus, the drive circuit can achieve shorter and more rectangular optical pulses, which can simplify the measurements performed by the time-of-flight-based measurement system including the optical load 108 and improve its performance.

[0030] Moreover, by reducing the rise time and fall time of the electrical pulse and the rise time and fall time of the optical pulse, the drive circuit can generate a narrower optical pulse (e.g., an optical pulse with a narrow width in the time dimension) from the optical load 108 compared to that achievable with higher rise time and fall time (e.g., traditional drive circuits). For example, a drive circuit with the optical load 108 can generate optical pulses with a width in the range of 30 picoseconds (ps) to 1000 ps. By generating optical pulses with a narrower width, the drive circuit can generate optical pulses at a higher pulse repetition frequency compared to wider optical pulses. Thus, the drive circuit allows the time-of-flight-based measurement system including the optical load 108 to have a higher pulse repetition frequency, which can improve the performance (e.g., spatial resolution) of the time-of-flight-based measurement system.

[0031] By charging the inductive element 104 of a small value in a shorter time, the power supply 102 and the drive circuit can generate optical pulses at a higher pulse repetition frequency as compared to what can be achieved with a longer charging time (e.g., a conventional drive circuit). A conventional drive circuit can have a large inductance (e.g., several μH) and a corresponding large charging time (e.g., several microseconds). In some embodiments, the power supply 102 and the drive circuit can charge the inductive element 104 in a charging time in the range of 1 ns to 10 ns. For example, for an inductive element 104 having an inductance in the range of 600 pH to 2000 pH, the power supply 102 and the drive circuit can charge the inductive element 104 in a charging time in the range of 2 ns to 5 ns. In some embodiments, the pulse repetition frequency (e.g., the switching frequency) can be in the range of 20 kilohertz (kHz) to 1 gigahertz (GHz) (e.g., in the range from 50 MHz to 1 GHz). In some embodiments, the pulse repetition frequency can depend on the application of the drive circuit. For example, a time-of-flight based measurement system (e.g., a LIDAR system) can have a lower pulse repetition frequency to allow the signal to return from a reflecting surface and be recorded on a detector in response to an initial pulse before a subsequent pulse is sent.

[0032] Additionally, or alternatively, by generating a higher peak power and a narrower optical pulse (e.g., by obtaining a higher peak current for an electrical pulse, by reducing the rise time and fall time of the electrical pulse, and / or the like), the drive circuit can allow a time-of-flight based measurement system including the optical load 108 to have a lower total power consumption as compared to a conventional drive circuit having an optical load.

[0033] In some embodiments, the inductive element 104 can include a trace (e.g., a circuit trace on a printed circuit board (PCB), a wire trace, a trace, and / or the like), the trace having a length and a width, the length and width of the trace being based on the total inductance required considering the parasitic inductance of other circuit elements (e.g., current-carrying conductors in the drive circuit, bond wires in the drive circuit, and / or the like). In some embodiments, the trace can have a length and a width to achieve the total inductance of the drive circuit. For example, the trace can be designed (e.g., having a length and a width and / or the like) to add inductance to the drive circuit, thereby increasing the total inductance of the drive circuit. In some embodiments, the trace can have a length and a width to achieve a total inductance for the drive circuit that meets the current threshold of the optical load 108. For example, a total inductance in the range of 300 picohhenries (pH3) to 3000 pH can meet the threshold.

[0034] Additionally, alternatively, the trace can have a length and a width to achieve a total inductance that meets a threshold for the drive circuit, where if the energy stored in the inductive element in the drive circuit generates a peak current of an electrical pulse upon discharge, and this peak current meets the light load threshold current (e.g., a threshold current in the range from several hundreds of milliamperes (mA) to 3 amperes (A) and / or the like), then the total inductance meets this threshold. For example, the trace (e.g., having a length and a width, etc.) can be designed based on the desired peak current in the light load 108.

[0035] In an example operation of the implementation of the drive circuit, when the switch 116 is closed (e.g., in the closed state), the current from the DC power supply 102 does not flow through the light load 108, and the current flowing through the first circuit path enables energy to be stored in the inductive element in the drive circuit during the closing of the switch 116. When the switch 116 is opened (e.g., in the open state), the reverse current from the inductive element in the drive circuit can now pass through the load 108 to generate an optical pulse. The peak current passing through the light load 108 can be controlled by designing the trace of the drive circuit with a desired parasitic inductance. This drive circuit utilizes the parasitic inductance in the drive circuit to generate a high-current short pulse passing through the light load 108.

[0036] In some embodiments, the switch 116 can be a high-speed low-output capacitance switch for generating a narrow electrical pulse width, and can be a transistor, such as a field effect transistor (FET), a metal oxide semiconductor field effect transistor (MOSFET), a gallium nitride field effect transistor (GaNFET), an avalanche transistor, and / or the like. As described above, the second resistive element 118 and the third capacitive element 120 can respectively simulate the resistance and capacitance of the switch 116. In some embodiments, the third capacitive element 120 can affect the pulse height and width (e.g., amplitude and duration) of the electrical pulse from the drive circuit. For example, as the capacitance in the third capacitive element 120 increases, the electrical pulse can become smaller and wider (e.g., decreased amplitude and increased duration). In some embodiments, the energy stored in the inductive element 104 can bypass the light load 108 and pass through the third capacitive element 120, and as the capacitance of the third capacitive element 120 increases, the fall time of the electrical pulse can increase.

[0037] As Figure 1As shown, the drive circuit may include a second capacitive element 110 in parallel with the optical load 108. In some embodiments, the second capacitive element 110 may adjust the shape of the electrical pulse provided to the optical load 108. For example, the second capacitive element 110 may adjust the shape of the electrical pulse to have a shorter rise time than the shape of the electrical pulse generated by a drive circuit without the second capacitive element 110. By providing an electrical pulse with a shorter rise time to the optical load 108, the drive circuit can generate an optical pulse with a shorter rise time from the optical load 108 compared to what is achieved with an electrical pulse having a long rise time (e.g., a conventional drive circuit without a capacitor in parallel with the optical load).

[0038] In some embodiments, the first resistive element 112 in the second circuit path 124 may suppress oscillations in the current discharging from the inductive element 104. In some embodiments, when the switch 116 is in the off state and current discharges from the inductive element 104 through the second circuit path 124, the current may be a decaying oscillatory (e.g., ringing) current. For example, the current may include an initial pulse having a peak current, followed by additional pulses having lower peak currents. In some embodiments, the first resistive element 112 may reduce the amplitude of the additional electrical pulses to a level below the emission threshold of the optical load 108. In this way, the drive circuit can reduce post-pulse ringing.

[0039] In some embodiments, the optical load 108 may include an array of one or more light-emitting diodes, an array of one or more laser diodes, an array of one or more semiconductor laser diodes, an array of one or more vertical-cavity surface-emitting lasers (VCSELs), and / or the like. In some embodiments, the optical load 108 may include multiple optical loads electrically connected in parallel or in series. For example, the optical load 108 may include a VCSEL array having 400 emitters electrically connected in parallel. As another example, the optical load 108 may include multiple VCSELs (e.g., an array or individual units) connected in series (e.g., on a printed circuit board (PCB)), which may provide increased optical power compared to a single VCSEL array.

[0040] In some embodiments, the optical device may include a power supply 102, a drive circuit, and an optical load 108. For example, the optical device may be a time-of-flight based measurement system (e.g., a LIDAR system). In some embodiments, a LIDAR system (e.g., a vehicle-based LIDAR system, a three-dimensional sensing LIDAR system, a consumer electronic device, a handheld device, a tablet, a mobile phone, a consumer appliance, a payment kiosk system, and / or the like) may include a power supply 102, a drive circuit, and an optical load 108.

[0041] As described above, Figure 1Provided only as an example. Other examples may differ from those regarding Figure 1 as described.

[0042] Figure 2 is a diagram of an example curve 200 (e.g., obtainable from an oscilloscope measuring the electrical output 2A of a drive circuit and the optical output 1A of an optical load), which shows electrical and optical signals associated with an example implementation of a drive circuit and an optical load 108 described herein. For example, the drive circuit may be similar to the drive circuit referred to in Figure 1 described. The example curve 200 shows an electrical signal 202 provided by the drive circuit to the optical load 108, which is an AC-coupled VCSEL array, and an optical signal 204 generated by the AC-coupled VCSEL array in response to the electrical signal 202. In Figure 2 , the electrical signal 202 and the optical signal 204 are misaligned in the time domain by at least 8 nanoseconds, which is caused by data acquisition delays due to differences in the devices used to capture the electrical signal 202 and the optical signal 204. In this example, the power supply provides a 5-volt (V) DC current to the drive circuit, and the drive circuit is charged (e.g., when the switch in the first path of the drive circuit is in the closed / on position) for a charging time of 6 ns. The drive circuit releases current (e.g., through a second circuit path while the switch in the first path of the drive circuit is in the open / off position), where the current provided to the AC-coupled laser includes an electrical pulse with a peak voltage of 22 V. The AC-coupled laser generates an optical pulse with a DC-equivalent peak current greater than 60 A (e.g., approximately 66 A) and a pulse width less than 0.1 ns. Additionally, the electrical signal 202 has an initial pulse with a high peak voltage, followed by one additional pulse with a low peak voltage, indicating reduced ringing. There is no ringing in the optical signal 204.

[0043] Figure 3 is a diagram of an example curve 300 (e.g., obtainable from an oscilloscope), which shows the voltage from an optical detector that receives an optical signal associated with an example implementation of a drive circuit and an optical load described herein. For example, the drive circuit may be similar to the drive circuit referred to in Figure 1The described drive circuit. Example graph 300 shows the optical signal generated by the AC-coupled VCSEL array in response to the electrical signal provided by the drive circuit to the AC-coupled VCSEL array. The power supply provides a DC current of 12 volts (V) to the drive circuit, and the drive circuit charges a parasitic inductance of approximately 500 pH within a charging time of 10 nanoseconds (e.g., when the switch in the first path of the drive circuit is in the closed state / on position). The drive circuit releases current from the parasitic inductance (e.g., through a second circuit path that includes the AC-coupled VCSEL array, a 1 nF capacitor, and a 1 ohm resistor, while the switch in the first path of the drive circuit is in the open state / off position), where the current provided to the AC-coupled VCSEL array generates an optical pulse with a width of approximately 190 ps. Additionally, the initial pulse of the optical signal has a high peak current and no subsequent pulses, indicating reduced ringing. In Figure 3 , limitations of the measurement device (e.g., bandwidth limitations of an oscilloscope, parasitic properties of a probe, EMI (electromagnetic interference) from a high-speed switching FET, etc.) can make it difficult to directly obtain a clear and accurate measurement of sub-nanosecond or picosecond electrical pulses provided by the drive circuit. Therefore, simulation can be used to estimate the peak current provided by the drive circuit to the optical load.

[0044] Figure 4 is a graph of an example graph 400 associated with an example implementation of the drive circuit and the optical load 108 described herein, which graph shows an electrical signal 402 and an optical signal 404 (e.g., the voltage measured from a photodetector that receives the optical signal). For example, the drive circuit can be similar to the drive circuit described with reference to Figure 1 Example graph 400 shows the electrical signal 402 provided by the drive circuit to a laser with a threshold voltage of approximately 1.5 V, and the optical signal 404 generated by the laser in response to the electrical signal 402. In Figure 4 , the electrical signal 402 and the optical signal 404 have been aligned in the time domain (e.g., to correct for data acquisition differences, such as differences in the devices used to capture the electrical signal 402 and the optical signal 404 and / or the like). Due to limitations of the measurement device (e.g., as described above), the measurement of the absolute voltage or optical power may not be clear or accurate, but the relative relationship and correlation between the electrical signal 402 and the optical signal 404 are significant. As Figure 4 shown, through the optical signal 404, even after the electrical signal 402 has reached the threshold voltage, the laser remains dark (e.g., does not emit optical pulses) for a duration corresponding to a characteristic relaxation oscillation period of approximately 0.1 ns. The electrical signal 402 continues to rise, which builds the photon number and stores energy in the cavity of the laser. When the photon number reaches a peak, the laser emits an optical pulse, and the natural decay of the inductive discharge current reduces the current flowing to the laser, resulting in an optical pulse with a narrow width. For example, asFigure 4 As shown, the optical signal 404 includes an optical pulse with a width of 0.08 ns and no secondary pulses. Similarly, as Figure 4 shown, a driving circuit is used to drive the laser to generate an optical pulse, and the optical pulse width of this optical pulse is narrower than the electrical pulse width of the electrical pulse in the electrical signal 402. For example, the optical pulse width can be less than one-tenth of the electrical pulse width.

[0045] In some embodiments, an example implementation of the driving circuit associated with Figure 4 and the optical load 108 can achieve a pulse repetition rate of 200 MHz (e.g., a period of 5 nanoseconds), which corresponds to a charging period of less than 4.7 nanoseconds for a 0.3-ns pulse. Additionally, or alternatively, an example embodiment of the driving circuit associated with Figure 4 and the optical load 108 can generate a peak equivalent pulse current of up to 40 A (e.g., 5 A or greater) without ring-down distortion (e.g., post-pulse oscillating current and / or voltage).

[0046] Figure 5 are an example image 502 of the far-field pattern of a VCSEL array optical load including 400 emitters driven by an example embodiment of a driving circuit, an example image 504 of a VCSEL array optical load including 400 emitters driven by a conventional driving circuit, and example graphs 506, 508 showing the cross-section of the far-field pattern (shown in example image 502) of a VCSEL array optical load including 400 emitters driven by an example embodiment of a driving circuit. Figure 6 are an example image 602 of the near-field pattern of a VCSEL array optical load including 400 emitters driven by an example embodiment of a driving circuit and an example image 604 of the near-field pattern of a VCSEL array optical load including 400 emitters driven by a conventional driving circuit. In some embodiments, a first VCSEL array driven by a driving circuit similar to the driving circuit described for Figure 1 can generate an optical pulse with an optical pulse width of less than 0.1 ns (e.g., 100 ps), and the charging time is 2.5 ns. When driven by a driving circuit similar to the driving circuit described with reference to Figure 1 , the first VCSEL array can generate a far-field pattern as shown in example image 502 and a near-field pattern as shown in example image 602. Therefore, the far-field pattern shown in example image 502 and the near-field pattern shown in example image 602 can be generated by an optical pulse with an optical pulse width less than 0.1 ns.

[0047] In some embodiments, a second VCSEL array driven by another drive circuit can generate optical pulses with an optical pulse width of 10 ns. The second VCSEL array can generate a far-field pattern as shown in Example Image 504 and a near-field pattern as shown in Example Image 604. Therefore, the far-field pattern shown in Example Image 504 and the near-field pattern shown in Example Image 604 can be generated by optical pulses with an optical pulse width of 10 ns.

[0048] As shown in Example Images 502 and 602, for optical pulses with an optical pulse width less than 0.1 ns, the far-field pattern and the near-field pattern can be irradiated in a single spatial mode with a nearly Gaussian distribution. Example curves 506 and 508 respectively show the horizontal and vertical cross-sections of the far-field pattern in Example Image 502 to illustrate the nearly Gaussian distribution.

[0049] As shown in Example Images 504 and 604, for optical pulses with an optical pulse width of 10 ns, the far-field pattern and the near-field pattern include a dark spot at the center of the far-field pattern and the center of each point in the near-field pattern, which can represent a circular interference pattern.

[0050] Figure 7 is a diagram of a high-resolution spectrum 700 of an optical load driven by an exemplary embodiment of the drive circuit described herein. For example, the optical load can be similar to the VCSEL array optical load of 400 emitters described herein with reference to Figure 5 and Figure 6 which, when driven by an exemplary embodiment of the drive circuit, emits optical pulses with an optical pulse width less than 0.1 ns. As Figure 7 shown, the high-resolution spectrum 700 indicates that approximately 90% of the VCSELs are irradiated in a single spatial mode (e.g., a single frequency mode).

[0051] By driving the optical load to emit optical pulses with a narrow width and irradiating in a single spatial mode, as shown and described with reference to Figures 5 - 7 the exemplary drive circuit can improve the performance of a time-of-flight based measurement system. For example, as Figure 5 and 6 shown, the far-field pattern and the near-field pattern can be uniform, which can improve the resolution of a time-of-flight based measurement system.

[0052] As described above, Figures 2 - 7 is provided only as one or more examples. Other examples can be different from those described with respect to Figures 2 - 7 For example, in some embodiments, the drive circuit can be implemented as an application specific integrated circuit (ASIC), such as a hybrid ASIC containing high-power switching FETs.

[0053] Figure 8is a flowchart of an example process 800 for driving an optical load. In some implementations, Figure 8 one or more of the process blocks may be performed by a drive circuit (e.g., a drive circuit similar to the drive circuit described for Figure 1 ). In some embodiments, Figure 8 one or more of the process blocks may be performed by another device or set of devices separate from or including the drive circuit, such as an optical device (e.g., a time-of-flight measurement system, a LIDAR system, a vehicle-based LIDAR system, a three-dimensional sensing LIDAR system, a 3D sensing system, and / or the like) and / or the like.

[0054] As Figure 8 shown, process 800 may include charging one or more inductive elements with a power source by closing a switch in a first time interval to supply current through a first circuit path to the one or more inductive elements (block 810). For example, as described above, the drive circuit may charge the one or more inductive elements with a power source (e.g., a DC voltage source) by closing a switch in a first time interval to supply current through a first circuit path to the one or more inductive elements.

[0055] As Figure 8 further shown, process 800 may include driving an optical load by disconnecting the switch in a second time interval after the first time interval to release current from the one or more inductive elements through a second circuit path to supply an electrical pulse to the optical load, where the second circuit path includes the optical load, the one or more inductive elements, and a capacitive element in series with the optical load (block 820). For example, as described above, the drive circuit may drive the optical load by disconnecting the switch in a second time interval after the first time interval to release current from the one or more inductive elements through a second circuit path to supply an electrical pulse to the optical load.

[0056] Process 800 may include additional embodiments, such as any single embodiment or combination of embodiments described below, and / or in combination with one or more other processes described elsewhere herein.

[0057] In a first embodiment, the first time interval ranges from 1 nanosecond to 20 nanoseconds.

[0058] In a second embodiment, either alone or in combination with the first embodiment, process 800 includes adjusting the shape of the electrical pulse supplied to the optical load using another capacitive element in parallel with the optical load.

[0059] In a third embodiment, alone or in combination with one or more of the first and second embodiments, process 800 includes suppressing oscillations of current released from the one or more inductive elements using a resistor in a second circuit path to reduce post-pulse ringing in an electrical pulse.

[0060] In a fourth embodiment, alone or in combination with one or more of the first through third embodiments, charging the one or more inductive elements with a power source includes charging the one or more inductive elements with an input that is greater than a threshold for light load illumination, where the capacitive element is a blocking capacitor, and process 800 further includes preventing light load illumination with the blocking capacitor when the switch is open.

[0061] In a fifth embodiment, alone or in combination with one or more of the first through fourth embodiments, process 800 includes repeatedly charging the one or more inductive elements during a first time interval and driving a light load during a second time interval to provide a plurality of electrical pulses to the light load.

[0062] In a sixth embodiment, alone or in combination with one or more of the first through fifth embodiments, process 800 includes closing a switch at a switching frequency to charge one or more inductive elements and opening the switch to drive a light load, where the switching frequency ranges from a few tens of kHz to 100 MHz and even 1 gigahertz (GHz) (e.g., ranges from 50 MHz to 1 GHz).

[0063] Although Figure 8 example blocks of process 800 are shown, in some embodiments, process 800 may include additional blocks, fewer blocks, different blocks, or blocks arranged differently compared to those shown in Figure 8 . Additionally or alternatively, two or more blocks of process 800 may be executed in parallel.

[0064] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the embodiments to the precise forms disclosed. Modifications and variations can be made in light of the above disclosure, or can be obtained from practice of the embodiments. For example, any of the embodiments described herein can be combined with any other embodiment described herein, unless there is a clear reason why such embodiments cannot be combined.

[0065] Embodiments are described herein in connection with thresholds. As used herein, meeting a threshold can refer, depending on the context, to a value that is greater than the threshold, greater than or equal to the threshold, higher than the threshold, less than the threshold, less than or equal to the threshold, equal to the threshold, etc.

[0066] Even if particular combinations of features are recited in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of various embodiments. In fact, many of these features may be combined in ways not specifically recited in the claims and / or not disclosed in the specification. Although each dependent claim listed below may directly depend on only one claim, the disclosure of various embodiments includes combinations of each dependent claim with every other claim in the claim set.

[0067] Unless expressly stated otherwise, any element, act, or instruction used herein should not be construed as critical or essential. Additionally, as used herein, the article "a" is intended to include one or more items and may be used interchangeably with "one or more." Additionally, as used herein, the article "the" is intended to include one or more items associated with the article "the" and may be used interchangeably with "one or more." Additionally, as used herein, the term "group" is intended to include one or more items (e.g., related items, unrelated items, combinations of related and unrelated items, etc.) and may be used interchangeably with "one or more." If only one item is intended, the phrase "only one" or similar language is used. Additionally, as used herein, terms such as "having" are intended to be open-ended terms. Additionally, the phrase "based on" is intended to mean "at least partially based on" unless expressly stated otherwise. Additionally, as used herein, the term "or" when used in a series is intended to be inclusive and may be used interchangeably with "and / or" unless expressly stated otherwise (e.g., if used in conjunction with "either" or "only one of").

[0068] Related Applications

[0069] This application claims priority to U.S. Provisional Patent Application No. 62 / 836,556, filed on April 19, 2019, entitled "Circuits for Generation of High-Power Ultra-Short Laser Pulses," the content of which is hereby incorporated by reference in its entirety.

Claims

1. A driving circuit for generating a narrow electrical pulse with a high peak current and a high repetition rate to drive an optical load, the driving circuit comprises: a power supply; a first circuit path connected to the power supply, wherein the first circuit path includes: a switch having an open state and a closed state, and one or more inductive elements, wherein the switch in the closed state causes current to flow through the first circuit path to charge the one or more inductive elements; and a second circuit path connected to the optical load, wherein the second circuit path is connected to the power supply, and the second circuit path includes: the one or more inductive elements, a resistive element, a first capacitive element connected in series with the optical load, and a second capacitive element connected in parallel with the optical load, wherein the switch transitioning from the closed state to the open state causes the one or more inductive elements to release current through the second circuit path to provide an electrical pulse to the optical load, and wherein the second capacitive element suppresses post-pulse ringing by dumping an oscillating voltage across the optical load.

2. The driving circuit according to claim 1, wherein, the power supply provides an input that is greater than the threshold at which the optical load will emit light, and wherein the first capacitive element is a blocking capacitor that prevents the optical load from emitting light when the switch is in the open state.

3. The driving circuit according to claim 1, wherein, the one or more inductive elements include traces, and the length and width of the traces are such that the total inductance of the driving circuit meets a threshold.

4. The driving circuit according to claim 3, wherein, if the energy stored by the one or more inductive elements generates a peak current of an electrical pulse that meets the threshold current of the optical load when discharging, then the total inductance meets the threshold.

5. The driving circuit according to claim 1, wherein, the switch in the closed state causes current to charge the one or more inductive elements in the range of 1 nanosecond to 20 nanoseconds.

6. The driving circuit according to claim 1, wherein, in response to the electrical pulse, the optical load emits an optical pulse with a width in the range of 30 picoseconds to 1000 picoseconds.

7. The driving circuit according to claim 1, wherein, the resistive element is used to suppress the oscillation of the energy released from the one or more inductive elements.

8. The driving circuit according to claim 1, wherein, the switch is a field effect transistor.

9. The driving circuit according to claim 1, wherein, the electrical pulse has a width of less than 1 nanosecond and a peak current of at least 5 amperes.

10. The driving circuit according to claim 1, wherein, the switching frequency of the switch is in the range from 50 megahertz to 1 gigahertz.

11. An optical device, comprising: a current source that provides an input; an optical load that emits light when provided with an input greater than a threshold; a first circuit path connected to the current source, wherein the first circuit path includes: a switch having an open state and a closed state, and one or more inductive elements, wherein the switch in the closed state causes energy to be charged to the one or more inductive elements through the first circuit path; and A second circuit path that is connected to an optical load and to a voltage source, and wherein the second circuit path includes: the one or more inductive elements, the optical load, a first capacitive element that is in series with the optical load, and a second capacitive element that is in parallel with the optical load, wherein a switch transitioning from a closed state to an open state causes the one or more inductive elements to release energy through the second circuit path to provide an electrical pulse to the optical load, wherein, in response to the electrical pulse, the width of the optical pulse from the optical load is in the range of 30 picoseconds to 1000 picoseconds, and wherein the second capacitive element suppresses post-pulse ringing by dumping an oscillatory voltage across the optical load.

12. The optical device according to claim 11, wherein, the second circuit path further includes a resistive element to damp the oscillation of the energy released from the one or more inductive elements.

13. The optical device according to claim 11, wherein, the switch is a field effect transistor.

14. The optical device according to claim 11, wherein, the current source will provide an input that is greater than the threshold at which the optical load will emit light.

15. The optical device according to claim 11, wherein, the optical load is at least one of an array of one or more light emitting diodes, an array of one or more laser diodes, an array of one or more semiconductor laser diodes, or an array of one or more vertical cavity surface emitting lasers.

16. The optical device according to claim 11, wherein, the one or more inductive elements include traces whose length and width achieve a total inductance that meets a threshold.

17. The optical device according to claim 11, wherein, the first capacitive element is a blocking capacitor that prevents the optical load from emitting light when the switch is in the open state.

18. The optical device according to claim 16, wherein, if the energy stored by the one or more inductive elements produces a peak current of an electrical pulse that meets the threshold current of the optical load upon discharge, then the total inductance meets the threshold.

19. The optical device according to claim 11, wherein, the switch being in the closed state causes current to charge the one or more inductive elements in the range of 1 nanosecond to 20 nanoseconds.

20. The optical device according to claim 11, wherein, the switching frequency of the switch is in the range from 50 megahertz to 1 gigahertz.

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