Display assembly with electronic transparency
By integrating microlens layers and logic unit layers into electronic displays and camera devices, the integration problem of light field capture and display is solved, achieving lightweight and efficient light field simulation transparency and supporting a variety of augmented reality applications.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- LOCKHEED MARTIN CORP
- Filing Date
- 2019-01-23
- Publication Date
- 2026-05-05
AI Technical Summary
Existing electronic displays and camera devices have failed to integrate effectively, limiting the ability to accurately capture and display the entire light field, resulting in problems such as large size, discomfort, and high complexity.
By setting first and second microlens layers, as well as an image sensor and a display layer on a circuit board, and combining them with a logic unit layer, the simulated transparency of the light field is achieved. By utilizing the signal processing of the microlens array and the logic unit layer, the light field can be accurately captured and displayed.
It provides a lightweight and comfortable electronic system that enables complete re-creation of the target light field, reducing complexity, cost, and power requirements, supporting virtual reality, augmented reality, and mixed reality applications, and improving the accuracy of light field replication.
Smart Images

Figure CN111868926B_ABST
Abstract
Description
Technical Field
[0001] This disclosure generally relates to light field displays and cameras, and more specifically, to display components with electronically simulated transparency. Background Technology
[0002] Electronic displays are used in a variety of applications. For example, displays are used in smartphones, laptops, and digital cameras. In addition to electronic displays, some devices (such as smartphones and digital cameras) may also include image sensors. Although some cameras and electronic displays capture and reproduce light fields separately, light field displays and light field cameras are generally not integrated with each other. Summary of the Invention
[0003] In one embodiment, an electronic display assembly includes: a circuit board; a first microlens layer located on a first side of the circuit board; and a second microlens layer located on a side of the circuit board opposite to the first microlens layer. The first microlens layer includes a first plurality of microlenses, and the second microlens layer includes a second plurality of microlenses. The electronic display assembly also includes an image sensor layer adjacent to the first microlens layer. The image sensor layer includes a plurality of sensor pixels configured to detect incoming light through the first plurality of microlenses. The electronic display assembly also includes a display layer adjacent to the second microlens array. The display layer includes a plurality of display pixels configured to emit light through the second plurality of microlenses. The electronic display assembly also includes a logic unit layer coupled to the circuit board. The logic unit layer includes one or more logic units configured to simulate transparency by directing signals from the plurality of sensor pixels to the plurality of display pixels, thereby emitting light from the second plurality of microlenses at an angle corresponding to the detected angle of incoming light through the first plurality of microlenses.
[0004] In another embodiment, an electronic display assembly includes a circuit board and a first microlens layer located on a first side of the circuit board. The first microlens layer includes a first plurality of microlenses. The electronic display assembly further includes a second microlens layer located on the side of the circuit board opposite to the first microlens layer. The second microlens layer includes a second plurality of microlenses. The electronic display assembly further includes an image sensor layer adjacent to the first microlens layer. The image sensor layer includes a plurality of sensor pixels configured to detect incoming light through the first plurality of microlenses. The electronic display assembly further includes a display layer adjacent to the second microlens array. The display layer includes a plurality of display pixels configured to emit light through the second plurality of microlenses. The electronic display assembly is configured to simulate transparency by emitting light from the second plurality of microlenses at an angle corresponding to the angle of the detected incoming light through the first plurality of microlenses.
[0005] In another embodiment, a method of manufacturing an electronic display includes: forming a plurality of unit attachment sites on a circuit board, coupling a plurality of sensor units to a first side of the circuit board, and coupling a plurality of display units to a second side of the circuit board opposite to the first side. Each unit attachment site corresponds to one of the plurality of display units and one of the plurality of sensor units. Each sensor unit is coupled to a corresponding one of the unit attachment sites, and each display unit is coupled to a corresponding one of the unit attachment sites. The method of manufacturing the electronic display further includes coupling a first plurality of microlenses to the plurality of sensor units and a second plurality of microlenses to the plurality of display units.
[0006] This disclosure provides several technical advantages. Some embodiments provide complete and accurate reproduction of the target light field while maintaining lightweight and user comfort. Some embodiments provide a thin electronic system that provides both opacity and controllable unidirectional simulated transparency, as well as digital display capabilities (such as virtual reality (VR), augmented reality (AR), and mixed reality (MR)). Some embodiments provide a direct sensor-to-display system that uses a direct association from input pixels to corresponding output pixels to avoid the need for image transformation. For some systems, this reduces complexity, cost, and power requirements. Some embodiments provide an in-layer signal processing architecture that provides locally distributed processing of large amounts of data (e.g., 160k image data or more), thereby avoiding bottlenecks and performance, power, and transmission line issues associated with existing solutions. Some embodiments use a microlens layer with an array of all-optical primitives to accurately capture a quantity of light and display that quantity of light to an observer. The all-optical primitives include opaque primitive walls to eliminate optical crosstalk between primitives, thereby improving the accuracy of the reproduced light field.
[0007] Some embodiments provide three-dimensional electronics via geodesic facets. In this embodiment, a flexible circuit board with an array of small rigid surfaces (e.g., display and / or sensor facets) can be formed into any 3D shape, which is particularly helpful in accommodating the narrow radius of curvature (e.g., 30-60 mm) required for head-mounted near-eye surround displays. Some embodiments provide distributed multi-screen arrays for high-density displays. In this embodiment, an array of small, high-resolution microdisplays (e.g., display facets) of custom sizes and shapes is formed and subsequently assembled on a larger flexible circuit board, which can then be formed into a 3D shape (e.g., a hemispherical surface). Each microdisplay can operate independently of any other display, thereby providing a large array of many high-resolution displays, each with unique content, so that the entire assembly together forms an essentially single, extremely high-resolution display. Some embodiments provide a distributed multi-aperture camera array. This embodiment provides an array of small image sensors (e.g., sensor facets) of custom sizes and shapes, all of which are assembled on a larger flexible circuit board, which is then formed into a 3D (e.g., hemispherical) shape. Each discrete image sensor can operate independently of any other image sensor in order to provide a large array of many apertures, capturing unique content at each aperture, so that the entire assembly essentially becomes a seamless, ultra-high resolution multi-node camera.
[0008] pass Figures 1A to 42 From their description and claims, other technical advantages will readily become apparent to those skilled in the art. Furthermore, although specific advantages have been listed above, various embodiments may include all, some, or no listed advantages. Attached Figure Description
[0009] To gain a more complete understanding of this disclosure and its advantages, reference will now be made to the following description taken in conjunction with the accompanying drawings, wherein:
[0010] Figure 1A-1C This refers to a reference scene having various three-dimensional (3D) objects and various viewing positions according to certain embodiments;
[0011] Figure 2A-2C This indicates that, according to certain embodiments, it can be viewed through a transparent panel. Figure 1A-1C 3D objects;
[0012] Figures 3A-3C This indicates observation via the camera image panel according to certain embodiments. Figure 1A-1C 3D objects;
[0013] Figures 4A-4C This indicates that, according to certain embodiments, observation is performed via a simulated transparency electronic panel. Figure 1A-1C 3D objects;
[0014] Figures 5A-5C This indicates that, according to certain embodiments, alternative approaches are used. Figures 3A-3C View the camera image panel Figure 1A-1C 3D objects;
[0015] Figures 6A-6C This indicates that, according to certain embodiments, alternative approaches are used. Figures 4A-4C Simulated transparency of electronic panels for observation Figure 1A-1C 3D objects;
[0016] Figure 7 A cross-sectional view of a simulated transparency component according to certain embodiments;
[0017] Figure 8 According to certain embodiments Figure 7 An exploded view of the simulated transparency component;
[0018] Figure 9 Indicates manufacturing according to certain embodiments Figure 7 A method for simulating transparency components;
[0019] Figure 10 This indicates that, according to certain embodiments, it can be derived from... Figure 7 The simulated transparency component uses a direct sensor-to-display system;
[0020] Figure 11 Indicates manufacturing according to certain embodiments Figure 10 A method for direct sensor-to-display system;
[0021] Figure 12-13 This indicates that, according to certain embodiments, it can be derived from... Figure 7 The simulation transparency component uses various in-layer signal processing structures;
[0022] Figure 14 Indicates manufacturing according to certain embodiments Figure 12-13 Methods for intralayer signal processing systems;
[0023] Figure 15 This indicates that, according to certain embodiments, it can be derived from... Figure 7 The simulated transparency component uses a plenoptic cell component;
[0024] Figure 16 According to certain embodiments Figure 15 A cross-section of a portion of the all-optical elementary components;
[0025] Figures 17A-17C This indicates, according to certain embodiments, various incoming light fields. Figure 15A cross-section of a portion of the all-optical elementary components;
[0026] Figures 18A-18B Indicates manufacturing according to certain embodiments Figure 15 Methods for all-optical elementary components;
[0027] Figures 19A-19B Indicates manufacturing according to certain embodiments Figure 15 Another method for all-optical elementary components;
[0028] Figure 20-21 This indicates that, according to certain embodiments, it is possible to... Figures 18A-19B All-optical elementary components manufactured using this method;
[0029] Figure 22 This indicates that, according to certain embodiments, it can be derived from... Figure 7 The flexible circuit board used in the simulated transparency component;
[0030] Figure 23 According to certain embodiments Figure 22 Further details of the flexible circuit board;
[0031] Figure 24 This indicates that, according to certain embodiments, [the method / method] has been passed. Figure 22 Data stream on the flexible circuit board;
[0032] Figure 25 Indicates use according to certain embodiments Figure 22 Methods for manufacturing electronic components using flexible circuit boards;
[0033] Figure 26 A cross-sectional view of a curved multi-display array according to certain embodiments;
[0034] Figure 27 According to certain embodiments Figure 26 Exploded view of a curved multi-display array;
[0035] Figures 28-29 According to certain embodiments Figure 26 The logic facets and display facets of a curved multi-display array;
[0036] Figure 30 According to certain embodiments Figure 22 The back of the flexible circuit board;
[0037] Figure 31 This indicates that, according to certain embodiments, [the method / method] has been successfully implemented. Figure 30 Data stream on the flexible circuit board;
[0038] Figure 32 This indicates that, according to certain embodiments, it has been formed into a hemispherical shape. Figure 30Flexible circuit boards;
[0039] Figure 33 This indicates that, according to certain embodiments, [the method / method] has been successfully implemented. Figure 32 Data stream on the flexible circuit board;
[0040] Figure 34 This represents an array of logical facets that have been formed into a hemispherical shape according to certain embodiments;
[0041] Figure 35 According to certain embodiments Figure 34 Communication between logical planes;
[0042] Figure 36 Indicates manufacturing according to certain embodiments Figure 26 Methods for bending multi-display arrays;
[0043] Figure 37 A cross-sectional view showing a curved multi-camera array according to certain embodiments;
[0044] Figures 38-39 According to certain embodiments Figure 37 Exploded view of a curved multi-camera array;
[0045] Figure 40 According to certain embodiments Figure 32 Rear view of the flexible circuit board;
[0046] Figure 41 This indicates that, according to certain embodiments, [the method / method] has been successfully implemented. Figure 40 Data stream on the flexible circuit board; and
[0047] Figure 42 Indicates manufacturing according to certain embodiments Figure 37 A method for curved multi-camera arrays. Detailed Implementation
[0048] Electronic displays are used in a variety of applications. For example, displays are used in smartphones, laptops, and digital cameras. In addition to electronic displays, some devices (such as smartphones and digital cameras) may also include image sensors. However, devices with both displays and image sensors are generally limited in their ability to accurately capture and display the full photonic environment.
[0049] To address the problems and limitations associated with existing electronic displays, embodiments of this disclosure provide various electronic components for capturing and displaying light fields. Figure 1A-9 This relates to display components with electronically simulated transparency. Figure 10-11 Involves direct camera-display systems. Figure 12-14 Involves intra-layer signal processing. Figure 15-21Involves all-optical elementary imaging systems, Figure 22-25 This involves the distribution of three-dimensional (3D) electronic devices via geodesic facets. Figure 26-36 This relates to distributed multi-screen arrays for high-density displays, and Figure 37-42 It involves distributed multi-aperture camera arrays.
[0050] To facilitate a better understanding of this disclosure, examples of certain embodiments are given below. These examples should not be read to limit or define the scope of this disclosure. (By referring to...) Figure 1A-42 To best understand the embodiments of this disclosure and their advantages, the same reference numerals are used to indicate the same and corresponding parts.
[0051] Figure 1A-9 This describes various aspects of a component with electronic simulation transparency according to certain embodiments. Generally, Figure 7-8 The electronic components shown in detail can be used in various applications to provide features such as virtual reality (VR), augmented reality (AR), and mixed reality (MR). For VR applications, a digital display is needed that can completely replace the real-world field of view, similar to how a standard computer monitor blocks the view of the scene behind it. However, for AR applications, a digital display is needed that can overlay data onto the real-world field of view, such as the head-up display for pilots in modern cockpits. MR applications require a combination of both. Typical systems used to provide some or all of these features are unsatisfactory for many reasons. For example, typical solutions do not provide an accurate or complete reproduction of the target light field. As another example, existing solutions are often bulky and uncomfortable for the user.
[0052] To address the problems and limitations associated with existing electronic displays, embodiments of this disclosure provide a thin electronic system that provides both opacity and controllable unidirectional simulated transparency, as well as digital display capabilities. From one side, the surface appears opaque, but from the opposite side, the surface can appear completely transparent, completely opaque, function as a digital display, or any combination thereof. In some embodiments, all-light sensing and display technologies are simultaneously combined within a single layered structure to form a surface that appears unidirectionally transparent. The system may include multiple layers of electronics and optics to artificially recreate transparency that can be enhanced and / or digitally controlled. Individual image sensor pixels on one side may be spatially arranged to match the position of display pixels on the opposite side of the component. In some embodiments, all electronic drive circuitry and some display logic circuitry may be sandwiched between the sensor layer and the display layer, and the output signal of each sensor pixel may be directed by the circuitry to the corresponding display pixel on the opposite side. In some embodiments, this centrally processed signal is aggregated with incoming signals from an all-light imaging sensor array on the opposite side and processed according to the following operating modes. In VR mode, external video sources take precedence over camera data, completely replacing the user's view of the external world with the incoming field of view from the video. In AR mode, external video sources are overlaid on camera data, resulting in a combined field of view of the external world and the view from the video (e.g., video data is simply added to the scene). In MR mode, external video sources are mixed with camera data, allowing virtual objects to appear to interact with real-world objects, altering virtual content through object occlusion, lighting, etc., to make it appear integrated with the real environment.
[0053] Utilizing sensor pixels on one side of the component and display pixels on the other, and employing pixel-to-pixel alignment between the camera and the display, some embodiments combine stacked transparent high dynamic range (HDR) sensors and display pixels into a single structure. Both the sensor and display pixel arrays can be focused by multiple sets of microlenses to capture and display a four-dimensional light field. This means that the entire real-world field of view is captured on one side of the component and electronically reproduced on the other, allowing for partial or complete alteration of the image while maintaining image sharpness, brightness, and sufficient angular resolution so that the display side appears transparent even when viewed at an angle.
[0054] Figure 1A-6C Provided to represent the difference between the electronically simulated transparency provided by embodiments of this disclosure and a typical camera image (such as the current camera image displayed through a camera viewfinder or using a smartphone). Figure 1A-1C This represents a reference scene having various 3D objects 110 (i.e., 110A-C) and a frontal viewing position according to certain embodiments. Figure 1A It is a top view of the arrangement of 3D object 110 and the frontal viewing direction of 3D object 110. Figure 1B Is with Figure 1A The same 3D object 110 is arranged and viewed from the front. Figure 1C From Figure 1A and 1B The image shows a front view of the 3D object 110 obtained at the position shown. It can be seen that the 3D object 110 is... Figure 1C The field of view in the image is the normal expected field of view of the 3D object 110 (i.e., the field of view of the 3D object 110 is not changed at all because there is nothing between the observer and the 3D object 110).
[0055] Figure 2A-2C This indicates that, according to certain embodiments, observation can be made through the transparent panel 210. Figure 1A-1C The 3D object 110. The transparent panel 210 can be, for example, a piece of transparent glass. Figure 2A It is a top view of the 3D object 110 viewed from the front through the transparent panel 210, and Figure 2B Is with Figure 2A The same 3D object 110 is arranged and viewed from the front. Figure 2C Through the transparent panel 210 Figure 2A and 2B The image shows a front view of the 3D object 110 obtained at the position shown in the diagram. It can be seen that the 3D object 110 is visible through the transparent panel 210. Figure 2C The field of view in the image is the normal, expected field of view of the 3D object 110 (i.e., the field of view of the 3D object 110 is completely unchanged because the observer is viewing it through the transparent panel 210). In other words, Figure 2C The field of view of the 3D object 110 through the transparent panel 210 is different from the field of view of the 3D object 110 when there is no object between the observer and the 3D object 110. Figure 1C The field of view is the same (i.e., the transparency is "perceived"). In other words, the edges of the projected image on the transparent panel 210 are aligned with the field of view of the actual 3D object 110 behind the transparent panel 210 to create a field-view alignment image 220A for 3D object 110A, a field-view alignment image 220B for 3D object 110B, and a field-view alignment image 220C for 3D object 110C.
[0056] Figures 3A-3C This indicates observation via the camera image panel 310 according to certain embodiments. Figure 1A-1C The 3D object 110. The camera image panel 310 may be, for example, a camera viewfinder displaying its current camera image or a smartphone display. In these images, the camera image panel 310 is at an angle (e.g., 30 degrees) relative to the observer to indicate how such a system does not provide realistic simulated transparency. Figure 3A It is a top view of the 3D object 110 viewed from the front through the camera image panel 310, and Figure 3B Is with Figure 3A The same 3D object 110 is arranged and viewed from the front. Figure 3C From Figure 3A and 3B The image shows a front view of the 3D object 110 obtained through the camera image panel 310 at the position shown. It can be seen that the 3D object 110 is... Figure 3C The field of view in the image is different from the field of view of the 3D object 110 through the transparent panel 210. Here, the line of sight perpendicular to the camera image panel 310 is redirected, thus not displaying the perceived transparency (i.e., the image on the camera image panel 310 is not aligned with the field of view, but instead describes the image acquired through the redirected line of sight). In other words, the edges of the projected image on the camera image panel 310 are not aligned with the field of view of the actual 3D object 110 behind the camera image panel 310. Figure 3C This is illustrated by the misaligned images 320A and 320B of the 3D object 110A and 3D object 110B on the camera image panel 310.
[0057] Figures 4A-4C This indicates that, according to certain embodiments, observation is performed via a simulated transparency electronic panel 410. Figure 1A-1C 3D object 110. In these images, the simulated transparency panel 410 is angled (e.g., 30 degrees) relative to the observer to show how the simulated transparency panel 410 differs from the camera image panel 310 in providing realistic simulated transparency. Figure 4A It is a top view of the 3D object 110 viewed from the front using the simulated transparency panel 410, and Figure 4B Is with Figure 4A The same 3D object 110 is arranged and viewed from the front. Figure 4C From Figure 4A and 4B The image shows a front view of the 3D object 110 obtained through the simulated transparency panel 410 at the position shown. It can be seen that the 3D object 110 is visible through the simulated transparency panel 410. Figure 4CThe field of view in the simulated transparency panel 410 differs from the field of view of the 3D object 110 through the camera image panel 310, but is similar to the field of view of the 3D object 110 through the transparency panel 210. Here, the simulated transparency panel 410 does not redirect the viewer's gaze through the simulated transparency panel 410, but rather allows it to remain almost unchanged, thereby providing simulated transparency (i.e., like the transparency panel 210, the image on the simulated transparency panel 410 is aligned with the field of view). Like the transparency panel 210, the edges of the projected image on the simulated transparency panel 410 are aligned with the field of view of the actual 3D object 110 behind the simulated transparency panel 410 to create a field-view aligned image 220A for 3D object 110A, a field-view aligned image 220B for 3D object 110B, and a field-view aligned image 220C for 3D object 110C.
[0058] Figures 5A-5C Indicates passage Figures 3A-3C Observe the camera image panel 310 Figure 1A-1C The 3D object 110 is viewed from an alternative perspective. In these images, the camera image panel 310 is at a different 30-degree angle relative to the observer to further illustrate how this system does not provide realistic simulated transparency. Figures 3A-3C Similarly, the edges of the image projected onto the camera image panel 310 are not aligned with the field of view of the actual 3D object 110 behind the camera image panel 310. (This is achieved through...) Figure 5C This is illustrated by the misaligned image 320C of 3D object 110C and the misaligned image 320B of 3D object 110B on the camera image panel 310.
[0059] Figures 6A-6C Indicates passage Figures 4A-4C Simulated transparency electronic panel 410 observation Figure 1A-1C The 3D object 110, but viewed from an alternative perspective. Like Figures 4A-4C The same as in the middle, Figure 6C The edges of the projected image on the simulation transparency panel 410 are aligned with the field of view of the actual 3D object 110 behind the simulation transparency panel 410 to create a field of view alignment image 220B for 3D object 110B and a field of view alignment image 220C for 3D object 110C.
[0060] As above Figures 4A-4C As shown in 6A-6C, the simulated transparency panel 410 provides a view alignment image 220 of the 3D object 110 behind the simulated transparency panel 410, thereby providing electronic simulated transparency. Figure 7-8 This illustrates an exemplary embodiment of the simulated transparency panel 410. Figure 7 This represents a cross-sectional view of the simulated transparency component 710, which may be a simulated transparency panel 410. Figure 8According to certain embodiments Figure 7 An exploded view of the simulated transparency component 710.
[0061] In some embodiments, the simulated transparency component 710 includes two microlens arrays 720 (i.e., a sensor-side microlens array 720A and a display-side microlens array 720B), an image sensor layer 730, a circuit board 740, and an electronic display layer 760. Typically, an incoming light field 701 enters the sensor-side microlens array 720A, where it is detected by the image sensor layer 730. An electronically replicated outgoing light field 702 is then generated by the electronic display layer 760 and projected through the display-side microlens array 720B. As explained in more detail below, the unique arrangement and features of the simulated transparency component 710 allow it to provide electronically simulated transparency via the electronically replicated outgoing light field 702 and other features described below. Although a specific shape of the simulated transparency component 710 is shown in... Figure 7-8 However, the simulation transparency component 710 can have any suitable shape (including any polygonal or non-polygonal shape) and flat or non-flat structures.
[0062] The microlens array 720 (i.e., the sensor-side microlens array 720A and the display-side microlens array 720B) is typically a multilayered array of microlenses. In some embodiments, each microlens of the microlens array 720 is as follows (reference 1) Figure 15 The all-optical primitive 1510 is described in more detail. Typically, each microlens of the sensor-side microlens array 720A is configured to capture a portion of the incoming light field 701 and guide it to a pixel within the image sensor layer 730. Similarly, each microlens of the display-side microlens array 720B is configured to emit a portion of the outgoing light field 702, which is electronically replicated by the pixels of the electronic display layer 760. In some embodiments, each microlens of the sensor-side microlens array 720A and the display-side microlens array 720B has a 3D shape with a collimating lens located at one end of the 3D shape. The 3D shape may be, for example, a triangular polyhedron, a rectangular cuboid, a pentagonal polyhedron, a hexagonal polyhedron, a heptagonal polyhedron, or an octagonal polyhedron. In some embodiments, each microlens of the sensor-side microlens array 720A and the display-side microlens array 720B includes an opaque wall, such as primitive wall 1514 (hereinafter referred to as Figure 15 (Discussion) The opaque wall is configured to prevent light leakage into adjacent microlenses. In some embodiments, each microlens of the sensor-side microlens array 720A and the display-side microlens array 720B additionally or alternatively includes a light incident angle suppression coating (such as filter layer 1640 described below) to prevent light leakage into adjacent microlenses.
[0063] In some embodiments, the microlenses of the sensor-side microlens array 720A are arranged facing a first direction, and the microlenses of the display-side microlens array 720B are arranged facing a second direction at a 180-degree angle relative to the first direction. In other words, some embodiments of the simulated transparency component 710 include the sensor-side microlens array 720A, which is arranged exactly opposite to the display-side microlens array 720B. In other embodiments, any other orientation of the sensor-side microlens array 720A and the display-side microlens array 720B is possible.
[0064] Typically, the image sensor layer 730 includes a plurality of sensor pixels configured to detect the incoming light field 701 after it has passed through the sensor-side microlens array 720A. In some embodiments, the image sensor layer 730 includes an array of sensor units 735 (e.g., sensor units 735A-C, such as...). Figure 8 (As shown in the diagram). Each sensor unit 735 may be a defined portion of the image sensor layer 730 (e.g., a specific region, such as part of a rectangular grid) or a specific number or pattern of sensor pixels within the image sensor layer 730. In some embodiments, each sensor unit 735 corresponds to a specific logic unit 755 of the logic unit layer 750 as described below. In some embodiments, the image sensor layer 730 is coupled to or, on the other hand, adjacent to the sensor-side microlens array 720A. In some embodiments, the image sensor layer 730 is located between the sensor-side microlens array 720A and the circuit board 740. In other embodiments, the image sensor layer 730 is located between the sensor-side microlens array 720A and the logic unit layer 750. In some embodiments, other suitable layers may be included in the simulated transparency component 710 on either side of the image sensor layer 730. Additionally, although a specific number and pattern of sensor units 735 are shown, any suitable number (including only one) and pattern of sensor units 735 may be used.
[0065] Circuit board 740 is any suitable rigid or flexible circuit board. Typically, circuit board 740 includes various pads and traces providing electrical connections between various layers of the simulated transparency component 710. As an example, in embodiments including circuit board 740, circuit board 740 may be as follows: Figure 7-8The circuit board 740 is located between the image sensor layer 730 and the logic unit layer 750 to provide an electrical connection between the image sensor layer 730 and the logic unit layer 750. In other embodiments, the circuit board 740 may be located between the logic unit layer 750 and the electronic display layer 760 to provide an electrical connection between the logic unit layer 750 and the electronic display layer 760. In some embodiments, the circuit board 740 includes an array of cell attachment locations 745 (e.g., cell attachment locations 745A-C, such as...). Figure 8 (As shown in the diagram). Each unit attachment location 745 may be a defined portion of the circuit board 740 (e.g., a specific area, such as part of a rectangular grid) and may include multiple pads (e.g., ball grid array (BGA) pads) and / or vias. In some embodiments, each unit attachment location 745 corresponds to a specific sensor unit 735 of the image sensor layer 730 and a specific display unit 765 of the electronic display layer 760 (e.g., unit attachment location 745A corresponds to sensor unit 735A and display unit 765A) and is configured to allow electrical communication between the corresponding specific sensor unit 735 and the specific display unit 765.
[0066] Logic unit layer 750 provides optional / additional logic and / or processing for the simulated transparency component 710. Typically, logic unit layer 750 simulates transparency by directing signals from the plurality of sensor pixels of image sensor layer 730 to the plurality of display pixels of electronic display layer 760, thereby emitting an electronically replicated outgoing light field 702 from display-side microlens array 720B at an angle corresponding to the angle of the incoming light field 701 detected by sensor-side microlens array 720A. By emitting the electronically replicated outgoing light field 702 from display-side microlens array 720B at an angle corresponding to the angle of the incoming light field 701 detected by sensor-side microlens array 720A, an image matching the image that would be seen in the absence of simulated transparency component 710 (i.e., simulated transparency) is displayed. In some embodiments, logic unit layer 750 includes an array of logic units 755 (e.g., logic units 755A-C, such as...). Figure 8(As shown in the diagram). Each logic unit 755 may be a defined portion of the logic unit layer 750 (e.g., a specific region, such as part of a rectangular grid). In some embodiments, each logic unit 755 is a separate, physically rigid unit that is later joined or coupled to other logic units 755 to form the logic unit layer 750. In some embodiments, each logic unit 755 corresponds to a specific sensor unit 735 of the image sensor layer 730 and a specific display unit 765 of the electronic display layer 760 (e.g., logic unit 755A corresponds to (and is electrically coupled to) sensor unit 735A and display unit 765A). In some embodiments, the logic unit layer 750 is located between the circuit board 740 and the electronic display layer 760. In other embodiments, the logic unit layer 750 is located between the image sensor layer 730 and the circuit board 740. In some embodiments, other suitable layers may be included in the simulated transparency component 710 on either side of the logic unit layer 750. Additionally, although a specific number and pattern of logic units 755 are shown, any suitable number (including zero or only one) and pattern of logic units 755 may be used.
[0067] Typically, the electronic display layer 760 includes a plurality of display pixels configured to generate an electronically replicated outgoing light field 702 and project the electronically replicated outgoing light field 702 through a display-side microlens array 720B. In some embodiments, the electronic display layer 760 includes an array of display units 765 (e.g., display units 765A-C, such as...). Figure 8 (As shown in the diagram). Each display unit 765 may be a defined portion of the electronic display layer 760 (e.g., a specific area, such as part of a rectangular grid) or a specific number or pattern of display pixels within the electronic display layer 760. In some embodiments, each display unit 765 corresponds to a specific logic unit 755 of the logic unit layer 750. In some embodiments, the electronic display layer 760 is coupled to or, on the other hand, adjacent to the display-side microlens array 720B. In some embodiments, the electronic display layer 760 is located between the display-side microlens array 720B and the circuit board 740. In other embodiments, the electronic display layer 760 is located between the display-side microlens array 720B and the logic unit layer 750. In some embodiments, other suitable layers may be included in the simulated transparency component 710 on either side of the electronic display layer 760. Additionally, although a specific number and pattern of display units 765 are shown, any suitable number (including only one) and pattern of display units 765 may be used.
[0068] In some embodiments, the sensor pixels of the image sensor layer 730 may be sensor pixels 1800 as described in Figures 18-20 and the associated description of U.S. Patent Application No. 15 / 724,027 entitled “Stacked Transparent Pixel Structures for Image Sensors,” the entire contents of which are incorporated herein by reference. In some embodiments, the display pixels of the electronic display layer 760 may be display pixels 100 as described in Figures 1-4 and the associated description of U.S. Patent Application No. 15 / 724,004 entitled “Stacked Transparent Pixel Structures for Electronic Displays,” the entire contents of which are incorporated herein by reference.
[0069] although Figure 7-8 The simulated transparency component 710 is described as an array having sensors, displays, and electronic devices, but other embodiments may have a “single unit” structure. Furthermore, although the illustrated embodiment of the simulated transparency component 710 describes unidirectional simulated transparency (i.e., allowing the capture of an incoming light field 701 from a single direction and displaying a corresponding electronically replicated outgoing light field 702 in the opposite direction), other embodiments may include arrangements and combinations of simulated transparency components 710 that allow bidirectional transparency.
[0070] Figure 9 Indicates manufacturing according to certain embodiments Figure 7 A method 900 for simulating transparency component 710. Method 900 may begin at step 910, in which a plurality of unit attachment locations are formed on a circuit board. In some embodiments, the circuit board is circuit board 740 and the unit attachment locations are unit attachment locations 145. In some embodiments, each unit attachment location corresponds to one of a plurality of display units (such as display unit 765) and one of a plurality of sensor units (such as sensor unit 735).
[0071] In step 920, a plurality of sensor units are coupled to a first side of the circuit board. In some embodiments, the sensor unit is sensor unit 735. In some embodiments, each sensor unit is coupled in step 920 to a corresponding unit attachment location of step 910. In some embodiments, the sensor unit is initially formed as an image sensor layer (such as image sensor layer 730), and the image sensor layer is coupled to the first side of the circuit board in this step.
[0072] In step 930, a plurality of display units are coupled to a second side of the circuit board opposite to the first side. In some embodiments, the display unit is display unit 765. In some embodiments, each display unit is coupled to a corresponding unit attachment location. In some embodiments, the display unit is first formed as a display layer (such as an electronic display layer 760), and the display layer is coupled to the second side of the circuit board in this step.
[0073] In step 940, a first plurality of microlenses are coupled to the plurality of sensor units of step 920. In some embodiments, the microlenses are all-optical elements 1510. In some embodiments, the microlenses are first formed as a microlens array layer (such as a sensor-side microlens array 720A), and the microlens array layer is coupled to the sensor units.
[0074] In step 950, a second plurality of microlenses are coupled to the plurality of display units of step 930. In some embodiments, the microlenses are all-optical elements 1510. In some embodiments, the microlenses are first formed as a microlens array layer (such as a display-side microlens array 720B), and the microlens array layer is coupled to the display units. After step 950, method 900 may end.
[0075] In some embodiments, method 900 may further include coupling a plurality of logic units between the circuit board of step 910 and the plurality of display units of step 930. In some embodiments, the logic units are logic units 755. In some embodiments, the plurality of logic units are coupled between the circuit board and the plurality of sensor units of step 920.
[0076] Where appropriate, certain embodiments may repeat one or more steps of method 900. While this disclosure describes and represents specific steps of method 900 as occurring in a particular order, this disclosure contemplates that any suitable step of method 900 may occur in any suitable order (e.g., any chronological order). Furthermore, while this disclosure describes and represents exemplary methods of manufacturing simulated transparency components that include specific steps of method 900, this disclosure contemplates that any suitable method of manufacturing simulated transparency components may include any suitable steps, which may, where appropriate, include all, some, or none of the steps of method 900. Additionally, while this disclosure describes and represents specific components, apparatus, or systems that perform specific steps of method 900, this disclosure contemplates any suitable combination of any suitable components, apparatus, or systems that perform any suitable step of method 900.
[0077] Figure 10 This indicates that, according to certain embodiments, it can be derived from... Figure 7 The simulated transparency component enables a direct sensor-to-display system 1000. Typically, Figure 10 This illustrates how embodiments of the simulated transparency component 710 use a direct association between input pixels and corresponding output pixels. In some embodiments, a layered approach is used to make such an association as... Figure 7-8 The image sensor layer 730 and the electronic display layer 760 shown are located close to each other and mounted on opposite sides of a shared substrate (e.g., circuit board 740) to achieve this. Signals from the image sensor layer 730 can be directly propagated to the electronic display layer 760 via the circuit board 740 (in some embodiments, via the circuit board 740 and the logic unit layer 750). The logic unit layer 750 provides simple processing using optional inputs for any necessary control or enhancement. Typical electronic sensor / display pairs (e.g., digital cameras) do not represent a one-to-one correspondence because the display is not directly coupled to the input sensor and therefore requires some degree of image transformation. However, some embodiments of this disclosure implement a one-to-one mapping between input and output pixels (i.e., the sensor pixel and display pixel layout is identical), thereby avoiding the need for any image transformation. This reduces the complexity and power requirements of the simulated transparency component 710.
[0078] like Figure 10 As shown, each sensor unit 735 is directly coupled to a corresponding display unit 765. For example, sensor unit 735A may be directly coupled to display unit 765A, sensor unit 735B may be directly coupled to display unit 765B, and so on. In some embodiments, the signaling between sensor unit 735 and display unit 765 can be any suitable differential signaling, such as low-voltage differential signaling (LVDS). More specifically, each sensor unit 735 may output a first signal in a specific format (e.g., LVDS) corresponding to the incoming light field 701. In some embodiments, the first signal is transmitted via a corresponding logic unit 755, which in turn transmits a second signal to display unit 765 in the same format (e.g., LVDS) as the first signal. In other embodiments, the first signal is transmitted directly from sensor unit 735 to display unit 765 (e.g., sensor unit 735 and display unit 765 are directly coupled to opposite sides of circuit board 740). The display unit 765 receives a second signal from the logic unit 755 (or receives a first signal directly from the sensor unit 735 via the circuit board 740) and uses them to generate an outgoing light field 702.
[0079] Because no signal conversion is required between sensor unit 735 and display unit 765, the emulation transparency component 710 offers several advantages over typical display / sensor combinations. First, no signal processor is needed to convert the signal from sensor unit 735 to display unit 765. For example, no off-board signal processor is required to perform image transformations between sensor unit 735 and display unit 765. This reduces the space, complexity, weight, and cost requirements of the emulation transparency component 710. Second, the emulation transparency component 710 offers a higher resolution compared to what would typically be available in a display / sensor combination. By directly coupling sensor unit 735 to display unit 765 and without requiring any data processing or transformation between the units, the resolution of sensor unit 735 and display unit 765 can be significantly greater than what would typically be available. Furthermore, the emulation transparency component 710 can provide different resolutions for sensor unit 735 and display unit 765 at any given time. In other words, a specific sensor unit 735 and its corresponding display unit 765 may have a specific resolution at a specific time that is different from that of other sensor units 735 and display units 765, and the resolution of each sensor unit 735 and display unit 765 may change at any time.
[0080] In some embodiments, each specific sensor pixel of sensor unit 735 is mapped to a single display pixel of corresponding display unit 765, and the display pixel displays light corresponding to the light captured by the sensor pixel it is mapped to. This is best illustrated in Figures 17A-17B In the middle. As an example, a specific all-optical element 1510 of the sensor-side microlens array 720A (e.g., Figure 17A Each central sensing pixel 1725 of the sensor-side microlens array 720A (bottom all-optical element 1510) is mapped to a corresponding all-optical element 1510 of the display-side microlens array 720B (e.g., ...). Figure 17A The center display pixel 1735 of the bottom all-optical element 1510 of the display-side microlens array 720B. As another example, a specific all-optical element 1510 of the sensor-side microlens array 720A (e.g., Figure 17B Each top sensing pixel 1725 of the sensor-side microlens array 720A (top all-optical element 1510) is mapped to a corresponding all-optical element 1510 of the display-side microlens array 720B (e.g., Figure 17B The top all-light element 1510 of the display-side microlens array 720B in the display is the bottom display pixel 1735.
[0081] In some embodiments, the sensor unit 735 is directly coupled to the circuit board 740, while the display unit 765 is coupled to the logic unit 755 (which in turn is coupled to the circuit board 740), such as... Figure 8 As shown in the diagram. In other embodiments, display unit 765 is directly coupled to circuit board 740, while sensor unit 735 is coupled to logic unit 755 (logic unit 755 is in turn coupled to circuit board 740). In other embodiments, both sensor unit 735 and display unit 765 are directly coupled to circuit board 740 (i.e., without any intermediate logic unit 755). In this embodiment, sensor unit 735 and display unit 765 are coupled to opposite sides of circuit board 740 at unit attachment location 745 (e.g., sensor unit 735A and display unit 765A are coupled to opposite sides of circuit board 740 at unit attachment location 745A).
[0082] Figure 11 Indicates manufacturing according to certain embodiments Figure 10 A method 1100 for direct sensor-to-display system 1000. Method 1100 may begin with step 1110, in which a plurality of cell attachment locations are formed on a circuit board. In some embodiments, the circuit board is circuit board 740 and the cell attachment locations are cell attachment locations 745. In some embodiments, each cell attachment location corresponds to one of a plurality of display units and one of a plurality of sensor units. The display unit may be display unit 765 and the sensor unit may be sensor unit 735. In some embodiments, each particular cell attachment location includes a BGA pad configured to couple to one of the plurality of sensor units and / or one of the plurality of logic units. In some embodiments, each particular cell attachment location includes a plurality of interconnect pads configured to electrically couple the particular cell attachment location to one or more adjacent cell attachment locations. In some embodiments, the cell attachment locations are arranged in a plurality of columns and a plurality of rows, such as... Figure 8 As shown in the image.
[0083] In step 1120, a plurality of sensor units are coupled to a first side of the circuit board. In some embodiments, each sensor unit is coupled to a corresponding unit attachment location from step 1110. In step 1130, a plurality of display units are coupled to a second side of the circuit board opposite to the first side. In some embodiments, each display unit is coupled to a corresponding unit attachment location from step 1110 such that each particular sensor pixel unit of the plurality of sensor pixel units is mapped to a corresponding display pixel unit of the plurality of display pixel units. By mapping each particular sensor pixel unit to one of the display pixel units, the display pixel of each particular display pixel unit of the plurality of display pixel units is configured to display light corresponding to the light captured by the sensor pixel of the sensor pixel unit to which it is mapped. After step 1130, method 1100 may terminate.
[0084] Where appropriate, certain embodiments may repeat one or more steps of method 1100. While this disclosure describes and represents specific steps of method 1100 as occurring in a particular order, this disclosure contemplates that any suitable step of method 1100 may occur in any suitable order (e.g., any temporal order). Furthermore, while this disclosure describes and represents exemplary direct sensor-to-display system manufacturing methods including specific steps of method 1100, this disclosure contemplates that any suitable direct sensor-to-display system manufacturing method may include any suitable steps, which may, where appropriate, include all, some, or none of the steps of method 1100. Additionally, while this disclosure describes and represents specific components, apparatus, or systems that perform specific steps of method 1100, this disclosure contemplates any suitable combination of any suitable components, apparatus, or systems that perform any suitable step of method 1100.
[0085] Figure 12-13 This indicates that, according to certain embodiments, it can be derived from... Figure 7 The simulated transparency component 710 utilizes various in-layer signal processing structures. Typically, Figure 12-13The architecture uses a layer of digital logic (e.g., logic unit layer 750) sandwiched between the camera and the display (i.e., between the image sensor layer 730 and the electronic display layer 760). These architectures allow for locally distributed processing of large amounts of data (e.g., 160k image data or more), thereby avoiding the bottlenecks and performance, power, and transmission line issues associated with typical architectures. Human visual sensitivity represents a massive amount of data that must be processed in real time. Typical imaging systems propagate a single data stream to / from a high-performance processor (e.g., CPU or GPU), which may or may not serialize the data for manipulation. This approach, with human visual sensitivity of 20 / 20, requires bandwidth far exceeding that of any known transmission protocol. Typical systems also use a master controller responsible for handling all incoming / outgoing data or managing the allocation to smaller processing nodes. In any case, all data must be transmitted, manipulated, and then returned to the display device from outside the system / off-chip. However, this typical approach cannot handle the massive amounts of data required for human visual sensitivity. However, embodiments of this disclosure utilize the facet properties of the sensor / display combination as described herein to disperse and localize signal processing. This enables real-time digital image processing that was previously impossible.
[0086] like Figure 12-13 As shown, some embodiments of the simulated transparency component 710 include a logic unit layer 750, which contains the necessary logic to manipulate input signals from the image sensor layer 730 and provide output signals to the electronic display layer 760. In some embodiments, the logic unit layer 750 is located between the image sensor layer 730 and the circuit board 740, such as... Figure 12 As shown in the diagram. In other embodiments, the logic cell layer 750 is located between the circuit board 740 and the electronic display layer 760, as illustrated. Figure 13As shown in the diagram. Typically, the logic unit layer 750 is a dedicated image processing layer that can mix the input signals directly from the image sensor layer 730 and perform one or more mathematical operations (e.g., matrix transformations) on the input signals before outputting the obtained signals directly to the electronic display layer 760. Since each logic unit 755 of the logic unit layer 750 is only responsible for its associated facet (i.e., sensor unit 735 or display unit 765), it is possible to manipulate the data of a specific logic unit 755 without significantly affecting system-level I / O. This effectively avoids the need to parallelize any incoming sensor data for centralized processing. The distributed approach enables the simulated transparency component 710 to provide multiple features, such as magnification / zoom (each facet applies a scaling transformation to its input), visual correction (each facet applies a simulated optical transformation to compensate for common visual problems such as myopia, hyperopia, astigmatism, etc.), color blindness correction (each facet applies a color transformation to compensate for common color blindness problems), polarization (each facet applies a transformation simulating wave polarization, allowing for glare reduction), and dynamic range reduction (each facet applies a transformation that darkens high-intensity areas (e.g., sunlight) and brightens low-intensity areas (e.g., shadows)). Furthermore, since any data transformation remains confined to the logic unit layer 750 of each facet, long transmission lines are not required. This avoids problems such as crosstalk and signal integrity. Additionally, since the disclosed embodiment does not require optical transparency (but instead utilizes simulated transparency), there is no functional impact on placing an opaque processing layer between the sensor and display facets.
[0087] In some embodiments, the logic cell layer 750 includes discrete logic cells (e.g., transistors) formed directly on the circuit board 740. For example, standard photolithography techniques may be used to form the logic cell layer 750 directly on the circuit board 740. In other embodiments, each logic cell 755 is a separate integrated circuit (IC) coupled to a sensor facet or a display facet or directly coupled to the circuit board 740. As used herein, "facet" refers to a discrete cell that is separately manufactured and subsequently coupled to the circuit board 740. For example, "display facet" may refer to a cell comprising a combination of an electronic display layer 760 and a display-side microlens array 720B, and "sensor facet" may refer to a cell comprising a combination of an image sensor layer 730 and a sensor-side microlens array 720A. In some embodiments, a display facet may include a single display cell 765, or it may include multiple display cells 765. Similarly, a sensor facet may include a single sensor cell 735, or it may include multiple sensor cells 735. In some embodiments, the logic cell 755 may be included in a sensor facet or a display facet. In embodiments where the logic cell 755 is a separate IC directly coupled to the facet of a display or sensor (rather than being directly formed on the circuit board 740), any suitable technique (such as a 3D IC design with through-silicon vias) can be used to couple the IC of the logic cell 755 to the wafer of the facet.
[0088] In some embodiments, the logic cell layer 750 is an application-specific integrated circuit (ASIC) or an arithmetic logic unit (ALU) rather than a general-purpose processor. This allows the logic cell layer 750 to be energy-efficient. Additionally, this allows the logic cell layer 750 to operate without cooling, further reducing the cost and power requirements of the emulation transparency component 710.
[0089] In some embodiments, logic unit 755 is configured to communicate using the same protocol as sensor unit 735 and display unit 765. For example, in embodiments where logic unit 755 is a discrete IC, the IC may be configured to communicate according to the same protocol as the sensor and display facets (e.g., LVDS or integrated circuit (I)). 2 C) Communication. This eliminates the need to switch between sensor and display faces, thereby reducing power and cost.
[0090] In some embodiments, the logic unit layer 750 performs one or more operations on the signal received from the image sensor layer 730 before sending an output signal to the electronic display layer 760. For example, the logic unit layer 750 may transform the received signal from the image sensor layer 730 to include augmentation information for display on the electronic display layer 760. This can be used, for example, to provide AR to an observer. In some embodiments, the logic unit layer 750 may completely replace the received signal from the image sensor layer 730 with alternative information for display on the electronic display layer 760. This can be used, for example, to provide VR to an observer.
[0091] Figure 14 Indicates manufacturing according to certain embodiments Figure 12-13 Method 1400 of an in-layer signal processing system. Method 1400 may begin at step 1410, in which a plurality of sensor units are coupled to a first side of a circuit board. In some embodiments, the sensor unit is sensor unit 735, and the circuit board is circuit board 740. In some embodiments, each sensor unit is coupled to one of a plurality of unit attachment locations (such as unit attachment location 745). Each sensor unit includes a plurality of sensor pixels.
[0092] In step 1420, a plurality of display units are formed. In some embodiments, the display unit is a combination of display unit 765 and logic unit 755. Each display unit can be formed by combining the electronic display and logic unit into a single 3D integrated circuit using through-silicon vias (TSVs). Each display unit includes a plurality of display pixels.
[0093] In step 1430, the plurality of display units from step 1420 are coupled to a second side of the circuit board opposite to the first side. In some embodiments, each logic unit is coupled to a corresponding one of the unit attachment locations. After step 1430, method 1400 may terminate.
[0094] Where appropriate, certain embodiments may repeat one or more steps of method 1400. While this disclosure describes and represents specific steps of method 1400 as occurring in a particular order, this disclosure contemplates that any suitable step of method 1400 may occur in any suitable order (e.g., any chronological order). Furthermore, while this disclosure describes and represents exemplary methods of manufacturing an in-layer signal processing system that include specific steps of method 1400, this disclosure contemplates that any suitable method of manufacturing an in-layer signal processing system may include any suitable steps, which may, where appropriate, include all, some, or none of the steps of method 1400. Additionally, while this disclosure describes and represents specific components, apparatus, or systems that perform specific steps of method 1400, this disclosure contemplates any suitable combination of any suitable components, apparatus, or systems that perform any suitable step of method 1400.
[0095] Figure 15-17C Various views of the array 1500 of the all-optical primitive 1510 that can be used within the microlens array 720A-B of the simulated transparency component 710. Figure 15 This indicates a 1500 all-optical elementary module. Figure 16 express Figure 15 A cross-section of a portion of the all-optical elementary component 1500, and Figures 17A-17C This indicates the presence of various incoming and outgoing light fields. Figure 15 A cross-section of a portion of the all-optical primitive component 1500.
[0096] Standard electronic displays typically consist of a planar arrangement of pixels that form a two-dimensional rasterized image, inherently transmitting two-dimensional data. One limitation is that a planar image cannot be rotated to perceive different perspectives within the scene being transmitted. To clearly observe this image, regardless of what is depicted within the image itself, the observer's eye or a camera lens must be focused on the screen. In contrast, a fixed amount of light entering the eye from the real world allows the eye to naturally focus on any point within that fixed amount of light. Because light from the scene enters the eye naturally, this total light "field" encompasses the light from the scene, rather than a virtual image focused at a single focal plane by an external lens. While existing light field displays may be able to replicate this phenomenon, they offer a significant trade-off between spatial and angular resolution, resulting in the perceived amount of light appearing blurry or insufficient in detail.
[0097] To overcome the problems and limitations associated with existing light field displays, embodiments of this disclosure provide a coupled light field capture and display system capable of recording and subsequently electronically recreating an incoming total light quantity. Both capture and display processing are accomplished through the arrangement of pneumatic elements 1510 with a smaller field of view responsible for recording or displaying a larger composite image. Each pneumatic element 1510 of the sensor itself comprises a dense cluster of image sensor pixels, and each pneumatic element of the display itself comprises a dense cluster of display pixels. In both cases, light entering the sensor element or leaving the display element is focused by one or more transparent microlenses 1512 to produce a precisely tuned distribution of nearly collimated light. This essentially records the incoming light field and reproduces it on opposite sides of the assembly. More specifically, for the sensor, the amount of light entering the lens (or series of lenses) of this element is focused onto the image pixels such that each pixel gathers light from only one direction, as determined by its position within the element and the profile of the lens. This allows for the rasterization encoding of rays at various angles within the light field, with the number of pixels in the primitive determining the angular resolution of the recording. For a display, light emitted from a pixel is focused by the same lens (or a series of lenses) to create a certain amount of light matching the image recorded by the sensor, along with any electronic enhancements or alterations (e.g., from the aforementioned logic unit layer 750). The cone of light emitted from this primitive contains a subset of rays spaced at sufficient intervals to form a light field for the observer, where the direction of each output ray is determined by the position of its emitting pixel within the primitive and the profile of the lens.
[0098] The all-optical element 1510 can be used by both the sensor-side microlens array 720A and the display-side microlens array 720B. For example, multiple all-optical elements 1510A may be included in the sensor-side microlens array 720A, and each all-optical element 1510A may be coupled to or adjacent to the image sensor 1520. The image sensor 1520 may be part of the image sensor layer 730 and may include a sensor pixel array 1525, which includes sensing pixels 1725. Similarly, multiple all-optical elements 1510B may be included in the display-side microlens array 720B, and each all-optical element 1510B may be coupled to or adjacent to the display 1530. The display 1530 may be part of the electronic display layer 760 and may include a display pixel array 1625, which includes display pixels 1735. Sensing pixel 1725 may be sensor pixel 1800 as described in Figures 18-20 and the associated description of U.S. Patent Application No. 15 / 724,027, entitled “Stacked Transparent Pixel Structures for Image Sensors,” the entire contents of which are incorporated herein by reference. Display pixel 1735 may be display pixel 100 as described in Figures 1-4 and the associated description of U.S. Patent Application No. 15 / 724,004, entitled “Stacked Transparent Pixel Structures for Electronic Displays,” the entire contents of which are incorporated herein by reference.
[0099] In some embodiments, the all-optical element 1510 includes a transparent microlens 1512 and an element wall 1514. Specifically, the all-optical element 1510A includes a transparent microlens 1512A and an element wall 1514A, and the all-optical element 1510B includes a transparent microlens 1512B and an element wall 1514B. In some embodiments, the transparent microlens 1512 comprises a 3D shape, with a collimating lens located at one end of the 3D shape. For example, as... Figure 15As shown, the transparent microlens 1512 can be a rectangular cuboid, with a collimating lens located at one end of the rectangular cuboid. In other embodiments, the 3D shape of the transparent microlens 1512 can be a triangular polyhedron, a pentagonal polyhedron, a hexagonal polyhedron, a heptagonal polyhedron, an octagonal polyhedron, a cylinder, or any other suitable shape. Each all-optical primitive 1510A includes an input field of view (FOV) 1610 (e.g., 30 degrees), and each all-optical primitive 1510B includes an output FOV 1620 (e.g., 30 degrees). In some embodiments, the input FOV 1610 matches the output FOV 1620 of the corresponding all-optical primitive 1510.
[0100] The transparent microlens 1512 can be formed from any suitable transparent optical material. For example, the transparent microlens 1512 can be formed from a polymer, silica glass, or sapphire. In some embodiments, the transparent microlens 1512 can be formed from a polymer (such as polycarbonate or acrylic). In some embodiments, the transparent microlens 1512 can be replaced by a waveguide and / or a photonic crystal to capture and / or generate a light field.
[0101] Typically, the cell wall 1514 is a barrier to prevent optical crosstalk between adjacent all-optical cells 1510. The cell wall 1514 can be formed of any suitable material that is opaque to visible light when cured. In some embodiments, the cell wall 1514 is formed of a polymer. References are made below. Figure 17A and 17C A more detailed description of the use of primitive wall 1514 to prevent optical crosstalk.
[0102] In some embodiments, image sensor 1520 includes or is coupled to backplane circuitry 1630a, and display 1530 includes or is coupled to backplane circuitry 1630b. Typically, backplane circuitry 1630a-B provides electrical connectivity to allow image data to flow from image sensor 1520 to display 1530. In some embodiments, backplane circuitry 1630a and backplane circuitry 1630b are opposite sides of a single backplane. In some embodiments, backplane circuitry 1630a and backplane circuitry 1630b are circuit boards 740.
[0103] In some embodiments, the filter layer 1640 may be included at one or both ends of the transparent microlens 1512 to limit the entry or exit of light to a specific angle of incidence. For example, a first filter layer 1640A may be included at the protruding end of the transparent microlens 1512, and / or a second filter layer 1640B may be included at the opposite end of the transparent microlens 1512. Similar to the primitive wall 1514, this coating or film may also limit image leakage between adjacent transparent microlenses 1512 to an acceptable amount. The filter layer 1640 may also be used in addition to or in place of the primitive wall 1514.
[0104] Figures 17A-17C Each of the figures represents a cross-sectional view of seven adjacent all-optical elements 1510 of the sensor-side microlens array 720A and the corresponding display-side microlens array 720B. These figures show how the incoming light field 701 is captured by the image sensor 1520 and electronically replicated on the display 1530 to emit nearly the same light field. Figure 17A In this configuration, the incoming light field 1710 from an object directly in front of the sensor all-light element 1510 is focused onto the central sensing pixel 1725 by the transparent microlens 1512 of the sensor all-light element 1510. The corresponding light is then emitted by the corresponding central display pixel 1735 of the corresponding display all-light element 1510. The emitted light is focused by the transparent microlens 1512 of the display all-light element 1510 and emitted as an emitted light field 1711. The emitted light field 1711 precisely matches the zero-degree source light field (i.e., the incoming light field 1710). Furthermore, the emitted light rays that would otherwise permeate into adjacent display all-light elements 1510 and strike the element wall 1514 at position 1740 are blocked by the opaque element wall 1514, thereby preventing optical crosstalk.
[0105] exist Figure 17B In the sensor, an incoming light field 1720 from an object located 14 degrees off the axis of the sensor's all-light element 1510 is focused onto the top sensing pixel 1725 by the transparent microlens 1512 of the sensor's all-light element 1510. The corresponding light is then emitted by the corresponding opposite (i.e., bottom) display pixel 1735 of the corresponding display all-light element 1510. The emitted light is focused by the transparent microlens 1512 of the display all-light element 1510 and emitted as an emitted light field 1721. The emitted light field 1721 is precisely matched to the 14-degree source light field (i.e., the incoming light field 1720).
[0106] exist Figure 17C In this configuration, the incoming light field 1730 from an object 25 degrees off the axis of the sensor all-optical element 1510 is completely focused onto the element wall 1514 by the transparent microlens 1512 of the sensor all-optical element 1510. Because the incoming light field 1730 is completely focused onto the element wall 1514 of the sensor all-optical element 1510 and not onto the sensing pixel 1725, no corresponding light is emitted by the corresponding display all-optical element 1510. In addition, the incoming light that would have penetrated into the adjacent sensor all-optical element 1510 and struck the element wall 1514 at position 1750 is blocked by the opaque element wall 1514, thereby preventing optical crosstalk.
[0107] Figures 18A-18B Indicates manufacturing according to certain embodiments Figure 15 A method for all-optical elementary components. Figure 18AIn this process, a microlens array (MLA) plate 1810 is formed or obtained. The MLA plate 1810 includes multiple microlenses, as shown in the figure. Figure 18B In this design, a plurality of grooves 1820 are cut to a predetermined depth around each of the plurality of microlenses in the MLA plate 1810. In some embodiments, the grooves 1820 may be cut using a multi-pass cut to achieve the desired depth. In some embodiments, the grooves 1820 may be cut using laser ablation, etching, photolithography, or any other suitable method. After the grooves 1820 are cut to the desired depth, they are filled with a material configured to prevent light leakage through the grooves 1820. In some embodiments, the material, upon hardening, is any light-absorbing material (e.g., carbon nanotubes) or an opaque material (e.g., a non-reflective opaque material or a colored polymer). The resulting all-optical elementary assembly after the grooves 1820 are filled and allowed to harden is shown in [illustration]. Figure 20-21 middle.
[0108] Figures 19A-19B Indicates manufacturing according to certain embodiments Figure 15 Another method for all-optical elementary components. Figure 19A In this process, a pre-formed grid structure 1830 with gaps 1840 is obtained or formed. The grid structure 1830 is made of any suitable material as described above with respect to the elementary wall 1514. The grid structure 1830 can be formed by any suitable method, including but not limited to incremental manufacturing and ablation of the elementary material.
[0109] exist Figure 19B In the process, gap 1840 is filled using optical polymer 1850. Optical polymer 1850 can be any suitable material as described above for transparent microlens 1512. After gap 1840 is filled using optical polymer 1850, the final lens profile is created using molding or ablation. An example of the all-optical elementary assembly obtained after lens formation is shown in... Figure 20-21 middle.
[0110] Figure 22-23 This indicates that, according to certain embodiments, it can be derived from... Figure 7The simulated transparency component 710 serves as the flexible circuit board 2210 of the circuit board 740. Typically, winding electronics onto 3D shapes (such as spherical or hemispherical surfaces) is an important task. While various examples of flexible and even stretchable circuit systems exist, several obstacles need to be overcome when arranging such electronics on small-radius (e.g., 30-60 mm) spherical or hemispherical surfaces. For example, bending of the flexible electronics substrate along one direction does not inherently indicate adaptability to complex curvatures, as the torque required for such curvatures can damage the thin films involved. As another example, questions remain regarding the degree of stretchability and lifespan of currently available stretchable electronics.
[0111] To address the problems and limitations of current solutions, embodiments of this disclosure provide a method for manufacturing 3D (e.g., spherical or hemispherical) electronic devices using a geodesic facet scheme comprising an array of small rigid surfaces arranged on a single flexible circuit. In some embodiments, the flexible circuit is cut into a specific mesh shape, then wound into a 3D shape (e.g., a spherical or hemispherical shape) and locked in place to prevent wear from repeated bending. This method is particularly helpful for accommodating narrow radii of curvature (e.g., 30-60 mm) required for head-mounted near-eye surround displays. In some embodiments, the assembly comprises a single base flexible printed circuit system layer, with a rigid sensor and display array arranged on opposite sides of the flexible circuit. The entire assembly, including the sensor and display layers, can be manufactured using standard planar semiconductor processes (e.g., spin coating, photolithography, etc.). The rigid electronics layer can be etched to form individual sensor and display units (i.e., “facets”), then connected to the flexible circuit system via bonding pads and bonded using patterned conductive and non-conductive adhesives. This allows the flexible circuit system to fold slightly at the edges between the rigid facets. In some embodiments, subsequent planar fabrication uses one side of the final rigid polymer housing as a mold, and the fully cured functional electronics stack is formed into the desired final 3D shape. In this way, the array of rigid electronic device facets does not deform, but simply falls into position within their mold, and the flexible circuitry bends at defined creases / gap points to mate with the interior of the housing facets. The components can then be finally covered and sealed using the opposite mating side of the rigid housing.
[0112] The embodiments disclosed herein are not limited to spherical or hemispherical shapes, but such shapes are certainly conceivable. The disclosed embodiments can be formed with any composite curvature or any other shape of revolution. Furthermore, the disclosed embodiments can be formed with any non-uniform curvature and non-curved (i.e., flat) surfaces.
[0113] Figure 22The flexible circuit board 2210 is shown in two different states: a flat flexible circuit board 2210A and a 3D-shaped flexible circuit board 2210B. The flexible circuit board 2210 includes facet locations 2220, which are typically locations on the flexible circuit board 2210 where facets (e.g., sensor facet 3735, display facet 2665, or logic facet 2655 discussed below) can be mounted. In some embodiments, the flexible circuit board 2210 includes a gap 2215. Figure 22 As shown at the bottom, when the flexible circuit board 2210 is flat, at least some facet locations 2220 are separated from one or more adjacent facet locations 2220 through one or more gaps 2215. Figure 22 As shown at the top, when the flexible circuit board 2210 is formed into a 3D shape, the gap 2215 can be substantially eliminated, thereby forming a continuous surface across at least some facets coupled at facet locations 2220 (e.g., a continuous sensing surface across multiple sensor facets 3735 or a continuous display surface across multiple display facets 2665).
[0114] Typically, facet positions 2220 can have any shape. In some embodiments, facet positions 2220 have a polygonal shape (e.g., triangle, square, rectangle, pentagon, hexagon, heptagon, or octagon). In some embodiments, all facet positions 2220 are identical. However, in other embodiments, facet positions 2220 all share the same polygonal shape (e.g., all are hexagons) but have different dimensions. In some embodiments, facet positions 2220 have different shapes (e.g., some are rectangles and some are hexagons). Any suitable shape for facet positions 2220 can be used.
[0115] In some embodiments, facet positions 2220 are arranged as columns 2201. In some embodiments, facet positions 2220 are alternatively or otherwise arranged as rows 2202. Although a particular pattern of facet positions 2220 is shown, any suitable pattern of facet positions 2220 can be used.
[0116] Figure 23 Further details of the flexible circuit board 2210 according to certain embodiments are shown below. In some embodiments, each facet location 2220 includes pads and / or vias for coupling a sensor or display facet to the flexible circuit board 2210. As an example, some embodiments of the flexible circuit board 2210 include BGA pads 2240 at each facet location 2220. Any suitable pattern and number of pads / vias may be included at each facet location 2220.
[0117] Typically, each specific facet location 2220 is configured to transmit a signal between a specific sensor facet coupled to the specific facet location and a specific display facet coupled to the opposite side of the specific facet location. For example, a specific facet location 2220 may have a sensor facet 3735 coupled to one side and a display facet 2665 coupled to its opposite side. The specific facet location 2220 provides the necessary electrical connection to allow signals from the sensor facet 3735 to be directly transmitted to the display facet 2665, thereby enabling the display facet 2665 to display light corresponding to the light captured by the sensor facet 3735.
[0118] In some embodiments, wiring traces 2230 are included on the flexible circuit board 2210 to electrically connect facet locations 2220. For example, wiring traces 2230 may be connected to interconnect pads 2250 of each facet location 2220 to electrically connect adjacent facet locations 2220. In some embodiments, facet locations 2220 are connected in series via wiring traces 2230. For example, Figure 24 This represents a serial data stream through the flexible circuit board 2210 according to certain embodiments. In this example, each facet location 2220 is assigned a unique identifier (e.g., "1", "2", etc.), and data flows sequentially through facet locations 2220 via wiring traces 2230, as shown in the figure. In this way, each facet location 2220 can be addressed by a single processor or logic unit using its unique identifier. Any suitable addressing scheme and data flow pattern can be used.
[0119] Figure 25 Indicates use according to certain embodiments Figure 22 A method 2500 for manufacturing electronic components using a flexible circuit board 2210. In step 2510, a plurality of facet locations are formed on the flexible circuit board. In some embodiments, the facet locations are facet locations 2220, and the flexible circuit board is flexible circuit board 2210. Each facet location corresponds to one of a plurality of sensor facets and one of a plurality of display facets. The sensor facet may be a sensor facet 3735, and the display facet may be a display facet 2665. In some embodiments, the plurality of facet locations are arranged as a plurality of facet columns, such as column 2201. In some embodiments, the plurality of facet locations are additionally or alternatively arranged as a plurality of facet rows, such as row 2202.
[0120] In step 2520, the flexible circuit board of step 2510 is cut or otherwise shaped into a pattern that allows the flexible circuit board to be later formed into a 3D shape (such as a spherical or hemispherical shape). When the flexible circuit board is flat, at least some facet locations are separated from one or more adjacent facet locations by multiple gaps (such as gap 2215). When the flexible circuit board is formed into a 3D shape, the multiple gaps are substantially eliminated.
[0121] In step 2530, the electronic component is assembled by coupling a first plurality of rigid facets to a first side of the flexible circuit board. The first plurality of rigid facets may be a sensor facet 3735 or a display facet 2665. Each rigid facet is coupled to a corresponding facet location. In some embodiments, the first plurality of rigid facets are coupled to connection pads on the first side of the flexible circuit board using patterned conductive and non-conductive adhesives.
[0122] In some embodiments, the first plurality of rigid facets in step 2530 are rigid sensor facets (such as sensor facet 3735), and method 2500 further includes coupling a plurality of rigid display facets (such as display facet 2665) to a second side of the flexible circuit board opposite to the first side. In this case, each specific facet location is configured to transmit a signal between a specific rigid sensor facet electrically coupled to the specific facet location and a specific rigid display facet electrically coupled to the same specific facet location. This allows light corresponding to the light captured by the corresponding rigid sensor facet to be displayed from the specific rigid display facet.
[0123] In step 2540, the assembled electronic component is formed into a desired 3D shape. In some embodiments, this step includes placing a flexible circuit board with its coupled rigid facets on one side of a rigid housing having the desired shape. This allows the rigid facets to fall within a defined space within the housing and the flexible circuit board to bend at defined creases / gap between the rigid facets. After placing the flexible circuit board with its coupled rigid facets on one side of the rigid housing, a mating side of the rigid housing can be attached to the first side, thereby sealing the component into the desired shape.
[0124] Where appropriate, certain embodiments may repeat one or more steps of method 2500. While this disclosure describes and represents specific steps of method 2500 as occurring in a particular order, this disclosure contemplates that any suitable step of method 2500 may occur in any suitable order (e.g., any chronological order). Furthermore, while this disclosure describes and represents exemplary methods of manufacturing electronic components using flexible circuit boards, this disclosure contemplates any suitable method of manufacturing electronic components using flexible circuit boards that may, where appropriate, include all, some, or exclude steps of method 2500. Additionally, while this disclosure describes and represents specific components, apparatus, or systems that perform specific steps of method 2500, this disclosure contemplates any suitable combination of any suitable components, apparatus, or systems that perform any suitable step of method 2500.
[0125] Figure 26-36 This refers to a distributed multi-screen array for high-density displays, according to certain embodiments. Typically, to provide a near-eye display capable of simulating the entire field of vision of a single human eye, a high dynamic range image display with a resolution order of magnitude greater than that of currently common display screens is required. Such a display should be able to provide a light field display with angular and spatial resolution sufficient to accommodate 20 / 20 human visual sensitivity. This is a large amount of information, equivalent to 100K to 200K total horizontal pixels. These displays should also surround the entire field of vision of a human eye (approximately 160° horizontally and 130° vertically). To represent binocular vision, a pair of such displays would be needed spanning the entire curved surface around each eye. However, typical displays available today do not meet these requirements.
[0126] To address these and other limitations of current displays, embodiments of this disclosure provide an array of small, high-resolution microdisplays (e.g., display facet 2665) of custom size and shape, all of which are formed and subsequently assembled on a larger flexible circuit board 2210, which may be formed in a 3D shape (e.g., a hemispherical surface). The microdisplays may be mounted inside the hemispherical circuit system, and another layer containing an array of TFT logic cells (e.g., logic cell 755) may be included to handle all power and signal management. Typically, one logic cell 755 may be included for each microdisplay. Each microdisplay acts as a discrete unit, displaying data from the logic cells behind it. Any additional information (e.g., external video for AR, VR, or MR applications) may be passed to the entire array via a central control processor. In some embodiments, external data signals are passed sequentially from one microdisplay to the next as a packetized multiplexed stream, while the TFT logic cells for each display determine the source and portion of the signal being read. This allows each unit to operate independently of any other display, providing a large array of many high-resolution displays, each with unique content, so that the entire assembly together forms essentially a single, extremely high-resolution display.
[0127] To meet the requirements of resolution, color clarity, and brightness output, each microdisplay can have a unique high-performance pixel architecture. For example, each microdisplay screen may include an array of display pixels 100 as described in Figures 1-4 and the associated description in U.S. Patent Application No. 15 / 724,004, entitled “Stacked Transparent Pixel Structures for Electronic Displays,” the entire contents of which are incorporated herein by reference. Microdisplay screens can be assembled on the same substrate using any suitable method. This simultaneous fabrication using standard semiconductor layering and photolithography processes virtually eliminates the overhead and costs associated with the production and packaging of many individual screens, significantly improving affordability.
[0128] Figure 26 This is a cross-sectional view of a curved multi-display array 2600 according to some embodiments. Figure 26 Essentially Figure 22 On the back side of the flexible circuit board 2210B, a logic facet 2655 and a display facet 2665 are added, coupled to the flexible circuit board 2210B at facet location 2220. Typically, each logic facet 2655 is an individual logic unit 755 from the logic unit layer 750. Similarly, each display facet 2665 is an individual display unit 765 of the display layer 760 coupled to a portion of the microlens array 720.
[0129] In some embodiments, each individual logic facet 2655 is coupled to the flexible circuit board 2210, and each individual display facet 2665 is subsequently coupled to one of the logic facets 2655. In other embodiments, each logic facet 2655 is first coupled to one of the display facets 2665, and the combined facet is subsequently coupled to the flexible circuit board 2210. In this embodiment, the combined logic facet 2655 and display facet 2665 may be referred to as display facet 2665 for simplicity. As used herein, "display facet" may refer to both embodiments (i.e., an individual display facet 2665 or a combination of display facet 2665 and logic facet 2655).
[0130] Typically, each display panel 2665 can be individually addressed (e.g., addressed by a central control processor not shown), and a group of display panels 2665 can represent a dynamic, heterogeneous collection forming a single collective. In other words, the multi-display array 2600 provides a tiled electronic display system that displays images through individual display panels 2665 that together form a complete whole. Each individual display panel 2665 can provide a variety of different display resolutions and can be customized during operation to run different resolutions, color gamuts, frame rates, etc. For example, one display panel 2665 may have a 512x512 display resolution, while adjacent display panels 2665 (of the same size) have a 128x128 display resolution, where the former represents higher density image data. In this example, the two displays are different, but individually controllable and coordinated to form a single display image.
[0131] The overall batch of display facets 2665 can adopt any curved or flat surface structure. For example, the display facets 2665 can be formed as a hemispherical surface, a cylindrical surface, an oblong spherical surface, or any other shape.
[0132] Logic facets 2655 and display facets 2665 can have any suitable shape. In some embodiments, the shapes of logic facets 2655 and display facets 2665 match each other and match the shape of facet location 2220. In some embodiments, logic facets 2655 and display facets 2665 have polygonal shapes, such as triangles, quadrilaterals, pentagons, hexagons, heptagons, or octagons. In some embodiments, some or all of the logic facets 2655 and display facets 2665 have non-polygonal shapes. For example, display facets 2665 at the edges of the flexible circuit board 2210 may not be polygonal because they may have curved cuts to improve the aesthetics of the overall assembly.
[0133] In addition to having a selectable / controllable display resolution, each display panel 2665 may also have, in some embodiments, a color range selectable from multiple color ranges and / or a frame rate selectable from multiple frame rates. In such embodiments, the display panels 2665 of a particular flexible circuit board 2210 may be configured to provide different frame rates and different color ranges. For example, one display panel 2665 may have a specific color range, while another display panel 2665 has a different color range. Similarly, one display panel 2665 may have a specific frame rate, while another display panel 2665 has a different frame rate.
[0134] Figure 27 express Figure 26 An exploded view of the curved multi-display array 2600, and Figures 28-29 Further details of logic facet 2655 and display facet 2665 according to certain embodiments are shown. As illustrated in these figures, each logic facet 2655 may include interconnect pads 2850 that may be electrically coupled to interconnect pads 2250 of adjacent logic facet 2655. This allows the display facet 2665 to be coupled in series via wiring traces 2230. Additionally, each logic facet 2655 may include pads 2840 having a pattern that matches the pads 2940 on the back side of the display facet 2665. This allows the logic facet 2655 and the display facet 2665 to be coupled together using any suitable technique in the art. In some embodiments, pads 2840 and 2940 are BGA pads or any other suitable surface mount pads.
[0135] Figure 30 and 32 express Figure 22 The back of the flexible circuit board 2210, and shown as referenced. Figure 23 Similar details as described above. Figure 31 and 33 This indicates the serial data stream transmitted through the flexible circuit board 2210, and is displayed as shown in the reference. Figure 24 Similar details as described above. Figure 34 This represents an array of logic facets 2655 that have been formed in a hemispherical shape according to certain embodiments. In this drawing, for clarity, the flexible circuit board 2210 and the display facet 2665 have been removed. Figure 35 According to certain embodiments Figure 34 Communication between logic facets 2655. As shown in this figure, each logic facet 2655 can communicate with adjacent logic facets 2655 using interconnect pads 2850. Additionally, each logic facet 2655 may have a unique identifier, such as... Figure 35 As shown in the diagram. This allows each logical facet 2655 to be uniquely addressed, for example, by a central processing unit.
[0136] Figure 36 Indicates manufacturing according to certain embodiments Figure 26 A method 3600 for bending a multi-display array. Method 3600 may begin at step 3610, in which a plurality of facet locations are formed on a circuit board. In some embodiments, the facet locations are facet locations 2220, and the circuit board is a flexible circuit board 2210. In some embodiments, each facet location corresponds to one of a plurality of display facets (such as display facet 2665).
[0137] In step 3620, the flexible circuit board is cut or otherwise shaped into a pattern that allows the flexible circuit board to be later formed into a 3D shape. When the flexible circuit board is flat, at least some facet locations are separated from one or more adjacent facet locations by multiple gaps (such as gap 2215). When the flexible circuit board is formed into a 3D shape, the multiple gaps are substantially eliminated.
[0138] In step 3630, a plurality of logic facets are coupled to a first side of the flexible circuit board. Each logic facet is coupled to a corresponding facet location from step 3610. In step 3640, a plurality of display facets are coupled to a corresponding one of the plurality of logic facets from step 3630. In an alternative embodiment, the display facets may be mounted to the logic facets of step 3630 at the wafer level before the logic facets are coupled to the first side of the flexible circuit board. In step 3650, the assembled electronic display assembly is formed into a 3D shape. In some embodiments, this step may be similar to step 2540 of method 2500 described above. After step 3650, method 3600 may terminate.
[0139] Where appropriate, certain embodiments may repeat one or more steps of method 3600. While this disclosure describes and represents specific steps of method 3600 as occurring in a particular order, this disclosure contemplates that any suitable step of method 3600 may occur in any suitable order (e.g., any chronological order). Furthermore, while this disclosure describes and represents exemplary methods of manufacturing a curved multi-display array, this disclosure contemplates any suitable method of manufacturing a curved multi-display array that may, where appropriate, include all, some, or exclude steps of method 3600. Additionally, while this disclosure describes and represents specific components, apparatus, or systems that perform specific steps of method 3600, this disclosure contemplates any suitable combination of any suitable components, apparatus, or systems that perform any suitable step of method 3600.
[0140] Figure 37-42This refers to a distributed multi-aperture camera array 3700 according to certain embodiments. Typically, to capture the entire light field of a single human eye's field of vision, a large, high dynamic range image sensor with a resolution far exceeding currently available resolutions is required. Such an image sensor would enable a light field camera with angular and spatial resolution sufficient to accommodate 20 / 20 human visual sensitivity. This is a vast amount of information, equivalent to 100K to 200K total horizontal pixels. This multi-aperture image sensor must also surround the entire field of vision of a human eye (approximately 160° horizontally and 130° vertically). To image binocular vision, a pair of such cameras is needed spanning the entire curved surface around each eye. Typical image sensor assemblies available today do not meet these requirements.
[0141] To overcome these and other limitations of typical image sensors, embodiments of this disclosure provide an array of small image sensors of custom size and shape, all assembled on a larger flexible circuit board 2210, which is formed in a 3D (e.g., hemispherical) shape. Image sensors (e.g., sensor facets 3735) are mounted to the outside of the flexible circuit board 2210, and another layer containing an array of TFT logic cells (e.g., logic cells 755) may be provided to handle all power and signal management – one logic cell for each display. Each image sensor acts as a discrete unit, passing readout data to the logic cell behind it (in embodiments including logic cells), where it is processed and routed accordingly (e.g., in some embodiments, processed and routed to the corresponding display facet 2665). This allows each sensor facet 3735 to operate independently of any other sensor facet 3735, providing a large array of apertures, capturing unique content at each aperture, so that the entire assembly essentially becomes a seamless, ultra-high resolution multi-node camera. It should be noted that although in some embodiments image sensors may transmit data to their paired logic units, the functionality of the image sensor itself does not necessarily require logic unit coupling.
[0142] To meet the requirements of resolution, color clarity, and brightness output, each microsensor can have a unique high-performance pixel architecture. For example, each microsensor may include an array of sensor pixels 1800 as described in Figures 18-20 and their associated description in U.S. Patent Application No. 15 / 724,027, entitled “Stacked Transparent Pixel Structures for Image Sensors,” the entire contents of which are incorporated herein by reference. Microsensors can be assembled on the same substrate using any suitable method. This simultaneous fabrication using standard semiconductor layering and photolithography processes virtually eliminates the overhead and costs associated with the production and packaging of many individual screens, significantly improving affordability.
[0143] Another feature of certain embodiments of the distributed multi-aperture camera array 3700 is built-in depth perception based on the parallax between different all-optical primitives. Images generated by primitives on opposite sides of a given sensor can be used to calculate the offset of image details, where the offset distance is directly related to how close that detail is to the sensor surface. This scene information can be used by the central processing unit when overlaying any augmented video signal, resulting in AR / MR content being placed in front of the observer at the appropriate depth. This information can also be used for various artificial focus blur and depth sensing tasks, including simulating depth of field, spatial edge detection, and other visual effects.
[0144] Figure 37 This is a cross-sectional view of a distributed multi-aperture camera array 3700 according to certain embodiments. Figure 37 Essentially Figure 22 The flexible circuit board 2210B includes a sensor facet 3735 coupled to the flexible circuit board 2210B at facet location 2220. In some embodiments, each sensor facet 3735 is an individual sensor unit 735 from the image sensor layer 730.
[0145] In some embodiments, each individual sensor facet 3735 is coupled to the flexible circuit board 2210. In other embodiments, each individual sensor facet 3735 is coupled to one of the logic facets 2655 already coupled to the flexible circuit board 2210. In other embodiments, each logic facet 2655 is first coupled to one of the sensor facets 3735, and the combined facet is subsequently coupled to the flexible circuit board 2210. In this embodiment, the combined logic facet 2655 and sensor facet 3735 may be referred to as sensor facet 3735 for simplicity. As used herein, "sensor facet" may refer to both embodiments (i.e., individual sensor facet 3735 or a combination of sensor facet 3735 and logic facet 2655).
[0146] Typically, each sensor facet 3735 can be individually addressed (e.g., by a central control processor not shown), and a batch of sensor facets 3735 can represent a dynamic heterogeneous collection forming a single collective. In other words, the distributed multi-aperture camera array 3700 provides a tiled electronic sensor system that provides images captured by individual sensor facets 3735 that together form a complete whole. Each individual sensor facet 3735 can capture images at multiple different resolutions and can be customized during operation to capture different resolutions, color ranges, frame rates, etc. For example, one sensor facet 3735 may have a 512x512 capture resolution, while adjacent sensor facets 3735 (of the same size) have a 128x128 capture resolution, where the former represents higher density image data. In this example, the two sensors are different, but individually controllable and work in coordination to capture a single light field.
[0147] The aforementioned batch of sensor facets 3735 can adopt any curved or flat surface structure. For example, the sensor facets 3735 can be formed as hemispherical surfaces, cylindrical surfaces, elongated spherical surfaces, or any other shape.
[0148] The sensor facet 3735 can have any suitable shape. In some embodiments, the shape of the sensor facet 3735 matches the shape of the display facet 2665 and the shape of the facet position 2220. In some embodiments, the sensor facet 3735 has a polygonal shape, such as a triangle, quadrilateral, pentagon, hexagon, heptagon, or octagon. In some embodiments, some or all of the sensor facets 3735 have a non-polygonal shape. For example, the sensor facets 3735 at the edges of the flexible circuit board 2210 may not be polygonal because they may have curved cuts to improve the aesthetics of the overall assembly.
[0149] In addition to having selectable / controllable resolution, each sensor facet 3735 may also have a color range selectable from multiple color ranges and / or a frame rate selectable from multiple frame rates in some embodiments. In such embodiments, the sensor facets 3735 of a particular flexible circuit board 2210 may be configured to provide different frame rates and different color ranges. For example, one sensor facet 3735 may have a specific color range, while another sensor facet 3735 has a different color range. Similarly, one sensor facet 3735 may have a specific frame rate, while another sensor facet 3735 has a different frame rate.
[0150] Figures 38-39 According to certain embodiments Figure 37An exploded view of the distributed multi-aperture camera array 3700. As shown in these figures, each sensor facet 3735 may include a pad 3940 having a pattern that matches the pad 2240 on the flexible circuit board 2210 or the pad 2940 on the logic facet 2655. This allows the sensor facet 3735 to be coupled to the logic facet 2655 or the flexible circuit board 2210 using any suitable technique in the art. In some embodiments, the pad 3940 is a BGA pad or any other suitable surface mount pad. Figures 40-41 Indicates as Figure 23-24 A similar view of the flexible circuit board 2210 shown, except that the flexible circuit board 2210 has been formed into a 3D shape.
[0151] Figure 42 This describes a method 4200 for manufacturing a distributed multi-aperture camera array 3700 according to certain embodiments. Method 4200 may begin at step 4210, in which a plurality of facet locations are formed on a circuit board. In some embodiments, the facet locations are facet locations 2220, and the circuit board is a flexible circuit board 2210. In some embodiments, each facet location corresponds to one of a plurality of sensor facets (such as sensor facet 3735).
[0152] In step 4220, the flexible circuit board is cut or otherwise patterned to allow the flexible circuit board to be later formed into a 3D shape. When the flexible circuit board is flat, at least some facet locations are separated from one or more adjacent facet locations by multiple gaps (such as gap 2215). When the flexible circuit board is formed into a 3D shape, these multiple gaps are substantially eliminated.
[0153] In step 4230, multiple sensor facets are coupled to a first side of the flexible circuit board. Each sensor facet is coupled to a corresponding facet location from step 4210. In step 4240, the assembled electronic camera assembly is formed into a 3D shape. In some embodiments, this step may be similar to step 2540 of method 2500 described above. After step 4240, method 4200 may terminate.
[0154] Where appropriate, certain embodiments may repeat one or more steps of method 4200. While this disclosure describes and represents specific steps of method 4200 as occurring in a particular order, this disclosure contemplates that any suitable step of method 4200 may occur in any suitable order (e.g., any chronological order). Furthermore, while this disclosure describes and represents exemplary methods of manufacturing a distributed multi-aperture camera array, this disclosure contemplates any suitable method of manufacturing a distributed multi-aperture camera array that may, where appropriate, include all, some, or exclude the steps of method 4200. Additionally, while this disclosure describes and represents specific components, apparatus, or systems for performing specific steps of method 4200, this disclosure contemplates any suitable combination of any suitable components, apparatus, or systems for performing any suitable step of method 4200.
[0155] Here, "or" is inclusive rather than exclusive, unless otherwise specified or indicated by context. Therefore, "A or B" here means "A, B, or both," unless otherwise specified or indicated by context. Furthermore, "and" is both common and individual, unless otherwise specified or indicated by context. Therefore, "A and B" here means "A and B, commonly or individually," unless otherwise specified or indicated by context.
[0156] The scope of this disclosure includes all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments described or shown herein that will be understood by those skilled in the art. The scope of this disclosure is not limited to the exemplary embodiments described or shown herein. Furthermore, while this disclosure describes and represents various embodiments herein as including specific components, elements, functions, operations, or steps, any embodiment in these embodiments may include any combination or arrangement of any components, elements, functions, operations, or steps described or shown anywhere herein that will be understood by those skilled in the art. Additionally, references in the appended claims to a device or system adapted to, arranged to, capable of, configured to, enable, or operable for, or effectively used to perform a particular function include that device, system, or component, whether or not it or the particular function is activated, started, or unlocked, provided that the device, system, or component is so adapted, arranged, capable, configured, enabled, operable, or effective.
[0157] While this disclosure describes and represents various embodiments herein as including specific components, elements, functions, operations, or steps, any embodiment in these embodiments may include any combination or arrangement of any components, elements, functions, operations, or steps described or shown anywhere herein as would be understood by one of ordinary skill in the art.
[0158] Furthermore, references in the appended claims to a device or system or a component of a device or system adapted to, arranged to, capable of, configured to, enable, or operable for or effective in performing a particular function include that device, system, or component, whether or not it or the particular function is activated, started, or unlocked, provided that the device, system, or component is so adapted to, arranged to, capable of, configured to, enable, operable, or effective.
Claims
1. An electronic display component, comprising: Circuit board; A first microlens layer located on a first side of the circuit board, the first microlens layer including a first plurality of microlenses; A second microlens layer is located on the side of the circuit board opposite to the first microlens layer, and the second microlens layer includes a second plurality of microlenses; An image sensor layer adjacent to the first microlens layer, the image sensor layer including a plurality of sensor pixels configured to detect incoming light through the first plurality of microlenses; A display layer adjacent to the second microlens layer, the display layer including a plurality of display pixels configured to emit light through the second plurality of microlenses; A logic unit layer coupled to the circuit board, the logic unit layer comprising one or more logic units configured to simulate transparency by directing signals from the plurality of sensor pixels to the plurality of display pixels, thereby emitting light from the plurality of microlenses at an angle corresponding to the detected angle of incoming light through the first plurality of microlenses. The display layer is coupled to the logic unit layer. The image sensor layer is coupled to the circuit board, and The logic unit layer is located between the display layer and the circuit board.
2. The electronic display assembly according to claim 1, wherein: The first plurality of microlenses are oriented in a first direction; and The second plurality of microlenses are oriented in a second direction that is 180 degrees from the first direction.
3. The electronic display assembly according to claim 1, wherein the circuit board is flexible.
4. The electronic display assembly of claim 1, wherein the simulated transparency includes emitting light from the second plurality of microlenses such that an image matching the image that would be seen when the electronic display assembly is not present is displayed.
5. The electronic display assembly of claim 1, wherein each of the first and second plurality of microlenses comprises a three-dimensional shape, a collimating lens is located at one end of the three-dimensional shape, the three-dimensional shape comprising: Triangular polyhedron; Rectangular cuboid; Pentagonal polyhedron; Hexagonal polyhedron; Heptagonal polyhedron; or Octagonal polyhedron.
6. The electronic display assembly of claim 5, wherein each of the first and second plurality of microlenses further comprises a plurality of opaque walls configured to prevent light leakage into adjacent microlenses.
7. An electronic display component, comprising: Circuit board; A first microlens layer located on a first side of the circuit board, the first microlens layer including a first plurality of microlenses; A second microlens layer is located on the side of the circuit board opposite to the first microlens layer, and the second microlens layer includes a second plurality of microlenses; An image sensor layer is adjacent to and coupled to a first side of the circuit board, the image sensor layer including a plurality of sensor pixels configured to detect incoming light through the first plurality of microlenses; as well as A display layer adjacent to and coupled to the opposite side of the circuit board, the display layer comprising a plurality of display pixels configured to emit light through the second plurality of microlenses; The electronic display component is configured to simulate transparency by emitting light from the second plurality of microlenses at an angle corresponding to the angle of incoming light detected through the first plurality of microlenses.
8. The electronic display assembly according to claim 7, wherein: The first plurality of microlenses are oriented in a first direction; and The second plurality of microlenses are oriented in a second direction that is 180 degrees from the first direction.
9. The electronic display assembly according to claim 7, wherein the circuit board is flexible.
10. The electronic display assembly of claim 7, wherein the simulated transparency includes emitting light from the second plurality of microlenses such that an image matching the image that would be seen when the electronic display assembly is not present is displayed.
11. The electronic display assembly of claim 7, wherein each of the first and second plurality of microlenses comprises a three-dimensional shape, a collimating lens being located at one end of the three-dimensional shape, the three-dimensional shape comprising: Triangular polyhedron; Rectangular cuboid; Pentagonal polyhedron; Hexagonal polyhedron; Heptagonal polyhedron; or Octagonal polyhedron.
12. The electronic display assembly of claim 11, wherein each of the first and second plurality of microlenses further comprises a plurality of opaque walls configured to prevent light leakage into adjacent microlenses.
13. A method for manufacturing an electronic display, the method comprising: Multiple unit attachment positions are formed on the circuit board, each unit attachment position corresponding to one of multiple display units and one of multiple sensor units; Multiple sensor units are coupled to the first side of the circuit board, with each sensor unit coupled to a corresponding one of the unit attachment locations; as well as Multiple display units are coupled to a second side of the circuit board opposite to the first side, with each display unit coupled to a corresponding unit attachment position; Couple the first plurality of microlenses to the plurality of sensor units; as well as A second plurality of microlenses are coupled to the plurality of display units.
14. The method of manufacturing an electronic display according to claim 13, further comprising coupling a plurality of logic units between the circuit board and the plurality of display units.
15. The method of manufacturing an electronic display according to claim 13, further comprising coupling a plurality of logic units between the circuit board and the plurality of sensor units.
16. The method of manufacturing an electronic display according to claim 13, wherein each of the first and second plurality of microlenses comprises: A three-dimensional shape, with a collimating lens located at one end of the three-dimensional shape, the three-dimensional shape comprising: Triangular polyhedron; Rectangular cuboid; Pentagonal polyhedron; Hexagonal polyhedron; Heptagonal polyhedron; or Octagonal polyhedron; and Multiple opaque walls are configured to prevent light from leaking into adjacent microlenses.
Citation Information
Patent Citations
Stacked transparent pixel structures for electronic displays
US10249800B1
Stacked Transparent Pixel Structures for Image Sensors
US20190103444A1
Method, device, and camera to detect object from digital image
JP2006294034A
Cloaking systems and methods
WO2017007526A2