Plasma Etch Chemistry for High Aspect Ratio Features in Dielectrics

Abstract

A method for etching features in a stack under a patterned mask in an etching chamber is provided. The stack is cooled with a coolant having a coolant temperature below 20°C. An etching gas is flowed into the etching chamber. A plasma is generated from the etching gas. Features are selectively etched into the stack relative to the patterned mask.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Application No. 62 / 644,095, filed on March 16, 2018, which is incorporated herein by reference for all purposes. Technical Field

[0003] The present disclosure relates to a method of forming a semiconductor device on a semiconductor wafer. Background Art

[0004] For example, in forming a semiconductor device, the etching layer can be etched to form a storage hole or line or other semiconductor features. Some semiconductor devices can be formed by etching a single stack of silicon dioxide (SiO), such as to form a capacitor in a dynamic access random access memory (DRAM). Other semiconductor devices can be formed by etching a double-layer stack of alternating silicon dioxide (oxide) and silicon nitride (nitride) (ONON) or alternating silicon dioxide and polysilicon. Such stacks can be used for memory applications and three-dimensional "non-and" gates (3D NAND). The background description provided herein is for the purpose of presenting the content of the present disclosure as a whole. These stacks tend to require relatively high aspect ratio (HAR) etching of dielectrics. For high aspect ratio etching, examples of the required etching characteristics are high etching selectivity to masks (such as amorphous carbon masks), low sidewall etching with straight profiles, and high etching rates of etching front ends. The work of the currently designated inventors within the scope described in this background technology section and in the various aspects of the description that cannot be determined as prior art when submitting the application is neither explicitly nor implicitly admitted to be prior art for the present disclosure. Summary of the invention

[0005] To achieve the foregoing and in accordance with the purposes of the present disclosure, a method for etching features in a stack under a patterned mask in an etching chamber is provided. The stack is cooled with a coolant having a coolant temperature below -20°C. An etching gas is flowed into the etching chamber. A plasma is generated from the etching gas. Features are selectively etched into the stack relative to the patterned mask.

[0006] These and other features of the present invention will be described in more detail below in the detailed description of the invention and in conjunction with the following drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present disclosure is illustrated by way of example and not limitation in the accompanying figures and in which like reference numerals indicate similar elements and in which:

[0008] Figure 1 is a high-level flow chart of an implementation scheme.

[0009] Figure 2 is a schematic diagram of an etching chamber that may be used in one embodiment.

[0010] Figure 3 is a schematic diagram of a computer system that can be used to implement one embodiment.

[0011] Figure 4A-4B is a schematic cross-sectional view of a stack processed according to one embodiment. DETAILED DESCRIPTION

[0012] The present disclosure will now be described in detail with reference to several preferred embodiments shown in the accompanying drawings. In the following description, many specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be apparent to those skilled in the art that the present disclosure can be implemented without some or all of these specific details. In other cases, well-known process steps and / or structures are not described in detail to avoid unnecessarily making the present disclosure unclear.

[0013] Figure 1 1 is a high-level flow chart of an embodiment. In this embodiment, a stack is placed in an etching chamber (step 104). The stack is disposed below a patterned mask. The stack has at least one dielectric layer. The stack is cooled by a coolant, wherein the coolant is at a cryogenic temperature (step 108). An etching gas is provided by flowing the etching gas into the etching chamber (step 112). The etching gas is formed into an etching plasma (step 116). The stack is exposed to the plasma (step 120). A bias voltage is provided to accelerate ions from the plasma to the stack (step 124). The stack is selectively etched relative to the patterned mask by the etching plasma (step 128). The stack is removed from the etching chamber (step 132).

[0014] It is also often necessary to etch high aspect ratio structures through semiconductor materials such as silicon dioxide to produce semiconductor devices. Etching high aspect ratios requires directional (anisotropic) etching, which is different from isotropic etching. Typically, directional etching is achieved by using ions in a plasma that are accelerated perpendicular to the wafer surface. For example, applying a bias voltage of 10-5000 electron volts (eV) will accelerate ions present in the plasma to the wafer surface. The ions provide plasma etching.

[0015] In the specification and claims, the term cryogenic refers to "cold" substrate temperatures. The term "cold" used in conventional etching means -20°C or lower. Cryogenic etching dates back to 1988 and is most often studied on silicon materials. In silicon high aspect ratio etching, it is important to control the tendency toward chemical etching sidewalls so that directionality is maintained. Chemical etching is a process where a chemical chemical is chemically adsorbed onto a surface, spontaneously forms a new species with the surface, which desorbs at hot surface temperatures. For example, fluorine will spontaneously react with the silicon surface at room temperature to form silicon tetrafluoride (SiF4). This is a problem in directional etching because chemical etching is isotropic in nature, in other words, the chemical in the plasma is isotropic and will fall on the surface based on the line of sight. This chemical etching will cause lateral etching, and the directionality of the high aspect ratio etching will be compromised. In high aspect ratio etching of silicon, this is solved by using the Bosch process or cryogenic etching, which will inhibit chemical etching. The most common method for etching high aspect ratio structures and silicon is to use the Bosch process, which alternates between etching chemistry and deposition chemistry to protect the sidewalls. This etch is usually performed at moderate temperatures, usually between -20°C and 100°C. The deposition chemistry is designed to protect the sidewalls.

[0016] The reason for using low temperatures is that spontaneous chemical etching of the sidewalls will be suppressed, so the deposition chemistry used in the Bosch process is not required. Such low temperature processing is not usually performed due to the difficulty in keeping the substrate surface at low temperatures during processing.

[0017] In the literature on high aspect ratio etching of silicon, the typical chemicals used are sulfur hexafluoride (SF6) and oxygen (O2), where fluorine is the reactant used to remove silicon in the form of SiF4 or difluorosilicon (SiF2), and the sulfur and oxygen provide some protection for the sidewalls, which will evaporate once the wafer returns to room temperature. Ion etching is the main etching process in low temperature etching. Although carbon fluorocarbons are used in the deposition step of the Bosch process, carbon silicon compounds are not generally used for silicon at low temperatures because silicon and carbon form very hard silicon carbide, which hinders etching. At the etching front end, silicon carbide will hinder etching, but it will eventually be destroyed by ion bombardment. Another advantage of low temperature etching of silicon (Si) is that the sidewall protection does not need to be very strong. Low temperature etching of silicon can help speed up the etching rate by reducing the amount of deposition required to protect the sidewalls.

[0018] The etching of dielectrics can be different from etching silicon. For example, silicon tends to etch chemically, meaning that chemical reactions occur spontaneously to desorb silicon byproducts such as SiF4 or SiCl2. In contrast, while silicon nitride (SiN) can also be chemically etched with nitrogen trifluoride (NF3), silicon dioxide does not typically etch spontaneously. Etching silicon dioxide is instead ion-induced along with the reactants to accelerate desorption. Additionally, dielectrics such as oxides and nitrides contain silicon and another element such as oxygen or nitrogen in the crystal lattice. Although silicon is spontaneously etched by halogens such as fluorine, chlorine, or bromine, oxygen does not readily form stable volatile species with halogens alone. At room temperature, the removal of oxygen from oxides is enhanced by providing carbon to form carbon monoxide (CO) or carbon dioxide (CO2) volatile compounds, or providing hydrogen (H) to form water (H2O), or providing boron chloride (BCl3) to form volatile B x Cl z O y Compounds, or provide sulfur oxide (SO) to form sulfur dioxide (SO2). In the case of nitrogen (N), fluorine can remove N (in the form of NF3), or H can remove N (in the form of ammonia (NH3)). More specifically: In order to etch the silicon component at low temperatures, halogens such as fluorine (F), chlorine (Cl), bromine (Br) and iodine (I) can be used to etch the silicon component. In order to etch the oxygen component in silicon oxide at low temperatures, carbon (C), boron (B), hydrogen (H), sulfur (S) and nitrogen are effective for etching the oxygen component. In order to etch the nitrogen component of silicon nitride at low temperatures, H and F can be used to etch the nitrogen component. It has also been found that at low temperatures, C, H, oxygen (O), silicon (Si), F and S can be used as passivating agents. Therefore, the chemicals required to etch the dielectric layer at low temperatures may be different from those used for silicon.

[0019] In an example of a typical chemical process for etching dielectrics at room temperature, fluorocarbon chemicals are typically used, such as octafluorocyclobutane (C4F8) and / or hexafluoro-2-butyne (C4F6). C4F8 and / or C4F6 fragments in the plasma form fluorocarbon polymers, which can passivate the sidewalls and protect the mask. Before etching, as long as the polymer is not too thick, the ions incident at the etching front end will use carbon and fluorine to etch the oxide. For example, carbon will combine with oxygen to form CO and CO2. Fluorine will combine with silicon to form SiF4, SiF2 volatile compounds. The sidewalls do not receive incident ions, and the polymer is retained to protect the sidewalls. In 3D NAND applications for etching stacks of oxide and nitride layers, typical plasma processing chemicals may be C4F8, C4F6, O2, and fluoromethane (CH3F). C4F8 and C4F6 gas fragments in the plasma will produce polymerized fluorocarbons. Carbon and fluorine at the etching front end are reactants. The addition of O2 acts as an effective knob to tune and control the polymer to keep the top of the feature open. CH3F helps etch nitrides by providing a hydrogen source and a fluorocarbon. So, compared to etching silicon at room temperature, for etching dielectrics, there is typically not only a halogen source used as a reactant, but also a carbon and hydrogen source.

[0020] However, etching at room temperature requires a tradeoff between etch rate and selectivity and / or sidewall profile. If the etch rate is high due to a thin fluorocarbon polymer deposition, the sidewalls and mask may not be adequately protected and warping may occur on the sidewalls. On the other hand, if the deposition of fluorocarbon polymer is increased to protect the sidewalls and mask, the etch rate is hampered and slowed. Pinch-off may also occur from the deposition at the top of the feature. Cryogenic etching provides an opportunity to break some of these tradeoffs in dielectric etching.

[0021] While high aspect ratio etching of silicon at cryogenic temperatures has been extensively studied, higher aspect ratio etching of dielectrics has been much less studied in comparison. As the surface temperature decreases, there are four main principles that provide different chemistries for etching dielectrics at cryogenic temperatures for various implementations.

[0022] First principle: As in etching the high aspect ratio of silicon, spontaneous chemical etching of dielectrics can also be suppressed. However, the principle is different for oxide etching compared to silicon etching. The difference is that oxide etching does not tend to be chemically etched. In contrast, oxide etching is known to be an ion-induced process because oxide etching requires ion energy for desorption. Etching using ion energy can provide vertical etching by deflecting ions reaching the sidewalls. However, nitrogen is more like silicon and can be chemically etched. Low temperature should help reduce lateral etching for SiN. Therefore, low temperature can help reduce chemical etching in dielectric high aspect ratio etching. However, unlike the case of silicon, the reduction of chemical etching will not be the most important principle of low temperature etching. The extent to which low temperature is important for high aspect ratio dielectric etching is derived from the following reasons: For polymer sidewall passivation, the reduction in passivation requirements allows the use of thinner fluorocarbon or hydrofluorocarbon (or a combination of fluorocarbon and hydrogen) etching chemicals. Thinner etching chemicals have a lower percentage of polymer components, such as carbon. For example, in non-cryogenic etching processes, C4F6 and C4F8 can be used as passivating agents in the etching gas. At low temperatures, carbon tetrafluoride (CF4) will be used as a passivating agent. Other examples of dilute chemicals can be fluoromethane (CHF3), CH3F, carbon tetrachloride (CCl4), trifluoroiodomethane (CF3I), dibromodifluoromethane (CBr2F2), pentafluoroethane (C2HF5), C2F5Br. These chemicals can be combined with each other, or one or more of hydrogen (H2) or O2 or H2O, hydrogen peroxide (H2O2) can be added. In addition to C-containing chemicals that etch dielectrics, other non-C-containing chemicals are also known to be passivating and may be effective at low temperatures because the passivation does not have to be so strong. This can include BCl3, because BCl3 has passivating properties and will be effective at low temperatures. BCl3 is not a traditional oxide etchant at room temperature because boron trioxide (B2O3) will prevent etching. It is believed that the blocking effect may be less at low temperatures, and BCl3 can be used as an etchant component at low temperatures. Other passivation components can be chromyl chloride (CrO2Cl2), silicon tetrachloride (SiCl4), thionyl chloride (SOCl2), titanium dichloride (TiCl2), titanium trichloride (TiCl3), and phosgene (CoCl2). In this example, the more dilute chemistry has a lower carbon-fluorine ratio.

[0023] Second principle: As the surface temperature decreases, the adhesion coefficient increases. The adhesion coefficient is a measure of how long a molecule will remain physically adsorbed on a surface before re-entering the gas phase. In other words, at lower temperatures, molecules will remain attached to the surface longer according to the Arrhenius rate law, so the adhesion time is inversely proportional to the surface temperature. This temperature dependence should have a more pronounced effect at low temperatures. The results of this temperature dependence of the adhesion coefficient are very important in determining the location and amount of reactants and inhibitors that appear at different locations on the feature (i.e., deposition). Specifically, the deposition rate of fluorocarbon polymers depends strongly on the adhesion coefficient. C x F y Substances promote the deposition of fluorocarbon polymers. Roughly speaking, the larger the substance and the higher the carbon content in the substance, the more likely they are to form polymers. In the fragments formed by C4F6 gas in the plasma, molecules or ions such as C4F6, C4F5, tetrafluoropropylene (C3F4), 1,2,3,3,3-pentafluoroprop-1-ene (C3F5), trifluorovinyl (C2F3), and C3F2 will tend to crosslink and form polymers. The lower the temperature, the longer these molecules adhere to the surface, thereby increasing the deposition rate. Likewise, lower temperatures mean that adhesion occurs primarily at the top of the feature. Polymers will accumulate at the openings and may not fall along the sidewalls at low temperatures.

[0024] A consequence of the second principle is that gases for low temperature etching of dielectrics should be selected to be less polymerized. In one embodiment, the gas mixture contains carbon. For gases containing carbon, this principle is exemplified by CF4. CF4 is not a typical gas for dielectric etching with a high aspect ratio. However, at low temperatures, CF4 may work well because CF4 has a more dilute C:F ratio and is less likely to block the top of the feature. At the same time, the use of CF4 should provide a certain degree of protection for the sidewalls. Another example of a more dilute chemical is the use of CHF3 for oxide etching, or the use of CHF3 and N2 for nitride etching. Another example may include CF4 and N2 for etching nitrides. Moreover, CH2F2 and CH3F as well as CCl4 and carbonyl sulfide (COS), CO, CO2, dichloromethane (CH2Cl2), methane (CH4), CF3I, chloroform (CHCl3) can be used as etchants. Other gases, such as N-containing gases, such as NH3, hydrogen sulfide (H2S), silane (SiH4), disilane (SiH6), propylene (C3H6), nitrogen oxides (N2O), H2O2, nitric acid (HNO3), etc., may be added or combined to any of these gas mixtures in order to promote the etching of nitrides or O2 to adjust the deposition that does occur. Thus, for example, some possible gas mixture recipes may be a mixture of CF4, O2, and N2, or a mixture of CF4, CHF3, and O2, or a mixture of CF4, COS, and N2, or a mixture of CF4 and CO, or a mixture of CF4 and CH4, and all other variations. Along these lines, since both oxygen and nitrogen may be required, non-traditional reactants may be used to etch dielectrics, such as H2O, such as in a combination of CF4 and H2O. Since H2O is not typically a gas at room temperature, some hardware modifications may be required to accommodate the input of H2O. Any of these combinations are not generally useful for etching high aspect ratio dielectric structures because they do not polymerize sufficiently at room temperature. However, at low temperatures, even these dilute chemistries may provide some protection to the sidewalls because they are more likely to condense on the surface at low temperatures. Therefore, such chemistries that are generally considered etchants may also deposit or at least passivate the sidewalls at low temperatures.

[0025] Further explanation of the second principle: The focus of the previous paragraph was on more dilute chemistries containing carbon. But since at low temperatures, the gas is more likely to protect the sidewalls even if it does not have carbon content when passivating, there is now another class of chemistries that are not normally used at room temperature that can be used for sidewall passivation at low temperatures. Since not much deposition is required, silicon containing oxygen and / or nitrogen can be etched by using, for example, the following halogen-containing chemical compositions: a mixture of BCl3 and chlorine (Cl2), or HBr, or a mixture of Cl2 and N2, or CF4, or Br2, or COS, or SiH4 as a H source for silicon nitride etching. In some embodiments, iodine can be used as a halogen. Typically, BCl3 is not used for dielectric etching at room temperature because BCl3 does not easily etch oxides at room temperature because BCl3 forms a SiOBCl surface film that blocks etching. However, it has been found that at lower temperatures, BCl3 deposition actually decreases at lower temperatures. In this case, the BCl3 etching is not due to an increased adhesion coefficient, but rather to a slower reaction. As a result, BCl3 is usually deposited at room temperature but etches at low temperatures to generate volatile B x Cl y O z This would be another example of a chemical process that might be suitable for etching at low temperatures rather than room temperature. Other chemicals such as BCl3 can include MgCl2, PdCl2, and TiCl3.

[0026] The second principle provides another result. The adhesion coefficient that increases at lower temperatures was described above. This means that molecules tend to stick to the top of the feature before traveling along the sidewalls of the feature or the etching front. However, if a molecule is small enough or not deposited, it can still make it to the bottom of the feature. Specifically, for fluorocarbon deposition, it is known that the etching species (ions or molecules) tend to be F, carbon fluoride (CF), difluoromethane (CF2). These substances are small enough that they do not polymerize, and if they reach the surface, they are more likely to etch. It is well known in the reverse reactive ion etching (RIE) hysteresis phenomenon, in which features with higher aspect ratios are etched faster than features with smaller aspect ratios, and the high aspect ratio acts as a filter for small particles. Reverse RIE is caused only by small particles, causing them to be located at the bottom of the feature. Reverse RIE can help selectivity, both by increasing the etching rate at the bottom due to less deposition, and by protecting the mask at the top, where adhesion of larger substances occurs and a deposited film is formed.

[0027] This implication of the second principle suggests that for high aspect ratio dielectric etching, it would be beneficial to use a gas with a high fluorine source. C4F6 and C4F8, which are commonly used at room temperature, are not good sources of F because very small concentrations of these gases decompose into small particles of F, CF, or CF2. In contrast, at low temperatures, large species in C4F6 and C4F8 are more likely to adhere to the top of the feature and prevent etching without any reactants reaching the bottom. The types of gases that decompose into F (radical) sources include those readily available in the laboratory: CF4, SF6, NF3, XeF2, tungsten hexafluoride (WF6), SiF4, tantalum pentafluoride (TaF5), iodide heptafluoride (IF7), hydrofluoride (HF) (vapor or indirectly generated inside the plasma). More generally, metals with a charge of +5 or higher (such as metal halides) are more volatile and can be delivered to the surface by the plasma. Therefore, many pentafluoride chemicals tend to be gases and may be good candidates for plasmas that generate F. Such pentafluoride gases will also include chlorine pentafluoride (ClF5), bromine pentafluoride (BrF5), arsenic pentafluoride (AsF5), nitrogen pentafluoride (NF5), phosphorus pentafluoride (PF5), niobium pentafluoride (NbF5), bismuth pentafluoride (BiF5), and uranium (UF5). The advantages of some of these (BiF5) will also form polymers that can protect the sidewalls. For the same reason, this method can also be applied to chlorine-containing substances. Other options are: such as SiCl2, CrO2Cl2, SiCl4, tantalum tetrachloride (TaCl4), hafnium tetrachloride (HfCl4), titanium chloride (TiCl3(l)), titanium tetrachloride (TiCl4(l)), cobalt chloride (CoCl2(l)).

[0028] Some of these gases mentioned are easily available, but are rarely used in dielectrics or any etching platform because they are more common on deposition platforms, such as WF6, TiCl3 and TiCl2. In fact, some of them are well known as byproducts rather than etching substances in etching processes. For example, WF6 is a byproduct of etching tungsten (W) in SF6 or CF4 plasma. And TiCl4, TaCl4 and HfCl4 are byproducts of etching titanium (Ti), tantalum (Ta), titanium nitride (TiN) and tantalum nitride (TaN) or hafnium (Hf) in Cl2 or BCl3 plasma. Various embodiments use gases such as CF4, SF6, NF3, XeF2, WF6, SiF4, TaF5, IF7, HF, ClF5, BrF5, AsF5, NF5, PF5, NbF5, BiF5, UF5, WF6, TiCl3 and TiCl2 to provide high F or Cl substances for etching dielectrics. Cl substances may not be very effective. Specifically, WF6, TaCl4 and HfCl4 can provide additional advantages because W, Ta, Hf, niobium (Nb), and rhenium (Re) are refractory metals and are known to be very hard. As mentioned above, the mask is often C. If a hard substance is doped into C, the mask can be enhanced. Therefore, for example, W-doped C is harder than amorphous C. Therefore, if the etching process uses WF6, TaCl4 or HfCl4, W, Ta or Hf is injected into the mask. The injection should have the additional beneficial effect of hardening the mask and increasing the selectivity. Since F may be more effective than Cl or Br. The preferred etching gas is WF6 or TaF5. WF6 or TaF are both gases at room temperature and are easier to insert into the plasma. In addition to refractory metals, B and C are very hard and can harden or re-harden the amorphous carbon mask. Therefore, in various embodiments, CF4, boron trifluoride (BF3) and boron tribromide (BBr3) can be used as etchant component gases. For etching gases that generate fluorine, the preferred etching gases provide F radicals and are relatively large molecules. Therefore, hexafluorines are preferred over tetrafluorines. For example, WF6 and TaF5 are preferred over SiCl2. If these gases can remove O. These gases can be combined with C or H containing gases.

[0029] As mentioned above, some of these gases are used in the deposition process. These gases may be deposited on the top of the feature, rather than on the etching front at the bottom of the feature. In one embodiment, etching can be further enhanced by purposefully depositing on the top of the feature. For example, the metal can be deposited (rather than injected / doped) on the mask at the top of the feature using etching gases WF6 or TiCl4 or TaF5, as performed in ALD, for example, using chemicals WF6 and H2 or chemicals WF6 and SiH4. It is believed that only F and H will reach the bottom of the feature and etch, while the deposit will adhere and deposit on the top of the feature. This is also a way to provide H that can help etch O and N (as H2O or NH3). In another example, Ta is deposited using TaF5. Since Ta is a very hard material, Ta can be used to harden the mask. Ti can be deposited using TiCl4 and appropriate precursors.

[0030] The third principle is as follows: Although etching SiO2 at room temperature is not usually performed using F alone, and C, B or H are also required, one embodiment etches SiO2 only with F at low temperature, without C, B or H. The reason why C, B or H are required in order for F to etch SiO2 at room temperature is that fluorine diolate (FO2) is volatile at room temperature (boiling point -144°C). Oxygen difluoride (OF2) decomposes into oxygen and fluorine through a free radical mechanism. In a plasma, this may occur faster. Therefore, OF2 is unstable. One embodiment uses low temperature to provide stable OF2 vapor. Then, at low temperature, SiO2 is etched with a F-containing gas without adding C, B, H additives. In addition, it is known that insufficiently exposed plasma O2 is preferentially sputtered away. Then, the surface becomes more like a metal. Therefore, the embodiment etches SiO2 at low temperature with a component having a fluorine-containing etching gas (e.g., SF6), which is usually reserved only for silicon and cannot etch SiO2.

[0031] The fourth principle is as follows: In another method, it has been found that the etchant at non-cryogenic temperatures is unexpectedly found to be a passivating component agent at cryogenic temperatures. For example, SF6 is used as an etchant in non-cryogenic processes. However, it has been found that SF6 acts like a passivating agent rather than an etchant at low temperatures. Other molecules provide passivation at low temperatures that do not provide passivation at non-cryogenic temperatures. For example, as described above, water may be a passivating component at low temperatures. Amines and SO2 may also be used as passivating agents at low temperatures. It has been found that CO2 may be used as a passivating agent at low temperatures. CO2 may be an ideal passivating agent because CO2 is less likely to form crystals, but is more in a slurry state. Other passivating agents at low temperatures may be COS, CO, S of SF6, or SiF4.

[0032] Other embodiments provide atomic layer etching (ALE) or atomic layer deposition (ALD) at low temperatures. In one embodiment of low temperature ALE, a chemical reactant is provided as an atomic layer etching gas in step A, wherein step B provides thermal energy or ion energy or another type of energy to desorb byproducts. Specifically, in step A of ALE, low temperature is used to suppress any etching, because any etching that occurs in step A is not ideal and is not expected. Although many reactants will adsorb but will not etch at room temperature. At room temperature, there are many reactants that will spontaneously etch. The most famous case is that silicon will spontaneously form SiF4 at room temperature in the presence of fluorine. By using low temperatures, the reaction is suppressed. Various embodiments extend the method. In one embodiment, tin oxide (SnO) is spontaneously etched with H2 at room temperature, making it difficult to convert it to an ALE process at room temperature. However, it is believed that by reaching a low temperature estimated to be -70°C, the reaction is suppressed, thereby enabling the ALE process to succeed.

[0033] ALE may be advantageous for HAR. In ALE, in one embodiment, the second step provides only argon. It is well known that argon can actually only enhance amorphous carbon films to a more diamond-like substance. Therefore, pure argon plasma can be used intermittently in high aspect ratio etching processes to enhance the mask. In one embodiment, this process can also be used in ALD.

[0034] In addition, it has been found that harder materials are easier to etch using ALE. By performing ALE at low temperatures, the low temperature can make the material that is effectively etched a harder material without changing the surface binding energy of the material. This makes ALE on the material easier. In one embodiment, the chemical reaction step A is performed at low temperatures to provide a modified layer, and the ion energy used for activation in step B is also performed at low temperatures to activate the modified layer. In another embodiment, the chemical reaction step A is performed at low temperatures, while the activation step B is performed at a higher temperature (with ions) or even under heat, where heat is used as an energy source. In one embodiment, for each step, the substrate is moved between two different chambers so that step A is performed in a chamber at low temperatures and step B is performed in a chamber at non-low temperatures. In another embodiment, step A is performed at low temperatures, while activation step B is performed under a heating lamp, where the heating lamp provides thermal energy to a small volume space that requires thermal energy.

[0035] In an embodiment where cryogenics are used for ALD, a first precursor provided as an atomic layer deposition gas may be deposited at cryogenic temperatures in step A, and a second precursor may be deposited at cryogenic temperatures in step B. Typically this is not done at cryogenic temperatures, as adsorption of the precursors typically requires elevated temperatures. However, if plasma is used to make the precursors more reactive, then cryogenic temperatures may be used to avoid other thermally activated surface reactions. The problem would be that the precursors may condense on the substrate. Condensation is not self-limiting. Therefore, the temperature window may or may not be compatible with the cryogenic temperature. When plasma is used, the likelihood that the window is compatible with the cryogenic temperature increases.

[0036] Example

[0037] Figure 2 2 is a schematic diagram of an etching reactor 200 that can be used in one embodiment. In one or more embodiments, the etching reactor 200 includes a gas distribution plate 206 providing a gas inlet and an electrostatic chuck (ESC) 208 in an etching chamber 209, which is enclosed by a chamber wall 252. In the etching chamber 209, the stack 204 is positioned above the ESC 208. The ESC 208 can provide a bias from the ESC source 248. The etching gas source 210 is connected to the etching chamber 209 through the gas distribution plate 206. The ESC temperature controller 250 is connected to a cooler 214, which cools the coolant 215. In this embodiment, the cooler 214 provides the coolant 215 to a channel 217 in or near the ESC 208. A radio frequency (RF) source 230 provides RF power to a lower electrode and / or an upper electrode, in this embodiment, the lower electrode and / or the upper electrode are the ESC 208 and the gas distribution plate 206, respectively. In an exemplary embodiment, 400 kilohertz (kHz), 60 megahertz (60 MHz), and optionally 2 MHz, 27 MHz power supplies constitute the RF source 230 and the ESC source 248. In this embodiment, the upper electrode is grounded. In this embodiment, a generator is provided for each frequency. In other embodiments, the generators can be in separate RF sources, or separate RF generators can be connected to different electrodes. For example, the upper electrode can have an inner electrode and an outer electrode connected to different RF sources. Other arrangements of RF sources and electrodes can be used in other embodiments. The controller 235 is controllably connected to the RF source 230, the ESC source 248, the exhaust pump 220, and the etching gas source 210. An example of such an etching chamber is the Flex Etch chamber manufactured by Lam Research Corporation (Fremont, CA). TM Etching system. The processing chamber can be a CCP (capacitively coupled plasma) reactor or an ICP (inductively coupled plasma) reactor.

[0038] Figure 3300 is a high-level block diagram showing a computer system 300 suitable for implementing the controller 235 used in the embodiment. The computer system 300 can have many physical forms ranging from integrated circuits, printed circuit boards, and small handheld devices to large supercomputers. The computer system 300 includes one or more processors 302, and may also include an electronic display device 304 (for displaying graphics, text, and other data), a main memory 306 (e.g., a random access memory (RAM)), a storage device 308 (e.g., a hard drive), a removable storage device 310 (e.g., an optical drive), a user interface device 312 (e.g., a keyboard, a touch screen, a keypad, a mouse or other pointing device, etc.) and a communication interface 314 (e.g., a wireless network interface). The communication interface 314 allows software and data to be transmitted between the computer system 300 and external devices via a link. The system may also include a communication infrastructure 316 (e.g., a communication bus, a cross-connect bar, or a network) connected to the above-mentioned devices / modules.

[0039] The information transmitted via the communication interface 314 may be in the form of a signal, such as an electronic signal, an electromagnetic signal, an optical signal, or other signal that can be received by the communication interface 314 via a communication link, which carries the signal and can be implemented using a wire or cable, an optical fiber, a telephone line, a cellular phone link, a radio frequency link, and / or other communication channels. Using such a communication interface 314, it is contemplated that one or more processors 302 may receive information from a network during the execution of the above-described method steps, or may output information to a network. In addition, the method embodiments may be executed solely on a processor, or may be executed in conjunction with a remote processor that shares a portion of the processing over a network such as the Internet.

[0040] The term "non-transitory computer-readable medium" is generally used to refer to media such as main memory, secondary memory, removable storage devices, and storage devices such as hard disks, flash memory, disk drive memory, CD-ROMs, and other forms of persistent memory, and should not be interpreted as covering transient subject matter such as carrier waves or signals. Examples of computer code include machine code (such as produced by a compiler) and files containing higher-level code executed by a computer using an interpreter. Computer-readable media may also be computer code that is transmitted by a computer data signal embodied in a carrier wave and represents a sequence of instructions that can be executed by a processor.

[0041] In an exemplary embodiment, the stack is placed in an etching chamber (step 104). FIG. Figure 4A4 is a schematic cross-sectional view of stack 204. In this embodiment, stack 204 includes substrate 408 below multiple bi-layers 412, which are disposed below patterned mask 416. In this example, one or more layers can be disposed between substrate 408 and multiple bi-layers 412 or multiple bi-layers 412 and patterned mask 416. In this example, patterned mask 416 is a patterned mask containing carbon, such as amorphous carbon. This embodiment does not have a mask containing silicon above multiple bi-layers 412 or above patterned mask 416. In this example, the patterned mask pattern provides mask features 420 for high aspect ratio contacts. In some embodiments, mask features 420 are formed before stack 204 is placed in etch chamber 209. In other embodiments, mask features 420 are formed while stack 204 is in etch chamber 209. In this embodiment, each bilayer 412 is a bilayer having a silicon oxide 424 layer and a silicon nitride 428 layer.

[0042] After stack 204 is placed in etching chamber 209, stack 204 is cooled using a coolant having a coolant temperature below -20°C (step 108). Etching gas is flowed into etching chamber 209 (step 112). In this example, etching gas is CF4. In this example, a pressure of 5 to 60 mTorr is provided. Etching gas is formed into etching plasma (step 116). This can be achieved by providing an excitation RF with a frequency of 60 MHz and 200 to 8000 watts. Stack 204 is exposed to plasma (step 120). A bias voltage of at least about 400 volts is provided (step 124). In this embodiment, a high bias voltage is provided by providing an RF with a frequency of 400 kHz and 2 kW to 18 kW to ESC 208 by ESC source 248. The bias voltage accelerates ions to reach stack 204, resulting in selective etching of high aspect ratio etching features into multiple double layers 412 relative to carbon-containing patterned mask 416 (step 128). The plasma is maintained for 180 to 3600 seconds. The etching is capable of etching the silicon oxide layer 424 and the silicon nitride layer 428. After the etching is completed, other processes may be performed on the stack 204. The stack 204 is then removed from the etching chamber 209 (step 132).

[0043] Figure 4B4 is a cross-sectional view of stack 204 after contact 432 has been etched. Contact 432 is a high aspect ratio contact. Preferably, high aspect ratio contact 432 has an aspect ratio of height to critical dimension (CD) width greater than 20:1, where in this embodiment, CD is measured at the top of the feature. Other embodiments may have an aspect ratio of height to width greater than 50:1. The etching process is capable of selectively etching silicon oxide 424 and silicon nitride layer 428 relative to amorphous carbon at a selectivity greater than 5:1 while etching high aspect ratio features. The resulting features also reduce warping, streaking, distortion, capping, and taper. In addition, this embodiment allows the use of carbon-containing patterning masks, such as amorphous carbon, without the need for silicon-containing masks, such as polysilicon. Eliminating the need for silicon-containing masks reduces costs and defects.

[0044] Previous processes using etching, where the stack is processed at temperatures above -20°C, rely on fluorocarbon chemistries to etch and provide sidewall protection. This process results in a mask with an etch selectivity of less than 5:1 relative to silicon oxide and silicon nitride. Sidewall protection is provided for previous processes by polymer deposition. Polymer deposition is controlled by carbon concentration, where higher concentrations of carbon increase sidewall deposition, and by oxygen concentration, where higher concentrations of oxygen consume the deposited polymer. Higher oxygen concentrations also increase mask consumption. Some previous processes use silicon-containing masks. The above embodiments increase the etch rate and improve contact shape / stripe compared to conventional methods.

[0045] In some embodiments, in order to provide the coolant 215 with a coolant temperature below -20°C to the stack 204, the coolant is cooled to a coolant temperature below -60°C. In other embodiments, the coolant 215 is cooled to a coolant temperature between -30°C and -200°C. In other embodiments, the coolant 215 is cooled to a coolant temperature between about -40°C and about -200°C. In some embodiments, the stack is cooled to a temperature between -30°C and about -200°C. In the specification and claims, etching at low temperatures is defined as etching using a coolant with a temperature below -20°C. More preferably, the low temperature uses a coolant with a temperature between -20°C and -150°C. More preferably, the low temperature uses a coolant at a temperature below -60°C. Typically, etching at low temperatures has a coolant at one of the above ranges. In some embodiments, at some time during the operation, the operation performed at low temperatures cools the stack 204 to a temperature below -20°C. In other embodiments, operations performed at cryogenic temperatures maintain the stack 204 at a temperature below -20°C throughout the operation.

[0046] In some embodiments, the etching gas further comprises one or more of a component providing free fluorine, a hydrogen-containing component, a hydrocarbon-containing component, a fluorocarbon-containing component, and an iodine-containing component. The component providing free fluorine is defined as a component that will typically decompose in a plasma to provide free fluorine, such as NF3 and sulfur hexafluoride (SF6). The hydrogen-containing component is preferably H2, CH3F, and difluoromethane (CH2F2).

[0047] The ONON stack can be etched to form features such as contact holes, lines or trenches when manufacturing 3D NAND memory devices. Other embodiments can etch contact holes used in MOC and MOA, which are the first metal contacts for controlling 3D NAND junctions. Other embodiments can be used for dynamic random access memory (DRAM) capacitor etching. Other embodiments can be used for etching silicon oxide and polysilicon double layers (OPOP). The embodiment provides an etching depth greater than 20 microns. In other embodiments, the etching depth is greater than 3 microns. These embodiments enable etching of at least 48 silicon oxide and silicon nitride double layers in a single etching step using a single amorphous carbon mask having a thickness of less than 1 micron. In addition, the contact preferably has an etch depth greater than 30:1 to the depth-to-width ratio of the neck.

[0048] In some embodiments, the stack may be a single layer of silicon oxide or a single layer of silicon nitride. In other embodiments, the stack may be a single layer or multiple layers of other silicon-containing materials.

[0049] The above embodiments use a bias voltage with a magnitude of at least 400 volts. It has been found that a bias voltage with a magnitude of at least 1000 volts will provide improved etching. It is believed that a bias voltage with a magnitude of at least 2000 volts will provide further improved etching. Without being bound by theory, it is believed that higher bias voltages will achieve higher aspect ratio etching while taking advantage of other features that enable the use of amorphous carbon masks and reduce streaking and warping.

[0050] In some embodiments, liquid nitrogen is used as a coolant that flows through the chuck or bottom electrode to provide cooling. In other embodiments, liquid Vertel Sinera manufactured by DuPont Corporation of Wilmington, DE, USA TM Can be used as a coolant.

[0051] Warpage is often a problem in etching of contacts where features are cylindrical and may have a circular cross section. Thus, in various embodiments, the features are contacts with a circular cross section. In other embodiments, the features may have other cross sections, such as elliptical, square, and other polygonal shapes. By reducing the warpage, the etched features have more cylindrical shapes. In other embodiments, the features may be lines, steps, or other shapes. Other embodiments may have one or more of a silicon-containing mask or a metal-containing mask. In various embodiments, the halogen is preferably fluorine, bromine, or iodine.

[0052] Although the present invention has been described according to several preferred embodiments, there are changes, modifications, permutations and various alternative equivalents that fall within the scope of the present invention. It should also be noted that there are many alternatives to the methods and devices of the present disclosure. Therefore, the following claims are intended to be interpreted as including all such changes, modifications, permutations and various alternative equivalents that fall within the true spirit and scope of the present disclosure.

Claims

1. A method for etching features in a stack under a patterned mask in an etch chamber, comprising: a) cooling the stack with a coolant, wherein the coolant temperature is below -20°C; b) flowing an etching gas into the etching chamber, wherein the etching gas comprises an etchant component, wherein the etchant component comprises at least one of NF3, XeF2, WF6, SiF4, TaF5, IF7, HF, ClF5, BrF5, AsF5, NF5, PF5, NbF5, BiF5, UF5, SiCl2, CrO2Cl2, SiCl4, TaCl4, HfCl4, TiCl3(l), TiCl4(l), CoCl2(l), TiCl3 and TiCl2, and wherein the etching gas comprises a passivation component, wherein the passivation component comprises at least one of CF4, CHF3, CH3F, CCl4, CF3I, CBr2F2, C2HF5, C2F5Br, H2, O2, H2O, H2O2, BCl3, NH3, COS, CO, SF6 and SiF4; c) generating a plasma from the etching gas; and d) etching features in the stack selectively relative to the patterned mask.

2. The method of claim 1 further comprising providing a bias voltage having a magnitude of at least 400 volts.

3. The method according to claim 1, wherein: The etching gas is oxygen-free.

4. The method according to claim 1, wherein: The etching gas contains a passivating component, wherein the passivating component includes at least one of CrO2Cl2, SiCl4, SOCl2, TiCl2, TiCl3 and CoCl2.

5. The method according to claim 1, wherein: The stack was cooled to a temperature below -20°C.

6. The method according to claim 1, wherein: The stack is cooled to a temperature below -60°C.

7. The method according to claim 1, wherein: The etching gas is an atomic layer etching gas or an atomic layer deposition gas, wherein the plasma from the etching gas modifies a layer of the stack to provide a modified layer, and further comprising: e) stopping the generation of said plasma; and f) activating the modified layer of the stack after the stopping of generating the plasma.

8. The method of claim 7, wherein steps b-f are repeated a plurality of times.

9. The method according to claim 8, wherein: The activating the modified layer of the stack includes at least one of heating the modified layer, bombarding the modified layer, or flowing a gas to chemically react with the modified layer.

10. The method of claim 1 further comprising providing a bias voltage having a magnitude of at least 1000 volts.

11. The method according to claim 1, wherein: The etching gas includes at least one of a fluorine-providing component, a hydrogen-containing component, a hydrocarbon-containing component, a fluorocarbon-containing component, and an iodine-containing component.

12. The method according to claim 1, wherein: The feature has an aspect ratio of height to width greater than 20:

1.

13. The method according to claim 1, wherein: The etching gas includes a metal halide gas.

14. The method according to claim 1, wherein: The stack includes a dielectric layer.

15. The method according to claim 1, wherein: The stack includes at least one of a silicon nitride layer, a silicon carbide layer, or a silicon oxide layer.

16. A method for etching features in a stack under a patterned mask in an etch chamber, comprising: a) cooling the stack with a coolant, wherein the coolant temperature is below -20°C; b) allowing an etching gas to flow into the etching chamber; c) generating a plasma from the etching gas, wherein the etching gas comprises a passivating component, wherein the passivating component comprises at least one of CCl4, CF3I, CBr2F2, C2F5Br, H2O, H2O2, BCl3, NH3, COS, CO, SiF4, CrO2Cl2, SiCl4, SOCl2, TiCl2, TiCl3, and CoCl2, and wherein the etching gas comprises a passivating component, wherein the passivating component comprises at least one of CF4, CHF3, CH3F, CCl4, CF3I, CBr2F2, C2HF5, C2F5Br, H2, O2, H2O, H2O2, BCl3, NH3, COS, CO, SF6, and SiF4; and d) etching features in the stack selectively relative to the patterned mask.

17. The method according to claim 16, wherein: The stack was cooled to a temperature below -20°C.

18. The method of claim 16, further comprising providing a bias voltage having a magnitude of at least 400 volts.

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