Storage system with replay attack countermeasures and operation method thereof

Abstract

In a method for operating a storage system, first security data and a first timestamp for preventing a replay attack are written by a host device into a first storage area as an external storage area. The host device updates a second timestamp based on the first timestamp. A second timestamp corresponding to the first timestamp is stored in a second storage area different from the first storage area. The host device receives a first notification signal indicating an update result of the second timestamp. When the host device determines that the second timestamp is successfully updated based on the first notification signal, the write operation of the first security data is completed.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2019-0054677 filed on May 10, 2019 in the Korean Intellectual Property Office (KIPO), the entire contents of which are incorporated herein by reference. Technical Field

[0003] Methods, systems, apparatus, and articles according to the present disclosure relate generally to semiconductor integrated circuits, and more particularly to methods of operating a storage system having countermeasures against replay attacks and a storage system executing the method. Background Art

[0004] Generally, system on chip (SoC) is used to refer to a processing device that integrates various functional blocks (e.g., central processing unit (CPU), memory, interface unit, digital signal processing unit, analog signal processing unit, etc.) in a single or a small number of semiconductor integrated circuits (ICs) to implement an electronic system such as a computer system using a limited number of ICs. SoC has evolved into a complex system that includes various functions such as multimedia, graphics, interface, security, etc. The data processed in the SoC is provided to an external memory device, and when the SoC exchanges secure data with the memory device, a replay attack that detects and reuses the content of previous communications may occur. Therefore, countermeasures or defenses against such replay attacks are required. Summary of the invention

[0005] In one aspect, a method of operating a storage system is provided, including countermeasures against replay attacks that can improve security performance.

[0006] Another aspect provides a storage system for executing the method.

[0007] According to an aspect of one or more example embodiments, a method for operating a storage system is provided, the method comprising: a host device writes first security data and a first timestamp for preventing replay attacks into a first storage area serving as an external storage area; the host device updates a second timestamp based on the first timestamp, the second timestamp corresponding to the first timestamp and stored in a second storage area different from the first storage area; the host device receives a first notification signal indicating an update result; and when the host device determines, based on the first notification signal, that the second timestamp is successfully updated, the write operation of the first security data is completed.

[0008] According to another aspect of one or more example embodiments, a storage system is provided, including a host device, a nonvolatile memory device, and a secure nonvolatile memory device. The host device processes first security data and a first timestamp for preventing a replay attack. The nonvolatile memory device is controlled by the host device, is disposed outside the host device, and includes a first storage area in which the first security data and the first timestamp are written. The secure nonvolatile memory device is controlled by the host device, is formed separately from the nonvolatile memory device, and includes a second storage area in which a second timestamp corresponding to the first timestamp is written. The host device writes the first security data and the first timestamp to the first storage area, and updates the second timestamp based on the first timestamp. The secure nonvolatile memory device generates a first notification signal indicating a result of updating the second timestamp. When the host device determines that the second timestamp is successfully updated based on the first notification signal, the write operation of the first security data is completed.

[0009] According to another aspect of one or more example embodiments, a storage system is provided, including a host device and a non-volatile memory device. The host device processes first security data and a first timestamp for preventing replay attacks. The non-volatile memory device is controlled by the host device, is disposed outside the host device, includes a first storage area in which the first security data and the first timestamp are written, and includes a second storage area in which a second timestamp corresponding to the first timestamp is written. The second storage area is different from the first storage area. The host device writes the first security data and the first timestamp to the first storage area, and updates the second timestamp based on the first timestamp. The non-volatile memory device generates a first notification signal indicating the result of updating the second timestamp. When the host device determines that the second timestamp is successfully updated based on the first notification signal, the write operation of the first security data is completed. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Illustrative, non-limiting example embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0011] Figure 1 is a flow chart illustrating a method of operating a storage system according to an example embodiment;

[0012] Figure 2 is a block diagram illustrating a storage system according to an example embodiment;

[0013] Figure 3 is a diagram showing a method of performing Figure 2 Storage system execution Figure 1 Figures of examples of methods;

[0014] Figure 4 is a detailed illustration according to an example embodiment Figure 3 A diagram of the operation;

[0015] Figure 5 is a diagram showing writing the first security data and the first timestamp into Figure 1 A flowchart of an example of a first storage area in;

[0016] Figure 6 is a diagram showing an update according to an example embodiment Figure 1 A flowchart of an example of a second timestamp in FIG. 1 ;

[0017] Figure 7 is a flow chart illustrating a method of operating a storage system according to an example embodiment;

[0018] Figure 8 is a diagram showing a method of performing Figure 2 Storage system execution Figure 7 Figures of examples of methods;

[0019] Fig. 9 is a detailed illustration according to an example embodiment Figure 8 A diagram of the operation;

[0020] Fig.10 is a diagram showing a method of performing a Figure 7 A flowchart of an example of setting a first timestamp in FIG.

[0021] Fig.11 is a flow chart illustrating a method of operating a storage system according to an example embodiment;

[0022] Fig.12 is a diagram showing a method of performing Figure 2 Storage system execution Fig.11 Figures of examples of methods;

[0023] Fig.13 is a diagram showing a method according to an example embodiment Fig.11 Flowchart of an example of checking whether a replay attack has occurred;

[0024] Fig.14 is a flow chart illustrating a method of operating a storage system according to an example embodiment;

[0025] Fig.15 is a diagram showing a method of performing Figure 2 A diagram of an example of a storage system performing a method according to an example embodiment;

[0026] Fig.16 and Fig.17 is a block diagram illustrating a storage system according to an example embodiment;

[0027] Fig.18is a block diagram illustrating an example of a nonvolatile memory included in a memory system according to example embodiments;

[0028] Fig.19 is a block diagram illustrating an example of a storage device included in a storage system according to an example embodiment; and

[0029] Fig. 20 is a block diagram illustrating an electronic system according to example embodiments. DETAILED DESCRIPTION

[0030] Various example embodiments will be described more fully with reference to the accompanying drawings, in which embodiments are shown. However, the present disclosure may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. In this application, the same reference numerals represent the same elements.

[0031] In a storage system and a method of operating the storage system according to an example embodiment, a timestamp used as a countermeasure against a replay attack can be stored in a secure storage space separated from a regular storage space, and a data protection protocol between a host device and a regular storage space can be implemented based on the timestamp stored in the secure storage space, thereby effectively preventing a replay attack. In addition, a write operation for storing secure data in a regular storage space and a security update operation for storing a timestamp in a secure storage space can be tightly coupled to each other, and it can be determined that the write operation is completed only when the security update operation is successfully completed, thereby ensuring the stability and reliability of the operation of the storage system.

[0032] In addition, when the storage system is powered on, the timestamp in the host device can be reliably and securely initialized based on the timestamp stored in the secure storage space, and subsequent operations can be performed only after the first timestamp is successfully set, thereby better ensuring the stability and reliability of the operation of the storage system.

[0033] Figure 1 is a flowchart illustrating a method of operating a storage system according to example embodiments.

[0034] A storage system according to an example embodiment includes a host device, and includes a first storage area and a second storage area that are formed separately from each other (eg, separated, distinguished, and / or different from each other). Figure 2 Describe the configuration of the storage system.

[0035] refer to Figure 1In a method of operating a storage system according to an example embodiment, when a data write event of first security data is expected to be performed, the host device writes the first security data and a first timestamp for preventing a replay attack on the first storage area (step S100). For example, the first security data may be at least one of various security data, such as a cryptographic key, sensitive data, a sensitive code, etc. The first storage area may be arranged outside the host device and may be a conventional or general data storage space.

[0036] The replay attack refers to an attack that disguises a legitimate user by selecting a valid message on a protocol, then copying the valid message, and retransmitting the valid message later. In other words, the replay attack refers to a security hacking method that stores a previous code and / or data communicated between a host device and a first storage area, and then retransmits the previous code and / or data to the host device. The first timestamp may be used as a tag for detecting a replay attack. In other words, the first timestamp may be anti-replay countermeasure data and / or information for preventing a replay attack on the first security data.

[0037] The host device updates a second timestamp based on the first timestamp (step S200). The second timestamp is stored in a second storage area and corresponds to the first timestamp. As described above, the second storage area is separate, distinct and / or different from the first storage area. Unlike the first storage area, the second storage area can be a secure data storage space. For example, the second timestamp can be updated to have a value substantially the same as the value of the first timestamp.

[0038] A first notification signal indicating a result of updating the second timestamp stored in the second storage area is generated, and the host device receives the first notification signal (step S300). For example, the first notification signal may be provided from a memory device including the second storage area, and may indicate whether the update operation on the second timestamp is successful or failed.

[0039] The host device determines whether the update operation is successful (step S400). For example, the host device may determine whether the update operation of the second timestamp is successful or failed based on the first notification signal. When it is determined that the update operation is successful (e.g., the second timestamp is successfully updated) (step S400: yes), the write operation of the first security data is completed (step S410). When it is determined that the update operation is not successful (e.g., the second timestamp is not successfully updated) (step S400: no), it may be determined that the write operation of the first security data has failed (step S420).

[0040] In a method of operating a storage system according to an example embodiment, a timestamp used as a countermeasure against a replay attack can be stored in a secure storage space (e.g., a second storage area) separated from a regular storage space (e.g., a first storage area), and a data protection protocol between a host device and the regular storage space can be implemented based on the timestamp stored in the secure storage space. In addition, a write operation for storing secure data in a regular storage space and a secure update operation for storing a timestamp in a secure storage space can be tightly coupled to each other (i.e., when storing secure data in a regular storage space, the timestamp is securely updated in the secure storage space), and it can be determined that the write operation is completed only when the secure update operation is successfully completed. Therefore, replay attacks can be effectively prevented, and the stability and reliability of the operation of the storage system can be ensured.

[0041] Figure 2 is a block diagram illustrating a storage system according to example embodiments.

[0042] Reference Figure 2 , the storage system 100 includes a host device 200 , a non-volatile memory (NVM) device 300 , and a secure non-volatile memory (NVM) device 400 .

[0043] The host device 200 controls the overall operation of the memory system 100. The host device 200 includes a host processor 210 and a secure element (SE) 220. The host device 200 may further include a host memory (not shown).

[0044] The host processor 210 controls the operation of the host device 200. For example, the host processor 210 may execute an operating system (OS) to drive the storage system 100, and may execute various applications, such as providing an Internet browser, executing a game, displaying a video file, controlling a camera module, etc. The operating system executed by the host processor 210 may include a file system for file management at an operating system level and a device driver for controlling peripheral devices including the nonvolatile memory device 300 and the secure nonvolatile memory device 400.

[0045] In some example embodiments, the host processor 210 may be a central processing unit (CPU), a microprocessor, an application processor (AP), etc. In some example embodiments, the host processor 210 may include a single processor core. In some embodiments, the host processor 210 may include a plurality of processor cores.

[0046] The security element 220 is different from the host processor 210 and is formed separately from the host processor 210 (e.g., separate, distinct and / or different from the host processor 210). The security element 220 controls the operation of the host device 200 in a secure mode independently of the host processor 210. In other words, the security element 220 can be used to implement an independent secure execution environment. For example, the security element 220 can resist tampering attacks, such as replay attacks, micro-probing, software attacks, eavesdropping, fault generation attacks, etc. The security element 220 can be referred to as security hardware, security components, or security modules.

[0047] The security element 220 processes and / or stores the first security data X and the first time stamp TS corresponding to the first security data X. In other words, the method of operating a storage system according to example embodiments may be performed and / or executed by the security element 220 included in the host device 200. Figure 2 Although not shown in the figure, the security element 220 may include: a security processor for processing the first security data X and the first time stamp TS; a security memory for storing the first security data X and the first time stamp TS; a one-time programmable (OTP) memory for storing a key for encrypting the first security data X and the first time stamp TS, etc.

[0048] In some example embodiments, the secure element 220 may be an integrated secure element (iSE) and / or an embedded secure element (eSE) integrated into the host device 200. In other words, the host device 200 may be implemented in the form of a single semiconductor package including the secure element 220. In this example, the secure memory and the OTP memory included in the secure element 220 may be implemented in the form of an integrated random access memory (iRAM) and an integrated OTP (iOTP), respectively.

[0049] The host memory (not shown) may store instructions and / or data executed and / or processed by the host processor 210 and / or the secure element 220. For example, the host memory may store a boot image, a file system, device drivers, and / or applications.

[0050] In some example embodiments, the host device 200 may be implemented in the form of a system on chip (SoC).

[0051] The non-volatile memory device 300 is accessed and controlled by the host device 200 and is arranged outside the host device 200. In the case where the security element 220 is integrated in the host device 200, the non-volatile memory for storing the security content used by the security element 220 should be integrated together in the host device 200. However, due to manufacturing process problems, it is difficult to integrate the non-volatile memory in the host device 200, so an external non-volatile memory (e.g., the non-volatile memory device 300) may be used to store the security content. The data stored in the external non-volatile memory device 300 may be encrypted by the security element 220, and a tag such as a message authentication code (MAC) may be included for integrity checking.

[0052] The nonvolatile memory device 300 includes a first storage area (storage area 1) 310, and the first security data X processed by the host device 200 (for example, by the security element 220 included in the host device 200) and the first time stamp TS are written in the first storage area 310. For example, the encrypted first security data X' corresponding to the first security data X, and the first message authentication code MAC (TS) including the information associated with the first time stamp TS may be stored in the first storage area 310.

[0053] The host device 200 may control data write / read operations on the nonvolatile memory device 300. For example, when it is desired to write specific data into the nonvolatile memory device 300, the host device 200 may provide a write command, a write address, and the data to be written into the nonvolatile memory device 300. In addition, when it is desired to read specific data from the nonvolatile memory device 300, the host device 200 may provide a read command and a read address to the nonvolatile memory device 300, and may receive data acquired from the nonvolatile memory device 300.

[0054] The non-volatile memory device 300 may be accessed by both the host processor 210 and the secure element 220. In this case, the first storage area 310 may be accessed only by the secure element 220. Figure 2 Although not shown in the figure, the non-volatile memory device 300 may also include a storage area that can be accessed only by the host processor 210 and / or a storage area that can be accessed by both the host processor 210 and the secure element 220.

[0055] In some example embodiments, the nonvolatile memory device 300 may be implemented in the form of a conventional or general data storage space. For example, the nonvolatile memory device 300 may include a flash memory (e.g., a NAND flash memory). For another example, the nonvolatile memory device 300 may include a phase change random access memory (PRAM), a resistive random access memory (RRAM), a nano floating gate memory (NFGM), a polymer random access memory (PoRAM), a magnetic random access memory (MRAM), a ferroelectric random access memory (FRAM), etc.

[0056] In some example embodiments, as will be referred to Fig.18 As described above, the non-volatile memory device 300 may include a non-volatile memory. In other example embodiments, as will be referred to in Fig.19 As described above, the nonvolatile memory device 300 may be implemented in the form of a storage apparatus including a plurality of nonvolatile memories.

[0057] The secure nonvolatile memory device 400 is accessed and controlled by the host device 200 and is formed separately from the nonvolatile memory device 300 (eg, separate, distinct, and / or different from the nonvolatile memory device 300). Figure 2 In an example of , the secure nonvolatile memory device 400 may be provided outside the host device 200. In other words, the host device 200 and the secure nonvolatile memory device 400 may be formed in or configured as separate semiconductor packages.

[0058] The secure non-volatile memory device 400 includes a second storage area 410 (storage area 2) in which a second time stamp NV_TS corresponding to the first time stamp TS is stored. For example, the first time stamp TS and the second time stamp NV_TS may have substantially the same value.

[0059] The host device 200 may control data write / read operations on the secure nonvolatile memory device 400. Unlike the nonvolatile memory device 300, the secure nonvolatile memory device 400 may be accessed only by the secure element 220.

[0060] In some example embodiments, unlike the nonvolatile memory device 300 , the secure nonvolatile memory device 400 may be implemented in the form of a secure data storage space.

[0061] The storage system 100 may further include a first interface provided or formed between the host device 200 and the nonvolatile memory device 300, and a second interface provided or formed between the host device 200 and the secure nonvolatile memory device 400. Figure 2, a bidirectional arrow shown between the host device 200 and the nonvolatile memory device 300 may represent a first interface, and another bidirectional arrow shown between the host device 200 and the secure nonvolatile memory device 400 may represent a second interface.

[0062] Each of the first interface and the second interface may represent a bidirectional digital interface that can transmit a digital stream, such as a bit sequence. For example, a single wiring or multiple wirings may be implemented as electrical transmission lines, such as microstrips manufactured using printed circuit board (PCB) technology, but the inventive concept is not limited thereto.

[0063] In some example embodiments, the first interface and the second interface may conform to different protocols and may exchange signals based on different protocols. For example, the first interface may include a conventional or general communication interface (e.g., a block accessible interface), such as a universal flash storage device (UFS), an embedded multimedia card (eMMC), a serial advanced technology attachment (SATA) bus, a small computer system interface (SCSI) bus, a non-volatile memory express (NVMe) bus, a serially connected SCSI (SAS) bus, etc. The second interface may be different from the first interface and may include a dedicated security interface (or a dedicated security protocol) for secure communication. In other words, the security element 220 and the secure non-volatile memory device 400 can communicate with each other using a security protocol and a secure channel.

[0064] In some example embodiments, the storage system 100 may be any mobile system, such as a mobile phone, a smart phone, a tablet computer, a laptop computer, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital camera, a portable game console, a music player, a camcorder, a video player, a navigation device, a wearable device, an Internet of Things (IoT) device, an Internet of Everything (IoE) device, an e-book reader, a virtual reality (VR) device, an augmented reality (AR) device, a robotic device. In other example embodiments, the storage system 100 may be any computing system, such as a personal computer (PC), a server computer, a workstation, a digital television, a set-top box, a navigation system, etc.

[0065] Figure 3 is a diagram showing a method of performing Figure 2 Storage system execution Figure 1 Figure 1 shows an example of the method.

[0066] Reference Figure 1 , Figure 2 and Figure 3, the host device 200 (e.g., the security element 220 included in the host device 200) writes the first security data X(0) and the first time stamp TS(X) corresponding to the first security data X(0) to the non-volatile memory device 300 (e.g., the first storage area 310 included in the non-volatile memory device 300) (step S100). The encrypted first security data X'(0) corresponding to the first security data X(0) and the first message authentication code MAC[TS(X)] including the information associated with the first time stamp TS(X) may be stored in the non-volatile memory device 300.

[0067] The host device 200 updates (securely updates) the second timestamp NV_TS(X+1) corresponding to the first timestamp TS(X) stored in the secure non-volatile memory device 400 (e.g., the second storage area 410 included in the secure non-volatile memory device 400) based on the first timestamp TS(X) (step S200). For example, the second timestamp may be NV_TS(X) at the initial operation time, and may then be updated to NV_TS(X+1).

[0068] The secure nonvolatile memory device 400 generates a first notification signal (ACK) indicating an update result of the second time stamp NV_TS(X+1), and the host device 200 receives the first notification signal (step S300 ).

[0069] The host device 200 checks or determines whether the update operation of the second time stamp NV_TS(X+1) is successful or failed based on the first notification signal (step S400). Based on the result of this determination operation, the write operation of the first security data X(0) is completed, or it is determined that the write operation of the first security data X(0) has failed.

[0070] Figure 4 is a detailed illustration according to an example embodiment Figure 3 Operation diagram. Figure 4 Shown in detail Figure 3 Steps S100 and S200 in the operation. Figure 5 is a diagram showing the first security data and the first timestamp being written into Figure 1 A flowchart of an example of a first storage area in FIG. Figure 6 Is showing update Figure 1 Flowchart of an example of a second timestamp in FIG.

[0071] Reference Figure 1 , Figure 2 , Figure 4 and Figure 5When the first security data and the first timestamp are written to the first storage area (step S100), the host device 200 (e.g., the security element 220 included in the host device 200) may encrypt the first security data X(0) to generate encrypted first security data X'(0) (step S110). For example, the encrypted first security data X'(0) may be expressed as "Enc(Data(X))", where the description of the key used for encryption is omitted.

[0072] The host device 200 may generate a first message authentication code MAC[TS(X)] for the encrypted first security data X'(0) and the first timestamp TS(X) (step S120). For example, the first message authentication code MAC[TS(X)] may be expressed as "MAC(Enc(Data(X))+TS(X))", wherein the description of the key used for encryption is also omitted.

[0073] The host device 200 may send the encrypted first security data X'(0) and the first message authentication code MAC[TS(X)] to the nonvolatile memory device 300 (e.g., the first storage area 310 included in the nonvolatile memory device 300) (step S130). The encrypted first security data X'(0) and the first message authentication code MAC[TS(X)] may be stored in the first storage area 310.

[0074] Reference Figure 1 , Figure 2 , Figure 4 and Figure 6 When updating the second timestamp (step S200), the host device 200 (e.g., the security element 220 included in the host device 200) may generate a timestamp update command CMD_SU[TS(X)] based on the first timestamp TS(X) and the session key (step S210). For example, the timestamp update command CMD_SU[TS(X)] may include an encrypted first timestamp represented as "Enc(TS(X), Skey)", and a corresponding message authentication code represented as "MAC(TS(X))", and "Skey" may represent the session key. Fig. 9 Describes a session key.

[0075] The secure non-volatile memory device 400 may update the second timestamp NV_TS(X+1) based on the timestamp update command CMD_SU[TS(X)] so that the value of the second timestamp NV_TS(X+1) is equal to the value of the first timestamp TS(X). For example, the secure non-volatile memory device 400 may include a processing unit capable of performing and / or running the following operations.

[0076] The secure nonvolatile memory device 400 may obtain a first time stamp TS(X) based on the time stamp update command CMD_SU[TS(X)] (step S220). For example, a message authentication code included in the time stamp update command CMD_SU[TS(X)] may be checked, the encrypted first time stamp included in the time stamp update command CMD_SU[TS(X)] may be decrypted using the session key, and thus the first time stamp TS(X) may be obtained.

[0077] The secure nonvolatile memory device 400 may update the second time stamp NV_TS(X+1) to have the same value as the first time stamp TS(X) (step S230). For example, the first time stamp TS(X) obtained by the decryption operation may be stored as the second time stamp NV_TS(X+1).

[0078] Then, the secure nonvolatile memory device 400 may generate a first notification signal RSP_SU[TS(X)]. The host device 200 may receive the first notification signal RSP_SU[TS(X)] and may determine whether the update operation of the second timestamp NV_TS(X+1) succeeds or fails based on the first notification signal RSP_SU[TS(X)].

[0079] In the storage system and the method of operating the storage system according to the example embodiment, a timestamp can be used when storing security data, so replay attacks can be effectively prevented. In addition, the timestamp can be stored in a separate secure storage space, and it can be determined that the write operation of the security data is completed only when the security update operation of the timestamp in the secure storage space is successfully completed, and thus the stability and reliability of the operation of the storage system can be ensured.

[0080] Figure 7 is a flow chart illustrating a method of operating a storage system according to an example embodiment. Figure 1 Duplicate description.

[0081] Reference Figure 7 In the method of operating a storage system according to an example embodiment, when the storage system is powered on, the host device sets (or initializes, resets) the first timestamp based on the second timestamp stored in the second storage area (step S500). Step S500 may be performed each time or whenever the storage system is powered on.

[0082] After step S500, Figure 7 Steps S100, S200, S300, S400, S410 and S420 in the reference Figure 1 The description is basically the same.

[0083] In some example embodiments, the writing operation of the first security data may be performed only after or when the setting of the first timestamp is successfully completed. In other words, steps S100, S200, S300, S400, S410, and S420 may be performed only after step S500 is successfully completed.

[0084] In the method of operating a storage system according to an example embodiment, when the storage system is powered on, the first timestamp in the host device can be reliably and securely initialized based on the second timestamp stored in the secure storage space (e.g., the second storage area). In addition, subsequent operations can be performed only after the setting of the first timestamp is successfully completed. Therefore, the stability and reliability of the operation of the storage system can be further ensured.

[0085] Figure 8 is a diagram showing a method of performing Figure 2 Storage system execution Figure 7 For brevity, the diagrams related to Figure 3 Duplicate description.

[0086] Reference Figure 2 , Figure 7 and Figure 8 , when the storage system 100 including the host device 200, the nonvolatile memory device 300 and the secure nonvolatile memory device 400 is powered on, the host device 200 (e.g., the secure element 220 included in the host device 200) sets (securely sets) a first timestamp TS(X) based on a second timestamp NV_TS(X) stored in the secure nonvolatile memory device 400 (e.g., a second storage area 410 included in the secure nonvolatile memory device 400) (step S500).

[0087] After step S500, Figure 8 Steps S100, S200, S300 and S400 in the reference Figure 3 Basically the same as described.

[0088] Fig. 9 is a detailed illustration according to an example embodiment Figure 8 Operation diagram. Fig. 9 Shown in detail Figure 8 The step S500 in the operation. Fig.10 It is shown Figure 7 Flowchart of an example of setting a first timestamp in .

[0089] Reference Figure 2 , Figure 7 , Fig. 9 and Fig.10, when setting the first timestamp based on the second timestamp (step S500 ), the host device 200 (eg, the secure element 220 included in the host device 200 ) may generate a timestamp setting command CMD_STS based on the first random number RAND1 (step S510 ).

[0090] For example, the host device 200 may generate a first random number RAND1, may encrypt the first random number RAND1 to generate an encrypted first random number, and may generate a timestamp setting command CMD_STS based on the encrypted first random number. For example, the encrypted first random number may be represented as "Enc (RAND1, Ekey)", and "Ekey" may represent a key used for encryption. The timestamp setting command CMD_STS may include the encrypted first random number "Enc (RAND1, Ekey)" and a corresponding message authentication code represented as "MAC (Enc (RAND1, Ekey), Mkey)", and "Mkey" may represent a key used for the message authentication code.

[0091] The secure nonvolatile memory device 400 may generate a set response signal RSP_STS based on the timestamp set command CMD_STS and the second random number RAND2 (step S520 ). For example, the secure nonvolatile memory device 400 may include a processing unit capable of performing and / or executing the following operations.

[0092] The secure non-volatile memory device 400 may generate a second random number RAND2, may check a message authentication code included in the timestamp setting command CMD_STS, may decrypt the encrypted first random number included in the timestamp setting command CMD_STS to obtain the first random number RAND1, and may generate a setting response signal RSP_STS based on the first random number RAND1, the second random number RAND2, and the second timestamp NV_TS. For example, the decryption operation may be represented as "Dec (RAND1, Ekey)", and the setting response signal RSP_STS may include encrypted data represented as "Enc (RAND1 + RAND2 + NV_TS, Ekey)" and a corresponding message authentication code represented as "MAC (Enc (RAND1 + RAND2 + NV_TS, Ekey), Mkey)".

[0093] The host device 200 may set the first time stamp TS(X) based on the set response signal RSP_STS so that the value of the first time stamp TS(X) is equal to the value of the second time stamp NV_TS(X) (step S530 ).

[0094] For example, the host device 200 may check the message authentication code included in the setup response signal RSP_STS, may decrypt the encrypted data included in the setup response signal RSP_STS to obtain the first random number RAND1, the second random number RAND2, and the second time stamp NV_TS, and may set the first time stamp TS(X) to have the same value as the value of the second time stamp NV_TS(X). For example, the decryption operation may be expressed as "Dec(RAND1+RAND2+NV_TS, Ekey)".

[0095] After setting the first timestamp TS(X), the host device 200 and the secure non-volatile memory device 400 may generate a session key SKEY based on the first random number RAND1 and the second random number RAND2 (step S540). For example, the session key SKEY may be expressed as "Skey = (RAND1 + RAND2, Ekey)". The session key SKEY may be used in a security update operation and may be used to generate a timestamp update command CMD_SU[TS(X)], as shown in FIG. Figure 6 As described in step S210 in .

[0096] In the storage system and the method of operating the storage system according to the example embodiment, the timestamp in the host device can be reliably and securely set and / or initialized based on the timestamp stored in the separate secure storage space at power-on. In addition, subsequent operations can be performed only after the setting of the timestamp in the host device is successfully completed, so the stability and reliability of the operation of the storage system can be further ensured.

[0097] Fig.11 is a flowchart illustrating a method of operating a storage system according to an example embodiment. Figure 1 Duplicate description.

[0098] refer to Fig.11 , in a method of operating a storage system according to example embodiments, Fig.11 Steps S100, S200, S300, S400, S410 and S420 in the reference Figure 1 The description is basically the same.

[0099] When it is desired to perform a data read event of the first security data after the write operation of the first security data is completed, the host device reads the first security data and the first timestamp from the first storage area (step S600). As described above, the encrypted first security data corresponding to the first security data and the first message authentication code corresponding to the first timestamp can be stored in the first storage area, so the encrypted first security data and the first message authentication code can be read from the first storage area.

[0100] The host device checks whether a replay attack has occurred on the first security data based on the first timestamp (step S700). For example, the first timestamp in the host device can be compared with the first timestamp in the first message authentication code, so that it can be effectively checked whether a replay attack has occurred. If a replay attack has not occurred, the host device can continue to process the data. If a replay attack has occurred, the host device can ignore the data or provide a notification that a replay attack has occurred.

[0101] Fig.12 is a diagram showing a method of performing Figure 2 Storage system execution Fig.11 For brevity, the diagrams related to Figure 3 Duplicate description.

[0102] Reference Figure 2 , Fig.11 and Fig.12 , Fig.12 Steps S100, S200, S300 and S400 in the reference Figure 3 Basically the same as described.

[0103] The host device 200 (e.g., the security element 220 included in the host device 200) reads the encrypted first security data X'(0) and the first message authentication code MAC[TS(X)] from the nonvolatile memory device 300 (e.g., the first storage area 310 included in the nonvolatile memory device 300) (step S600).

[0104] The host device 200 checks whether a replay attack has occurred based on the first timestamp TS(X) (step S700). For example, the host device 200 can decode the encrypted first security data X'(0) to obtain the first security data X(0), and can verify the first message authentication code MAC[TS(X)] based on the first timestamp TS(X) as an internal timestamp.

[0105] Fig.13 is a diagram showing a method according to an example embodiment Fig.11 Flowchart of an example of checking whether a replay attack has occurred in .

[0106] Reference Figure 2 , Fig.11 , Fig.12 and Fig.13When checking whether a replay attack has occurred on the first security data based on the first timestamp (step S700), the first timestamp TS(X) in the host device 200 and the first timestamp TS(X) in the first message authentication code MAC[TS(X)] can be compared with each other, and it can be determined whether the first timestamp TS(X) in the host device 200 is equal to the first timestamp TS(X) in the first message authentication code MAC[TS(X)] (step S710).

[0107] When the first timestamp TS(X) in the host device 200 and the first timestamp TS(X) in the first message authentication code MAC[TS(X)] have the same value (step S710: Yes), it can be determined that a replay attack has not occurred (step S720). The host device 200 can perform a desired operation, task, etc. based on the first security data X(0) obtained by the decryption operation.

[0108] When the first timestamp TS(X) in the host device 200 and the first timestamp TS(X) in the first message authentication code MAC[TS(X)] have different values ​​(step S710: No), it can be determined that a replay attack has occurred (step S730). The host device 200 can take appropriate countermeasures (e.g., discarding the first security data X(0) obtained by the decryption operation, warning, powering off, etc.).

[0109] Fig.14 is a flowchart illustrating a method of operating a storage system according to an example embodiment. Figure 1 , Figure 7 and Fig.11 Duplicate description.

[0110] Reference Fig.14 In the method of operating a storage system according to an example embodiment, each time or whenever the first security data is written to the first storage area, the first timestamp is changed and updated in the second storage area. In other words, the reference time stamp may be repeatedly performed for each write operation to the first security data. Figure 1 Described steps S100, S200, S300, S400, S410 and S420.

[0111] For example, the writing operation of the first security data and the first timestamp, the updating operation of the second timestamp, the receiving operation of the updating result, and the checking operation of whether the updating operation is successful are sequentially performed (step S1100). For example, step S1100 may include Figure 1 Steps S100, S200, S300, S400, S410 and S420 in FIG.

[0112] Thereafter, when the first security data and the first timestamp are changed, rewriting operations of the first security data and the first timestamp, re-updating operations of the second timestamp, receiving re-updating results, and checking whether the re-updating operations are successful are sequentially performed (step S1200).

[0113] For example, when it is desired to change (or modify, adjust) the first security data or there is a request to change the first security data, the host device may change the first security data, and the first timestamp may be changed together by the host device. Figure 1 As in steps S100, S200, S300, S400, S410 and S420 in the flowchart, the host device can rewrite the changed first security data and the changed first timestamp into the first storage area, the host device can re-update the second timestamp stored in the second storage area based on the changed first timestamp, and can generate a second notification signal indicating the result of re-updating the second timestamp stored in the second storage area. The host device can receive the second notification signal, and when it is determined based on the second notification signal that the second timestamp is successfully updated, the rewrite operation on the changed first security data can be completed, and when it is determined based on the second notification signal that the second timestamp is not successfully updated, it can be determined that the rewrite operation on the changed first security data has failed.

[0114] Although not shown in detail, when it is desired to further change the first security data after step S1200, operations substantially the same as step S1200 may be sequentially repeated. In addition, when a power-off and power-on event occurs during the operation of the storage system, a reference operation may be further performed. Figure 7 The operation of setting the first timestamp described in step S500 of FIG. 1 and the ... when a data read event of the first security data occurs, the operation of setting the first timestamp described in step S500 of FIG. 1 may further be performed as described in step S500 of FIG. 1 . Fig.11 The operations of reading the first security data and checking whether a replay attack has occurred are described in steps S600 and S700.

[0115] Fig.15 It is shown by Figure 2 FIG. 1 is a diagram of an example of a storage system performing a method according to an example embodiment. Figure 3 , Figure 8 and Fig.12 Duplicate description.

[0116] Reference Figure 1 , Figure 2 , Figure 7 , Fig.11 and Fig.15, when the storage system 100 is powered on, the host device 200 may set the first timestamp TS(X) based on the second timestamp NV_TS(X) stored in the secure non-volatile memory device 400. When it is desired to write the first security data X(0), the host device 200 may generate encrypted first security data X'(0) corresponding to the first security data X(0), and a first message authentication code MAC[TS(X)] corresponding to the first timestamp TS(X), and may send and write the encrypted first security data X'(0) and the first message authentication code MAC[TS(X)] to the non-volatile memory device 300. The host device 200 may update the second timestamp from NV_TS(X) to NV_TS(X+1) based on the first timestamp TS(X), and may sequentially perform an operation of receiving an update result and an operation of checking whether the update operation is successful.

[0117] Thereafter, the host device 200 may change the first security data from X(0) to X(1), and may change the first timestamp from TS(X) to TS(X+1). The host device 200 may generate encrypted security data X'(1) corresponding to the changed first security data X(1), and a message authentication code MAC[TS(X+1)] corresponding to the changed first timestamp TS(X+1), and may send and rewrite the encrypted security data X'(1) and the message authentication code MAC[TS(X+1)] to the nonvolatile memory device 300. The host device 200 may re-update the second timestamp from NV_TS(X+1) to NV_TS(X+2) based on the changed first timestamp TS(X+1), and may sequentially perform an operation of receiving a re-update result and an operation of checking whether the re-update operation is successful.

[0118] Similarly, the host device 200 may change the first security data from X(1) to X(2), and may change the first timestamp from TS(X) to TS(X+2). The host device 200 may generate encrypted security data X'(2) corresponding to the changed first security data X(2), and a message authentication code MAC[TS(X+2)] corresponding to the changed first timestamp TS(X+2), and may send and rewrite the encrypted security data X'(2) and the message authentication code MAC[TS(X+2)] to the nonvolatile memory device 300. The host device 200 may re-update the second timestamp from NV_TS(X+2) to NV_TS(X+3) based on the changed first timestamp TS(X+2), and may sequentially perform an operation of receiving a re-update result and an operation of checking whether the re-update operation is successful.

[0119] Thereafter, the memory system 100 may be powered off and then powered on again. When the memory system 100 is powered on, the host device 200 may set the first timestamp to TS(X+3) based on the second timestamp NV_TS(X+3) last stored in the secure nonvolatile memory device 400 .

[0120] Afterwards, the host device 200 can read the encrypted first security data corresponding to the first security data and the first message authentication code corresponding to the first timestamp from the non-volatile memory device 300. When X'(2) and MAC[TS(X+2)] are received as the encrypted first security data and the first message authentication code, respectively, the first timestamp TS(X+2) in the first message authentication code and TS(X+3-1) as the first timestamp in the host device 200 can be identical to each other, so it can be determined that a replay attack has not occurred. When X'(1) and MAC[TS(X+1)] are received as the encrypted first security data and the first message authentication code, respectively, the first timestamp TS(X+1) in the first message authentication code and TS(X+3-1) as the first timestamp in the host device 200 can be different from each other, so it can be determined that a replay attack has occurred.

[0121] In the method of operating a storage system according to an example embodiment, when storing a timestamp required for an anti-replay countermeasure by a security element 220, an external secure non-volatile memory device 400 and a secure channel can be used to reliably and securely store the timestamp without integrating a non-volatile memory in the security element 220. A timestamp variable can be set between the security element 220 and the secure non-volatile memory device 400, and the security element 220 can perform communication using a timestamp updated at each write operation, so that the security element 220 can effectively detect a replay attack. In addition, the timestamp can be securely stored even in an environment where power is lost. For example, the timestamp can be securely stored even under any condition of power instability (e.g., sudden power failure, slow power reduction, etc.). In addition, a secure protocol can be used to implement an operation of writing / reading a timestamp to / from the secure non-volatile memory device 400, and for a successful write / read operation, confirmation between the security element 220 and the secure non-volatile memory device 400 may be required, so that the stability and reliability of the operation of the storage system can be guaranteed.

[0122] Fig.16 and Fig.17 is a block diagram showing a storage system according to an example embodiment. Figure 2 Duplicate description.

[0123] Reference Fig.16, a storage system 100 a includes a host device 200 a and a non-volatile memory (NVM) device 300 .

[0124] In addition to a secure non-volatile memory (NVM) device 400a included in the host device 200a, Fig.16 The storage system 100a can be used with Figure 2 The storage system 100 is basically the same. Fig.16 The storage system 100a can be as shown in FIG. Figure 1 and Figures 3 to 15 Operate as described.

[0125] exist Fig.16 In the example of , the secure non-volatile memory device 400a may be disposed inside the host device 200a. In other words, the host device 200a and the secure non-volatile memory device 400a may be formed in a single semiconductor package. However, although the host device 200a and the secure non-volatile memory device 400a may be formed of only one semiconductor package, the secure non-volatile memory device 400a may not be integrated in the host device 200a. In other words, the secure element 220 may be formed on the same semiconductor die as other components of the host device 200a (e.g., the host processor 210) and may be integrated in the host device 200a; however, the secure non-volatile memory device 400a may be formed on a semiconductor die different from the semiconductor die on which other components of the host device 200a (e.g., the host processor 210 and the secure element 220) are formed.

[0126] Reference Fig.17 , a storage system 100 b includes a host device 200 and a non-volatile memory (NVM) device 300 b.

[0127] Except that the secure non-volatile memory (NVM) device 400 is omitted, and a second storage area (storage area 2) 410 is included in addition to the first storage area (storage area 1) 310 in the non-volatile memory device 300b, Fig.17 The storage system 100b can be used with Figure 2 The storage system 100 is basically the same. Fig.17 The storage system 100b can be as shown in FIG. Figure 1 and Figures 3 to 15 Operate as described.

[0128] exist Fig.17In the example of , the nonvolatile memory device 300b includes a first storage area 310 in which the first security data X and the first time stamp TS are written, and a second storage area 410 in which the second time stamp NV_TS is stored. In other words, the first storage area 310 and the second storage area 410 may be included in the same nonvolatile memory device 300b.

[0129] In some example embodiments, although Fig.17 Although not shown, a first interface through which communication is performed between the host device 200 and the first storage area 310 may be separated and distinguished from a second interface through which communication is performed between the host device 200 and the second storage area 410 .

[0130] As will be appreciated by those skilled in the art, the present invention may be embodied as a system, method, computer program product, and / or computer program product in one or more computer-readable media having computer-readable program code embodied thereon. The computer-readable program code may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device. The computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium may be any tangible medium that may contain or store a program used by or associated with an instruction execution system, device, or apparatus. For example, a computer-readable medium may be a non-transitory computer-readable medium.

[0131] Fig.18 is a block diagram illustrating an example of a nonvolatile memory included in a memory system according to example embodiments.

[0132] refer to Fig.18 , the nonvolatile memory 500 includes a memory cell array 510, a row decoder 520, a page buffer circuit 530, a data input / output (I / O) circuit 540, a voltage generator 550, and a control circuit 560. The nonvolatile memory 500 may represent a memory cell array 510, a row decoder 520, a page buffer circuit 530, a data input / output (I / O) circuit 540, a voltage generator 550, and a control circuit 560. Figure 2 A non-volatile memory (NVM) in the non-volatile memory (NVM) device 300 .

[0133] The memory cell array 510 is connected to the row decoder 520 via a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines GSL. The memory cell array 510 is also connected to the page buffer circuit 530 via a plurality of bit lines BL. The memory cell array 510 may include a plurality of memory cells (e.g., a plurality of nonvolatile memory cells) connected to the plurality of word lines WL and the plurality of bit lines BL. The memory cell array 510 may be divided into a plurality of memory blocks BLK1, BLK2, ..., BLKz, each memory block including memory cells. In some example embodiments, the plurality of memory cells may be arranged in a two-dimensional (2D) array structure or a three-dimensional (3D) vertical array structure.

[0134] The three-dimensional vertical array structure may include a vertical cell string oriented vertically such that at least one memory cell is located above another memory cell. The at least one memory cell may include a charge trapping layer. The following patent documents (incorporated herein in their entirety by reference) describe suitable constructions for memory cell arrays including a 3D vertical array structure, wherein the 3D memory array is configured as a plurality of levels and word lines and / or bit lines are shared between the levels: U.S. Patent Nos. 7,679,133, 8,553,466, 8,654,587, 8,559,235; and U.S. Patent Application Publication No. 2011 / 0233648.

[0135] The control circuit 560 receives data from an external device (e.g., Figure 2 The host device 200 in the nonvolatile memory 500 receives the command CMD and the address ADDR, and controls the erase operation, programming operation and read operation of the nonvolatile memory 500 based on the command CMD and the address ADDR. The erase operation may include performing a series of erase cycles, and the programming operation may include performing a series of programming cycles. Each programming cycle may include a programming operation and a programming verification operation. Each erase cycle may include an erase operation and an erase verification operation. The read operation may include a normal read operation and a data recovery read operation.

[0136] For example, the control circuit 560 may generate a control signal CON for controlling the voltage generator 550, may generate a control signal PBC for controlling the page buffer circuit 530 based on the command CMD, and may generate a row address R_ADDR and a column address C_ADDR based on the address ADDR. The control circuit 560 may provide the row address R_ADDR to the row decoder 520 and provide the column address C_ADDR to the data I / O circuit 540.

[0137] The row decoder 520 may be connected to the memory cell array 510 via a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines GSL.

[0138] For example, in a data erase / write / read operation, based on the row address R_ADDR, the row decoder 520 can determine at least one of the multiple word lines WL as a selected word line, and can determine the remaining word lines or remaining word lines of the multiple word lines WL except the selected word line as unselected word lines.

[0139] In addition, in data erase / write / read operations, based on the row address R_ADDR, the row decoder 520 can determine at least one of the multiple string selection lines SSL as a selected string selection line, and can determine the remaining string selection lines or the remaining string selection lines of the multiple string selection lines SSL except the selected string selection line as unselected string selection lines.

[0140] In addition, in data erase / write / read operations, based on the row address R_ADDR, the row decoder 520 can determine at least one of the multiple ground selection lines SSL as a selected ground selection line, and can determine the remaining ground selection lines or the remaining ground selection lines of the multiple ground selection lines SSL except the selected ground selection line as unselected ground selection lines.

[0141] The voltage generator 550 may generate a voltage VS required for the operation of the nonvolatile memory 500 based on the power PWR and the control signal CON. The voltage VS may be applied to a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines GSL through the row decoder 520. In addition, the voltage generator 550 may generate an erase voltage VERS required for a data erase operation based on the power PWR and the control signal CON. The erase voltage VERS may be applied to the memory cell array 510 directly or via the bit line BL.

[0142] For example, during an erase operation, the voltage generator 550 may apply an erase voltage VERS to a common source line and / or a bit line BL of a memory block (e.g., a selected memory block), and may apply an erase permission voltage (e.g., a ground voltage) to all or a portion of the word lines of the memory block via the row decoder 520. In addition, during an erase verification operation, the voltage generator 550 may apply an erase verification voltage to all word lines of the memory block simultaneously, or sequentially to the word lines one by one.

[0143] For example, during a program operation, the voltage generator 550 may apply a program voltage to a selected word line and may apply a program exemption voltage to unselected word lines via the row decoder 520. In addition, during a program verification operation, the voltage generator 550 may apply a program verification voltage to a selected word line and may apply a verification exemption voltage to unselected word lines via the row decoder 520.

[0144] In addition, during a normal read operation, the voltage generator 550 may apply a read voltage to a selected word line via the row decoder 520, and may apply a read exemption voltage to unselected word lines. During a data recovery read operation, the voltage generator 550 may apply a read voltage to word lines adjacent to the selected word line via the row decoder 520, and may apply a recovery read voltage to the selected word line.

[0145] The page buffer circuit 530 may be connected to the memory cell array 510 via a plurality of bit lines BL. The page buffer circuit 530 may include a plurality of page buffers. In some example embodiments, each page buffer may be connected to one bit line. In other example embodiments, each page buffer may be connected to two or more bit lines.

[0146] The page buffer circuit 530 may store data DAT to be programmed into the memory cell array 510 or may read data DAT sensed from the memory cell array 510. In other words, the page buffer circuit 530 may operate as a write driver or a sense amplifier according to an operation mode of the nonvolatile memory 500.

[0147] The data I / O circuit 540 may be connected to the page buffer circuit 530 via the data line DL. Based on the column address C_ADDR, the data I / O circuit 540 may provide data DAT from outside the nonvolatile memory 500 to the memory cell array 510 via the page buffer circuit 330, or may provide data DAT from the memory cell array 510 to the outside of the nonvolatile memory 500.

[0148] Fig.19 is a block diagram illustrating an example of a storage device included in a storage system according to example embodiments.

[0149] Reference Fig.19 The storage device 700 includes a storage controller 710, a plurality of non-volatile memories (NVMs) 720a, 720b, and 720c, and a buffer memory 730. The storage device 700 may include a plurality of non-volatile memories, each of which is Fig.18 The nonvolatile memory 500 and may be included in Figure 2 In a non-volatile memory (NVM) device 300 .

[0150] The storage controller 710 may be based on the data received from an external device (e.g., Figure 2 The host device 200 in the storage device 700 receives commands, addresses and data to control the operation of the storage device 700, such as data write / read operations.

[0151] The plurality of nonvolatile memories 720a, 720b, and 720c may store a plurality of data. For example, the plurality of nonvolatile memories 720a, 720b, and 720c may store metadata, security data, user data, etc. Each of the plurality of nonvolatile memories 720a, 720b, and 720c may be Fig.18 The non-volatile memory 500 is provided.

[0152] The buffer memory 730 may store instructions and / or data executed and / or processed by the storage controller 710, and may temporarily store data stored in or to be stored in the plurality of non-volatile memories 720a, 720b, and 720c. For example, the buffer memory 730 may include at least one of various volatile memories (e.g., dynamic random access memory (DRAM), static random access memory (SRAM), etc.).

[0153] In some example embodiments, the storage device 700 may be at least one of an embedded multimedia card (eMMC) or a universal flash storage device (UFS). In other example embodiments, the storage device 700 may be any storage device, such as a solid state drive (SSD), a multimedia card (MMC), a secure digital (SD) card, a micro SD card, a memory stick, a chip card, a universal serial bus (USB) card, a smart card, a compact flash (CF) card, etc.

[0154] Fig. 20 is a block diagram illustrating an electronic system according to example embodiments.

[0155] refer to Fig. 20 , the electronic system 4000 includes at least one processor 4100, a communication module 4200, a display / touch module 4300, a storage device 4400, and a memory device 4500. For example, the electronic system 4000 may be any mobile system or any computing system.

[0156] The processor 4100 controls the operation of the electronic system 4000. The processor 4100 may execute an operating system and at least one application to provide an Internet browser, a game, a video, etc. The communication module 4200 is implemented to perform wireless or wired communication with an external device. The display / touch module 4300 is implemented to display data processed by the processor 4100 and / or receive data through a touch panel. The storage device 4400 may store user data. The memory device 4500 temporarily stores data for processing operations of the electronic system 4000.

[0157] The processor 4100 may correspond to a host device included in the storage system according to example embodiments. The first storage area included in the storage system according to example embodiments may be included in at least one of the storage device 4400 and the memory device 4500. The second storage area included in the storage system according to example embodiments may be included in at least one of the processor 4100, the storage device 4400, and the memory device 4500.

[0158] The inventive concept can be applied to various electronic devices and systems including storage systems. For example, the inventive concept can be applied to systems such as mobile phones, smart phones, tablet computers, laptop computers, personal digital assistants (PDAs), portable multimedia players (PMPs), digital cameras, portable game consoles, music players, video cameras, video players, navigation devices, wearable devices, Internet of Things (IoT) devices, Internet of Everything (IoE) devices, e-book readers, virtual reality (VR) devices, augmented reality (AR) devices, robotic devices, etc.

[0159] The foregoing is an illustration of the exemplary embodiments and should not be construed as limiting thereof. Although some exemplary embodiments have been described, it will be readily appreciated by those skilled in the art that various modifications may be made in the exemplary embodiments without substantially departing from the novel teachings and advantages of the exemplary embodiments. Therefore, all such modifications are intended to be included within the scope of the exemplary embodiments as defined in the claims. Therefore, it should be understood that the foregoing is an illustration of various exemplary embodiments and should not be construed as being limited to the specific exemplary embodiments disclosed, and modifications to the disclosed exemplary embodiments and other exemplary embodiments are intended to be included within the scope of the appended claims.

Claims

1. A method for operating a storage system, the method include: The host device writes the first security data and the first timestamp for preventing a replay attack into a first storage area as an external storage area; The host device updates a second timestamp based on the first timestamp, the second timestamp corresponding to the first timestamp and stored in a second storage area different from the first storage area; The host device receives a first notification signal indicating an update result; as well as When the host device determines that the second timestamp is successfully updated based on the first notification signal, the writing operation of the first security data is completed, Wherein, writing the first security data and the first timestamp into the first storage area comprises: The host device encrypts the first security data; The host device generates a first message authentication code for the encrypted first security data and the first timestamp; and The host device sends the encrypted first security data and the first message authentication code to the first storage area, and the encrypted first security data and the first message authentication code are stored in the first storage area.

2. The method according to claim 1, further comprising: include: When the storage system is powered on, the host device sets the first timestamp based on the second timestamp stored in the second storage area.

3. The method according to claim 2, in, Setting the first timestamp includes: The host device generates a timestamp setting command based on the first random number; the second storage area generating a setting response signal based on the time stamp setting command and a second random number; and The host device sets the first timestamp based on the setting response signal so that a value of the first timestamp is equal to a value of the second timestamp.

4. The method according to claim 3, in, Setting the first timestamp further includes: The host device and the second storage area generate a session key based on the first random number and the second random number.

5. The method according to claim 2, in, The writing operation of the first security data is performed only after the setting of the first timestamp is successfully completed.

6. The method according to claim 1, further comprising: include: The host device reads the encrypted first security data and the first message authentication code from the first storage area; as well as The host device checks whether a replay attack has occurred on the first security data based on the first timestamp.

7. The method according to claim 6, in, Checking whether a replay attack has occurred includes: When the first timestamp in the host device and the first timestamp in the first message authentication code have the same value, determining that a replay attack has not occurred; and When the first timestamp in the host device and the first timestamp in the first message authentication code have different values, it is determined that a replay attack has occurred.

8. The method according to claim 1, in, Updating the second timestamp includes: The host device generates a timestamp update command based on the first timestamp and a session key; and The second storage area updates the second timestamp based on the timestamp update command so that a value of the second timestamp is equal to a value of the first timestamp.

9. The method according to claim 1, further comprising: include: When the host device determines that the second time stamp is not successfully updated based on the first notification signal, it determines that the write operation of the first security data has failed.

10. The method according to claim 1, in, Whenever the first security data is written to the first storage area, the first time stamp is changed and updated in the second storage area.

11. The method according to claim 10, further comprising: include: The host device changes the first security data and the first timestamp; The host device rewrites the changed first security data and the changed first timestamp into the first storage area; The host device re-updates the second timestamp based on the changed first timestamp; The host device receives a second notification signal, where the second notification signal indicates a result of re-updating the second timestamp; as well as When the host device determines that the second time stamp is successfully re-updated based on the second notification signal, the rewriting operation of the changed first security data is completed.

12. The method according to claim 1, in: The first storage area is included in a nonvolatile memory device arranged outside the host device, and The second storage area is included in a secure nonvolatile memory device formed separately from the nonvolatile memory device.

13. The method according to claim 1, in, The first storage area and the second storage area are included in a nonvolatile memory device arranged outside the host device.

14. A storage system, include: a host device configured to process first security data and a first timestamp for preventing a replay attack; a non-volatile memory device, controlled by the host device, arranged outside the host device, and comprising a first storage area in which the first security data and the first timestamp are written; as well as a secure non-volatile memory device, controlled by the host device, formed separately from the non-volatile memory device, and comprising a second storage area in which a second time stamp corresponding to the first time stamp is written, The host device is configured to write the first security data and the first timestamp into the first storage area, and update the second timestamp based on the first timestamp, wherein the secure non-volatile memory device is configured to generate a first notification signal indicating an update result of the second timestamp, and The host device is configured to complete the write operation of the first security data when it is determined based on the first notification signal that the second timestamp is successfully updated, The host device is configured to write the first security data and the first timestamp into the first storage area by encrypting the first security data, generating a first message authentication code for the encrypted first security data and the first timestamp, and sending the encrypted first security data and the first message authentication code to the first storage area.

15. The storage system according to claim 14, further comprising: include: A secure element, integrated in the host device, The first security data and the first timestamp are processed by the security element.

16. The storage system according to claim 15, in, The secure element and the secure non-volatile memory device communicate with each other using a secure protocol.

17. The storage system according to claim 14, in, The host device and the secure nonvolatile memory device are formed in a single semiconductor package.

18. The storage system according to claim 14, in, The host device and the secure nonvolatile memory device are formed in separate semiconductor packages.

19. A storage system, include: a host device configured to process first security data and a first timestamp for preventing a replay attack; as well as a nonvolatile memory device, controlled by the host device, arranged outside the host device, comprising a first storage area in which the first security data and the first timestamp are written, and comprising a second storage area in which a second timestamp corresponding to the first timestamp is written, the second storage area being different from the first storage area, The host device is configured to write the first security data and the first timestamp into the first storage area, and update the second timestamp based on the first timestamp, wherein the nonvolatile memory device is configured to generate a first notification signal indicating an update result of the second timestamp, and The host device is configured to complete the write operation of the first security data when it is determined based on the first notification signal that the second timestamp is successfully updated, The host device is configured to write the first security data and the first timestamp into the first storage area by encrypting the first security data, generating a first message authentication code for the encrypted first security data and the first timestamp, and sending the encrypted first security data and the first message authentication code to the first storage area.

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