Display driver integrated circuit

Abstract

The present invention relates to a display driver integrated circuit. A system and method for a display driver integrated circuit are described, which are configured to authenticate whether a host processor and a display driver integrated circuit are genuine products. The display driver integrated circuit includes: an encryptor for generating first encrypted data by encrypting first data; a data converter for converting the first data into a first conversion signal represented by four or more voltage levels; an interface for providing the first conversion signal to the host processor and receiving a second conversion signal corresponding to second encrypted data generated by the host processor; and a determiner for controlling the display panel by comparing the first encrypted data and conversion data corresponding to the second encrypted data. The second conversion signal transmitted through the interface is represented by voltage levels.

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority of Korean Patent Application No. 10 - 2019 - 0057158, filed on May 15, 2019, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] The present disclosure generally relates to an electronic device having a display system, and more particularly, to a display driver integrated circuit and a display system having the display driver integrated circuit. Background Art

[0004] Display systems are included in many electronic devices such as computers, tablets, smartphones, and wearable electronic products. Consumers demand continuous improvement of these electronic devices. Improvements in display devices may include increased resolution, which can also result in more data being transmitted into or out of the electronic device. This may impose additional requirements on the components of the display or other components of the electronic device.

[0005] When new electronic devices are released, imitation products manufactured to lower specifications may follow. These imitation products may not be able to support the level of data used by the new devices, which may lead to hardware damage. Therefore, there is a need in the art to distinguish genuine display components from imitation products. Summary of the Invention

[0006] Embodiments provide a display driver integrated circuit configured to authenticate whether a host processor and the display driver integrated circuit are genuine products.

[0007] Embodiments also provide a display system having the display driver integrated circuit.

[0008] According to an aspect of the present disclosure, there is provided a display driver integrated circuit including: an encryptor configured to generate first encrypted data by encrypting first data; a data converter configured to convert the first data into a first conversion signal including four or more voltage levels; an interface configured to provide the first conversion signal to a host processor and receive a second conversion signal corresponding to second encrypted data generated by the host processor; and a determiner configured to control a display panel by comparing the first encrypted data and conversion data corresponding to the second encrypted data, wherein the second conversion signal received by the interface includes four or more voltage levels.

[0009] The first data is a unique chip identification (ID) of the display driver integrated circuit.

[0010] The data converter may include: a digital-to-analog converter configured to convert first data in digital format into a first conversion signal.

[0011] The data converter may include: a resistor string for dividing a first reference voltage and a second reference voltage into four or more voltage levels.

[0012] The first conversion signal may include a data security level independent of the chip ID.

[0013] The data security level may correspond to a voltage level selected from four or more voltage levels. The chip ID may correspond to a voltage level other than the selected voltage level.

[0014] The data converter may further include: a secure data generator configured to insert secure data in random format into the chip ID. The secure data may correspond to the data security level.

[0015] The interface may comply with the Mobile Industry Processor Interface (MIPI) Alliance specification for the Display Serial Interface and the MIPI Alliance specification for D-PHY. The display driver integrated circuit may further include: a secure channel configured to transmit the first conversion signal to the host processor and receive a second conversion signal from the host processor.

[0016] When the display driver integrated circuit is awakened, the first conversion signal and the second conversion signal may be transmitted through the secure channel.

[0017] The determiner may include: a valid data extractor configured to convert the second conversion signal into third encrypted data corresponding to a valid voltage other than the data security level independent of the first data; and a comparator configured to compare the first encrypted data and the third encrypted data and output a control signal for controlling at least one of the host processor and the display panel based on the comparison.

[0018] When the first encrypted data and the third encrypted data are equal to each other, the host processor and the display driver integrated circuit may operate normally.

[0019] When the first encrypted data and the third encrypted data are different from each other, the comparator may stop driving at least one of the host processor and the display driver integrated circuit.

[0020] The encryptor may use a public key encryption algorithm.

[0021] According to another aspect of the present disclosure, a display system is provided, including: a host processor configured to encrypt a chip ID, convert and output the encrypted chip ID including four or more voltage levels, and output a data command and input image data; and a display module controlled by the host processor, wherein the display module includes: a display panel including a plurality of pixels, the display panel displaying an image based on the input image data; and a display driver integrated circuit configured to provide the chip ID in a digital format to the host processor, generate first encrypted data obtained by encrypting the chip ID, and control the display module based on a comparison between the first encrypted data and the data received from the host processor.

[0022] The host processor may include: a first encryptor configured to generate second encrypted data by encrypting the chip ID; a data converter configured to convert the second encrypted data into a conversion signal including four or more voltage levels; and an interface configured to receive the chip ID from the display driver integrated circuit and transmit the conversion signal to the display driver integrated circuit.

[0023] The display driver integrated circuit may include: a second encryptor configured to generate first encrypted data by encrypting the chip ID; and a determiner configured to reconvert the conversion signal into the second encrypted data in a digital format, compare the second encrypted data with the first encrypted data, and control at least one of the host processor and the display driver integrated circuit based on the comparison result.

[0024] When the display driver integrated circuit is awakened, the chip ID and the conversion signal may be transmitted between the host processor and the display driver integrated circuit through a secure channel instead of through the channel for transmitting the input image data and the data command.

[0025] The display driver integrated circuit may include: a first encryptor configured to generate first encrypted data by encrypting the chip ID; a data converter configured to convert the chip ID into a first conversion signal in an analog format including four or more voltage levels; an interface configured to provide the first conversion signal to the host processor and receive a second conversion signal corresponding to the second encrypted data generated by the host processor; and a determiner configured to control the display panel by comparing the first encrypted data with the data converted from the second encrypted data.

[0026] The data converter may insert security data in a random format into the chip ID and convert the chip ID with the inserted security data into the first conversion signal in an analog format.

[0027] The host processor may include: a first data converter configured to convert a first conversion signal into converted data in digital format; a second encryptor configured to generate second encrypted data by encrypting the converted data; a second data converter configured to convert the second encrypted data into a second conversion signal including four or more voltage levels; and an interface configured to receive the first conversion signal from a display driver integrated circuit and transmit the second conversion signal to the display driver integrated circuit.

[0028] A method of component verification is described. The method may include: encrypting first data including a chip ID; converting the first data from digital format to analog format including four or more voltage levels; transmitting the converted first data to a host processor; in response to the converted first data, receiving second encrypted data from the host processor; comparing the encrypted first data with the encrypted second data; and controlling a display at least in part based on the comparison. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Example embodiments will now be described more fully hereinafter with reference to the accompanying drawings. However, the embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of example embodiments to those skilled in the art.

[0030] In the drawings, for clarity of illustration, dimensions may be exaggerated. It will be understood that when an element is referred to as being “between” two elements, the element may be the only element between the two elements, or there may also be one or more intervening elements. Throughout the text, like reference numerals refer to like elements.

[0031] Figure 1 is a block diagram of a display system embodying an embodiment of the present disclosure.

[0032] Figure 2 is a block diagram schematically illustrating an example of a display driver integrated circuit according to an embodiment of the present disclosure.

[0033] Figure 3 is an illustration Figure 2 of an example of a data converter included in the display driver integrated circuit shown in

[0034] Figure 4 is an illustration Figure 3 of an example of the operation of the data converter shown in

[0035] Figure 5 is an illustration Figure 2 of an example of a determiner included in the display driver integrated circuit shown in

[0036] Figure 6 A block diagram of an example that is part of a display system.

[0037] Figure 7 A block diagram of an example that is part of a display system.

[0038] Figure 8 A block diagram of a touch screen system in which a display system is applied according to an embodiment of the present disclosure. Detailed Description of the Invention

[0039] The present disclosure describes systems and methods for authenticating genuine products for electronic devices. By implementing the embodiments of the present disclosure, the production and dissemination of counterfeits and illegal reproductions can be prevented.

[0040] Hereinafter, exemplary embodiments will be described in more detail with reference to the accompanying drawings. Throughout the drawings, the same reference numerals are assigned to the same elements, and repeated descriptions of the same elements will be omitted.

[0041] Figure 1 A block diagram showing a display system according to an embodiment of the present disclosure.

[0042] Referring Figure 1 to FIG. 1, the display system 10 may include a display module 1000 and a host processor 2000.

[0043] The display system 10 may further include a non-volatile memory. In an embodiment, the display system 10 may further include an additional storage device, an input / output device, a power management device, a communication module, a sensor module, etc.

[0044] In an embodiment, the display system 10 may be implemented by a device capable of using or supporting a Mobile Industry Processor Interface (MIPI) (e.g., a mobile device such as a mobile phone, PDA, PMP, smartphone, or wearable device).

[0045] The host processor 2000 may control the overall operation of the display module 1000. For example, the host processor 2000 may be implemented using a System on Chip (SOC). The host processor 2000 may be an Application Processor (AP) provided in a mobile device.

[0046] The host processor 2000 can directly transmit data to the display module 1000 (i.e., the display driver integrated circuit (DDIC) 100 included in the display module 1000) through an interface. In an embodiment, the interface can correspond to MIPI and comply with the MIPI Alliance specifications for the display serial interface and the MIPI Alliance specifications for D-PHY. However, this is merely illustrative, and the communication interface between the host processor 2000 and the display driver integrated circuit 100 is not limited thereto. For example, the interface can be a serial high-speed interface for supporting high-quality images of n-high definition (nHD) or higher.

[0047] The host processor 2000 can output a data command CMD (also referred to as command CMD) and output input image data IDAT. In an embodiment, the host processor 2000 can provide the data command CMD to the display driver integrated circuit 100 to command the display driver integrated circuit 100 to perform a predetermined function through the interface. The display driver integrated circuit 100 can perform a corresponding function based on the command CMD.

[0048] The host processor 2000 can provide the input image data IDAT to the display driver integrated circuit 100 through the interface. The display driver integrated circuit 100 can convert the input image data IDATA into a data signal or data voltage suitable for image display. In addition, the display driver integrated circuit 100 can provide the data signal or data voltage to the display panel 200.

[0049] The host processor 2000 and the display driver integrated circuit 100 can be connected through genuine product authentication. When at least one of the host processor 2000 and the display driver integrated circuit 100 is not a genuine product, the display system 10 cannot operate properly. When at least one of the host processor 2000 and the display driver integrated circuit 100 is a counterfeit product, the non-genuine product can be determined.

[0050] In an embodiment, the host processor 2000 and the display driver integrated circuit 100 can transmit a security signal SS for genuine product authentication to each other. Therefore, the genuine product authentication of the host processor 2000 and the display driver integrated circuit 100 can be performed.

[0051] For example, the host processor 2000 can use a public key to encrypt the chip ID of the display driver integrated circuit 100. The genuine product authentication of the host processor 2000 can be performed based on the encrypted data. However, this is merely illustrative, and the genuine product authentication of the host processor 2000 can be performed through an encryption algorithm using a public key, a private key, etc.

[0052] The display module 1000 may include a display driver integrated circuit 100 and a display panel 200.

[0053] The display panel 200 may include a plurality of pixels and display an image.

[0054] The display driver integrated circuit 100 may be connected to the host processor 2000 through an interface, and may receive a command CMD and input image data IDAT. Additionally, the display driver integrated circuit 100 may determine whether the host processor 2000 and the display driver integrated circuit 100 are genuine products through the interface.

[0055] In an embodiment, encryption using a public key may be performed on the chip ID of the display driver integrated circuit 100. Additionally, the authentication of the genuine product of the display driver integrated circuit 100 may be performed by comparing the encrypted data with the encrypted data received from the host processor 2000. However, this is merely exemplary, and the authentication of the genuine product of the display driver integrated circuit 100 is not limited thereto.

[0056] The display driver integrated circuit 100 may further include a timing controller and a data driver. The timing controller may generate a data signal, a gate control signal, and a data control signal for image display by receiving the processed image data via the interface. The data driver may generate a data voltage based on the data signal and the data control signal.

[0057] In an embodiment, the display driver integrated circuit 100 may further include a scan driver configured to generate a scan signal based on a scan control signal. However, this is merely illustrative, and the scan driver may be directly provided in the display panel 200.

[0058] Figure 2 is a block diagram schematically illustrating an example of a display driver integrated circuit according to an embodiment of the present disclosure.

[0059] Reference Figure 1 and Figure 2 and, the display driver integrated circuit 100 may include an encryptor 120, a data converter 140, an interface (IF) 160, and a determiner 180.

[0060] The encryptor 120 may generate first encrypted data ECID1 by encrypting first data. The first data may be the unique chip identification (ID) UID of the display driver integrated circuit 100 (also referred to as the chip ID UID). For example, the display driver integrated circuit 100 stores the unique chip ID UID. The chip ID UID may be the unique ID for the authentication of the genuine product of the display driver integrated circuit 100.

[0061] The encryptor 120 may transmit the first encrypted data ECID1 to the determiner 180. When the display driver integrated circuit 100 is awakened, the encryptor 120 may encrypt the chip ID UID. The encryptor 120 may be implemented using software or hardware.

[0062] In an embodiment, the encryptor 120 may be implemented using an algorithm established between the manufacturer of the host processor 2000 and the manufacturer of the display driver integrated circuit 100. For example, the algorithm established between the manufacturer of the host processor 2000 and the manufacturer of the display driver integrated circuit 100 may be a public key encryption algorithm. Thus, the host processor 2000 and the display driver integrated circuit 100 may perform encryption by using the same public key.

[0063] The data converter 140 may convert the chip ID UID into a first conversion signal CIS1 including four or more voltage levels. The chip ID UID may be data in digital format. Additionally, the data converter 140 may be a digital-to-analog converter configured to convert the chip ID UID in digital format into the first conversion signal CIS1 in analog format.

[0064] In an embodiment, the data converter 140 may include a resistor string. The resistor string is configured to divide a first reference voltage and a second reference voltage into multiple voltage levels. For example, the data converter 140 may include a plurality of resistors connected in series.

[0065] The data converter 140 may provide the first conversion signal CIS1 including four or more voltage levels to the interface 160.

[0066] The data converter 140 may further include a security data generator. The security data generator is configured to generate security data independent of the chip ID UID and insert the security data in a random format into the chip ID UID. The security data may be junk data excluded from cryptanalysis for authenticating genuine products. The security data may be added to the chip ID UID to enhance the security of data communication via the interface 160.

[0067] The chip ID UID into which the security data is inserted may be converted into the first conversion signal CIS1 including four or more voltage levels. For example, the first conversion signal CIS1 may include a combination of a data security level (i.e., a data security voltage level) (also referred to as a security level) corresponding to the security data and other voltage levels corresponding to the chip ID UID. The combination of the other voltage levels may include a combination of eight voltage levels.

[0068] In an embodiment, interface 160 may be MIPI. The interface 160 of the display driver integrated circuit 100 may include a slave PHY (i.e., slave physical layer). For example, the PHY configuration of the interface 160 of the display driver integrated circuit 100 may include one clock lane module and at least one data lane module as PHY channel modules. Each of such PHY channel modules may communicate with a corresponding channel module in the host processor 2000 via channels Clkp, Clkn, D0p to D3p, and D0n to D3n. The display driver integrated circuit 100 may receive from the host processor 2000 via the interface 160 Figure 1 the input image data IDAT shown in Figure 1 and the command CMD shown in

[0069] In an embodiment, the PHY configuration of the interface 160 may further include channel modules for transmitting a first conversion signal CIS1 and a second conversion signal ECIS2 for genuine product authentication, and a first secure channel SS1 and a second secure channel SS2 for respectively transmitting the first conversion signal CIS1 and the second conversion signal ECIS2.

[0070] The interface 160 may provide the first conversion signal CIS1 to the host processor 2000 via the first secure channel SS1. Additionally, the interface 160 may include a second secure channel SS2 for receiving the second conversion signal ECIS2 from the host processor 2000, and the second conversion signal ECIS2 is obtained by converting second encrypted data generated by the host processor 2000.

[0071] In an embodiment, when the display driver integrated circuit 100 is awakened, the first conversion signal CIS1 and the second conversion signal ECIS2 may be transmitted via the secure channels SS1 and SS2 respectively. Thus, the genuine product authentication may be performed during the wake-up period.

[0072] The display driver integrated circuit 100 may receive the input image data IDAT ( Figure 1 shown in Figure 1 ), the command CMD (

[0073] Accordingly, each of the signals CIS1 and ECIS2 transmitted through the first secure channel SS1 and the second secure channel SS2 may include four or more voltage levels.

[0074] In the case of conventional genuine product authentication, data transfer for genuine product authentication between the host processor 2000 and the display driver integrated circuit 100 is performed through the existing channels Clkp, Clkn, D0p to D3p, and D0n to D3n. Additionally, since two voltage levels are used to digitally transfer data for genuine product authentication, conventional genuine product authentication lacks security. Accordingly, leakage of the chip ID UID and cracking / interpretation of the genuine product authentication may be easily performed.

[0075] According to an embodiment of the present disclosure, the display driver integrated circuit 100 and the display system 10 having the same secure channels SS1 and SS2 for genuine product authentication are respectively formed, and secure data is converted into conversion signals CIS1 and ECIS2. The conversion signals CIS1 and ECIS2 include four or more voltage levels including data security levels. Additionally, the conversion signals CIS1 and ECIS2 are respectively transmitted through the secure channels SS1 and SS2. Accordingly, the security of the genuine product authentication of the electronic device and the chip ID UID can be enhanced. Additionally, production and spread of counterfeits and illegal copies can be prevented.

[0076] In an embodiment, at least some of the encryptor 120, the data converter 140, and the determiner 180 may be included in the PHY configuration of the interface 160.

[0077] The determiner 180 may control Figure 1 the display panel 200 and the host processor 2000 shown in FIG. The determiner 180 may convert the second conversion signal ECIS2 into third encrypted data and compare the third encrypted data with the first encrypted data ECID1. The second conversion signal ECIS2 may be a signal into which the host processor 2000 converts the second encrypted data to include a plurality of voltage levels. The third encrypted data may be a value obtained by re-converting the second conversion signal ECIS2 into a digital format data.

[0078] The determiner 180 may control the host processor 2000 and the display driver integrated circuit 100 based on the result obtained by comparing the third encrypted data with the first encrypted data ECID1.

[0079] In an embodiment, the third encrypted data may be data obtained by converting, into a digital format, a combination of valid voltages of a second conversion signal ECIS2 except for a data security level unrelated to the chip ID UID. Accordingly, the first encrypted data ECID1 and the third encrypted data may be compared with each other.

[0080] In an embodiment, the determiner 180 may output control signals CLT1 and CLT2 such that when the first encrypted data ECID1 and the third encrypted data are equal, the host processor 2000 and the display driver integrated circuit 100 operate normally. For example, when the first encrypted data ECID1 and the third encrypted data are equal, the genuine product authentication may end, and the display system 10 may operate normally.

[0081] When the first encrypted data ECID1 and the third encrypted data are different from each other, the genuine product authentication fails. For example, when the first encrypted data ECID1 and the third encrypted data are different from each other, at least one of the host processor 2000 and the display driver integrated circuit 100 is a counterfeit.

[0082] In an embodiment, when the first encrypted data ECID1 and the third encrypted data are different from each other, the determiner 180 may output a first control signal CLT1 for stopping driving the display driver integrated circuit 100 or stopping driving except for a specific operation. For example, through the first control signal CLT1, a black image may be displayed on the display panel 200. Through the first control signal CLT1, a counterfeit warning message may also be displayed on the display panel 200.

[0083] In an embodiment, when the first encrypted data ECID1 and the third encrypted data are different from each other, the determiner 180 may output a second control signal CLT2 for stopping driving the host processor 2000 or stopping driving except for a specific operation. For example, through the second control signal CLT2, a black image may be displayed on the display panel 200. Through the second control signal CLT2, a counterfeit warning message may also be displayed on the display panel 200. Alternatively, through the second control signal CLT2, access to a call function, an Internet connection function, a camera function, etc. may be restricted.

[0084] Accordingly, the encryptor 120 may encrypt the first data (including the chip ID UID) to generate first encrypted data ECID1. The data converter 140 may convert the first data from a digital format to an analog format including four or more voltage levels (thereby generating a first conversion signal CIS1). The interface 160 may transmit the first conversion signal CIS1 to the host processor 2000. The interface 160 may receive a second conversion signal ECIS2 from the host processor 2000 in response to the first conversion signal CIS1. Then, the determiner 180 may compare the first encrypted data ECID1 and the second conversion signal ECIS2 and control the display panel 200 at least partially based on the comparison.

[0085] Figure 3 is a diagram Figure 2 illustrating an example of a data converter included in the display driver integrated circuit shown in Figure 4 is a diagram Figure 3 illustrating an example of the operation of the data converter shown in

[0086] Referring Figures 2 to 4 , the data converter 140 may include a secure data generator 142 and a digital-to-analog converter 144.

[0087] The data converter 140 may convert the chip ID UID to a first conversion signal CIS1 including four or more voltage levels.

[0088] The secure data generator 142 may generate secure data and insert the secure data in a random format into the chip ID UID. The second data CID obtained by inserting the secure data into the chip ID UID may be supplied to the digital-to-analog converter 144. The secure data is junk data excluded from the encryption interpretation for authenticating genuine products, and the second data CID may be implemented in a digital format.

[0089] The digital-to-analog converter 144 may convert the second data CID to an analog format of the first conversion signal CIS1. In an embodiment, the digital-to-analog converter 144 may include a resistor string for dividing a first reference voltage RV1 and a second reference voltage RV2 into a plurality of voltage levels. For example, as Figure 3 shown, the first reference voltage RV1 and the second reference voltage RV2 may be divided into eight effective voltage levels V0 to V7 and a secure level DSV. The digital-to-analog converter 144 may express the second data CID in nine voltage levels by using the resistor string.

[0090] Although in Figure 3The case where the safety level DSV is the lowest valid voltage level is illustrated in the figure, but the potential of the safety level DSV is not limited to this. For example, the safety level DSV can be replaced by one of the first valid voltage level V0 to the eighth valid voltage level V7. The lowest valid voltage level can be changed to one value among the first valid voltage level V0 to the eighth valid voltage level V7. In addition, the number of the valid voltage levels V0 to V7 and the safety level DSV is not limited to this. For example, the digital-to-analog converter 144 can convert the second data CID into an output of 17 voltage levels.

[0091] In an embodiment, the first conversion signal CIS1 corresponding to the second data CID can be output as shown in Figure 4 the figure. The valid voltage levels V0 to V7 corresponding to the digits of the chip ID UID can be determined. In addition, the safety level DSV between the outputs of the valid voltages can be output during a random time period.

[0092] For example, corresponding to 7 included in the chip ID UID, the eighth valid voltage level V7 can be output during the first time t1. In addition, corresponding to 6 included in the chip ID UID, the seventh valid voltage level V6 can be output during the second time t2. For example, the length of the first time t1 and the length of the second time t2 can be the same. When the chip ID UID is represented by a hexadecimal number, corresponding to E included in the chip ID UID, the seventh valid voltage level V6 can be output during the third time t3. For example, the third time t3 can be longer than the first time t1.

[0093] However, this is merely illustrative. The valid voltages can be determined by a rule set for authentic product authentication. The valid voltages can correspond to the values included in the chip ID UID and the output times of the valid voltages respectively.

[0094] The first conversion signal CIS1 converted by the data converter 140 can be provided to the host processor 2000 through the interface 160. For example, the data of the security data (junk data) and the chip ID UID can be supplied to the host processor 2000 as an output combination of nine voltage levels. Therefore, the security of the chip ID UID and the security of the authentic product authentication can be greatly enhanced.

[0095] Figure 5 is the block diagram showing an example of the determiner included in the display driver integrated circuit shown in Figure 2 the figure.

[0096] Referring to Figure 2 , Figure 3 and Figure 5 , the determiner 180 can include a valid data extractor 182 and a comparator 184.

[0097] The valid data extractor 182 can receive a second conversion signal ECIS2 from the interface 160.

[0098] The second conversion signal ECIS2 can be a signal into which the second encrypted data generated by the host processor 2000 is converted into an analog format for the purpose of transmission between interfaces. For example, the host processor 2000 can convert the second encrypted data into the second conversion signal ECIS2 by using a configuration similar to the configuration of the data converter 140 shown in Figure 3 . Encryption of the first conversion signal CIS1 can be applied to the second encrypted data. For example, the second encrypted data can be generated based on a unified public key as a public key algorithm.

[0099] The valid data extractor 182 can convert the second conversion signal ECIS2 into third encrypted data ECID3 corresponding to a valid voltage other than the Figure 3 security level DSV shown in. In an embodiment, the valid data extractor 182 can include an analog-to-digital converter configured to convert the second conversion signal ECIS2 into data in a digital format.

[0100] In an embodiment, the valid data extractor 182 can remove security data corresponding to the security level DSV from the data converted into a digital format. The third encrypted data ECID3 from which the security data is removed can be provided to the comparator 184. For example, the third encrypted data ECID3 can correspond to data obtained by encrypting the chip ID UID by using a public key algorithm.

[0101] The comparator 184 can receive the first encrypted data ECID1 from the encryptor 120 and receive the third encrypted data ECID3 from the valid data extractor 182. The comparator 184 can compare the first encrypted data ECID1 and the third encrypted data ECID3.

[0102] In an embodiment, both the first encrypted data ECID1 and the third encrypted data ECID3 are encrypted data obtained by applying the same public key encryption algorithm to the chip ID UID. Therefore, when the first encrypted data ECID1 and the third encrypted data ECID3 are equal, the authentication of the genuine product can end, enabling the display system 10 to operate normally.

[0103] When the first encrypted data ECID1 and the third encrypted data ECID3 are different from each other, at least one of the host processor 2000 and the display driver integrated circuit 100 is a counterfeit. In an embodiment, when the first encrypted data ECID1 and the third encrypted data ECID3 are different from each other, the comparator 184 may output a first control signal CLT1, and the first control signal CLT1 is used to stop driving the display driver integrated circuit 100 or stop driving except for specific operations. Alternatively, in an embodiment, the comparator 184 may output a second control signal CLT2, and the second control signal CLT2 is used to stop driving all or part of the host processor 2000.

[0104] Therefore, when at least one of the host processor 2000 and the display driver integrated circuit 100 is a counterfeit, the display system 10 can be controlled to operate abnormally.

[0105] Figure 6 It is a block diagram showing an example of a part of the display system.

[0106] In Figure 6 the components identical to those described with reference to Figure 2 are marked with the same reference numerals, and the repeated description of the components will be omitted.

[0107] Referring to Figure 1 、 Figure 2 and Figure 6 the display system 11 may include a host processor 2000 and a display driver integrated circuit 101.

[0108] In an embodiment, the display driver integrated circuit 101 may include an encryptor 120, an interface 160, and a determiner 180. The display driver integrated circuit 101 may provide the chip ID UID in digital format to the host processor 2000 through the first secure channel SS1.

[0109] Figure 6 The display driver integrated circuit 101 shown in Figure 2 has a configuration and operation that are partially different from those of the display driver integrated circuit 100 shown in

[0110] The host processor 2000 may include an interface 2020, an encryptor 2040, and a data converter 2060. The host processor 2000 may encrypt the chip ID UID and convert the encrypted chip ID UID into a second conversion signal ECIS2 including four or more voltage levels. Then, the host processor 2000 may transmit the second conversion signal ECIS2 to the display driver integrated circuit 101.

[0111] The interface 2020 may be MIPI. The interface 2020 may communicate with the interface 160 of the display driver integrated circuit 101.

[0112] The encryptor 2040 may generally perform the same operations as the encryptor 120 of the display driver integrated circuit 101. In an embodiment, the encryptor 2040 may be implemented using an algorithm established between the manufacturer of the host processor 2000 and the manufacturer of the display driver integrated circuit 101. For example, the encryptor 2040 may generate second encrypted data ECID2 by applying a public key encryption algorithm to the chip ID UID.

[0113] The encryptor 2040 may provide the second encrypted data ECID2 to the data converter 2060.

[0114] The data converter 2060 may convert the second encrypted data ECID2 into a second conversion signal ECIS2 including four or more voltage levels. For example, the second encrypted data ECID2 may be converted into a second conversion signal ECIS2 including eight voltage levels.

[0115] In an embodiment, the operations and configuration of the data converter 2060 may be substantially the same as Figure 2 and Figure 3 the operations and configuration of the data converter 140 shown therein. The second conversion signal ECIS2 may be provided to the display driver integrated circuit 101 through the interface 2020.

[0116] As described above, the second conversion signal ECIS2 converted into an analog format is transmitted through a separate second secure channel SS2 to perform genuine product authentication. The genuine product authentication occurs between the host processor 2000 and the display driver integrated circuit 101, thereby strengthening the genuine product authentication of the electronic device and the security of the chip ID UID.

[0117] In addition, Figure 6 the display system 11 shown in Figure 2 has a simpler structure than the display system 10 shown in

[0118] Figure 7A block diagram of an example that is part of a graphic display system.

[0119] In Figure 7 , components that are the same as those described with reference to Figure 2 and Figure 6 are denoted by the same reference numerals, and repeated description of the components will be omitted.

[0120] Reference Figure 1 , Figure 2 , Figure 6 and Figure 7 show that the display system 12 may include a host processor 2001 and a display driver integrated circuit 100.

[0121] The display driver integrated circuit 100 may include an encryptor 120, a data converter 140, an interface 160, and a determiner 180. The display driver integrated circuit 100 may be substantially the same as the display driver integrated circuit 100 shown in Figure 2 . The display driver integrated circuit 100 may provide a first conversion signal CIS1 in analog format to the host processor 2001 through a first secure channel SS1.

[0122] The host processor 2001 may include an interface 2020, a first data converter 2030, an encryptor 2040, and a second data converter 2050.

[0123] The first data converter 2030 may convert the first conversion signal CIS1 into conversion data DCID in digital format. For example, the first data converter 2030 may include an analog-to-digital converter that converts the first conversion signal CIS1 into conversion data DCID in digital format.

[0124] The encryptor 2040 may encrypt the conversion data DCID. For example, the encryptor 2040 may generate second encrypted data ECID2 by applying a public key encryption algorithm to the conversion data DCID.

[0125] The second data converter 2050 may convert the second encrypted data ECID2 into a second conversion signal ECIS2 in analog format. The second data converter 2050 may include a digital-to-analog converter and be substantially the same as the data converter 140 shown in Figure 2 and Figure 3 .

[0126] The second conversion signal ECIS2 may be provided to the display driver integrated circuit 100 through the interface 2020.

[0127] As described above, the first conversion signal CIS1 and the second conversion signal ECIS2 can be transmitted in an analog format having four or more voltage levels through the first secure channel SS1 and the second secure channel SS2, thereby strengthening the authentication of genuine products of the electronic device and the security of the chip ID UID.

[0128] Figure 8 FIG. is a block diagram of a touch screen system in which a display system is applied according to an embodiment of the present disclosure.

[0129] In Figure 8 , components identical to those described with reference to Figure 1 are denoted by the same reference numerals, and a repeated description of such components will be omitted.

[0130] Referring to Figure 8 , the display system 20 may include an application processor (AP) 2100, an image processor 2120, a display module 1100, and a flash memory 3000. The display module 1100 may include a display driver integrated circuit (DDI) 100, a display panel 200, a touch screen controller (TSC) 300, and a touch screen 400.

[0131] The AP 2100 may receive data or commands from a user and control the display driver integrated circuit 100 and the touch screen controller 300 based on the input data or commands. The AP 2100 may be implemented using a graphics card, a system on chip (SOC), etc.

[0132] The AP 2100 may be included in the host processor 2000 shown in Figure 1 , and provide the image data of the display panel 200 to the display driver integrated circuit 100.

[0133] The image processor 2120 may process the image data. The image processor 2120 may generate image data to be provided to the display driver integrated circuit 100 based on the touch signal provided from the touch screen controller 300. The image processor 2120 may also perform image processing on the image data. In an embodiment, the image processor 2120 may be provided in the AP 2100.

[0134] The flash memory 3000 may store data for image compensation. The flash memory 3000 may provide the data for image compensation to the display driver integrated circuit 100.

[0135] The display driver integrated circuit 100 may drive the display panel 200 under the control of the AP 2100.

[0136] The display panel 200 may display the image signal received from the display driver integrated circuit 100.

[0137] The touch screen controller 300 may be connected to the touch screen 400 to receive sensing data from the touch screen 400 and transmit the sensing data to the AP 2100.

[0138] The touch screen 400 may overlap with the display panel 200. In an embodiment, the touch screen 400 may be integrally implemented with the display panel 200.

[0139] In an embodiment, the display driver integrated circuit 100 and the touch screen controller 300 may share a plurality of functional blocks and may be implemented using a single semiconductor chip.

[0140] In the display driver integrated circuit and the display system having the same according to the present disclosure, a secure channel for authenticating genuine products is separately formed from a channel for transmitting image data or commands. Secure data is converted into a conversion signal each including four or more voltage levels, the four or more voltage levels including a data security level, and the conversion signal is transmitted through the secure channel. Accordingly, the authentication of genuine products of an electronic device and the security of a chip ID may be enhanced, and the production and spread of counterfeits and illegal copies may be prevented.

[0141] Example embodiments have been disclosed herein, and although specific terms have been employed, the embodiments have been used and interpreted in a general and descriptive sense only and not for purposes of limitation. The embodiments are not used for a limiting purpose. In some instances, as of the filing of the present application, it will be apparent to those of ordinary skill in the art that, unless otherwise specifically stated, features, characteristics, and / or elements described in connection with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments. Accordingly, those skilled in the art will understand that various changes may be made in form and detail without departing from the spirit and scope of the present disclosure as set forth in the appended claims.

Claims

1. A display driver integrated circuit, comprising: an encryptor configured to generate first encrypted data by encrypting first data; a data converter configured to convert the first data into a first conversion signal including four or more voltage levels, the first conversion signal including a combination of a data security level corresponding to security data and other voltage levels corresponding to data included in a chip identifier; an interface configured to provide the first conversion signal to a host processor and receive a second conversion signal corresponding to second encrypted data generated by the host processor; and a determiner configured to control a display panel by comparing the first encrypted data with conversion data corresponding to the second encrypted data, wherein the second conversion signal received by the interface includes the four or more voltage levels, wherein the first data is a unique chip identifier of the display driver integrated circuit, and wherein the second encrypted data corresponds to data obtained by encrypting the first conversion signal.

2. The display driver integrated circuit according to claim 1, wherein the data converter includes: a digital-to-analog converter configured to convert the first data in digital format into the first conversion signal.

3. The display driver integrated circuit according to claim 1, wherein the data converter includes: a resistor string configured to divide a first reference voltage and a second reference voltage into the four or more voltage levels.

4. The display driver integrated circuit according to claim 1, wherein the data security level is independent of the chip identifier.

5. The display driver integrated circuit according to claim 4, wherein the data security level corresponds to a voltage level selected from the four or more voltage levels, wherein the chip identifier corresponds to voltage levels other than the selected voltage level.

6. The display driver integrated circuit according to claim 4, wherein the data converter further includes: a security data generator configured to insert the security data in random format into the chip identifier.

7. The display driver integrated circuit according to claim 1, wherein the interface complies with the Mobile Industry Processor Interface Alliance specification for the Display Serial Interface and the Mobile Industry Processor Interface Alliance specification for D-PHY, and wherein the display driver integrated circuit further includes: a secure channel configured to transmit the first conversion signal to the host processor and receive the second conversion signal from the host processor, and wherein when the display driver integrated circuit is awakened, the first conversion signal and the second conversion signal are transmitted through the secure channel.

8. The display driver integrated circuit according to claim 1, wherein the determiner includes: a valid data extractor configured to convert the second conversion signal into third encrypted data, the third encrypted data corresponding to valid voltages other than a data security level unrelated to the first data; and A comparator configured to compare the first encrypted data and the third encrypted data and output a control signal based on the comparison for controlling at least one of the host processor and the display panel.

9. The display driver integrated circuit according to claim 8, wherein when the first encrypted data and the third encrypted data are equal to each other, the host processor and the display driver integrated circuit operate normally.

10. The display driver integrated circuit according to claim 9, wherein when the first encrypted data and the third encrypted data are different from each other, the comparator stops driving at least one of the host processor and the display driver integrated circuit.

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