Pattern Acquisition in Equivalent Time Sampling Systems

Abstract

The present disclosure relates to systems and methods related to test and measurement systems, and more particularly to pattern acquisition of a measured signal in an equivalent time sampling test and measurement system. An equivalent time sampling test and measurement instrument is used to acquire a measured signal of a repetitive pattern at or near the maximum sampling speed of the test and measurement instrument. The test and measurement instrument includes: a first input terminal configured to receive repetitive pattern information about the measured signal; a second input terminal configured to receive the measured signal; one or more processors configured to determine an optimized trigger holdoff period set based on a minimum trigger holdoff period of the test and measurement instrument; and an acquisition unit configured to acquire a portion of the measured signal in each optimized trigger holdoff period.

Description

[0001] priority

[0002] This disclosure claims the benefit of U.S. Provisional Application No. 62 / 857,729, filed on June 5, 2019, entitled “PATTERN ACQUISITION IN ANEQUIVALENT TIME SAMPLING SYSTEM,” which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to systems and methods related to test and measurement systems, and more particularly to pattern acquisition of measured signals in equivalent time sampling test and measurement systems. Background Art

[0004] Traditional equivalent time sampling oscilloscopes offer a variety of methods for testing repetitive patterns from users that require digital signal processing (DSP). To get the best jitter performance and reconstruct coherent time domain waveforms, traditional equivalent time sampling oscilloscopes acquire these types of waveforms in a pattern synchronized clock trigger mode. Long pattern lengths and slow pre-scaled clocks can reduce the equivalent time sampling rate of an equivalent time sampling oscilloscope.

[0005] Embodiments of the present disclosure address these and other deficiencies of the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Aspects, features and advantages of embodiments of the present disclosure will become apparent from the following description of embodiments with reference to the accompanying drawings, in which:

[0007] Figure 1 is a block diagram of an example test and measurement instrument according to an embodiment of the present disclosure;

[0008] Figure 2 is a flow chart for performing a full mode acquisition of a signal under test according to some embodiments of the present disclosure;

[0009] Figure 3 is a flow chart for performing partial mode acquisition of a signal under test according to some embodiments of the present disclosure;

[0010] Figure 4 is a graph illustrating acquisition time for a conventional oscilloscope, a full mode acquisition according to some embodiments of the present disclosure, and a partial mode acquisition according to some embodiments of the present disclosure;

[0011] Figure 5 The present invention is a flowchart for determining whether to perform full mode acquisition or partial mode acquisition of a measured signal according to other embodiments of the present disclosure. DETAILED DESCRIPTION

[0012] Disclosed herein is an equivalent time sampling test and measurement instrument that can acquire signals in a pattern-synchronous mode while maintaining the maximum sampling rate of the test and measurement instrument, regardless of the length or symbol rate of the pattern to be acquired. This can provide the fastest possible waveform throughput, thereby shortening the time to begin further processing or offline processing of the acquired data, which ultimately reduces the overall test time for the user, for whom test throughput is a key metric.

[0013] Conventional equivalent time sampling oscilloscopes can digitize incoming analog signals by strobing a high speed sampling diode with a sequence of strobe pulses or trigger signals. Typically, these sampler strobe pulse events are synchronized to the user's pattern via a user-supplied pattern synchronization clock. With conventional equivalent time sampling oscilloscopes, if the user-supplied pattern synchronization clock is greater than the bandwidth of the trigger circuit in the oscilloscope time base, it must be divided down to reduce it, so the trigger clock of the test and measurement instrument is typically much slower than the pattern symbol rate. A counter in the test and measurement instrument counts down the number of symbols in the repeating pattern, issuing a single strobe pulse event with each repetition. However, the combination of long pattern lengths and slow pre-scaled clocks reduces the equivalent time sampling rate of these test and measurement instruments.

[0014] The user pattern is often a pseudo-random binary sequence (PRBS). For example, the user pattern can be a PRBS16 at 26 GHz or 26 Gbaud with 65535 symbols. To acquire this signal under test, traditional test and measurement instruments must use a sub-rate clock to trigger because their trigger circuit bandwidth is much lower than 26 GHz. The test and measurement instrument can have a minimum trigger holdoff of 3.3 microseconds, which means that a trigger signal can be generated at most every 3.3 microseconds at the maximum sampling rate. The total time before 65535 cycles of the sub-rate trigger clock occur will be 40.3 microseconds, which increases the minimum holdoff time of the test and measurement instrument by eight times, or reduces the sampling rate by one-eighth. During this 40.3 microsecond period, the pattern will repeat many times. In the case of some test and measurement instruments, for example, when using a time base triggered by a divide-by-16 clock, the pattern can be repeated 16 times between strobe pulse events. In order to acquire samples at the maximum sampling rate of the test and measurement instrument, a method of generating more than a single strobe event in this 40.3 microsecond period is needed, as will be discussed in more detail below.

[0015] Other methods of increasing the sampling rate for a pattern have been proposed, such as multiple strobe pulses per pattern (MSPP). While these methods greatly improve the achievable sampling rate of a test and measurement instrument in a pattern-synchronized mode by choosing a constant number of strobe pulses to issue in each sub-rate pattern repetition, they still fall short of the maximum sampling rate. MSPP ensures uniform sampling of the pattern while also avoiding any "overlap" of individual sample instances by choosing the number of strobe pulse events per pattern repetition to be coprime with the ratio by which the pattern clock is divided for sampling the test and measurement instrument time base. Because of the reliance on this coprime ratio, the time between strobe pulse events can often be longer than the minimum system holdoff time, resulting in a slower than maximum sampling rate.

[0016] Figure 1 1 is a block diagram of an example equivalent time sampling test and measurement instrument 100 (such as an oscilloscope) for implementing the disclosed embodiments disclosed herein. The test and measurement instrument 100 may include a plurality of ports 102, which may be any electrical signal medium. The ports 102 may include receivers, transmitters, and / or transceivers. Each port 102 is a channel of the test and measurement instrument 100.

[0017] The port 102 may also be connected to a measurement unit 106 in the test and measurement instrument 100. Such a measurement unit 106 may include any component capable of measuring various aspects (e.g., voltage, amperage, amplitude, etc.) of a signal received via the port 102. The test and measurement instrument 100 may include additional hardware and / or processors, such as conditioning circuits, analog-to-digital converters, and / or other circuits to convert the received signal into a waveform for further analysis. The resulting waveform may then be stored in the memory 110 and displayed on the display 112.

[0018] The test and measurement instrument 100 may also include a trigger unit 108 and one or more processors 116 for processing signals and / or waveforms received from one or more devices under test at the port 102. Although only the trigger unit 108 and one or more processors 116 are shown for ease of illustration, Figure 11 , but as will be appreciated by those skilled in the art, multiple processors 116 of different types may be used in combination rather than using a single processor 116. One or more processors 116 and / or trigger unit 108 may generate a trigger signal that causes measurement unit 106 to obtain a measurement value of the signal under test at one or more ports 102. Each time a trigger signal is generated, measurement unit 106 may obtain a measurement value of a portion of the signal under test. However, test and measurement instrument 100 includes a minimum time period for resetting various circuits and other hardware in test and measurement instrument 100 before the next trigger signal. This minimum time period is referred to as minimum trigger holdoff.

[0019] The one or more processors 116 may be configured to execute instructions from the memory 110 and may perform any methods and / or associated steps indicated by such instructions, such as acquiring a repetitive pattern using optimized pattern acquisition or optimized single strobe partial pattern acquisition, as discussed in more detail below. The memory 110 may be implemented as a processor cache, a random access memory (RAM), a read-only memory (ROM), a solid-state memory, a hard disk drive (s), or any other memory type. The memory 110 acts as a medium for storing data, computer program products, and other instructions.

[0020] The user input 114 is coupled to one or more processors 116. The user input 114 may include a keyboard, a mouse, a trackball, a touch screen, and / or any other controls that may be employed by a user to interact with a graphical user interface (GUI) on the display 112. The display 112 may be a digital screen, a cathode ray tube-based display, or any other monitor for displaying waveforms, measurements, and other data to a user. Although the components of the test and measurement instrument 100 are depicted as being integrated within the test and measurement instrument 100, it should be appreciated by one of ordinary skill in the art that any of these components may be external to the test and measurement instrument 100 and may be coupled to the test and measurement instrument 100 in any conventional manner (e.g., wired and / or wireless communication media and / or mechanisms). For example, in some embodiments, the display 112 may be remote from the test and measurement instrument 100.

[0021] Embodiments of the present disclosure may receive a signal under test and acquire a repetitive pattern of the signal under test in a non-sequential manner using a maximum sampling rate (i.e., a minimum sampling period) of the test and measurement instrument 100 or close to the maximum sampling rate (i.e., a minimum sampling period) of the test and measurement instrument 100. As explained in more detail below, this is accomplished by setting the trigger holdoff value to a minimum trigger holdoff value or close to the minimum trigger holdoff value, so that samples can be acquired at or close to the maximum sampling rate of the test and measurement instrument 100. To do this, initially, the one or more processors 116 must obtain information about the incoming repetitive pattern, including:

[0022] (1) Pattern length ( L 模式 );

[0023] (2) Symbol rate ( R );

[0024] (3) Waveform record length in samples ( L 记录 );

[0025] (4) Waveform duration in seconds ( T );and

[0026] (5) Mode clock (a sub-rate of the symbol rate) ( Pc ).

[0027] This information may be obtained in a variety of ways. In some embodiments, the information may be obtained via user input 114. In other embodiments, the information may be obtained via some other electrical communication link, such as from a connected user device via wired or wireless means. One or more processors 116 and / or memory 110 may receive and / or store this information for use in obtaining the measured signal. The test and measurement instrument 100 also has a known minimum trigger holdoff value H , which is the minimum amount of time required between each trigger signal.

[0028] Using this information, the waveform duration in seconds can be calculated by T Divide by the waveform record length in samples to determine the time between samples t s In order to maintain the maximum sampling rate of the test and measurement instrument 100, an optimized pattern acquisition (OPA) trigger holdoff value may be selected. H opt , which is the time between samples t s The smallest integer multiple of N , so that:

[0029] (1).

[0030] Integer multiple N Indicates the number of sample indices that may occur between subsequent strobe events. Sets the index of individual samples in the waveform i , so that .

[0031] When using H opt When samples are collected, the collected samples will have the following indices associated with them according to the modulo operation:

[0032] (2).

[0033] If the integer multiple N and L 记录 If the waveform is sampled uniformly, the sequence in equation (2) will begin to repeat before the pattern is evenly sampled if the two samples share a greatest common divisor greater than 1. If not corrected for, this repetition will cause the waveform to be sampled inaccurately. To address this problem, the one or more processors 116 account for this problem by anticipating which index will see repeated samples before the recording is completed and bumping that index when necessary to maintain only one sample per index per recording - i.e., increasing or changing the index.

[0034] To determine the number and location of these collisions in the index set that may be necessary, one or more processors 116 may determine N and L 记录 However, in order to save the number of calculations that need to be performed by one or more processors 116, the fact is that i = 0 By checking only against the first index, it is not necessary for one or more processors 116 to pre-calculate the index position of the necessary collision, and the check can be performed in real time during operation. i = 0 Collision i = 1 After that, the next index that might need to be bumped would be i = 1 The one or more processors 116 continue this operation until L 记录 The index has been sorted and the acquisition of records will be completed at this point. Offline processing of the acquired data or further online processing can then be completed.

[0035] Figure 2A flow chart for performing full pattern acquisition of a signal under test according to an embodiment of the present disclosure is illustrated. Initially, in operation 200, as discussed above, information about the signal under test, including pattern length, symbol rate, etc., is received.

[0036] In operation 202, an OPA trigger holdoff value is determined, as discussed in detail above. That is, the OPA trigger holdoff value is set equal to the time between samples t s Multiply by the minimum trigger holdoff value H The OPA trigger holdoff value is equal to or greater than the minimum integer multiple of the test and measurement instrument 100.

[0037] In operation 204, when the OPA trigger holdoff value has been determined, acquisition of the measured signal can be started from a trigger signal generated by one or more processors 116. In operation 206, in response to the trigger signal, a portion of the measured signal is acquired. Then, in operation 208, it is determined whether the pattern acquisition is complete. If so, in operation 210, the one or more processors 116 can output that the acquisition is complete. If not, in operation 212, the one or more processors can determine whether a collision index is needed to prevent re-acquisition of a portion of the waveform that has already been acquired. If the index needs to be bumped, then in operation 214, the collision index.

[0038] If the index does not need to be bumped and / or the index has been bumped, then in operation 216, the one or more processors 116 may determine whether the OPA trigger holdoff time period has occurred. If not, the one or more processors 116 continue to wait until the OPA trigger holdoff time period has passed. If the time period has passed, the process returns to operation 204 and a new trigger signal is generated.

[0039] However, sometimes it is not necessary to acquire the complete pattern of the signal under test. Some embodiments of the present disclosure include optimized single strobe (OSS) partial pattern acquisition. OSS partial pattern acquisition provides the best sampling rate for single strobe partial pattern acquisition in a pattern synchronized mode. During OSS partial pattern acquisition (which may be referred to herein as OSS), the time used to acquire data is linearly proportional to the number of samples to be acquired. For situations where the user is interested in acquiring only a portion of the complete pattern, this can provide the fastest waveform throughput possible, which shortens the time used to acquire the data of interest and can reduce the overall test time.

[0040] Conventional test and measurement instruments may include single strobe acquisitions, however, these acquisitions differ fundamentally from the embodiments of the present disclosure that include OSS in that pattern synchronization of conventional test and measurement instruments is achieved by counting sub-rates of the user's symbol clock by the timing hardware in the conventional test and measurement instrument.

[0041] Conventional test and measurement instrument hardware implements a counter that uses the number of symbols in a repeating pattern as its end point. This limits sampling to occur only once per pattern period times the prescaler factor.

[0042] In contrast, embodiments of the present disclosure use a trigger holdoff period to program the next sampling point, which trigger holdoff period is equal to the minimum integer multiple of the pattern period that is greater than the minimum trigger holdoff period. As an example, consider a 26GHz PRBS16 signal with a pattern length of 65535 symbols and a minimum holdoff of 3.3 microseconds in a test and measurement instrument, as discussed above. On a conventional test and measurement instrument, the prescaler factor needs to be 16 to slow the clock down to below the bandwidth of the trigger circuit in the oscilloscope time base. The sample-to-sample interval between each acquisition is then 65535 * (1 / 26GHz) * 16 = 40 microseconds. Using embodiments of the present disclosure, as will be discussed in more detail below, the minimum integer multiple of the pattern period (65535 * (1 / 26GHz) = 2.52 microseconds) that is greater than the minimum holdoff of 3.3 microseconds is 2. Therefore, the sample-to-sample interval is 65535 * (1 / 26 GHz) * 2 = 5.04 μS. In this case, the disclosed embodiment is 8 times faster than conventional test and measurement instruments.

[0043] As described in this article, OSS allows the user the ability to significantly reduce various measurement times by increasing the acquisition update rate, since not all measurements require a full pattern acquisition.

[0044] OSS can use the following information about repetition patterns, level settings, and hardware limitations to perform:

[0045] (1) Pattern length in symbols ( L 模式 );

[0046] (2) Symbol rate in Hertz ( f 符号 );

[0047] (3) The number of samples for each mode in samples ( L 每模式样本数 );

[0048] (4) Record length in samples ( L 记录 );and

[0049] (5) Minimum trigger holdoff ( H ).

[0050] As mentioned above, the minimum trigger holdoff H is the known minimum sampling period that the test and measurement instrument 100 can support.

[0051] One or more processors 116 may calculate the OSS trigger holdoff H OSS , such as based on the minimum trigger holdoff H Further discussion.

[0052] Figure 3 FIG. 4 illustrates a flow chart for performing OSS partial mode acquisition of a signal under test according to some embodiments of the present disclosure. Figure 2 As mentioned above, operation 200 in operation 300 may be preceded by an operation (not shown) in which information about a repetitive pattern in the measured signal is received. In operation 300, one or more processors 116 determine the record length L 记录 Is it equal to the number of samples in each mode? L 每模式样本数 If yes, then in operation 302, as discussed above and as Figure 2 OPA is performed as shown in , because the acquisition is a full mode acquisition. L 每模式样本数 is the integer product of the pattern length and the number of samples per symbol. The record length is the number of samples collected per pattern.

[0053] If the record length L 记录 Not equal to the number of samples per mode L 每模式样本数 , then execute OSS. In operation 304, determine OSS trigger release H OSS This can be done by setting the pattern period = L 模式 *(1 / f 符号 ) and let sample interval = number of samples per symbol * (1 / f 符号 ) to complete.

[0054] Then, one or more processors 116 trigger the OSS to deactivate H OSS Set to greater than or equal to the minimum trigger holdoff HThe minimum integer multiple of the pattern period. H is less than or equal to the pattern period, the OSS holdoff is set to the sum of the sample interval plus the pattern period. However, if the minimum holdoff H If it is greater than the mode period, the following equation (3) is used to set the OSS trigger holdoff:

[0055] H OSS = Sample interval + ceil(H / pattern period) * pattern period (3).

[0056] Then, in operation 306, each H OSS The period fires a strobe pulse or trigger. This is positioned relative to the previous sample in the pattern, which is always the previous sample interval. One or more processors 116 are identified as n 选通脉冲 When the acquisition of the record is completed, in operation 308, the one or more processors 116 temporarily change the trigger release to return to the origin of the mode. That is, if n 选通脉冲 Greater than or equal to L 记录 ,but:

[0057] H OSS = Sample interval * ( L 每模式样本数 －L 记录 ) (3).

[0058] The holdoff value is then restored on the next strobe pulse cycle. This allows the pattern to be reset so that another partial pattern acquisition can be acquired at the next origin of the pattern.

[0059] Figure 4 The diagram shows a method for using a conventional oscilloscope 400, as described above with respect to Figure 2 The complete mode acquisition OPA402 discussed above Figure 3 A graph of acquisition time for a repetitive pattern of the discussed partial mode acquisition OSS 404. As can be seen in the graph, both the full mode acquisition OPA 402 and the partial mode acquisition OPA 404 are faster than a conventional oscilloscope 400.

[0060] For the example of a 26 GHz PRBS16 pattern used throughout this disclosure, when the size of the acquisition is less than 65% of the full pattern acquisition, the performance of the partial pattern acquisition OSS 404 exceeds the performance of the full pattern acquisition OPA 402. The performance crossover point 406 depends on the record length, pattern length, and symbol period as follows:

[0061] .

[0062] This can be used by one or more processors 116 to Figure 3 An alternative to operation 300 is to determine whether to continue with full mode acquisition OPA or partial mode acquisition OSS.

[0063] For example, Figure 3 Operation 300 in can be used Figure 5 Initially, in operation 500, it is determined whether the pattern period defined above is greater than the minimum holdoff period.

[0064] If yes, then in operation 502, Tnew is set equal to the mode period. Otherwise, in operation 504, Tnew is set equal to the mode period * ceil ( H min / mode cycle).

[0065] Once Tnew is set in operation 502 or operation 504, the record length is determined in operation 506. L 记录 Is it less than the minimum holdoff divided by Tnew and then further multiplied by the value of the number of samples per mode as mentioned above.

[0066] If the record length is less than this value, OSS is performed in operation 508, i.e. Figure 3 However, if the record length is greater than this value, then OPA is performed in operation 510, i.e. Figure 2 Operations 202-216 of FIG. 1 may be omitted because it would be a faster method for acquiring the signal under test.

[0067] Aspects of the present disclosure may operate on specially created hardware, firmware, digital signal processors, or on specially programmed computers including processors that operate according to programming instructions. The term controller or processor as used herein is intended to include microprocessors, microcomputers, application specific integrated circuits (ASICs), and dedicated hardware controllers. One or more aspects of the present disclosure may be embodied in computer usable data and computer executable instructions, such as embodied in one or more program modules executed by one or more computers (including monitoring modules) or other devices. Typically, program modules include routines, programs, objects, components, data structures, etc., which perform specific tasks or implement specific abstract data types when executed by a processor in a computer or other device. Computer executable instructions may be stored on a computer readable storage medium, such as a hard disk, an optical disk, a removable storage medium, a solid-state memory, a random access memory (RAM), etc. As will be appreciated by those skilled in the art, the functions of the program modules may be combined or distributed in various aspects as desired. In addition, the functions may be embodied in firmware or hardware equivalents, such as integrated circuits, FPGAs, etc., in whole or in part. Certain data structures may be used to more efficiently implement one or more aspects of the present disclosure, and such data structures are contemplated within the scope of the computer-executable instructions and computer-usable data described herein.

[0068] In some cases, the disclosed aspects may be implemented in hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried by or stored on one or more computer-readable storage media, which may be read and executed by one or more processors. Such instructions may be referred to as computer program products. As discussed herein, computer-readable media means any medium that may be accessed by a computing device. As an example and not limitation, computer-readable media may include computer storage media and communication media.

[0069] Computer storage media means any medium that can be used to store computer-readable information. By way of example and not limitation, computer storage media may include RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital video disk (DVD) or other optical disk storage, cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, and any other volatile or non-volatile, removable or non-removable media implemented in any technology. Computer storage media excludes the signal itself and the temporary form of signal transmission.

[0070] Communication media means any medium that can be used for communication of computer-readable information. By way of example and not limitation, communication media may include coaxial cables, fiber optic cables, air, or any other medium suitable for communication of electrical, optical, radio frequency (RF), infrared, acoustic, or other types of signals.

[0071] Example

[0072] Illustrative examples of the technology disclosed herein are provided below. Embodiments of the technology may include any one or more of the examples described below and any combination thereof.

[0073] Example 1 is an equivalent time sampling test and measurement instrument, which includes: a first input terminal configured to receive information about a signal under test including a repetitive pattern; a second input terminal configured to receive the signal under test; a processor configured to determine an optimized trigger holdoff period based on a minimum trigger holdoff period of the test and measurement instrument; and an acquisition unit configured to acquire a portion of the signal under test in each optimized trigger holdoff period.

[0074] Example 2 is the equivalent time sampling test and measurement instrument of Example 1, wherein the processor is further configured to determine whether to perform a full mode acquisition of the signal under test or a partial mode acquisition of the signal under test.

[0075] Example 3 is an equivalent time sampling test and measurement instrument of any of Examples 1 and 2, wherein the processor is further configured to determine an optimized trigger holdoff period by multiplying the time between samples by an integer value, wherein the integer value is the smallest integer value that causes the optimized trigger holdoff period to be greater than or equal to the minimum trigger holdoff period.

[0076] Example 4 is an equivalent time sampling test and measurement instrument of any one of Examples 1-3, wherein the processor is further configured to: determine a pattern period based on the symbol rate and the pattern length; determine a sample interval based on the number of samples per symbol and the symbol rate; and determine an optimized trigger release period based on the pattern period and the sample interval.

[0077] Example 5 is the equivalent time sampling test and measurement instrument of Example 4, wherein when the minimum trigger holdoff period is less than or equal to the mode period, the processor is further configured to determine an optimized trigger holdoff period by adding the sample interval and the mode period.

[0078] Example 6 is the equivalent time sampling test and measurement instrument of any one of Example 4 or Example 5, wherein when the minimum trigger holdoff period is greater than the mode period, the processor is further configured to determine the optimized trigger holdoff period by the following equation: optimized trigger holdoff period = sample interval + ceil ( H min / mode period)*(mode period).

[0079] Example 7 is an equivalent time sampling test and measurement instrument of any of Examples 1-6, wherein the processor is further configured to determine an index of multiple samples of the measured signal to be collected, and to collide the index of the collection when the sample corresponding to the index has been collected.

[0080] Example 8 is a method for acquiring a measured signal including a repetitive pattern, comprising: receiving information about the measured signal; generating an optimized trigger holdoff period based on a minimum trigger holdoff period of a test and measurement instrument; and acquiring a waveform representing at least a portion of the measured signal by sampling a portion of the measured signal during each optimized trigger holdoff period.

[0081] Example 9 is the method of Example 8, further comprising determining whether to perform a full mode acquisition of the signal under test or a partial mode acquisition of the signal under test.

[0082] Example 10 is the method of any of Example 8 or Example 9, further comprising generating an optimized trigger holdoff period by multiplying the time between samples by an integer value, wherein the integer value is a minimum integer value that causes the optimized trigger holdoff period to be greater than or equal to the minimum trigger holdoff period.

[0083] Example 11 is the method of any one of Examples 8-10, further comprising: determining a pattern period based on a symbol rate and a pattern length; determining a sample interval based on a number of samples per symbol and the symbol rate; and generating an optimized trigger holdoff period based on the pattern period and the sample interval.

[0084] Example 12 is the method of Example 11, wherein when the minimum trigger holdoff period is less than or equal to the mode period, the method further includes generating an optimized trigger holdoff period by adding the sample interval and the mode period.

[0085] Example 13 is the method of any one of Example 11 or Example 12, wherein when the minimum trigger holdoff period is greater than the mode period, the method further comprises generating an optimized trigger holdoff period by the following equation:

[0086] Optimized trigger holdoff period = sample interval + ceil ( H min / mode period)*(mode period).

[0087] Example 14 is the method of any of Examples 8-13, further comprising determining an index of a plurality of samples of the signal under test to be acquired, and bumping the acquisition index when a sample corresponding to the index has already been acquired.

[0088] Example 15 is one or more non-transitory computer-readable storage media, which include instructions that, when executed by one or more processors of a test and measurement instrument, cause the test and measurement instrument to: receive information about repetitive patterns in a signal under test, and acquisition information including the number of samples and record length for each pattern to be acquired; determine whether to acquire a full pattern acquisition or a partial pattern acquisition based on the number of samples and record length for each pattern to be acquired; generate an optimized trigger holdoff period based on a minimum trigger holdoff period of the test and measurement instrument and whether the acquisition is a full pattern acquisition or a partial pattern acquisition; and acquire the signal under test by acquiring a portion of the signal under test in each optimized trigger holdoff period.

[0089] Example 16 is one or more non-transitory computer-readable storage media of Example 15, wherein the instructions further cause the test and measurement instrument to generate an optimized trigger holdoff period by multiplying the time between samples by an integer value, wherein the integer value is the minimum integer value that causes the optimized trigger holdoff period to be greater than or equal to the minimum trigger holdoff period.

[0090] Example 17 is one or more non-transitory computer-readable storage media of any one of Example 15 or Example 16, wherein the instructions further cause a test and measurement instrument to: determine a pattern period based on a symbol rate and a pattern length; determine a sample interval based on a number of samples per symbol and a symbol rate; and generate an optimized trigger holdoff period based on the pattern period and the sample interval.

[0091] Example 18 is one or more non-transitory computer-readable storage media of Example 17, wherein when the minimum trigger holdoff period is less than or equal to the mode period, the instructions further cause the test and measurement instrument to generate an optimized trigger holdoff period by adding the sample interval and the mode period.

[0092] Example 19 is one or more non-transitory computer-readable storage media of any of Example 17 or Example 18, wherein when the minimum holdoff trigger period is greater than the mode period, the instructions further cause the test and measurement instrument to generate an optimized holdoff trigger period by the following equation:

[0093] Optimized trigger holdoff period = sample interval + ceil ( H min / mode period)*(mode period).

[0094] Example 20 is one or more non-transitory computer-readable storage media of any of Examples 15-19, wherein the instructions further cause the test and measurement instrument to determine an index of multiple samples of the measured signal to be acquired, and an index to collide with acquisition when a sample corresponding to the index has already been acquired.

[0095] The previously described versions of the disclosed subject matter have many advantages that have been described or are apparent to those of ordinary skill. Even so, not all versions of the disclosed apparatus, system, or method require these advantages or features.

[0096] Additionally, this written description mentions specific features. It should be understood that the disclosure in this specification includes all possible combinations of those specific features. When a specific feature is disclosed in the context of a particular aspect or example, the feature may also be used in the context of other aspects and examples to the extent possible.

[0097] Furthermore, when the present application refers to a method having two or more defined steps or operations, the defined steps or operations may be performed in any order or simultaneously, unless the context excludes those possibilities.

[0098] Although specific examples of the present invention have been illustrated and described for purposes of illustration, it will be appreciated that various modifications may be made without departing from the spirit and scope of the present invention. Accordingly, the present invention should not be limited except as by the appended claims.

Claims

1. An equivalent time sampling test and measurement instrument comprising: a first input configured to receive information about a signal under test comprising a repetitive pattern; A second input terminal is configured to receive the measured signal; The processor is configured as: determining a pattern period based on a symbol rate and a pattern length; determining a sample interval based on a number of samples per symbol and a symbol rate; Determine an optimized trigger holdoff period based on a pattern period and a sample interval; and generating the optimized trigger holdoff period relative to a minimum trigger holdoff period of the test and measurement instrument; and The acquisition unit is configured to acquire a portion of the measured signal in each optimized trigger holdoff period.

2. The equivalent time sampling test and measurement instrument of claim 1, wherein the processor is further configured to determine whether to perform a full mode acquisition of the signal under test or a partial mode acquisition of the signal under test.

3. The equivalent time sampling test and measurement instrument of claim 1 , wherein the processor is further configured to determine an optimized trigger holdoff period by multiplying the time between samples by an integer value, the integer value being a minimum integer value that results in the optimized trigger holdoff period being greater than or equal to a minimum trigger holdoff period.

4. The equivalent time sampling test and measurement instrument of claim 1 , wherein when a minimum holdoff period is less than or equal to a mode period, the processor is further configured to determine an optimized holdoff period by adding the sample interval and the mode period.

5. The equivalent time sampling test and measurement instrument of claim 1 , wherein when the minimum trigger holdoff period is greater than the mode period, the processor is further configured to determine the optimized trigger holdoff period by the following equation: Optimized trigger holdoff period = sample interval + ceil (H min / mode period)*(mode period), where H min is the minimum trigger holdoff period.

6. The equivalent time sampling test and measurement instrument of claim 1, wherein the processor is further configured to determine an index of a plurality of samples of the signal under test to be acquired, and to bump the acquisition index when a sample corresponding to the index has already been acquired.

7. A method for acquiring a measured signal including a repetitive pattern, comprising: receiving information about the measured signal; determining a pattern period based on a symbol rate and a pattern length; determining a sample interval based on a number of samples per symbol and a symbol rate; generating an optimized trigger holdoff period based on the pattern period and the sample interval; generating the optimized trigger holdoff period relative to a minimum trigger holdoff period of the test and measurement instrument; and A waveform representing at least a portion of the measured signal is acquired by sampling a portion of the measured signal in each optimized trigger holdoff period.

8. The method of claim 7, further comprising determining whether to perform a full pattern acquisition of the signal under test or to perform a partial pattern acquisition of the signal under test.

9. The method of claim 7, further comprising generating an optimized trigger holdoff period by multiplying the time between samples by an integer value, the integer value being a minimum integer value that causes the optimized trigger holdoff period to be greater than or equal to a minimum trigger holdoff period.

10. The method of claim 7, wherein when the minimum holdoff period is less than or equal to the mode period, the method further comprises generating an optimized holdoff period by adding the sample interval and the mode period.

11. The method according to claim 7, wherein when the minimum holdoff period is greater than the mode period, the method further comprises generating an optimized holdoff period by the following equation: Optimized trigger holdoff period = sample interval + ceil (H min / mode period)*(mode period), where H min is the minimum trigger holdoff period.

12. The method of claim 7, further comprising determining an index of a plurality of samples of the signal under test to be acquired, and bumping the acquired index when a sample corresponding to the index has already been acquired.

13. One or more non-transitory computer-readable storage media comprising instructions that, when executed by one or more processors of a test and measurement instrument, cause the test and measurement instrument to: receiving information about repetitive patterns in a measured signal and acquisition information including a number of samples to be acquired for each pattern and a record length; Determining whether to acquire a full mode acquisition or a partial mode acquisition based on the number of samples and record length for each mode to be acquired; Generates an optimized holdoff period based on the minimum holdoff period of the test and measurement instrument and whether the acquisition is a full or partial mode acquisition; and The measured signal is acquired by acquiring a portion of the measured signal during each optimized trigger holdoff period.

14. One or more non-transitory computer-readable storage media according to claim 13, wherein the instructions further cause the test and measurement instrument to generate an optimized trigger release period by multiplying the time between samples by an integer value, wherein the integer value is the minimum integer value that causes the optimized trigger release period to be greater than or equal to the minimum trigger release period.

15. The one or more non-transitory computer-readable storage media of claim 13, wherein the instructions further cause the test and measurement instrument to: determining a pattern period based on a symbol rate and a pattern length; determining a sample interval based on the number of samples per symbol and the symbol rate; and An optimized trigger holdoff period is generated based on the pattern period and the sample interval.

16. The one or more non-transitory computer-readable storage media of claim 15, wherein when a minimum holdoff period is less than or equal to a mode period, the instructions further cause the test and measurement instrument to generate an optimized holdoff period by adding the sample interval and the mode period.

17. The one or more non-transitory computer-readable storage media of claim 15, wherein when the minimum holdoff period is greater than the mode period, the instructions further cause the test and measurement instrument to generate an optimized holdoff period by the following equation: Optimized trigger holdoff period = sample interval + ceil (H min / mode period)*(mode period), where H min is the minimum trigger holdoff period.

18. The one or more non-transitory computer-readable storage media of claim 13, wherein the instructions further cause the test and measurement instrument to determine indices of a plurality of samples of the signal under test to be acquired, and to bump the acquisition index when a sample corresponding to the index has already been acquired.

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