A loop fast response circuit suitable for low voltage BUCK and its implementation method

Abstract

The present invention provides a loop fast response circuit and implementation method suitable for low-voltage BUCK, which is mainly used in the field of related protection circuits. The circuit detects the output voltage of VOUT and automatically adjusts the main loop parameters of the circuit through the adjustment loop, so that the circuit can achieve the effect of detection-feedback-adjustment in a very short time. The overall circuit design of the present invention is simple, and the output stability can be well transmitted to the main loop of the circuit for rapid adjustment. The number of bits of the A / D converter output can be increased according to actual needs, so that the adjustment of the EA module gain can be graded, and the gain size that needs to be increased can be selected in real time according to the actual output waveform.

Description

Technical Field

[0001] The invention relates to the technical field of circuits, and in particular to a loop fast response circuit. Background Art

[0002] At present, with the rapid development of power electronics technology and the continuous miniaturization of electronic products, the requirements for the reliability, efficiency and quality of power supplies are getting higher and higher. As a kind of power chip, the BUCK chip has the characteristics of high conversion efficiency, low cost and good dynamic performance, making it an indispensable chip in the power module. However, as the application range of the load increases, the BUCK chip cannot adjust in time when the load changes, resulting in instability or voltage and current overshoot, which may cause the output end to burn out. Therefore, people hope to design a BUCK chip that can respond quickly and has a good recovery function, which can well cope with the effect of quickly stabilizing the circuit when the load changes. Summary of the invention

[0003] In order to overcome the shortcomings of the prior art, the present invention provides a loop fast response circuit suitable for a low-voltage BUCK and an implementation method, which is mainly used in the field of related protection circuits. The circuit detects the output voltage of VOUT and automatically adjusts the main loop parameters of the circuit through an adjustment loop, so that the circuit achieves the effect of detection-feedback-adjustment in a very short time.

[0004] The technical solution adopted by the present invention to solve its technical problem is:

[0005] A loop fast response circuit suitable for a low voltage BUCK comprises a P-channel enhancement type MOS tube PM0, an N-channel enhancement type MOS tube NM0, an inductor L, resistors R0-R2, a capacitor C0, a drive circuit module, a PWM regulation circuit module, an EA module, an A / D converter module, a VIN input port, a VREF input port and a VOUT output port.

[0006] The source of the P-channel enhancement MOS transistor PM0 is connected to the VIN input port, the gate is connected to the output 1 port of the driving circuit module, and the drain is connected to the drain of the N-channel enhancement MOS transistor NM0, one end of the resistor R2 and one end of the inductor L; the source of the N-channel enhancement MOS transistor NM0 is grounded, the gate is connected to the output 2 port of the driving circuit module, and the drain is connected to the drain of the P-channel enhancement MOS transistor PM0, one end of the resistor R2 and one end of the inductor L; the other end of the inductor L is connected to one end of the resistor R0 and the VOUT output port; the other end of the resistor R0 is connected to one end of the resistor R1 and the 3 input ports; the other end of the resistor R1 is grounded; the other end of the resistor R2 is connected to the upper plate of the capacitor C0 and the input port of the A / D converter module; the lower plate of the capacitor C0 is grounded; the output end of the A / D converter module is connected to the 2 input ports of the EA module; the 1 input port of the EA module is connected to the VREF input port, the 2 input port is connected to the output port of the A / D converter, the 3 input port is connected to the other end of the resistor R0 and one end of the resistor R1, and the output port of the EA module is connected to the input end of the PWM regulation circuit module; the output port of the PWM regulation circuit module is connected to the input end of the drive circuit module.

[0007] A method for implementing a loop fast response circuit suitable for low voltage BUCK is:

[0008] When the response circuit is working, the response circuit compares the feedback voltage of the intermediate node VFB of the voltage-dividing resistors R0 and R1 connected to the VOUT output terminal with the VREF reference voltage through the EA module, and then transmits the result to the PWM regulation circuit module for PWM waveform adjustment, and then controls the gates of the upper and lower power tubes P-channel enhancement MOS tube PM0 and N-channel enhancement MOS tube NM0 through the driving circuit module, so that a SW switch waveform is generated at the drain of the P-channel enhancement MOS tube PM0, so that the response circuit forms a main loop; by adding a filter composed of a resistor R2 and a capacitor C0 at the SW end, the SW waveform is filtered and transmitted to the A / D converter module. When the system is disturbed and the output voltage drops, the SW waveform analog signal is converted into a corresponding digital signal through the A / D converter. The digital signal enters the EA module and turns on the corresponding control circuit with increased control bandwidth. In this way, the response circuit increases the duty cycle, and the output voltage also increases rapidly to offset the disturbance. The same is true when the output voltage rises due to the disturbance.

[0009] The beneficial effects of the present invention are:

[0010] 1. The overall circuit design is simple and suitable for low-voltage CMOS process. The circuit detects the SW waveform more simply and quickly, and can well transmit the output stability to the main loop of the circuit for rapid adjustment.

[0011] 2. The number of bits of the A / D converter output can be increased according to actual needs, so that the adjustment of the EA module gain can be graded, and the gain size to be increased can be selected in real time according to the actual output waveform. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 The figure is a schematic diagram of a loop fast response circuit suitable for a low voltage BUCK. DETAILED DESCRIPTION

[0013] The present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0014] A loop fast response circuit suitable for low voltage BUCK, such as Figure 1 As shown, it includes a P-channel enhancement MOS tube PM0, an N-channel enhancement MOS tube NM0, an inductor L, resistors R0-R2, a capacitor C0, a drive circuit module, a PWM regulation circuit module, an EA module, an A / D converter module, and a VIN input port, a VREF input port and a VOUT output port.

[0015] The source of the P-channel enhancement MOS transistor PM0 is connected to the VIN input port, the gate is connected to the output 1 port of the driving circuit module, the drain is connected to the drain of the N-channel enhancement MOS transistor NM0, one end of the resistor R2, and one end of the inductor L; the source of the N-channel enhancement MOS transistor NM0 is grounded, the gate is connected to the output 2 port of the driving circuit module, the drain is connected to the drain of the P-channel enhancement MOS transistor PM0, one end of the resistor R2, and one end of the inductor L; one end of the inductor L is connected to the P-channel enhancement MOS transistor PM0, the N-channel enhancement MOS transistor NM0 and one end of the resistor R2, and the other end is connected to one end of the resistor R0 and the VOUT output port; one end of the resistor R0 is connected to the other end of the inductor L and the VOUT output port, and the other end is connected to one end of the resistor R1 and the 3 input port of the EA module; one end of the resistor R1 is connected to the other end of the resistor R0 and the 3 input port of the EA module, and the other end is grounded; one end of the resistor R2 is connected to the P-channel enhancement MOS transistor PM0, the N-channel enhancement MOS transistor NM0 and one end of the resistor R2; The enhancement MOS tube NM0 and one end of the inductor L, and the other end are connected to the upper plate of the capacitor C0 and the input port of the A / D converter module; the upper plate of the capacitor C0 is connected to the other end of the resistor R2 and the input port of the A / D converter module, and the lower plate is grounded; the input port of the A / D converter module is connected to the other end of the resistor R2 and the upper plate of the capacitor C0, and the output end is connected to the 2 input port of the EA module; the EA module 1 input port is connected to the VREF input port, the 2 input port is connected to the output port of the A / D converter, the 3 input port is connected to the other end of the resistor R0 and one end of the resistor R1, and the output port is connected to the input end of the PWM regulation circuit module; the PWM regulation circuit module input port is connected to the EA module output port, and the output port is connected to the driving circuit module input end; the driving circuit module input port is connected to the output port of the PWM regulation circuit, the output port 1 is connected to the gate of the P-channel enhancement MOS tube PM0, and the output port 2 is connected to the gate of the N-channel enhancement MOS tube NM0.

[0016] Combination Figure 1, a method for implementing a loop fast response circuit suitable for low-voltage BUCK is as follows: when the circuit is working, the circuit compares the VFB feedback voltage of the intermediate node of the voltage-dividing resistors R0 and R1 connected to the VOUT output terminal with the VREF reference voltage through the EA module, and then transmits the result to the PWM regulation circuit module for PWM waveform adjustment, and then controls the gates of the upper and lower power tubes P-channel enhancement MOS tube PM0 and N-channel enhancement MOS tube NM0 through the driving circuit module, so that a SW switch waveform is generated at the drain of the P-channel enhancement MOS tube PM0, so that the circuit forms a main loop. In this paper, a filter composed of a resistor R2 and a capacitor C0 is added to the SW end, and the SW waveform is filtered and transmitted to the A / D converter module. When the system is disturbed and the output voltage drops, the SW waveform analog signal is converted into a corresponding digital signal through the A / D converter. The digital signal enters the EA module and turns on the corresponding control circuit with increased control bandwidth. In this way, the circuit increases the duty cycle, and the output voltage will also increase rapidly to offset the disturbance. The same applies when the output voltage rises due to disturbance.

[0017] In summary, the technology of the present invention proposes a method for fast loop response of low-voltage BUCK, which can effectively adjust the circuit loop. Compared with the previous BUCK loop adjustment method, this method has a simple overall circuit design, a fast response speed, the added SW detection circuit does not occupy too much area, and the internal power consumption of the circuit is very small, which can achieve fast circuit stability adjustment.

Claims

1. A loop fast response circuit suitable for low voltage BUCK, characterized by: The loop fast response circuit suitable for low-voltage BUCK includes a P-channel enhancement MOS tube PM0, an N-channel enhancement MOS tube NM0, an inductor L, resistors R0-R2, a capacitor C0, a drive circuit module, a PWM regulation circuit module, an EA module, an A / D converter module, a VIN input port, a VREF input port and a VOUT output port; The source of the P-channel enhancement MOS transistor PM0 is connected to the VIN input port, the gate is connected to the output 1 port of the driving circuit module, and the drain is connected to the drain of the N-channel enhancement MOS transistor NM0, one end of the resistor R2 and one end of the inductor L; the source of the N-channel enhancement MOS transistor NM0 is grounded, the gate is connected to the output 2 port of the driving circuit module, and the drain is connected to the drain of the P-channel enhancement MOS transistor PM0, one end of the resistor R2 and one end of the inductor L; the other end of the inductor L is connected to one end of the resistor R0 and the VOUT output port; the other end of the resistor R0 is connected to one end of the resistor R1 and the 3 input ports; the other end of the resistor R1 is grounded; the other end of the resistor R2 is connected to the upper plate of the capacitor C0 and the input port of the A / D converter module; the lower plate of the capacitor C0 is grounded; the output end of the A / D converter module is connected to the 2 input ports of the EA module; the EA module 1 input port is connected to the VREF input port, the 2 input port is connected to the output port of the A / D converter, the 3 input port is connected to the other end of the resistor R0 and one end of the resistor R1, and the output port of the EA module is connected to the input end of the PWM regulation circuit module; the output port of the PWM regulation circuit module is connected to the input end of the drive circuit module; When the response circuit is working, the response circuit compares the feedback voltage of the intermediate node VFB of the voltage-dividing resistors R0 and R1 connected to the VOUT output terminal with the VREF reference voltage through the EA module, and then transmits the result to the PWM regulation circuit module for PWM waveform adjustment, and then controls the gates of the upper and lower power tubes P-channel enhancement MOS tube PM0 and N-channel enhancement MOS tube NM0 through the driving circuit module, so that a SW switch waveform is generated at the drain of the P-channel enhancement MOS tube PM0, so that the response circuit forms a main loop; by adding a filter composed of a resistor R2 and a capacitor C0 at the SW end, the SW waveform is filtered and transmitted to the A / D converter module. When the system is disturbed and the output voltage drops, the SW waveform analog signal is converted into a corresponding digital signal through the A / D converter. The digital signal enters the EA module and turns on the corresponding control circuit with increased control bandwidth. In this way, the response circuit increases the duty cycle, and the output voltage also increases rapidly to offset the disturbance. The same is true when the output voltage rises due to the disturbance.

2. A method for implementing the loop fast response circuit suitable for low voltage BUCK according to claim 1, characterized in that The steps include: When the response circuit is working, the response circuit compares the feedback voltage of the intermediate node VFB of the voltage-dividing resistors R0 and R1 connected to the VOUT output terminal with the VREF reference voltage through the EA module, and then transmits the result to the PWM regulation circuit module for PWM waveform adjustment, and then controls the gates of the upper and lower power tubes P-channel enhancement MOS tube PM0 and N-channel enhancement MOS tube NM0 through the driving circuit module, so that a SW switch waveform is generated at the drain of the P-channel enhancement MOS tube PM0, so that the response circuit forms a main loop; by adding a filter composed of a resistor R2 and a capacitor C0 at the SW end, the SW waveform is filtered and transmitted to the A / D converter module. When the system is disturbed and the output voltage drops, the SW waveform analog signal is converted into a corresponding digital signal through the A / D converter. The digital signal enters the EA module and turns on the corresponding control circuit with increased control bandwidth. In this way, the response circuit increases the duty cycle, and the output voltage also increases rapidly to offset the disturbance. The same is true when the output voltage rises due to the disturbance.

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