Display device and electronic equipment

Abstract

A display device capable of improving image quality is provided. One embodiment of the present invention is a display device in which an adding circuit is arranged inside and outside a display area, and the adding circuit has a function of adding a plurality of data supplied from a source driver. Some components of the adding circuit are arranged in a divided manner in the display area. Therefore, the limitation on the size of the components included in the adding circuit can be relaxed and the data can be efficiently added. In addition, by arranging other components included in the adding circuit outside the display area, the number of wiring inside the display area can be reduced and the aperture ratio of the pixel can be increased.

Description

Technical Field

[0001] One embodiment of the present invention relates to a display device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. The technical field of one embodiment of the invention disclosed in this specification, etc., relates to an object, method or manufacturing method. In addition, one embodiment of the present invention relates to a process, a machine, a product or a composition of matter. Therefore, more specifically, as an example of the technical field of one embodiment of the present invention disclosed in this specification, a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a storage device, a camera device, a method for operating these devices or a method for manufacturing these devices can be cited.

[0003] Note that in this specification and the like, a semiconductor device refers to any device that can operate by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are one form of a semiconductor device. In addition, a storage device, a display device, a camera device, and an electronic device may include a semiconductor device. Background Art

[0004] Technology for forming transistors using metal oxides formed on a substrate has attracted attention. For example, Patent Documents 1 and 2 disclose a technology for using transistors using zinc oxide or In-Ga-Zn-based oxides as switching elements of pixels of display devices.

[0005] In addition, Patent Document 3 discloses a memory device having a structure in which a transistor with extremely low off-state current is used for a memory cell.

[0006] In addition, various attempts have been made to improve and apply liquid crystal display devices. For example, Patent Document 4 discloses a transparent display that performs display using field sequential operation.

[0007] [Prior technical literature]

[0008] [Patent Document]

[0009] [Patent Document 1] Japanese Patent Application Publication No. 2007-123861

[0010] [Patent Document 2] Japanese Patent Application Publication No. 2007-96055

[0011] [Patent Document 3] Japanese Patent Application Publication No. 2011-119674

[0012] [Patent Document 4] Japanese Patent Application Publication No. 2018-21974 Summary of the invention

[0013] Technical problem to be solved by the invention

[0014] The resolution of display devices has been continuously improved, and hardware capable of displaying images with a resolution of 8K4K (number of pixels: 7680×4320) or higher has been developed. In addition, the introduction of HDR (High Dynamic Range) display technology, which improves image quality by adjusting brightness, has been promoted.

[0015] In order to display clear grayscales, it is desirable to have a wide range of data potentials that can be supplied to a display element. On the other hand, for example, the output voltage of a source driver used in a liquid crystal display device is about 15V. When a higher voltage is supplied to a display element, a high-output source driver must be used. The power consumption of a high-output source driver is high, and a new driver IC may need to be developed.

[0016] In addition, in order to display dynamic images more smoothly, the frame rate needs to be increased, but the more the number of pixels increases, the shorter the horizontal period, so it is difficult to increase the frame rate. By realizing a structure that can easily increase the frame rate, the structure can be easily applied to a display device of a field sequential liquid crystal method, etc.

[0017] Although the above-mentioned problems need to be solved, the aperture ratio decreases when the number of components of the pixel circuit increases, so it is preferable to configure the pixel circuit using fewer components.

[0018] Therefore, one of the purposes of one embodiment of the present invention is to provide a display device capable of improving image quality. In addition, one of the purposes of one embodiment of the present invention is to provide a display device capable of supplying a voltage higher than the output voltage of a source driver to a display element. In addition, one of the purposes of one embodiment of the present invention is to provide a display device capable of improving the brightness of a displayed image. In addition, one of the purposes of one embodiment of the present invention is to provide a display device capable of improving a frame rate. In addition, one of the purposes of one embodiment of the present invention is to provide a display device capable of improving the aperture ratio of pixels.

[0019] In addition, one of the purposes of one embodiment of the present invention is to provide a display device with low power consumption. In addition, one of the purposes of one embodiment of the present invention is to provide a display device with high reliability. In addition, one of the purposes of one embodiment of the present invention is to provide a novel display device, etc. In addition, one of the purposes of one embodiment of the present invention is to provide a driving method for the above-mentioned display device. In addition, one of the purposes of one embodiment of the present invention is to provide a novel semiconductor device, etc.

[0020] Note that the recording of these purposes does not prevent the existence of other purposes. One mode of the present invention does not need to achieve all of the above purposes. In addition, the purposes other than the above are obvious from the description of the specification, drawings, claims, etc., and the purposes other than the above can be extracted from the description of the specification, drawings, claims, etc.

[0021] Solutions to technical problems

[0022] One embodiment of the present invention relates to a display device capable of improving image quality.

[0023] One embodiment of the present invention is a display device including a pixel and a first circuit, wherein the pixel is electrically connected to the first circuit, the first circuit includes a transistor and a first capacitor, the transistor is arranged outside the display area, and the first capacitor is arranged inside the display area. The first circuit has a function of adding first data and second data to generate third data, and the pixel has a function of maintaining the third data and a function of displaying according to the third data.

[0024] The first capacitor includes a plurality of second capacitors, and the plurality of second capacitors are connected in parallel.

[0025] The first circuit may include a first transistor, a second transistor, a third transistor and a first capacitor, one of the source and the drain of the first transistor may be electrically connected to the pixel, one of the source and the drain of the first transistor may be electrically connected to an electrode of the first capacitor, the other electrode of the first capacitor may be electrically connected to one of the source and the drain of the second transistor, one of the source and the drain of the second transistor may be electrically connected to one of the source and the drain of the third transistor, and the other of the source and the drain of the first transistor may be electrically connected to the other of the source and the drain of the second transistor.

[0026] The pixel may include a fourth transistor and a second circuit, one of the source and the drain of the fourth transistor may be electrically connected to the first circuit, the other of the source and the drain of the fourth transistor may be electrically connected to the second circuit, and the second circuit may include a display element.

[0027] The second circuit may include a fifth transistor, a third capacitor, and a light-emitting element as a display element, the gate of the fifth transistor may be electrically connected to the other of the source and the drain of the fourth transistor, one of the source and the drain of the fifth transistor may be electrically connected to an electrode of the light-emitting element, one electrode of the light-emitting element may be electrically connected to an electrode of the third capacitor, and the other electrode of the third capacitor may be electrically connected to the gate of the fifth transistor.

[0028] In addition, the second circuit may include a sixth transistor, one of a source and a drain of the sixth transistor may be electrically connected to an electrode of the light emitting element, and the other of the source and the drain of the sixth transistor may be electrically connected to one of the source and the drain of the fifth transistor.

[0029] In addition, the second circuit may include a liquid crystal element as a display element, and one electrode of the liquid crystal element may be electrically connected to one of the source and drain of the fourth transistor. In addition, the second circuit may include a fourth capacitor, and one electrode of the fourth capacitor may be electrically connected to one electrode of the liquid crystal element.

[0030] Preferably, the transistor included in the first circuit and the pixel contains a metal oxide in a channel formation region, and the metal oxide contains In, Zn and M (M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd or Hf).

[0031] The channel width of the transistor included in the first circuit is preferably larger than the channel width of the transistor included in the pixel.

[0032] Effects of the Invention

[0033] By using one embodiment of the present invention, a display device capable of improving image quality can be provided. In addition, a display device capable of supplying a voltage higher than the output voltage of a source driver to a display element can be provided. In addition, a display device capable of improving the brightness of a displayed image can be provided. In addition, a display device capable of improving a frame rate can be provided. In addition, a display device capable of improving the aperture ratio of a pixel can be provided.

[0034] In addition, a display device with low power consumption can be provided. In addition, a display device with high reliability can be provided. In addition, a novel display device can be provided. In addition, an operating method of the above display device can be provided. In addition, a novel semiconductor device can be provided.

[0035] BRIEF DESCRIPTION OF THE DRAWINGS

[0036] [ Figure 1 ]A diagram illustrating a display device.

[0037] [ Figure 2 ]Diagram illustrating an adding circuit and a pixel.

[0038] [ Figure 3A and Figure 3B ]A diagram illustrating a display device.

[0039] [ Figure 4 ]A timing diagram illustrating the operation of the adding circuit and the pixel.

[0040] [ Figure 5]Diagram illustrating an adding circuit and a pixel.

[0041] [ FIG. 6A to FIG. 6D ]Diagram illustrating the circuit blocks.

[0042] [ FIG. 7A to FIG. 7D ]Diagram illustrating the circuit blocks.

[0043] [ FIG. 8A to FIG. 8C ]Diagram illustrating the circuit blocks.

[0044] [ Fig. 9A and Fig. 9B ]Diagram illustrating an adding circuit and a pixel.

[0045] [ Fig.10 ]A diagram illustrating the structure of an addition circuit and a pixel used for simulation.

[0046] [ Fig.11 ] Timing diagram for simulation.

[0047] [ FIG. 12A to FIG. 12D ]A diagram illustrating the results of the simulation.

[0048] [ Fig.13 ]Diagram illustrating pixel layout.

[0049] [ FIG. 14A to FIG. 14C ]A diagram illustrating a display device.

[0050] [ Fig.15A and Fig. 15B ]A diagram illustrating a touch panel.

[0051] [ Fig.16A and Fig. 16B ]A diagram illustrating a display device.

[0052] [ Fig.17 ]A diagram illustrating a display device.

[0053] [ Fig.18A and Fig.18B ]A diagram illustrating a display device.

[0054] [ Fig.19A and Fig.19B ]A diagram illustrating a display device.

[0055] [ FIG. 20A to FIG. 20E ]A diagram illustrating a display device.

[0056] [ FIG. 21A1 to FIG. 21C2 ]A diagram illustrating a transistor.

[0057] [ FIG. 22A1 to FIG. 22C2 ]A diagram illustrating a transistor.

[0058] [ FIG. 23A1 to FIG. 23C2 ]A diagram illustrating a transistor.

[0059] [ FIG. 24A1 to FIG. 24C2 ]A diagram illustrating a transistor.

[0060] [ FIG. 25A to FIG. 25F ]A diagram illustrating an electronic device.

[0061] Modes for Carrying Out the Invention

[0062] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and a person of ordinary skill in the art can easily understand the fact that its methods and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below. Note that in the structure of the invention described below, the same figure marks are used in different drawings to represent the same parts or parts with the same functions, and their repeated descriptions are omitted. Note that the shading of the same constituent elements is sometimes appropriately omitted or changed in different drawings.

[0063] In addition, even if there is one element in the circuit diagram, the element may be composed of multiple elements if there is no problem in terms of function. For example, sometimes multiple transistors used as switches may be connected in series or in parallel. In addition, sometimes a capacitor is divided and arranged in multiple locations.

[0064] In addition, sometimes a conductor has multiple functions such as wiring, electrode and terminal, and in this specification, multiple names are sometimes used for the same element. In addition, even if the circuit diagram shows that the elements are directly connected, sometimes the elements are actually connected through one or more conductors, and this structure is also included in the category of direct connection in this specification.

[0065] (Implementation Method 1)

[0066] In this embodiment, a display device which is one embodiment of the present invention is described with reference to the drawings.

[0067] One embodiment of the present invention is a display device in which a circuit having a function of adding data (hereinafter referred to as an adding circuit) is provided inside and outside a display region. The adding circuit has a function of adding data supplied from a source driver. Therefore, a voltage higher than the output of the source driver can be generated.

[0068] The adding circuit is electrically connected to all pixels in the column direction of the display area, and some of its components are divided and arranged in the display area. Therefore, the size restriction of the components included in the adding circuit can be relaxed and the data can be efficiently added. In addition, by arranging other components included in the adding circuit outside the display area, the number of wiring inside the display area can be reduced and the aperture ratio of the pixel can be increased.

[0069] Figure 1 1 is a diagram illustrating a display device according to one embodiment of the present invention. The display device includes pixels 10 arranged in the column direction and the row direction, a source driver 12, a gate driver 13, and a circuit 11. The source driver 12 is electrically connected to the circuit 11. The gate driver 13 is electrically connected to the pixel 10. The circuit 11 is electrically connected to the pixel 10. Note that an example in which a gate driver 13 is provided on one end side of the display area 15 is shown here, but a gate driver may also be provided on the other opposite end side, and the pixel 10 may be driven by two gate drivers.

[0070] The circuit 11 may be provided in each column, and may be electrically connected to all pixels 10 arranged in the same column. In addition, the components of the circuit 11 may be provided inside and outside the display region.

[0071] The circuit 11 is an adding circuit and has a function of generating third data by adding first data and second data supplied from the source driver 12 through capacitive coupling. The pixel 10 includes a transistor and a display element and has a function of holding third data and displaying with the display element according to the third data.

[0072] Figure 2 It indicates that the configuration is Figure 1 The diagram shows a circuit 11 and pixels 10 (pixels 10 [m, 1] to [m, n] (m and n are natural numbers greater than or equal to 1)) on an arbitrary column (m-th column) of a display device.

[0073] The circuit 11 may include a transistor 101, a transistor 102, a transistor 103, and a capacitor 104. One of the source and the drain of the transistor 101 is electrically connected to one electrode of the capacitor 104. The other electrode of the capacitor 104 is electrically connected to one of the source and the drain of the transistor 102. One of the source and the drain of the transistor 102 is electrically connected to one of the source and the drain of the transistor 103.

[0074] Here, the capacitor 104 is composed of a plurality of capacitors 106 connected in parallel. By dispersing the capacitors 106 in the display area, it is easy to increase the total area of ​​the capacitors 104. In addition, the area occupied by the circuit 11 outside the display area can be reduced, and a narrow frame can be achieved. In addition, several capacitors 106 may be provided outside the display area. In addition, the number of capacitors 106 may not be consistent with the number of pixels 10. By adjusting the number of capacitors 106 connected in parallel, the capacitance value of the capacitor 104 can be set to a desired value.

[0075] The capacitor 106 has a structure in which the wiring 125 is used as one electrode and another wiring overlapping the wiring 125 is used as the other electrode. Figure 2 As shown, even if the capacitor 106 is arranged in the display area, the aperture ratio does not decrease significantly.

[0076] The pixel 10 may include a transistor 105 and a circuit block 110. The circuit block 110 may include a transistor, a capacitor, a display element, etc. One of the source and the drain of the transistor 105 is electrically connected to one of the source and the drain of the transistor 101. The other of the source and the drain of the transistor 105 is electrically connected to the circuit block 110.

[0077] Here, a wiring (wiring 125) connecting one of the source and the drain of the transistor 101, one electrode of the capacitor 104, and one of the source and the drain of the transistor 105 is referred to as a node NM. In addition, a wiring connecting the other of the source and the drain of the transistor 105 and the circuit block 110 is referred to as a node NP. The node NP can be in a floating state, and a display element included in the circuit block 110 operates according to the potential of the node NP.

[0078] The connection between the components included in the circuit 11 and the pixel 10 and various wirings is described. The gate of the transistor 101 is electrically connected to the wiring 121. The gate of the transistor 102 is electrically connected to the wiring 122. The gate of the transistor 103 is electrically connected to the wiring 121. The gate of the transistor 105 is electrically connected to the wiring 123. One of the source and the drain of the transistor 101 is electrically connected to the wiring 125. The other of the source and the drain of the transistor 102 and the other of the source and the drain of the transistor 101 are electrically connected to the wiring 124. The other of the source and the drain of the transistor 103 is electrically connected to a voltage source capable of supplying V ref (For example, a reference potential such as 0 V) ​​is electrically connected to the wiring.

[0079] Wiring 121, 122, 123 (123[1] to [n]) is used as a gate line. For example, wiring 121, 122 can be electrically connected to a circuit that controls the operation of circuit 11. Wiring 123 can be electrically connected to gate driver 13. Wiring 124 can be electrically connected to source driver 12 (see Figure 1 ).

[0080] In the circuit 11, first data (weight: W) is written to the node NM. At this time, "V ref ”, and “WV” is maintained in capacitor 104. ref ” Next, the node NM is placed in a floating state, and the second data (data: D) is supplied to the other electrode of the capacitor 104.

[0081] At this time, when the capacitance value of capacitor 104 is C 104 The capacitance value of node NM is C NM When the potential of node NM is W+(C 104 / (C 104 +C NM ))×(DV ref ). Here, if it is possible to make C 104 The value of C is increased to the point where it can be ignored. NM The value of the node NM is "W+DV ref ". In this way, since one embodiment of the present invention can easily increase the total area of ​​the capacitor 104 and improve the capacitance value, data can be added efficiently.

[0082] Therefore, if "W" = "D", "V ref ”=0V and C 104 Than C NM If the voltage is sufficiently large, the potential of the node NM is close to “2D” or “2W”, and a potential about twice that of the output of the source driver 12 can be supplied to the node NM.

[0083] This function allows high voltage to be generated even when using a general-purpose driver IC. For example, a high voltage liquid crystal element required for grayscale control can be driven. In addition, the voltage supplied from the source driver 12 for driving a general liquid crystal element and a light-emitting element can be reduced to about 1 / 2, thereby reducing power consumption of the display device.

[0084] In addition, correction data may also be supplied as the first data (weight: W). For example, by adding brightness correction data to image data, the deviation of brightness specific to the display device may be corrected. In addition, since the brightness can be corrected for each pixel, it can be used for HDR display. In addition, in the case of using a light-emitting element as a display element, the display quality is affected by the threshold voltage deviation of the driving transistor, so the threshold voltage correction data of the transistor may also be supplied as the first data (weight: W) to improve the display quality. Note that the first data (weight: W) and the second data (data: D) may also be interchanged.

[0085] In one embodiment of the present invention, the transistor 105 of a specific pixel 10 is turned on according to the above-mentioned potential addition operation, and the potential of the node NP (= the potential of the node NM) is determined. By sequentially performing this operation on the pixels 10 [m, 1] to [m, n], the potential of the node NP of each pixel 10 can be determined. That is, different image data can be supplied to each pixel 10.

[0086] Node NM and node NP are used as storage nodes. By turning on the transistor connected to each node, data can be written to each node. In addition, by making the transistor non-conductive, the data can be kept in each node. By using a transistor with extremely low off-state current as the transistor, leakage current can be suppressed, thereby maintaining the potential of each node for a long time. For example, the transistor can use a transistor containing a metal oxide in the channel formation region (hereinafter, OS transistor).

[0087] Specifically, as any or all of the transistors 101, 102, 103, and 105, an OS transistor is preferably used. In addition, an OS transistor can be used for the components included in the circuit block 110. In addition, when the operation is performed within the allowable range of the leakage current, a transistor containing Si in the channel formation region (hereinafter referred to as a Si transistor) can be used. In addition, an OS transistor and a Si transistor can be used in combination. As the above-mentioned Si transistor, a transistor containing amorphous silicon, a transistor containing crystalline silicon (typically low-temperature polysilicon, single crystal silicon), etc. can be cited.

[0088] As a semiconductor material for OS transistors, metal oxides with an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more can be used. Typically, there are oxide semiconductors containing indium, for example, CAAC-OS or CAC-OS mentioned later can be used. CAAC-OS has stable atoms constituting the crystals, and is suitable for transistors that emphasize reliability. CAC-OS exhibits high mobility characteristics and is suitable for transistors that are driven at high speeds.

[0089] Since the semiconductor layer of the OS transistor has a large energy gap, it exhibits an extremely low off-state current characteristic of only a few yA / μm (current value per channel width of 1μm). Unlike Si transistors, OS transistors have characteristics such as no impact ionization, avalanche breakdown, and short channel effects, so they can form highly reliable circuits. In addition, the electrical characteristic deviation caused by the uneven crystallinity of Si transistors is not easily generated in OS transistors.

[0090] As the semiconductor layer in the OS transistor, for example, a film represented by an "In-M-Zn-based oxide" containing indium, zinc and M (aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium).

[0091] When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn oxide, the atomic ratio of the metal element of the sputtering target used to form the In-M-Zn oxide film preferably satisfies In≥M and Zn≥M. The atomic ratio of the metal element of such a sputtering target is preferably In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, etc. Note that the atomic ratio of the semiconductor layer to be formed may vary within the range of ±40% of the atomic ratio of the metal element in the above-mentioned sputtering target.

[0092] As the semiconductor layer, an oxide semiconductor with a low carrier density is used. For example, an oxide semiconductor with a carrier density of 1×10 17 / cm 3 Below, preferably 1×10 15 / cm 3 Below, more preferably 1×10 13 / cm 3 Below, more preferably 1×10 11 / cm 3 Below, more preferably less than 1×10 10 / cm 3 and 1×10 -9 / cm 3 The above oxide semiconductors are referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors. Since the defect state density of the oxide semiconductor is low, it can be said that the oxide semiconductor has stable characteristics.

[0093] Note that the present invention is not limited to the above description, and a material having an appropriate composition can be used according to the desired semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the transistor. In addition, it is preferred to appropriately set the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. of the semiconductor layer to obtain the desired semiconductor characteristics of the transistor.

[0094] When the oxide semiconductor constituting the semiconductor layer contains silicon or carbon, which is one of the elements of Group 14, oxygen vacancies increase, which makes the semiconductor layer n-type. Therefore, the concentration of silicon or carbon in the semiconductor layer (measured by secondary ion mass spectrometry (SIMS)) is set to 2×10 18 atoms / cm 3 Below, preferably 2×10 17 atoms / cm 3 the following.

[0095] In addition, when an alkali metal or alkaline earth metal is bonded to an oxide semiconductor, carriers are generated, which increases the off-state current of the transistor. Therefore, the concentration of the alkali metal or alkaline earth metal in the semiconductor layer (the concentration measured by SIMS) is set to 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 the following.

[0096] In addition, when the oxide semiconductor constituting the semiconductor layer contains nitrogen, electrons as carriers are generated, the carrier density increases, and it is easy to become n-type. As a result, the transistor using the oxide semiconductor containing nitrogen is easy to become normally-on. Therefore, the nitrogen concentration in the semiconductor layer (the concentration measured by SIMS) is preferably 5×10 18 atoms / cm 3 the following.

[0097] In addition, when the oxide semiconductor constituting the semiconductor layer contains hydrogen, hydrogen reacts with oxygen bonded to metal atoms to generate water, and thus oxygen vacancies are sometimes formed in the oxide semiconductor. In the case where the channel formation region in the oxide semiconductor contains oxygen vacancies, the transistor tends to have a normally-on characteristic. Furthermore, sometimes hydrogen enters the defects in the oxygen vacancies and is used as a donor to generate electrons as carriers. In addition, sometimes electrons as carriers are generated due to the bonding of a portion of the hydrogen to the oxygen bonded to the metal atom. Therefore, transistors using oxide semiconductors containing more hydrogen tend to have normally-on characteristics.

[0098] Defects in which hydrogen enters oxygen vacancies are used as donors for oxide semiconductors. However, it is difficult to quantitatively evaluate this defect. Therefore, in oxide semiconductors, evaluation is sometimes performed based on carrier concentration rather than donor concentration. Therefore, in this specification, etc., sometimes as a parameter of an oxide semiconductor, instead of using donor concentration, carrier concentration assumed to be in a state where no electric field is applied is used. That is, the "carrier concentration" described in this specification, etc. may sometimes be referred to as "donor concentration".

[0099] Therefore, it is preferable to reduce the amount of hydrogen in the oxide semiconductor as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration measured by SIMS is less than 1×10 20 atoms / cm 3 , preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , and more preferably less than 1×10 18 atoms / cm 3 By using an oxide semiconductor in which impurities such as hydrogen have been sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be imparted.

[0100] In addition, the semiconductor layer may also have a non-single-crystal structure, for example. The non-single-crystal structure includes, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor) with a c-axis orientation, a polycrystalline structure, a microcrystalline structure, or an amorphous structure. Among the non-single-crystal structures, the amorphous structure has the highest defect state density, while the CAAC-OS has the lowest defect state density.

[0101] The oxide semiconductor film with an amorphous structure has, for example, a disordered atomic arrangement and no crystalline component. Alternatively, the oxide semiconductor film with an amorphous structure has, for example, a completely amorphous structure and no crystalline part.

[0102] In addition, the semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have a single layer structure or a stacked layer structure including two or more of the above regions.

[0103] Hereinafter, the structure of CAC (Cloud-Aligned Composite)-OS which is one embodiment of the non-single-crystal semiconductor layer will be described.

[0104] CAC-OS refers to, for example, a configuration in which elements contained in an oxide semiconductor are unevenly distributed, wherein the size of the material containing the unevenly distributed elements is greater than or equal to 0.5 nm and less than or equal to 10 nm, preferably greater than or equal to 1 nm and less than or equal to 2 nm, or a similar size. Note that in the following, a state in which one or more metal elements are unevenly distributed in an oxide semiconductor and regions containing the metal elements are mixed in a size of greater than or equal to 0.5 nm and less than or equal to 10 nm, preferably greater than or equal to 1 nm and less than or equal to 2 nm, is also referred to as a mosaic or patch shape.

[0105] The oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition, it may also contain one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten and magnesium.

[0106] For example, CAC-OS in In-Ga-Zn oxide (in CAC-OS, In-Ga-Zn oxide can be referred to as CAC-IGZO in particular) refers to a material divided into indium oxide (hereinafter referred to as InO X1 (X1 is a real number greater than 0)) or indium zinc oxide (hereinafter referred to as In X2 Zn Y2 O Z2 (X2, Y2 and Z2 are real numbers greater than 0)) and gallium oxide (hereinafter referred to as GaO X3 (X3 is a real number greater than 0)) or gallium zinc oxide (hereinafter referred to as Ga X4 Zn Y4 O Z4 (X4, Y4 and Z4 are real numbers greater than 0)) etc. to form a mosaic shape, and the mosaic-shaped InO X1 or In X2 Zn Y2 O Z2 A structure uniformly distributed in the film (hereinafter also referred to as a cloud shape).

[0107] In other words, CAC-OS is a GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 In this specification, for example, when the atomic ratio of In to element M in the first region is greater than that in the second region, the In concentration in the first region is higher than that in the second region.

[0108] Note that IGZO is a general term and sometimes refers to a compound containing In, Ga, Zn, and O. As a typical example, InGaO3(ZnO) m1 (m1 is a natural number) or In (1+x0) Ga (1-x0) O3(ZnO) m0 (-1≤x0≤1, m0 is an arbitrary number).

[0109] The crystalline compound has a single crystal structure, a polycrystalline structure or a CAAC structure. The CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected in a non-oriented manner on the ab plane.

[0110] On the other hand, CAC-OS is related to the material composition of oxide semiconductors. CAC-OS refers to a composition in which nanoparticle-like regions with Ga as the main component are observed in a part of the material composition containing In, Ga, Zn, and O, and nanoparticle-like regions with In as the main component are observed in a part of the material composition, and are irregularly dispersed in a mosaic shape. Therefore, in CAC-OS, the crystal structure is a secondary factor.

[0111] CAC-OS does not include a stacked-layer structure of two or more films having different compositions, for example, a structure consisting of two layers of a film having In as a main component and a film having Ga as a main component.

[0112] Note that sometimes no GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 There are clear boundaries between the regions of the main components.

[0113] In the case where CAC-OS includes one or more selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten and magnesium instead of gallium, CAC-OS refers to a structure in which nanoparticle-like regions with the metal element as the main component are observed in a part and nanoparticle-like regions with In as the main component are observed in a part and are irregularly dispersed in a mosaic manner.

[0114] CAC-OS can be formed, for example, by sputtering without intentionally heating the substrate. When CAC-OS is formed by sputtering, one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas can be used as a film-forming gas. In addition, the lower the flow rate ratio of the oxygen gas in the total flow rate of the film-forming gas during film formation, the better. For example, the flow rate ratio of the oxygen gas is set to be greater than 0% and less than 30%, preferably greater than 0% and less than 10%.

[0115] CAC-OS has the following characteristics: when measured by the Out-of-plane method using θ / 2θ scanning, which is one of the X-ray diffraction (XRD) measurement methods, no clear peak is observed. In other words, according to the X-ray diffraction measurement, it is known that there is no orientation in the ab plane direction and the c-axis direction in the measurement area.

[0116] In addition, in the electron diffraction pattern of CAC-OS obtained by irradiating an electron beam with a beam diameter of 1 nm (also called a nanobeam), a ring-shaped area with high brightness (ring-shaped area) and multiple bright spots in the ring-shaped area were observed. Therefore, according to the electron diffraction pattern, it can be seen that the crystal structure of CAC-OS has an nc (nano-crystal) structure that is not oriented in the plane direction and the cross-sectional direction.

[0117] In addition, for example, in CAC-OS of In-Ga-Zn oxide, it can be confirmed from an EDX mapping image obtained by energy dispersive X-ray spectroscopy (EDX) that there is a GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 A composition in which the main components are unevenly distributed in the area.

[0118] The structure of CAC-OS is different from that of IGZO compounds in which metal elements are evenly distributed, and it has different properties from IGZO compounds. X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 The regions where the main components are present are separated from each other, and the regions where the main components are present are in a mosaic-like structure.

[0119] Here, In X2 Zn Y2 OZ2 or InO X1 The conductivity of the area with GaO as the main component is higher than that of the area with GaO as the main component. X3 In other words, when the carrier flows through the region with In X2 Zn Y2 O Z2 or InO X1 When In is the main component of the region, it exhibits the conductivity of an oxide semiconductor. X2 Zn Y2 O Z2 or InO X1 When the region as the main component is distributed in a cloud-like manner in the oxide semiconductor, a high field-effect mobility (μ) can be achieved.

[0120] On the other hand, GaO X3 The insulation of the area with In as the main component is higher than that of the area with In X2 Zn Y2 O Z2 or InO X1 In other words, when GaO X3 When regions with the main components of MgO and the like are distributed in an oxide semiconductor, leakage current can be suppressed and good switching operation can be achieved.

[0121] Therefore, when CAC-OS is used in semiconductor devices, the X3 The insulation properties of etc. and the causes of In X2 Zn Y2 O Z2 or InO X1 The complementary effect of conductivity can achieve high on-state current (I on ) and high field effect mobility (μ).

[0122] In addition, semiconductor elements using CAC-OS have high reliability. Therefore, CAC-OS is suitable for use as a constituent material of various semiconductor devices.

[0123] In a display device according to one embodiment of the present invention, Figure 3A As shown, components other than the capacitor 104 of the circuit 11 may be mounted in the source driver 12. By adopting this structure, a narrow frame can be achieved.

[0124] When the pixel circuit is monolithically integrated with the source driver 12 on the substrate, a stacked structure may be adopted in which the source driver 12 and any component of the circuit 11 have overlapping areas. By adopting this structure, the design freedom and electrical characteristics of the components of the circuit 11 can be improved.

[0125] In addition, although Figure 1An example in which the circuit 11 is provided in each column is shown, but Figure 3B As shown, a selection circuit 16 can be provided between the circuit 11 and the pixel 10, and data can be written to pixels of multiple columns using one circuit 11. By having this structure, the number of circuits 11 can be reduced, thereby achieving a narrow frame. Note that although Figure 3B Although an example is shown in which writing is performed on pixels in three columns using a combination of one circuit 11 and one selection circuit 16 , the present invention is not limited to this, and the number of columns can be determined within the allowable range of writing time.

[0126] Since the transistors 101, 102, and 103 included in the circuit 11 are arranged outside the display area, they are not easily limited by size, and their channel width can be larger than the transistors arranged in the pixel. By using transistors with large channel widths, the charging and discharging time of the wiring 125 and the like can be shortened, thereby facilitating the increase of the frame frequency. In addition, it is easy to apply to high-definition displays with a large number of pixels and a short horizontal period.

[0127] Furthermore, by using OS transistors as transistors 101, 102, and 103, the withstand voltage of circuit 11 can be increased, and stable operation can be performed even when the voltage generated by adding data is several tens of V. In addition, when transistors 101, 102, and 103 are Si transistors provided in an IC chip, higher-speed operation can be performed. Note that when transistors 101, 102, and 103 are provided in an IC chip, the transistors may also be OS transistors.

[0128] Next, refer to Figure 4 The timing diagram shown illustrates a method of writing data to pixel 10 using circuit 11. Note that in the following description, high potential is denoted as "H" and low potential is denoted as "L". In addition, the weight supplied to pixel 10[1] is denoted as "W[1]" and the image data is denoted as "D[1]", and the weight supplied to pixel 10[2] is denoted as "W[2]" and the image data is denoted as "D[2]". As "V ref ”, for example, 0V, GND potential or a specific reference potential can be used.

[0129] Note that detailed changes due to circuit structure, operation timing, etc. are not considered in the potential distribution, coupling, or loss. The potential change caused by capacitive coupling depends on the capacitance ratio of the supply side and the supplied side, but for ease of explanation, it is assumed that the capacitance value of the circuit block 110 is sufficiently small.

[0130] At time T1, "W[1]" is supplied to the wiring 124, and the potentials of the wirings 121 and 123[1] are set to "H". As a result, the transistor 103 is turned on, and the potential of the other electrode of the capacitor 104 is set to "V ref". This operation is used to reset the subsequent addition operation (capacitive coupling operation).

[0131] In addition, the transistors 101 and 105 are turned on, and the potential of the wiring 124 is written to the node NP[1]. This operation is a weight writing operation, and the potential of the node NP[1] is "W[1]".

[0132] At time T2, the potential of wiring 121 is set to "L", the potential of wiring 123[1] is set to "H", and transistors 101 and 103 are turned off. At this time, node NP[1] holds "W[1]". In addition, capacitor 104 holds "W[1]-V ref ”. So far, the writing operation of “W[1]” in pixel 10[1] has been completed.

[0133] At time T3, "D[1]" is supplied to wiring 124, making the potential of wiring 121 "L" and the potential of wiring 122 and 123[1] "H", thereby turning on transistors 102 and 105. At this time, the potential of the other electrode of capacitor 104 is "D[1]", and due to capacitive coupling, "D[1]" is added to the potential of node NP[1]. This operation is an addition operation, and the potential of node NP[1] is "W[1]+D[1]-V ref At this time, if "V ref ” = 0, the potential of the node NP[1] is “W[1] + D[1]”. The potential of the node NP[1] is supplied to the display element for display.

[0134] At time T4, when the potentials of wirings 121, 122, and 123[1] are "L", transistor 105 is turned off, and the potential of node NP[1] is maintained, and display continues until the next frame operation. The above is a description of the operation of pixel 10[1].

[0135] By causing the pixel 10[2] to perform the same operation from time T5 to T8, a display corresponding to "W[2]+D[2]" can be performed in the pixel 10[2].

[0136] like Figure 5 As shown, the circuit 11 is provided not only on one end side of the display region 15 but also on the other opposite end side.

[0137] Here, the circuit 11 provided at one end of the display region 15 is a circuit 11a. The operation of the circuit 11a is controlled by a signal supplied from the wirings 121a and 122a. The circuit 11a is electrically connected to the source driver 12a. In addition, the circuit 11 provided at the other end of the display region 15 is a circuit 11b. The operation of the circuit 11b is controlled by a signal supplied from the wirings 121b and 122b. In addition, the circuit 11b is electrically connected to the source driver 12b.

[0138] The circuits 11a and 11b operate to output the same data at the same timing. That is, the source drivers 12a and 12b output the same data at the same timing, and the same operation signal is supplied to the wirings 121a, 121b, 121a, and 121b at the same timing.

[0139] By performing the above operation, the circuits 11a and 11b can operate simultaneously and output the same data to the wiring 125. Thus, the wiring 125 can be charged and discharged at high speed, and it is easy to cope with a display device with a short horizontal period and a large number of pixels, a large display device with a large parasitic capacitance of the wiring 125, etc.

[0140] FIG. 6A to FIG. 6C This is an example of a structure that can be used in the circuit block 110 and includes a light-emitting element as a display element.

[0141] Fig. 6A The structure shown includes a transistor 111, a capacitor 113, and a light emitting element 114. One of the source and the drain of the transistor 111 is electrically connected to one electrode of the light emitting element 114. One electrode of the light emitting element 114 is electrically connected to one electrode of the capacitor 113. The other electrode of the capacitor 113 is electrically connected to the gate of the transistor 111. The gate of the transistor 111 is electrically connected to the node NP.

[0142] The other of the source and the drain of the transistor 111 is electrically connected to the wiring 128. The other electrode of the light-emitting element 114 is electrically connected to the wiring 129. The wirings 128 and 129 have a function of supplying power. For example, the wiring 128 can supply a high potential power supply. In addition, the wiring 129 can supply a low potential power supply.

[0143] exist Fig. 6A In the structure shown, current flows through the light emitting element 114 when the potential of the node NM is equal to or higher than the threshold voltage of the transistor 111. Therefore, the light emitting element 114 may start to emit light when the weight (W) is written to the node NP, which limits the application of this structure.

[0144] In addition, if Figure 6BAs shown, one electrode of the light emitting element 114 may be electrically connected to the wiring 128, and the other electrode of the light emitting element 114 may be electrically connected to the other of the source and the drain of the transistor 111. This structure may also be used for other circuit blocks 110 including the light emitting element 114.

[0145] Figure 6C Yes Fig. 6A The structure of the transistor 112 is added to the structure of the transistor 112. One of the source and the drain of the transistor 112 is electrically connected to one of the source and the drain of the transistor 111. The other of the source and the drain of the transistor 112 is electrically connected to the light emitting element 114. The gate of the transistor 112 is electrically connected to the wiring 130. The wiring 130 can have a function as a signal line for controlling conduction of the transistor 112.

[0146] In this structure, when the potential of the node NP is equal to or higher than the threshold voltage of the transistor 111 and the transistor 112 is turned on, current flows through the light emitting element 114. Therefore, the light emitting element 114 can start emitting light at any timing after the addition of the weight (W) and the data (D).

[0147] Fig.6D Yes Figure 6C The structure of the transistor 115 is added to the structure of the transistor 115. One of the source and the drain of the transistor 115 is electrically connected to one of the source and the drain of the transistor 111. The other of the source and the drain of the transistor 115 is electrically connected to the wiring 131. The gate of the transistor 115 is electrically connected to the wiring 132. The wiring 132 can have a function as a signal line for controlling conduction of the transistor 115.

[0148] The wiring 131 may be electrically connected to a supply source of a specific potential such as a reference potential. By supplying a specific potential from the wiring 131 to one of the source and the drain of the transistor 111, writing of image data can also be stabilized.

[0149] The wiring 131 may be connected to the circuit 120 and may have a function of a monitor line. The circuit 120 may have one or more of a function of supplying the specific potential, a function of obtaining the electrical characteristics of the transistor 111, and a function of generating correction data.

[0150] FIG. 7A to FIG. 7D This is an example of a structure that can be used in the circuit block 110 and includes a liquid crystal element as a display element.

[0151] Fig. 7A The structure shown includes a capacitor 116 and a liquid crystal element 117. One electrode of the liquid crystal element 117 is electrically connected to one electrode of the capacitor 116. One electrode of the capacitor 116 is electrically connected to a node NP.

[0152] The other electrode of the capacitor 116 is electrically connected to a wiring 133. The other electrode of the liquid crystal element 117 is electrically connected to a wiring 134. The wirings 133 and 134 have a function of supplying power. For example, the wirings 133 and 134 can supply a reference potential such as GND or 0 V or an arbitrary potential.

[0153] In addition, you can Figure 7B As shown, capacitor 116 is omitted. As described above, an OS transistor can be used as a transistor connected to node NP. Since the leakage current of the OS transistor is extremely small, the display can be maintained for a long time even if capacitor 116 used as a holding capacitor is omitted. In addition, not limited to the structure of the transistor, omitting capacitor 116 is also effective in shortening the display period by high-speed operation such as field sequential driving. By omitting capacitor 116, the aperture ratio can be increased. In addition, the transmittance of the pixel can be increased.

[0154] exist Fig. 7A and Figure 7B In the structure, the operation of the liquid crystal element 117 is started when the potential of the node NP is set to be above the operation threshold of the liquid crystal element 117. As a result, the display operation sometimes starts when the weight is written to the node NP, resulting in limited use of this structure. Note that in a transmissive liquid crystal display device, for example, by turning off the backlight until the addition of the weight (W) and the data (D) is completed, it is possible to suppress the display from being seen even if unnecessary display work is performed.

[0155] Figure 7C Yes Fig. 7A The structure of the transistor 118 is added. One of the source and the drain of the transistor 118 is electrically connected to one electrode of the capacitor 116. The other of the source and the drain of the transistor 118 is electrically connected to the node NP. The gate of the transistor 118 is electrically connected to the wiring 127. The wiring 127 can have a function as a signal line for controlling conduction of the transistor 118.

[0156] In this structure, the potential of the node NP is applied to the liquid crystal element 117 when the transistor 118 is turned on. Thus, the operation of the liquid crystal element can be started at any timing after the addition operation of the weight (W) and the data (D).

[0157] In addition, since the potential supplied to the capacitor 116 and the liquid crystal element 117 is maintained when the transistor 118 is in a non-conductive state, it is preferable to reset the potential supplied to the capacitor 116 and the liquid crystal element 117 before rewriting the image data. In this resetting, for example, a reset potential is supplied to the wiring 124, and at the same time, the transistor 101 and the transistor 118 are turned on.

[0158] Fig.7D Yes Figure 7CThe structure of the transistor 119 is added. One of the source and the drain of the transistor 119 is electrically connected to one electrode of the liquid crystal element 117. The other of the source and the drain of the transistor 119 is electrically connected to the wiring 131. The gate of the transistor 119 is electrically connected to the wiring 138. The wiring 138 can have a function as a signal line for controlling conduction of the transistor 119.

[0159] The circuit 120 electrically connected to the wiring 131 is connected to the above Figure 6C As described in , it is also possible to have a function of resetting the potential supplied to the capacitor 116 and the liquid crystal element 117.

[0160] FIG. 8A to FIG. 8C Show Figure 2 etc. to supply "V ref "Specific example of wiring. Fig. 8A As shown, when a light-emitting element is used as a display element, the wiring 128 can be used as a supply voltage for supplying "V ref ” wiring. Because “V ref " is preferably 0 V, GND, or a low potential, so the wiring 128 also has a function of supplying at least one of these potentials. In addition, "V ref ", and supplies a high potential power supply to the wiring 128 when the light emitting element 114 emits light. In addition, Figure 8B As shown, the wiring 129 for supplying a low potential can be used as a wiring for supplying "V ref " wiring.

[0161] like Figure 8C As shown, when a liquid crystal element is used as a display element, the wiring 133 can be used as a supply voltage for supplying "V ref " wiring. Alternatively, wiring 134 may also be used. Note that the supply "V ref ” dedicated public wiring.

[0162] Furthermore, in one embodiment of the present invention, Fig. 9A , Fig. 9B As shown, the transistor may also have a structure with a back gate. Fig. 9A The structure in which the back gate is electrically connected to the front gate is shown, which has the effect of increasing the on-state current. Fig. 9B The back gate is electrically connected to a wiring 135 capable of supplying a constant potential, and this structure can control the threshold voltage of the transistor. In addition, the transistor included in the circuit block 110 may also be provided with a back gate.

[0163] Next, simulation results regarding the operation of the pixel will be described. Fig.10The structure of a column of pixels (PIX) and a circuit 11 connected to the column for simulation is shown. Assuming that the number of pixels is 100 to 2000, the circuit block 110 is used as Fig. 7A The structure shown (liquid crystal element and capacitor) is simulated to show the change in voltage at the node NP when the number of pixels is changed.

[0164] The parameters used for the simulation are as follows: transistor size is L / W=4μm / 30μm (transistors Tr1, Tr2, Tr3), L / W=4μm / 10μm (transistor Tr4); the capacitance value of capacitor Cs is 100fF; the capacitance value of liquid crystal element Clc is 100fF; common electrodes VCOM and TCOM are 0V. In addition, as the voltage applied to the gate of the transistor, "H" is set to +15V and "L" is set to -10V.

[0165] In addition, the wiring PL connecting the circuit 11 and the pixel PIX is provided with a resistor R1 equivalent to a parasitic resistance and a capacitor C3 equivalent to a parasitic capacitance, and the number of these is the same as the number of pixels. In addition, since the capacitance of the capacitor C1 (the sum of C2), the parasitic capacitance of the wiring PL (the sum of C3), and the resistance of the wiring PL (the sum of R1) depend on the number of pixels, the values ​​shown in Table 1 are used. Note that SPICE is used as the circuit simulation software.

[0166] [Table 1]

[0167]

[0168] Fig.11 This is a timing diagram for simulation. Here, both weight (W) and data (D) are 5V. ref ” is 0V.

[0169] FIG. 12A to FIG. 12D These are simulation results when the number of pixels is set to 100, 500, 1000, and 2000. Each figure shows, on the time axis, a change in the voltage of the node NP when a write operation is performed on the pixels PIX [1] to [4].

[0170] When the number of pixels is 100, writing can be performed stably, but the total capacitance value of C1 is small, so data addition cannot be performed sufficiently.

[0171] When the number of pixels is 500, the simulation parameters used at this time are appropriate, and the addition operation of the data corresponding to the capacitance ratio can be performed.

[0172] In the case of 1000 pixels, the total capacitance value of C1 is large, and the first pixel PIX[1] to be written does not completely complete the writing of W within the writing time, and the rise of the data potential is insufficient. The pixels after pixel PIX[2] are affected by the charge remaining in the wiring PL, and the writing becomes stable.

[0173] In the case of pixel number 2000, the total capacitance value of C1 is too large, and there is no time to write to W of pixel PIX[1], so the voltage is low. The total capacitance value of C1 is too large, so the pixels after pixel PIX[2] are also affected.

[0174] Based on the above simulation results, it can be confirmed that the combination of appropriate operating parameters and an appropriate number of pixels can stably perform data addition operations.

[0175] Note that although the total capacitance of capacitor C1 has a great influence on the operation, the capacitance of capacitor C1 can be easily adjusted by the number of capacitors C2 connected in parallel. Therefore, by adjusting the number of capacitors C2, the operation can be performed even if the number of pixels in each column is 1000, 2000 or more. Fig. 12B Proper work as shown.

[0176] Next, simulation results regarding pixel layout will be described. Fig.13 Equivalent to Fig.10 The pixels PIX [1] to [3] shown show an example of a layout of three pixels in a vertical direction.

[0177] exist Fig.13 In the layout shown, components up to the pixel electrode PE corresponding to the node NP are shown, and the capacitor Cs is omitted. A bottom-gate transistor (with a back gate) is shown as an example of a transistor. Note that the pixel pitch is assumed to be 136 μm.

[0178] A conductive layer manufactured by the same process as the gate wiring and a conductive layer manufactured by the same process as the source wiring are used as a pair of electrodes of the capacitor C1. The two conductive layers have an overlapping area in the display area with an insulating layer (e.g., a gate insulating film) interposed therebetween. That is, a capacitor C2 is provided in each pixel. Since the capacitor C2 is connected in parallel, it is equivalent to a large capacitor.

[0179] That is, by dividing the capacitor C1, the aperture ratio and transmittance of the pixel can be improved. Note that it is preferable to use a connecting wiring BR that bridges the gate wiring to make an electrical connection between one conductive layer of the capacitor. For example, the connecting wiring BR can be manufactured by the same process as the source wiring. In a pixel pitch of 136μm, the aperture ratio ((area of ​​the pixel electrode PE) / (area of ​​the pixel)) is estimated to be approximately 90.5%.

[0180] From the above simulation results, the effect of one embodiment of the present invention can be confirmed.

[0181] This embodiment mode can be implemented in combination with the configurations described in other embodiment modes and the like as appropriate.

[0182] (Implementation Method 2)

[0183] This embodiment mode describes a configuration example of a display device using a liquid crystal element and a configuration example of a display device using a light-emitting element. Note that in this embodiment mode, components, operations, and functions of the display device described in Embodiment Mode 1 are omitted.

[0184] FIG. 14A to FIG. 14C The structure of a display device to which one embodiment of the present invention can be applied is shown.

[0185] The display device described in this embodiment can use the adding circuit and the pixel described in Embodiment 1. Note that a scanning line driver circuit described below corresponds to a gate driver, and a signal line driver circuit corresponds to a source driver.

[0186] exist Fig.14A In the embodiment, the sealant 4005 is provided so as to surround the display portion 215 provided over the first substrate 4001 , and the display portion 215 is sealed by the sealant 4005 and the second substrate 4006 .

[0187] exist Fig.14A In the embodiment, the scanning line driver circuit 221a, the signal line driver circuit 231a, the signal line driver circuit 232a, and the common line driver circuit 241a all include a plurality of integrated circuits 4042 provided on a printed circuit board 4041. The integrated circuit 4042 is formed of a single crystal semiconductor or a polycrystalline semiconductor. The common line driver circuit 241a has a function of supplying a predetermined potential to the wirings 128, 129, 132, 133, 135, etc. described in Embodiment 1.

[0188] Various signals and potentials are supplied to the scanning line driving circuit 221 a , the common line driving circuit 241 a , the signal line driving circuit 231 a , and the signal line driving circuit 232 a via an FPC (Flexible printed circuit) 4018 .

[0189] The integrated circuit 4042 included in the scan line driver circuit 221a and the common line driver circuit 241a has a function of supplying a selection signal to the display portion 215. The integrated circuit 4042 included in the signal line driver circuit 231a and the signal line driver circuit 232a has a function of supplying image data to the display portion 215. The integrated circuit 4042 is mounted in a region different from a region surrounded by the sealant 4005 on the first substrate 4001.

[0190] Note that there is no particular limitation on the connection method of the integrated circuit 4042, and a wire bonding method, a COG (Chip On Glass) method, a TCP (Tape Carrier Package) method, a COF (Chip On Film) method, or the like can be used.

[0191] Fig. 14B An example in which the integrated circuit 4042 included in the signal line driver circuit 231a and the signal line driver circuit 232a is mounted by a COG method is shown. Alternatively, by forming part or all of the driver circuit over a substrate on which the display portion 215 is formed, a system-on-panel can be formed.

[0192] Fig. 14B The example in which the scanning line driver circuit 221a and the common line driver circuit 241a are formed over the substrate on which the display portion 215 is formed is shown. By forming the driver circuits at the same time as the pixel circuits in the display portion 215, the number of components can be reduced, thereby improving productivity.

[0193] In addition, Fig. 14B In the embodiment, a sealant 4005 is provided so as to surround the display portion 215, the scan line driver circuit 221a, and the common line driver circuit 241a provided on the first substrate 4001. A second substrate 4006 is provided over the display portion 215, the scan line driver circuit 221a, and the common line driver circuit 241a. Thus, the display portion 215, the scan line driver circuit 221a, and the common line driver circuit 241a are sealed together with the display element via the first substrate 4001, the sealant 4005, and the second substrate 4006.

[0194] Although in Fig. 14B 2 shows an example in which the signal line driver circuit 231a and the signal line driver circuit 232a are separately formed and mounted on the first substrate 4001, but one embodiment of the present invention is not limited to this structure, and a scanning line driver circuit may be separately formed and mounted, or a part of the signal line driver circuit or a part of the scanning line driver circuit may be separately formed and mounted. Fig. 14C As shown in FIG. 1 , the signal line driver circuit 231 a and the signal line driver circuit 232 a may be formed over the substrate on which the display portion 215 is formed.

[0195] In addition, a display device may include a panel in which a display element is sealed and a module in which an IC including a controller and the like is mounted on the panel.

[0196] In addition, the display portion and the scan line driver circuit provided over the first substrate include a plurality of transistors. As the transistors, the transistors described in the above embodiment can be used.

[0197] The structures of the transistors included in the peripheral drive circuit and the transistors included in the pixel circuit of the display unit may have the same structure or different structures. The transistors included in the peripheral drive circuit may all have the same structure or may combine two or more structures. Similarly, the transistors included in the pixel circuit may all have the same structure or may combine two or more structures.

[0198] In addition, an input device 4200 may be provided on the second substrate 4006. FIG. 14A to FIG. 14C The structure shown in which the display device is provided with the input device 4200 can be used as a touch screen.

[0199] There is no particular limitation on the sensing element (also referred to as a sensor element) included in the touch screen of one embodiment of the present invention. Various sensors capable of detecting the approach or contact of a detection object such as a finger or a stylus pen can be used as the sensing element.

[0200] As the type of sensor, various types such as an electrostatic capacitance type, a resistance film type, a surface acoustic wave type, an infrared type, an optical type, and a pressure-sensitive type can be used.

[0201] In this embodiment, a touch screen including an electrostatic capacitive sensing element is taken as an example for description.

[0202] As the electrostatic capacitance type, there are surface type electrostatic capacitance type, projected type electrostatic capacitance type, etc. In addition, as the projected type electrostatic capacitance type, there are self capacitance type, mutual capacitance type, etc. It is preferable to use the mutual capacitance type because multi-point sensing can be performed simultaneously.

[0203] The touch panel of one embodiment of the present invention can have various structures, such as a structure in which a display device and a sensor element manufactured separately are bonded together, a structure in which electrodes constituting a sensor element are provided on one or both of a substrate supporting a display element and a counter substrate.

[0204] Fig.15A and Fig. 15B An example of a touch screen is shown. Fig.15A It is a three-dimensional diagram of the touch screen 4210 . Fig. 15B 4 is a perspective view of the input device 4200. Note that for the sake of clarity, only typical components are shown.

[0205] The touch screen 4210 has a structure in which a display device and a sensing element that are manufactured separately are bonded together.

[0206] The touch screen 4210 includes an input device 4200 and a display device which are overlapped.

[0207] The input device 4200 includes a substrate 4263, an electrode 4227, an electrode 4228, a plurality of wirings 4237, a plurality of wirings 4238, and a plurality of wirings 4239. For example, the electrode 4227 may be electrically connected to the wiring 4237 or the wiring 4239. In addition, the electrode 4228 may be electrically connected to the wiring 4239. The FPC 4272b may be electrically connected to the plurality of wirings 4237 and the plurality of wirings 4238, respectively. The FPC 4272b may be provided with an IC 4273b.

[0208] Alternatively, a touch sensor may be provided between the first substrate 4001 and the second substrate 4006 of the display device. When the touch sensor is provided between the first substrate 4001 and the second substrate 4006, an optical touch sensor using a photoelectric conversion element may be used in addition to a capacitive touch sensor.

[0209] Fig.16A and Fig. 16B It is along Fig. 14B Cross-sectional view along the dotted line N1-N2 in FIG. Fig.16A and Fig. 16B The display device shown includes an electrode 4015, which is electrically connected to a terminal of an FPC 4018 via an anisotropic conductive layer 4019. Fig.16A and Fig. 16B In the embodiment, the electrode 4015 is electrically connected to the wiring 4014 in an opening formed in the insulating layer 4112 , the insulating layer 4111 , and the insulating layer 4110 .

[0210] The electrode 4015 and the first electrode layer 4030 are formed using the same conductive layer, and the wiring 4014 and the source electrode and the drain electrode of the transistor 4010 and the transistor 4011 are formed using the same conductive layer.

[0211] In addition, the display portion 215 and the scan line driver circuit 221a provided over the first substrate 4001 include a plurality of transistors. Fig.16A and Fig. 16B , a transistor 4010 in the display portion 215 and a transistor 4011 in the scan line driver circuit 221a are shown. Fig.16A and Fig. 16B Although bottom-gate transistors are shown as the transistor 4010 and the transistor 4011 , top-gate transistors may also be used.

[0212] exist Fig.16A and Fig. 16B In FIG. 4 , an insulating layer 4112 is provided over the transistor 4010 and the transistor 4011. Fig. 16B In the embodiment, a partition wall 4510 is formed on the insulating layer 4112.

[0213] In addition, the transistor 4010 and the transistor 4011 are provided over the insulating layer 4102. In addition, the transistor 4010 and the transistor 4011 include an electrode 4017 formed over the insulating layer 4111. The electrode 4017 can function as a back gate electrode.

[0214] in addition, Fig.16A and Fig. 16B The display device shown includes a capacitor 4020. The capacitor 4020 includes an electrode 4021 formed in the same process as a gate electrode of the transistor 4010 and an electrode formed in the same process as a source electrode and a drain electrode. The electrodes overlap with each other with the insulating layer 4103 interposed therebetween.

[0215] Generally, the capacitance of a capacitor provided in a pixel portion of a display device is set so as to hold charge for a predetermined period in consideration of leakage current of a transistor arranged in the pixel portion, etc. The capacitance of the capacitor may be set in consideration of the off-state current of the transistor, etc.

[0216] The transistor 4010 provided in the display portion 215 is electrically connected to the display element. Fig.16A This is an example of a liquid crystal display device that uses a liquid crystal element as a display element. Fig.16A In the embodiment, a liquid crystal element 4013 as a display element includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that an insulating layer 4032 and an insulating layer 4033 serving as alignment films are provided so as to sandwich the liquid crystal layer 4008. The second electrode layer 4031 is provided on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 4031 overlap with each other with the liquid crystal layer 4008 interposed therebetween.

[0217] As the liquid crystal element 4013, a liquid crystal element using various modes can be used. For example, a liquid crystal element using a VA (Vertical Alignment) mode, a TN (Twisted Nematic) mode, an IPS (In-Plane-Switching) mode, an ASM (Axially Symmetric Aligned Micro-cell) mode, an OCB (Optically Compensated Bend) mode, an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (AntiFerroelectric Liquid Crystal) mode, an ECB (Electrically Controlled Birefringence) mode, a VA-IPS (Vertical Alignment In-Plane-Switching) mode, a guest-host mode, or the like can be used.

[0218] In addition, a normally black liquid crystal display device, such as a transmissive liquid crystal display device using a vertical alignment (VA) mode, may be used for the liquid crystal display device shown in this embodiment. As the vertical alignment mode, an MVA (Multi-Domain Vertical Alignment) mode, a PVA (Patterned Vertical Alignment) mode, an ASV (Advanced Super View) mode, etc. may be used.

[0219] Liquid crystal elements are elements that use the optical modulation effect of liquid crystals to control the transmission or non-transmission of light. The optical modulation effect of liquid crystals is controlled by the electric field (horizontal electric field, vertical electric field or tilted electric field) applied to the liquid crystal. As liquid crystals used in liquid crystal elements, thermotropic liquid crystals, low molecular liquid crystals, polymer liquid crystals, polymer dispersed liquid crystals (PDLC: Polymer Dispersed Liquid Crystal: polymer dispersed liquid crystal), ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. These liquid crystal materials show cholesteric phases, smectic phases, cubic phases, chiral nematic phases, isotropic phases, etc. depending on the conditions.

[0220] Although FIG. 16 shows an example of a liquid crystal display device having a liquid crystal element in a vertical electric field mode, a liquid crystal display device having a liquid crystal element in a horizontal electric field mode can also be used in one embodiment of the present invention. In the case of a horizontal electric field mode, a liquid crystal presenting a blue phase without an alignment film can also be used. The blue phase is a type of liquid crystal phase, and refers to a phase that appears before the transition from the cholesteric phase to the homogeneous phase when the temperature of the cholesteric liquid crystal is raised. Because the blue phase only appears within a narrow temperature range, a liquid crystal composition in which more than 5 wt % of a chiral agent is mixed is used for the liquid crystal layer 4008 to expand the temperature range. Since the liquid crystal composition containing a liquid crystal presenting a blue phase and a chiral agent has a fast response speed and is optically isotropic. In addition, the liquid crystal composition containing a liquid crystal presenting a blue phase and a chiral agent does not require an alignment treatment and has a small viewing angle dependence. In addition, since there is no need to set an alignment film and no friction treatment is required, electrostatic damage caused by the friction treatment can be prevented, and defects and damages of the liquid crystal display device in the manufacturing process can be reduced.

[0221] The spacer 4035 is a columnar spacer obtained by selectively etching the insulating layer and is provided to control the interval (cell gap) between the first electrode layer 4030 and the second electrode layer 4031. Note that a spherical spacer may also be used.

[0222] In addition, as needed, optical components (optical substrates) such as black matrices (light shielding layers), coloring layers (color filters), polarizing components, phase difference components, and anti-reflection components can be appropriately provided. For example, circular polarization using polarizing substrates and phase difference substrates can also be used. In addition, backlights or sidelights can also be used as light sources. As the above-mentioned backlights or sidelights, micro-light emitting diodes (Micro-LEDs) can also be used.

[0223] exist Fig.16A In the display device shown in FIG. 4 , a light shielding layer 4132 , a coloring layer 4131 , and an insulating layer 4133 are provided between the second substrate 4006 and the second electrode layer 4031 .

[0224] As materials that can be used for the light-shielding layer, carbon black, titanium black, metals, metal oxides, or composite oxides containing a solid solution of multiple metal oxides can be cited. The light-shielding layer can also be a film containing a resin material or a thin film containing an inorganic material such as a metal. In addition, a laminated film of a film containing a material of a coloring layer can also be used for the light-shielding layer. For example, a laminated structure of a film containing a material of a coloring layer for transmitting light of a certain color and a film containing a material of a coloring layer for transmitting light of other colors can be used. By making the material of the coloring layer and the light-shielding layer the same, in addition to being able to use the same equipment, the process can also be simplified, so it is preferred.

[0225] Examples of materials that can be used for the coloring layer include metal materials, resin materials, and resin materials containing pigments or dyes. The light shielding layer and the coloring layer can be formed by, for example, an inkjet method or the like.

[0226] in addition, Fig.16A and Fig. 16B The display device shown includes an insulating layer 4111 and an insulating layer 4104. Insulating layers that do not easily transmit impurity elements are used as the insulating layer 4111 and the insulating layer 4104. Since the semiconductor layer of the transistor is sandwiched between the insulating layer 4111 and the insulating layer 4104, mixing of impurities from the outside can be prevented.

[0227] In addition, as a display element included in the display device, a light-emitting element can be used. As a light-emitting element, for example, an EL element using electroluminescence can be used. The EL element has a layer (also referred to as an EL layer) containing a light-emitting compound between a pair of electrodes. When a potential difference higher than the threshold voltage of the EL element is generated between the pair of electrodes, holes are injected into the EL layer from the anode side, and electrons are injected into the EL layer from the cathode side. The injected electrons and holes recombine in the EL layer, whereby the light-emitting substance contained in the EL layer emits light.

[0228] As the EL element, for example, an organic EL element or an inorganic EL element can be used. Note that LED (including Micro-LED) using a compound semiconductor as a light-emitting material is also one of the EL elements, and LED can also be used.

[0229] In an organic EL element, electrons are injected into the EL layer from one electrode and holes are injected into the EL layer from the other electrode by applying voltage. The light-emitting organic compound forms an excited state by the recombination of these carriers (electrons and holes), and emits light when returning from the excited state to the ground state. Due to this mechanism, this light-emitting element is called a current-excitation light-emitting element.

[0230] In addition to the light-emitting compound, the EL layer may also include substances with high hole injection properties, substances with high hole transport properties, hole blocking materials, substances with high electron transport properties, substances with high electron injection properties, or bipolar substances (substances with high electron transport properties and hole transport properties).

[0231] The EL layer can be formed by a method such as an evaporation method (including a vacuum evaporation method), a transfer method, a printing method, an inkjet method, or a coating method.

[0232] Inorganic EL elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements according to their element structures. Dispersed inorganic EL elements include a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and its light-emitting mechanism is donor-acceptor recombination type light-emitting using donor energy level and acceptor energy level. Thin-film inorganic EL elements are structures in which a light-emitting layer is sandwiched between dielectric layers, and the dielectric layers sandwiching the light-emitting layer are sandwiched between electrodes, and its light-emitting mechanism is localized light-emitting using inner shell electron transitions of metal ions. Note that an organic EL element is used as a light-emitting element for explanation here.

[0233] In order to extract the light, at least one of the pair of electrodes of the light-emitting element can be made transparent. A transistor and a light-emitting element are formed on a substrate, and the light-emitting element can adopt a top emission structure that extracts light from the surface opposite to the substrate; a bottom emission structure that extracts light from the surface on one side of the substrate; and a double-sided emission structure that extracts light from both surfaces.

[0234] Fig. 16B This is an example of a light-emitting display device (also referred to as an "EL display device") using a light-emitting element as a display element. The light-emitting element 4513 used as a display element is electrically connected to the transistor 4010 provided in the display portion 215. Although the light-emitting element 4513 has a stacked-layer structure of a first electrode layer 4030, a light-emitting layer 4511, and a second electrode layer 4031, it is not limited to this structure. The structure of the light-emitting element 4513 can be appropriately changed according to the direction of light extraction from the light-emitting element 4513, etc.

[0235] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. In particular, it is preferable to use a photosensitive resin material. An opening is formed in the first electrode layer 4030, and a side surface of the opening is formed into an inclined surface having a continuous curvature.

[0236] The light-emitting layer 4511 may be formed of a single layer or a stack of a plurality of layers.

[0237] The light-emitting element 4513 can emit light of white, red, green, blue, cyan, magenta, yellow, or the like depending on the material constituting the light-emitting layer 4511 .

[0238] As a method for realizing color display, there are the following methods: a method of combining a light-emitting element 4513 having a white luminous color and a coloring layer; and a method of providing a light-emitting element 4513 having a different luminous color in each pixel. The former method has higher productivity than the latter method. On the other hand, in the latter method, it is necessary to form a light-emitting layer 4511 for each pixel, so its productivity is lower than that of the former method. However, in the latter method, a luminous color having a higher color purity than that of the former method can be obtained. By making the light-emitting element 4513 have a microcavity structure in the latter method, the color purity can be further improved.

[0239] The light-emitting layer 4511 may contain an inorganic compound such as quantum dots. For example, by using quantum dots in the light-emitting layer, they can also be used as a light-emitting material.

[0240] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from invading the light-emitting element 4513, a protective layer may be formed on the second electrode layer 4031 and the partition wall 4510. As the protective layer, silicon nitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminum nitride oxide, DLC (Diamond Like Carbon), etc. may be formed. In addition, a filler 4514 is provided and sealed in the space sealed by the first substrate 4001, the second substrate 4006, and the sealant 4005. In this way, in order not to be exposed to the outside air, it is preferable to use a protective film (adhesive film, ultraviolet curing resin film, etc.) with high airtightness and little degassing, and a covering material for packaging (encapsulation).

[0241] As filler 4514, in addition to inert gases such as nitrogen or argon, ultraviolet curing resin or thermosetting resin may be used, for example, PVC (polyvinyl chloride), acrylic resin, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate), etc. Filler 4514 may also contain a desiccant.

[0242] As the sealant 4005, a glass material such as glass frit, a curable resin such as a two-liquid mixed resin that cures at room temperature, a light-curable resin, a thermosetting resin, or other resin material can be used. The sealant 4005 may contain a desiccant.

[0243] In addition, as required, an optical film such as a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate), a phase difference plate (λ / 4 plate, λ / 2 plate), a color filter, etc. may be appropriately disposed on the light emitting surface of the light emitting element. In addition, an anti-reflection film may be disposed on the polarizing plate or the circular polarizing plate. For example, an anti-glare treatment may be performed, which is a treatment for reducing reflected glare by utilizing the surface concavity and convexity to diffuse reflected light.

[0244] By providing a light-emitting element with a microcavity structure, light with high color purity can be extracted. In addition, by combining a microcavity structure with a color filter, reflected glare can be prevented, thereby improving the visibility of the image.

[0245] Regarding the first electrode layer and the second electrode layer (also called pixel electrode layer, common electrode layer, opposing electrode layer, etc.) that apply voltage to the display element, their transmittance and reflectivity can be selected according to the direction of light extraction, the location where the electrode layer is set, and the pattern structure of the electrode layer.

[0246] As the first electrode layer 4030 and the second electrode layer 4031, a light-transmitting conductive material such as indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide added with silicon oxide can be used.

[0247] In addition, the first electrode layer 4030 and the second electrode layer 4031 can be formed using one or more of metals such as tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), their alloys, and their nitrides.

[0248] In addition, the first electrode layer 4030 and the second electrode layer 4031 can be formed using a conductive composition containing a conductive polymer (also called a conductive polymer). As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, or a copolymer composed of two or more of aniline, pyrrole and thiophene or its derivatives can be cited.

[0249] Furthermore, since transistors are easily damaged by static electricity or the like, it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably formed using a nonlinear element.

[0250] Note that Fig.17 As shown in FIG. 1 , a stacked structure in which transistors and capacitors include overlapping regions in the height direction may also be used. For example, by configuring the transistor 4011 and the transistor 4022 constituting the driving circuit in an overlapping manner, a display device with a narrow frame may be realized. In addition, by configuring the transistor 4010, the transistor 4023, the capacitor 4020, etc. constituting the pixel circuit in a manner that partially includes an overlapping region, the aperture ratio and the resolution may be improved. In addition, in Fig.17 Shown in Fig.16A The example of the liquid crystal display device using the stacked structure shown in FIG. Fig. 16B The EL display device shown.

[0251] In addition, in the pixel circuit, a light-transmitting conductive film with high light transmittance to visible light is used as an electrode and wiring, which can increase the light transmittance in the pixel, thereby substantially increasing the aperture ratio. In addition, since the semiconductor layer is also light-transmitting when an OS transistor is used, the aperture ratio is further increased. This is also effective when the transistor does not adopt a stacked structure.

[0252] Furthermore, a liquid crystal display device and a light-emitting device may be combined to form a display device.

[0253] The light emitting device is arranged on the opposite side of the display surface or at the end of the display surface. The light emitting device has the function of supplying light to the display element. The light emitting device is called a backlight.

[0254] Here, the light-emitting device may include a plate-shaped or film-shaped light-guiding portion (also called a light guide plate) and a plurality of light-emitting elements that present light of different colors. By arranging the light-emitting element near the side of the light-guiding portion, light can be emitted from the side of the light-guiding portion to the inside. The light-guiding portion includes a mechanism for changing the light path (also called a light extraction mechanism), whereby the light-emitting device can uniformly irradiate light to the pixel portion of the display panel. Alternatively, a structure in which the light-emitting device is arranged directly under the pixel without providing a light-guiding portion may be adopted.

[0255] The light emitting device preferably includes light emitting elements of three colors, namely red (R), green (G), and blue (B). Furthermore, it may also include a light emitting element of white (W). As these light emitting elements, light emitting diodes (LEDs) are preferably used.

[0256] Furthermore, the light-emitting element preferably has an emission spectrum with a full width at half maximum (FWHM) of 50 nm or less, preferably 40 nm or less, more preferably 30 nm or less, and further preferably 20 nm or less, which is a light-emitting element with extremely high color purity. Note that the full width at half maximum of the emission spectrum is as small as possible, for example, it can be 1 nm or more. Thus, when performing color display, a vivid display with high color reproducibility can be performed.

[0257] In addition, the red light-emitting element preferably uses an element whose peak wavelength of the emission spectrum is within the range of 625nm to 650nm. In addition, the green light-emitting element preferably uses an element whose peak wavelength of the emission spectrum is within the range of 515nm to 540nm. The blue light-emitting element preferably uses an element whose peak wavelength of the emission spectrum is within the range of 445nm to 470nm.

[0258] The display device sequentially flashes the light emitting elements of three colors and drives the pixels synchronously to display colors by using the additive color mixing method. This driving method can also be called field sequential driving.

[0259] Field sequential driving can display bright color images. In addition, smooth dynamic images can be displayed. In addition, by using the above-mentioned driving method, since a pixel does not need to be composed of multiple sub-pixels of different colors, the effective reflection area of ​​a pixel (also called effective display area, aperture ratio) can be expanded, and a bright display can be performed. Furthermore, since a color filter does not need to be set in the pixel, the transmittance of the pixel can be improved, and a brighter display can be performed. In addition, the manufacturing process can be simplified, thereby reducing the manufacturing cost.

[0260] Fig.18A , Fig.18B 4001 is an example of a cross-sectional schematic diagram of a display device capable of field sequential driving. A backlight unit capable of emitting light of each RGB color is provided on one side of the first substrate 4001 of the display device. Note that in field sequential driving, since the light emission of each RGB color is divided into time to display the color, a color filter is not required.

[0261] Fig.18A The backlight unit 4340a shown has a structure in which a plurality of light emitting elements 4342 are arranged directly below the pixel via a diffusion plate 4352. The diffusion plate 4352 has a function of diffusing the light emitted from the light emitting element 4342 to one side of the first substrate 4001 to make the brightness within the display portion uniform. A polarizing plate may be arranged between the light emitting element 4342 and the diffusion plate 4352 as required. In addition, the diffusion plate 4352 may not be arranged if not required. In addition, the light shielding layer 4132 may be omitted.

[0262] The backlight unit 4340a can realize bright display because it can mount more light emitting elements 4342. In addition, since a light guide plate is not required, there is an advantage that the efficiency of light from the light emitting elements 4342 is not easily lost. Note that a lens 4344 for light diffusion may be provided in the light emitting element 4342 as needed.

[0263] Fig.18B The backlight unit 4340b shown has a structure in which a light guide plate 4341 is provided directly below a pixel via a diffuser plate 4352. A plurality of light emitting elements 4342 are provided at the end of the light guide plate 4341. The light guide plate 4341 has a concavo-convex shape on the side opposite to the diffuser plate 4352, so that the guided light can be scattered by the concavo-convex shape and emitted in the direction of the diffuser plate 4352.

[0264] The light emitting element 4342 may be fixed to the printed circuit board 4347. Fig.18BRGB light emitting elements 4342 are shown overlapping each other, but RGB light emitting elements 4342 may be arranged in the depth direction. In addition, a reflective layer 4348 that reflects visible light may be provided on the side surface of the light guide plate 4341 opposite to the light emitting element 4342.

[0265] Since the backlight unit 4340b can reduce the light emitting elements 4342, a low-cost and thin backlight unit can be implemented.

[0266] As the liquid crystal element, a light scattering liquid crystal element may also be used. As the light scattering liquid crystal element, it is preferred to use an element containing a composite material of liquid crystal and polymer. For example, a polymer dispersed liquid crystal element may be used. Alternatively, a polymer network liquid crystal (PNLC (Polymer Network Liquid Crystal)) element may also be used.

[0267] The light scattering type liquid crystal element has a structure in which a liquid crystal portion is provided in a three-dimensional network structure of a resin portion sandwiched between a pair of electrodes. As a material for the liquid crystal portion, for example, a nematic liquid crystal can be used. In addition, as the resin portion, a photocurable resin can be used. The photocurable resin can use, for example, a monofunctional monomer such as acrylate, methacrylate, etc.; a multifunctional monomer such as diacrylate, triacrylate, dimethacrylate, trimethacrylate, etc.; or a polymerizable compound mixed with the above substances.

[0268] The light scattering liquid crystal element utilizes the anisotropy of the refractive index of the liquid crystal material to display by transmitting or scattering light. In addition, the resin part may also have anisotropy of the refractive index. When the liquid crystal molecules are arranged in a certain direction according to the voltage applied to the light scattering liquid crystal element, a direction in which the difference in the refractive index between the liquid crystal part and the resin part becomes smaller is generated, and the light incident along this direction is transmitted without being scattered in the liquid crystal part. Therefore, the light scattering liquid crystal element is viewed as a transparent state from this direction. On the other hand, when the liquid crystal molecules are randomly arranged according to the applied voltage, the difference in the refractive index between the liquid crystal part and the resin part does not change much, so the incident light is scattered by the liquid crystal part. Therefore, the light scattering liquid crystal element becomes an opaque state regardless of the viewing direction.

[0269] Fig.19A Yes Fig.18A The liquid crystal element 4013 of the display device is replaced with a light scattering liquid crystal element 4016. The light scattering liquid crystal element 4016 includes a composite layer 4009 having a liquid crystal portion and a resin portion, a first electrode layer 4030, and a second electrode layer 4031. Fig.18A Similarly, when the light scattering liquid crystal element 4016 is used, an alignment film and a polarizing plate are not required. Note that the spacer 4035 is spherical in shape, but may be columnar in shape.

[0270] Fig.19B Show that Fig.18B The liquid crystal element 4013 of the display device is replaced with a light scattering liquid crystal element 4016. Fig.18B The structure shown is preferably a structure that transmits light when no voltage is applied to the light scattering liquid crystal element 4016 and operates in a mode of scattering light when voltage is applied. By adopting this structure, a transparent display device can be used in a normal state (non-display state). In this case, color display can be performed when the light scattering operation is in progress.

[0271] FIG. 20A to FIG. 20E Show Fig.19B A variation of the display device shown in FIG. FIG. 20A to FIG. 20E In order to facilitate understanding, Fig.19B Some of the constituent elements are included while other constituent elements are omitted.

[0272] Fig. 20A The structure in which the first substrate 4001 is used as a light guide plate is shown. A concave-convex shape may also be provided on the outer surface of the first substrate 4001. In this structure, a light guide plate does not need to be provided separately, so the manufacturing cost can be reduced. In addition, since light attenuation caused by the light guide plate does not occur, the light emitted by the light emitting element 4342 can be efficiently used.

[0273] Fig. 20B The structure in which light is incident from the vicinity of the end of the composite layer 4009 is shown. Light can be emitted to the outside from the light scattering liquid crystal element by utilizing total reflection at the interface between the composite layer 4009 and the second substrate 4006 and at the interface between the composite layer 4009 and the first substrate 4001. A material having a larger refractive index than the first substrate 4001 and the second substrate 4006 is used as the resin portion of the composite layer 4009.

[0274] Note that the light-emitting element 4342 is provided not only on one side of the display device but also on the Fig. 20C As shown, it can also be arranged on two opposite sides. Furthermore, it can also be arranged on three sides or four sides. By arranging the light emitting element 4342 on multiple sides, light attenuation can be compensated, and it can also correspond to a large-area display element.

[0275] Fig.20D 4 shows a structure in which light emitted from a light emitting element 4342 is guided to a display device via a mirror 4345. With this structure, since light can be easily guided to the display device at a certain angle, totally reflected light can be efficiently obtained.

[0276] Fig.20EThe structure of the layer 4003 and the layer 4004 stacked on the composite layer 4009 is shown. One of the layer 4003 and the layer 4004 is a support such as a glass substrate, and the other can be formed of an inorganic film, a cover film or a thin film of an organic resin, etc. A material having a larger refractive index than that of the layer 4004 is used as the resin portion of the composite layer 4009. In addition, a material having a larger refractive index than that of the layer 4003 is used as the layer 4004.

[0277] A first interface is formed between the composite layer 4009 and the layer 4004, and a second interface is formed between the layer 4004 and the layer 4003. With this structure, light that is not totally reflected at the first interface but passes through is totally reflected at the second interface and can return to the composite layer 4009. Therefore, light emitted by the light emitting element 4342 can be efficiently utilized.

[0278] Notice, Fig.19B and FIG. 20A to FIG. 20E The structures can be combined with each other.

[0279] This embodiment mode can be implemented in combination with the configurations described in other embodiment modes and the like as appropriate.

[0280] (Implementation method 3)

[0281] In this embodiment, examples of transistors that can be used instead of the transistors described in the above embodiments are described with reference to drawings.

[0282] The display device of one embodiment of the present invention can be manufactured using various types of transistors such as bottom-gate transistors and top-gate transistors, so that the semiconductor layer material or transistor structure used can be easily replaced in accordance with existing production lines.

[0283] [Bottom-gate transistor]

[0284] Fig.21A1 FIG. 8 is a cross-sectional view of a channel protection transistor 810, which is one of the bottom-gate transistors, in the channel length direction. Fig.21A1 In the embodiment, the transistor 810 is formed on a substrate 771. In addition, the transistor 810 includes an electrode 746 on the substrate 771 via an insulating layer 772. In addition, the semiconductor layer 742 is included on the electrode 746 via an insulating layer 726. The electrode 746 can be used as a gate electrode. The insulating layer 726 can be used as a gate insulating layer.

[0285] In addition, an insulating layer 741 is included on the channel formation region of the semiconductor layer 742. In addition, an electrode 744a and an electrode 744b are included on the insulating layer 726 in a manner of contacting a portion of the semiconductor layer 742. The electrode 744a can be used as one of the source electrode and the drain electrode. The electrode 744b can be used as the other of the source electrode and the drain electrode. A portion of the electrode 744a and a portion of the electrode 744b are formed on the insulating layer 741.

[0286] The insulating layer 741 can be used as a channel protection layer. By providing the insulating layer 741 on the channel formation region, the semiconductor layer 742 can be prevented from being exposed when the electrodes 744a and 744b are formed. Thus, the channel formation region of the semiconductor layer 742 can be prevented from being etched when the electrodes 744a and 744b are formed. According to one embodiment of the present invention, a transistor with good electrical characteristics can be realized.

[0287] In addition, the transistor 810 includes an insulating layer 728 over the electrode 744 a , the electrode 744 b , and the insulating layer 741 , and includes an insulating layer 729 over the insulating layer 728 .

[0288] When an oxide semiconductor is used for the semiconductor layer 742, it is preferable to use a material that can remove oxygen from a portion of the semiconductor layer 742 to generate oxygen vacancies for at least the portion of the electrode 744a and the electrode 744b that is in contact with the semiconductor layer 742. The carrier concentration in the region where the oxygen vacancies are generated in the semiconductor layer 742 increases, and the region is converted to n-type and becomes an n-type region (n + region). Therefore, the region can be used as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 742, an example of a material that can remove oxygen from the semiconductor layer 742 to generate oxygen vacancies can be tungsten, titanium, or the like.

[0289] By forming the source region and the drain region in the semiconductor layer 742, the contact resistance between the electrode 744a and the electrode 744b and the semiconductor layer 742 can be reduced. Therefore, the electrical characteristics of the transistor such as field effect mobility and threshold voltage can be improved.

[0290] When a semiconductor such as silicon is used for the semiconductor layer 742, a layer used as an n-type semiconductor or a p-type semiconductor is preferably provided between the semiconductor layer 742 and the electrode 744a and between the semiconductor layer 742 and the electrode 744b. The layer used as an n-type semiconductor or a p-type semiconductor can be used as a source region or a drain region of a transistor.

[0291] The insulating layer 729 is preferably formed using a material having a function of preventing impurities from being diffused into the transistor from the outside or reducing diffusion of impurities. Alternatively, the insulating layer 729 may be omitted as necessary.

[0292] Fig.21A2The transistor 811 shown in the figure is different from the transistor 810 in that an electrode 723 which can function as a back gate electrode is included over the insulating layer 729. The electrode 723 can be formed using the same material and method as the electrode 746.

[0293] Generally speaking, the back gate electrode is formed using a conductive layer and is arranged in a manner that the channel forming region of the semiconductor layer is clamped by the gate electrode and the back gate electrode. Therefore, the back gate electrode can have the same function as the gate electrode. The potential of the back gate electrode can be equal to that of the gate electrode, or it can be a ground potential (GND potential) or an arbitrary potential. In addition, by independently changing the potential of the back gate electrode without being linked to the gate electrode, the threshold voltage of the transistor can be changed.

[0294] The electrode 746 and the electrode 723 can both be used as gate electrodes. Therefore, the insulating layer 726, the insulating layer 728, and the insulating layer 729 can all be used as gate insulating layers. Alternatively, the electrode 723 may be provided between the insulating layer 728 and the insulating layer 729.

[0295] Note that when one of the electrode 746 and the electrode 723 is referred to as a "gate electrode", the other is referred to as a "back gate electrode". For example, in the transistor 811, when the electrode 723 is referred to as a "gate electrode", the electrode 746 is referred to as a "back gate electrode". In addition, when the electrode 723 is used as a "gate electrode", the transistor 811 is a top gate transistor. In addition, one of the electrode 746 and the electrode 723 is sometimes referred to as a "first gate electrode", and the other is sometimes referred to as a "second gate electrode".

[0296] By providing the electrode 746 and the electrode 723 with the semiconductor layer 742 interposed therebetween and setting the potentials of the electrode 746 and the electrode 723 to be the same, the region through which the carriers flow in the semiconductor layer 742 is further expanded in the film thickness direction, so that the amount of carrier movement increases. As a result, the on-state current of the transistor 811 increases, and the field effect mobility also increases.

[0297] Therefore, transistor 811 is a transistor having a large on-state current relative to the occupied area. That is, the occupied area of ​​transistor 811 can be reduced relative to the required on-state current. According to one embodiment of the present invention, the occupied area of ​​the transistor can be reduced. Therefore, according to one embodiment of the present invention, a semiconductor device with high integration can be realized.

[0298] In addition, since the gate electrode and the back gate electrode are formed using a conductive layer, they have a function of preventing the electric field generated outside the transistor from affecting the semiconductor layer forming the channel (especially the electric field shielding function against static electricity, etc.). In addition, when the back gate electrode is formed larger than the semiconductor layer so as to cover the semiconductor layer with the back gate electrode, the electric field shielding function can be improved.

[0299] In addition, by forming the back gate electrode using a light-shielding conductive film, light can be prevented from entering the semiconductor layer from the back gate electrode side, thereby preventing light degradation of the semiconductor layer and preventing degradation of electrical characteristics such as threshold voltage drift of the transistor.

[0300] According to one embodiment of the present invention, a transistor with high reliability can be realized. In addition, a semiconductor device with high reliability can be realized.

[0301] Fig.21B1 is with Fig.21A1 A cross-sectional view of a channel length direction of a channel protection transistor 820 having a different structure. The transistor 820 has a structure substantially the same as the transistor 810, except that the insulating layer 741 covers the end of the semiconductor layer 742. In the opening formed by selectively removing the portion of the insulating layer 741 overlapping the semiconductor layer 742, the semiconductor layer 742 is electrically connected to the electrode 744a. In addition, in the other openings formed by selectively removing the portion of the insulating layer 741 overlapping the semiconductor layer 742, the semiconductor layer 742 is electrically connected to the electrode 744b. The region of the insulating layer 729 overlapping the channel formation region can be used as a channel protection layer.

[0302] Fig.21B2 The transistor 821 shown is different from the transistor 820 in that an electrode 723 which can be used as a back gate electrode is included on the insulating layer 729 .

[0303] By providing the insulating layer 741, exposure of the semiconductor layer 742 generated when the electrode 744a and the electrode 744b are formed can be prevented. Therefore, the semiconductor layer 742 can be prevented from being thinned when the electrode 744a and the electrode 744b are formed.

[0304] In addition, the distance between the electrode 744a and the electrode 746 and the distance between the electrode 744b and the electrode 746 of the transistor 820 and the transistor 821 are longer than those of the transistor 810 and the transistor 811. Therefore, the parasitic capacitance generated between the electrode 744a and the electrode 746 can be reduced. In addition, the parasitic capacitance generated between the electrode 744b and the electrode 746 can be reduced. According to one embodiment of the present invention, a transistor with good electrical characteristics can be provided.

[0305] Fig.21C1 8 is a cross-sectional view of a channel length direction of a channel-etched transistor 825, which is one of the bottom-gate transistors. In the transistor 825, the electrode 744a and the electrode 744b are formed without using the insulating layer 741. Therefore, a portion of the semiconductor layer 742 exposed when the electrode 744a and the electrode 744b are formed is sometimes etched. On the other hand, since the insulating layer 741 is not provided, the productivity of the transistor can be improved.

[0306] Fig.21C2 The transistor 826 shown is different from the transistor 825 in that an electrode 723 which can function as a back gate electrode is provided over the insulating layer 729 .

[0307] FIG. 22A1 to FIG. 22C2 It is a cross-sectional view of the transistors 810 , 811 , 820 , 821 , 825 , and 826 in the channel width direction.

[0308] exist Fig.22B2 and Fig.22C2 In the structure shown, the gate electrode and the back gate electrode are connected to each other, so that the gate electrode and the back gate electrode have the same potential. In addition, the semiconductor layer 742 is sandwiched between the gate electrode and the back gate electrode.

[0309] The gate electrode and the back gate electrode are longer than the semiconductor layer 742 in the channel width direction, and the entire semiconductor layer 742 is covered by the gate electrode or the back gate electrode with the insulating layers 726 , 741 , 728 , and 729 interposed therebetween.

[0310] With this structure, the semiconductor layer 742 included in the transistor can be electrically surrounded by the electric field of the gate electrode and the back gate electrode.

[0311] A device structure of a transistor such as the transistor 821 or the transistor 826 in which the semiconductor layer 742 forming a channel formation region is electrically surrounded by an electric field between a gate electrode and a back gate electrode can be referred to as a surrounded channel (S-channel) structure.

[0312] By adopting the S-channel structure, an electric field for causing channel formation can be effectively applied to the semiconductor layer 742 using one or both of the gate electrode and the back gate electrode, thereby improving the current driving capability of the transistor, thereby obtaining a higher on-state current characteristic. In addition, since the on-state current can be increased, the transistor can be miniaturized. In addition, by adopting the S-channel structure, the mechanical strength of the transistor can be improved.

[0313] [Top-gate transistor]

[0314] Fig.23A1 The transistor 842 shown is a top-gate transistor. The electrode 744 a and the electrode 744 b are electrically connected to the semiconductor layer 742 through openings formed in the insulating layer 728 and the insulating layer 729 .

[0315] In addition, a portion of the insulating layer 726 that does not overlap with the electrode 746 is removed, and impurities are introduced into the semiconductor layer 742 using the electrode 746 and the remaining insulating layer 726 as a mask, thereby forming an impurity region in the semiconductor layer 742 in a self-aligned manner. The transistor 842 includes a region where the insulating layer 726 extends beyond the end of the electrode 746. The impurity concentration of the region of the semiconductor layer 742 into which the impurities are introduced through the insulating layer 726 is lower than that of the region into which the impurities are not introduced through the insulating layer 726. Therefore, an LDD (Lightly Doped Drain) region is formed in the region of the semiconductor layer 742 that overlaps with the insulating layer 726 and does not overlap with the electrode 746.

[0316] Fig.23A2 The transistor 843 shown is different from the transistor 842 in that it includes an electrode 723. The transistor 843 includes an electrode 723 formed on a substrate 771. The electrode 723 has a region overlapping with the semiconductor layer 742 via an insulating layer 772. The electrode 723 can be used as a back gate electrode.

[0317] In addition, if Fig.23B1 The transistor 844 and Figure 23B2 As in the transistor 845 shown in FIG. 8 , the insulating layer 726 in the region not overlapping with the electrode 746 may be completely removed. Fig.23C1 The transistor 846 and Fig.23C2 As in the transistor 847 shown in the figure, the insulating layer 726 does not need to be removed.

[0318] In transistors 842 to 847, after forming electrode 746, impurities may be introduced into semiconductor layer 742 using electrode 746 as a mask, thereby forming an impurity region in semiconductor layer 742 in a self-aligned manner. According to one embodiment of the present invention, a transistor with good electrical characteristics can be realized. In addition, according to one embodiment of the present invention, a semiconductor device with high integration can be realized.

[0319] FIG. 24A1 to FIG. 24C2 It is a cross-sectional view of transistors 842 , 843 , 844 , 845 , 846 , and 847 in the channel width direction.

[0320] The transistor 843, the transistor 845, and the transistor 847 have the above-mentioned S-channel structure. However, the present invention is not limited to this, and the transistor 843, the transistor 845, and the transistor 847 may not have the S-channel structure.

[0321] This embodiment mode can be implemented in combination with the configurations described in other embodiment modes and the like as appropriate.

[0322] (Implementation 4)

[0323] Electronic devices that can use the display device of one embodiment of the present invention include display devices, personal computers, image storage devices and image reproduction devices with recording media, mobile phones, game consoles including portable game consoles, portable data terminals, electronic book readers, photographing devices such as video cameras or digital cameras, goggle-type displays (head-mounted displays), navigation systems, audio reproduction devices (car audio systems, digital audio players, etc.), copiers, fax machines, printers, multifunction printers, automated teller machines (ATMs), and vending machines, etc. Specific examples of these electronic devices are shown in FIG25 .

[0324] Fig.25A The digital camera includes a housing 961, a shutter button 962, a microphone 963, a speaker 967, a display portion 965, operation keys 966, a zoom button 968, a lens 969, and the like. By using the display device of one embodiment of the present invention for the display portion 965, various images can be displayed.

[0325] Fig.25B This is a digital signage including a large display unit 922. For example, it is attached to the side of a pillar 921. By using the display device of one embodiment of the present invention for the display unit 922, a high-quality display can be performed.

[0326] Fig.25C The mobile phone is an example of a mobile phone, including a housing 951, a display unit 952, an operation button 953, an external connection port 954, a speaker 955, a microphone 956, a camera 957, etc. The mobile phone includes a touch sensor in the display unit 952. By touching the display unit 952 with a finger or a stylus pen, all operations such as making a call or inputting text can be performed. In addition, the housing 951 and the display unit 952 are flexible and can be used in a bent manner as shown in the figure. By using a display device of one embodiment of the present invention for the display unit 952, various images can be displayed.

[0327] Fig.25D The video camera includes a first housing 901, a second housing 902, a display unit 903, operation keys 904, a lens 905, a connection unit 906, a speaker 907, and the like. The operation keys 904 and the lens 905 are provided in the first housing 901, and the display unit 903 is provided in the second housing 902. By using the display device of one embodiment of the present invention for the display unit 903, various images can be displayed.

[0328] Fig.25EThe television set includes a housing 971, a display portion 973, operation keys 974, a speaker 975, a communication connection terminal 976, and a photoelectric sensor 977. The display portion 973 is provided with a touch sensor to enable input operations. By using the display device of one embodiment of the present invention for the display portion 973, various images can be displayed.

[0329] Fig.25F This is a portable data terminal including a housing 911, a display unit 912, a speaker 913, a camera 919, etc. Data can be input or output by using a touch screen included in the display unit 912. By using the display device of one embodiment of the present invention for the display unit 912, various images can be displayed.

[0330] This embodiment mode can be implemented in combination with the configurations described in other embodiment modes and the like as appropriate.

[0331] [Explanation of symbols]

[0332] 10: Pixel, 11: Circuit, 11a: Circuit, 11b: Circuit, 12: Source driver, 12a: Source driver, 12b: Source driver, 13: Gate driver, 15: Display area, 16: Selection circuit, 101: Transistor, 102: Transistor, 103: Transistor, 104: Capacitor, 105: Transistor, 106: Capacitor, 110: Circuit block, 111: Transistor, 112: Transistor, 113: Capacitor, 114: Light emitting element, 115: Transistor, 116: Capacitor, 117: Liquid crystal element, 118: Transistor, 119: Transistor, 120: Circuit, 121: Wiring, 121a: Wiring, 121b: Wiring, 122: Wiring, 1 22a: wiring, 122b: wiring, 123: wiring, 124: wiring, 125: wiring, 127: wiring, 128: wiring, 129: wiring, 130: wiring, 131: wiring, 132: wiring, 133: wiring, 134: wiring, 135: wiring, 136: pixel pitch, 138: wiring, 215: display unit, 221a: scanning line driving circuit, 231a: signal line driving circuit, 232a: signal line driving circuit, 241a: common line driving circuit, 723: electrode, 724a: electrode, 724b: electrode, 726: insulating layer, 728: insulating layer, 729: insulating layer, 741: insulating layer, 742: semiconductor layer, 744a: electrode, 74 4b: electrode, 746: electrode, 771: substrate, 772: insulating layer, 810: transistor, 811: transistor, 820: transistor, 821: transistor, 825: transistor, 826: transistor, 842: transistor, 843: transistor, 844: transistor, 845: transistor, 846: transistor, 847: transistor, 901: housing, 902: housing, 903: display unit, 904: operation key, 905: lens, 906: connection unit, 907: speaker, 911: housing, 912: display unit, 913: speaker, 919: camera, 921: pillar, 922: display unit, 951: housing, 952: display unit, 953: operation button, 95 4: external connection port, 955: speaker, 956: microphone, 957: camera, 961: housing, 962: shutter button, 963: microphone, 965: display unit, 966: operation key, 967: speaker, 968: zoom button, 969: lens, 971: housing, 973: display unit, 974: operation key, 975: speaker, 976: communication connection terminal, 977: photoelectric sensor, 4001: substrate, 4003: layer, 4004: layer, 4005: sealant, 4006: substrate, 4008: liquid crystal layer, 4009: composite layer, 4010: transistor, 4011: transistor, 4013: liquid crystal element, 4014: wiring, 4015: electrode,4016: light scattering liquid crystal element, 4017: electrode, 4018: FPC, 4019: anisotropic conductive layer, 4020: capacitor, 4021: electrode, 4022: transistor, 4023: transistor, 4030: electrode layer, 4031: electrode layer, 4032: insulating layer, 4033: insulating layer, 4035: spacer, 4041: printed circuit board, 4042: integrated circuit, 4102: insulating layer, 4103: insulating layer, 4104: insulating layer, 4110: insulating layer, 4111: insulating layer, 4112: insulating layer, 4131: coloring layer, 4132: light shielding layer, 4133: insulating layer, 4200: input device, 4210: touch screen, 4227: electrode, 4228: electrode, 4237: wiring, 4238: wiring, 4239: wiring, 4263: substrate, 4272b: FPC, 4273b: IC, 4340a: backlight unit, 4340b: backlight unit, 4341: light guide plate, 4342: light emitting element, 4344: lens, 4345: mirror, 4347: printed circuit board, 4348: reflection layer, 4352: diffusion plate, 4510: partition wall, 4511: light emitting layer, 4513: light emitting element, 4514: filler.

Claims

1. A display device, comprising: A first circuit includes a first transistor, a second transistor, a third transistor and a first capacitor; as well as a pixel including a fourth transistor, The first transistor, the second transistor and the third transistor are arranged outside the display area. The first capacitor and the pixel are arranged inside the display area, The first circuit is configured to generate third data by performing an addition operation on the first data and the second data, The pixels are configured to display according to the third data, One of the source and the drain of the first transistor is electrically connected to one of the source and the drain of the fourth transistor and one electrode of the first capacitor, The other electrode of the first capacitor is electrically connected to one of the source and the drain of the second transistor and one of the source and the drain of the third transistor, the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the second transistor, Furthermore, the first capacitor includes a plurality of second capacitors, and the plurality of second capacitors are connected in parallel.

2. The display device according to claim 1, wherein The pixel comprises a second circuit, The second circuit includes a display element, Furthermore, the other of the source and the drain of the fourth transistor is electrically connected to the second circuit.

3. The display device according to claim 1, wherein The pixel comprises a second circuit, The second circuit includes a fifth transistor, a third capacitor and a light emitting element, The other of the source and the drain of the fourth transistor is electrically connected to the gate of the fifth transistor and one electrode of the third capacitor, Furthermore, one of a source and a drain of the fifth transistor is electrically connected to the light emitting element.

4. The display device according to claim 1, wherein The pixel comprises a second circuit, The second circuit includes a fifth transistor, a third capacitor, a light emitting element and a sixth transistor. The other of the source and the drain of the fourth transistor is electrically connected to the gate of the fifth transistor and one electrode of the third capacitor, One of the source and the drain of the fifth transistor is electrically connected to one of the source and the drain of the sixth transistor, Furthermore, the other of the source and the drain of the sixth transistor is electrically connected to the light emitting element.

5. The display device according to claim 1, wherein The pixel includes a liquid crystal element, Furthermore, the other of the source and the drain of the fourth transistor is electrically connected to the liquid crystal element.

6. The display device according to claim 1, wherein The first transistor, the second transistor, the third transistor, and the fourth transistor each include a metal oxide in a channel formation region.

7. The display device according to claim 1, wherein A channel width of each of the first transistor, the second transistor, and the third transistor is larger than a channel width of the fourth transistor.

8. A display device, comprising: A first circuit includes a first transistor, a second transistor, a third transistor and a first capacitor; as well as a pixel including a fourth transistor, The first transistor, the second transistor and the third transistor are arranged outside the display area. The first capacitor and the pixel are arranged inside the display area, The first circuit is configured to generate third data by performing an addition operation on the first data and the second data, The pixels are configured to display according to the third data, One of the source and the drain of the first transistor is electrically connected to one of the source and the drain of the fourth transistor and one electrode of the first capacitor, The other electrode of the first capacitor is electrically connected to one of the source and the drain of the second transistor and one of the source and the drain of the third transistor, Furthermore, the other of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the second transistor.

9. The display device according to claim 8, wherein The pixel includes a light emitting element or a liquid crystal element.

10. The display device according to claim 8, wherein The first transistor includes a metal oxide in a channel formation region.

11. An electronic device comprising the display device according to claim 1 or 8.

Images