Semiconductor packaging structure and preparation method thereof

By designing a multi-layer package in the laminated packaging structure, using the thermally conductive adhesive layer and the thermal conduction lead to conduct heat to the heat dissipation layer, the problem of poor heat dissipation in the laminated packaging structure is solved, and rapid heat dissipation and performance improvement are achieved.

CN112185908BActive Publication Date: 2025-05-09SJ SEMICONDUCTOR (JIANGYIN) CORP
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Patent Information

Application Number
CN201910600122.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-07-04
Publication Date
2025-05-09
Estimated Expiration
2039-07-04

AI Technical Summary

Technical Problem

The existing stacked package structure has poor heat dissipation effect and leads to device warping and deformation and performance degradation.

Method used

A semiconductor package structure is designed, including a multi-layer package, each package includes a chip, a thermally conductive adhesive layer, a thermally conductive lead and a heat dissipation layer, through which the heat conduction leads of the chip to the heat dissipation layer to achieve rapid heat dissipation.

Benefits of technology

It effectively improves the heat dissipation performance of the stacked package structure, prevents device warping caused by poor heat dissipation, and improves the overall performance of the semiconductor package structure.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The present invention provides a semiconductor packaging structure and a preparation method thereof. The semiconductor packaging structure comprises: a first packaging body, the first packaging body comprises a first packaging substrate, a first chip, a first plastic sealing layer, a first thermally conductive adhesive layer, a first thermally conductive lead and a first heat dissipation layer; a second packaging body, located above the first packaging body, the second packaging body comprises a second packaging substrate, a second chip, a second plastic sealing layer, a second thermally conductive adhesive layer, a second thermally conductive lead and a second heat dissipation layer; a third packaging body, located above the second packaging body; the third packaging body comprises a third packaging substrate, a third chip and a third plastic sealing layer. The semiconductor packaging structure of the present invention sets a heat dissipation layer on the periphery of the chip located in the middle of the stacked packaging structure to improve the heat dissipation of the stacked packaging structure, and at the same time conducts the heat emitted by the chip to the heat dissipation layer through the thermally conductive lead, which helps to quickly dissipate the heat of the chip, can prevent device warping caused by poor heat dissipation, and helps to improve device performance.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a semiconductor packaging structure and a preparation method thereof. Background Art

[0002] With the rapid development of electronic information technology and the continuous improvement of people's consumption level, the functions of individual electronic devices are becoming increasingly diversified and their sizes are becoming increasingly miniaturized. As a result, the density of chips and functional components in the internal structure of electronic devices is increasing, while the critical dimension (i.e., line width) of the devices is becoming smaller and smaller. This poses a great challenge to the semiconductor packaging industry.

[0003] In order to meet the increasing needs of device integration, various packaging technologies have emerged one after another. Among them, package-on-package (PoP) technology has attracted much attention. As the name suggests, stacked packaging is to stack multiple chips up and down for packaging. Currently, the maximum number of stacking levels can reach more than 8 layers. However, while stacked packaging helps to improve the integration of packaged devices, there are also many problems that need to be solved, especially the heat dissipation problem. Since stacked packaging packages multiple chips together, the chips, especially the chips located in the middle of the packaging structure, and the wires between the chips release a lot of heat during operation. If this heat cannot be dissipated in time, it will not only cause the device to warp and deform, but also cause the performance of the device to decline or even completely fail, and may even cause the device to short-circuit, resulting in serious production accidents. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a semiconductor packaging structure and a preparation method thereof, so as to solve the problems of poor heat dissipation effect of the stacked packaging structure in the prior art, resulting in device warping and performance degradation.

[0005] To achieve the above-mentioned purpose and other related purposes, the present invention provides a semiconductor packaging structure, which comprises: a first packaging body, wherein the first packaging body comprises a first packaging substrate, a first chip, a first plastic sealing layer, a first thermally conductive adhesive layer, a first thermally conductive lead and a first heat dissipation layer; the first chip is bonded to the upper surface of the first packaging substrate; the first plastic sealing layer is located on the upper surface of the first packaging substrate and the first chip, and plastic seals the first chip; the first thermally conductive adhesive layer is located on the side wall of the first plastic sealing layer; the first thermally conductive lead is located in the first plastic sealing layer, and the two ends are respectively connected to the first chip and the first thermally conductive adhesive layer; the first heat dissipation layer is located on the side wall surface of the first thermally conductive adhesive layer away from the first plastic sealing layer; a second packaging body is located above the first packaging body; the second packaging body comprises a second packaging substrate, a second chip, a second plastic sealing layer, a second thermally conductive adhesive layer, a second thermally conductive lead and A second heat dissipation layer; the second packaging substrate is located above the first plastic packaging layer; the second chip is bonded to the upper surface of the second packaging substrate; the second plastic packaging layer is located on the upper surfaces of the second packaging substrate and the second chip, and plastic-seales the second chip; the second thermal conductive adhesive layer is located on the side wall of the second plastic packaging layer; the second thermal conductive lead is located in the second plastic packaging layer, and its two ends are respectively connected to the second chip and the second thermal conductive adhesive layer; the second heat dissipation layer is located on the side wall surface of the second thermal conductive adhesive layer away from the second plastic packaging layer; a third packaging body is located above the second packaging body; the third packaging body includes a third packaging substrate, a third chip and a third plastic packaging layer; the third packaging substrate is located above the second plastic packaging layer; the third chip is bonded to the upper surface of the third packaging substrate; the third plastic packaging layer is located on the upper surfaces of the third packaging substrate and the third chip, and plastic-seales the third chip.

[0006] Optionally, the first chip is bonded to the upper surface of the first packaging substrate via a first bonding wire, and the second chip is bonded to the upper surface of the second packaging substrate via a second bonding wire, and the materials of the first bonding wire, the second bonding wire, the first thermal conductive wire and the second thermal conductive wire are all the same.

[0007] Optionally, the first thermally conductive adhesive layer is in contact with the second thermally conductive adhesive layer, and the first heat dissipation layer is in contact with the second heat dissipation layer.

[0008] Optionally, the semiconductor package structure further includes a plurality of electrical connection structures, and the plurality of electrical connection structures are distributed in the first plastic packaging layer and the second plastic packaging layer to electrically connect the first package body, the second package body and the third package body.

[0009] Optionally, the semiconductor packaging structure also includes a third thermally conductive adhesive layer, a third thermally conductive lead and a third heat dissipation layer; the third thermally conductive adhesive layer is located on the upper surface of the third plastic sealing layer; the third thermally conductive lead is located in the third plastic sealing layer, and its two ends are respectively connected to the third chip and the third thermally conductive adhesive layer; the third heat dissipation layer is located on the surface of the third thermally conductive adhesive layer away from the third plastic sealing layer.

[0010] Optionally, the third heat dissipation layer extends downward along the side wall of the third thermal conductive adhesive layer until it contacts the second heat dissipation layer.

[0011] The present invention also provides a method for preparing a semiconductor packaging structure, the method for preparing a semiconductor packaging structure comprising the following steps:

[0012] A first package is formed, wherein the first package comprises a first package substrate, a first chip, a first plastic layer, a first heat-conducting lead, a first heat-conducting adhesive layer and a first heat dissipation layer; the first chip is bonded to the upper surface of the first package substrate; the first plastic layer is located on the upper surface of the first package substrate and the first chip, and plastic-seales the first chip; the first heat-conducting adhesive layer is located on the side wall of the first plastic layer; the first heat-conducting lead is located in the first plastic layer, and the two ends are respectively connected to the first chip and the first heat-conducting adhesive layer; the first heat dissipation layer is located on the side wall surface of the first heat-conducting adhesive layer away from the first plastic layer;

[0013] A second package is formed, wherein the second package includes a second package substrate, a second chip, a second plastic layer, a second heat-conducting lead, a second heat-conducting adhesive layer and a second heat dissipation layer; the second chip is bonded to the upper surface of the second package substrate; the second plastic layer is located on the upper surface of the second package substrate and the second chip, and plastic-seales the second chip; the second heat-conducting adhesive layer is located on the side wall of the second plastic layer; the second heat-conducting lead is located in the second plastic layer, and the two ends are respectively connected to the second chip and the second heat-conducting adhesive layer; the second heat dissipation layer is located on the side wall surface of the second heat-conducting adhesive layer away from the second plastic layer;

[0014] Bonding the first package body and the second package body, wherein the upper surface of the first plastic packaging layer of the first package body and the lower surface of the second package substrate of the second package body are bonding surfaces;

[0015] The structure obtained after bonding is bonded to a third packaging body; the third packaging body includes a third packaging substrate, a third chip and a third plastic packaging layer, the third chip is bonded to the upper surface of the third plastic packaging layer, the third plastic packaging layer is located on the upper surfaces of the third packaging substrate and the third chip, and plastic-seales the third chip; the lower surface of the third packaging substrate and the upper surface of the second plastic packaging layer are bonding surfaces.

[0016] Optionally, the process of forming the first package body includes:

[0017] Providing the first packaging substrate, bonding the first chip to the upper surface of the first packaging substrate through a first bonding wire, and forming the first thermal conductive wire, wherein one end of the first thermal conductive wire is connected to the first chip, and the other end extends to be bonded to the surface of the first packaging substrate, the maximum height of the first thermal conductive wire is greater than the height of the first bonding wire, and the bonding point between the first thermal conductive wire and the first packaging substrate is located at the end of the first bonding wire away from the first chip;

[0018] Forming the first plastic encapsulation layer on the upper surfaces of the first packaging substrate, the first chip, the first thermal conductive wire and the first bonding wire, wherein the first plastic encapsulation layer plastic encapsulates the first chip, the first thermal conductive wire and the first bonding wire;

[0019] removing a portion where the first heat-conducting wire and the first packaging substrate are joined so that an end of the first heat-conducting wire away from the first chip is exposed to a sidewall surface of the first plastic packaging layer;

[0020] Forming the first thermally conductive adhesive layer on the side wall surface of the first plastic packaging layer, wherein the first thermally conductive adhesive layer is in contact with the first thermally conductive lead;

[0021] The first heat dissipation layer is formed on the side wall surface of the first thermal conductive adhesive layer.

[0022] Optionally, the process of forming the second package body includes:

[0023] Providing the second packaging substrate, bonding the second chip to the upper surface of the second packaging substrate through a second bonding wire, and forming a second thermal conductive wire, wherein one end of the second thermal conductive wire is connected to the second chip, and the other end extends to be bonded to the surface of the second packaging substrate, the maximum height of the second thermal conductive wire is greater than the height of the second bonding wire, and the bonding point between the second thermal conductive wire and the second packaging substrate is located at the end of the second bonding wire away from the second chip;

[0024] Forming the second plastic encapsulation layer on the upper surfaces of the second packaging substrate, the second chip, the second heat conductive wire and the second bonding wire, wherein the second plastic encapsulation layer plastic encapsulates the second chip, the second heat conductive wire and the second bonding wire;

[0025] removing a portion where the second heat-conducting lead and the second packaging substrate are joined so that an end of the second heat-conducting lead away from the second chip is exposed to a side wall surface of the second plastic packaging layer;

[0026] Forming the second thermally conductive adhesive layer on the side wall surface of the second plastic packaging layer, wherein the second thermally conductive adhesive layer is in contact with the second thermally conductive lead;

[0027] The second heat dissipation layer is formed on the side wall surface of the second thermal conductive adhesive layer.

[0028] Optionally, the method for preparing the semiconductor packaging structure also includes the steps of forming a first electrical connection structure in the first plastic packaging layer after forming the first packaging body, and forming a second electrical connection structure in the second plastic packaging layer after forming the second packaging body, and the first electrical connection structure and the second electrical connection structure are electrically connected during the process of bonding the first packaging body and the second packaging body.

[0029] Optionally, the method for preparing the semiconductor packaging structure further includes the step of sequentially forming a third thermal conductive adhesive layer and a third heat dissipation layer on the upper surface of the third plastic packaging layer.

[0030] As described above, the semiconductor packaging structure and the preparation method thereof of the present invention have the following beneficial effects: the semiconductor packaging structure of the present invention sets a heat dissipation layer around the chip located in the middle of the stacked packaging structure to improve the heat dissipation of the stacked packaging structure, and at the same time conducts the heat emitted by the chip to the heat dissipation layer through the heat conductive wire, which helps to quickly dissipate the heat of the chip, prevents device warping caused by poor heat dissipation, and helps to improve the performance of the semiconductor packaging structure. The preparation method of the present invention can significantly improve the performance of the prepared semiconductor packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1a to Figure 1c Shown is a schematic cross-sectional structure diagram of a semiconductor package structure according to a first embodiment of the present invention.

[0032] Figure 2a and Figure 2b It is a schematic cross-sectional structure diagram of a semiconductor package structure according to a second embodiment of the present invention.

[0033] Figure 3 Shown is a flow chart of a method for preparing a semiconductor packaging structure according to a third embodiment of the present invention.

[0034] Figures 4 to 8It is a schematic cross-sectional view of a structure obtained by each step of forming a first package body according to a preparation method of the third embodiment of the present invention.

[0035] Component number description

[0036] 1. First package

[0037] 11. First packaging substrate

[0038] 12 First Chip

[0039] 13. First plastic layer

[0040] 14. First thermal conductive adhesive layer

[0041] 15 First thermal lead

[0042] 16. First heat dissipation layer

[0043] 17 first electrical connection structure

[0044] 18 First Bond Wire

[0045] 2 Second package

[0046] 21. Second packaging substrate

[0047] 22 Second chip

[0048] 23 Second plastic sealing layer

[0049] 24 Second thermal conductive adhesive layer

[0050] 25 Second thermal conductor

[0051] 26 Second heat dissipation layer

[0052] 27 Second electrical connection structure

[0053] 28 Second bonding wire

[0054] 3 Third package

[0055] 31 Third packaging substrate

[0056] 32 Third chip

[0057] 33 The third plastic sealing layer

[0058] 34 Third thermal conductive adhesive layer

[0059] 35 Third thermal lead

[0060] 36 Third heat dissipation layer

[0061] 37 Third electrical connection structure

[0062] 38 Third bonding wire

[0063] 4 Solder ball bumps

[0064] 5 Bottom Fill Layer

[0065] Steps S1 to S4 DETAILED DESCRIPTION

[0066] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0067] Please refer to Figures 1 to Figure 8 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner. Although the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation, the form, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the component layout may also be more complicated. In addition, the "upper" and "lower" in this embodiment do not have a strict limiting meaning but are only for the convenience of description.

[0068] Embodiment 1

[0069] like Figure 1a to Figure 1cAs shown, the present invention provides a semiconductor packaging structure, the semiconductor packaging structure comprising: a first packaging body 1, the first packaging body 1 comprising a first packaging substrate 11, a first chip 12, a first plastic sealing layer 13, a first thermal conductive adhesive layer 14, a first thermal conductive lead 15 and a first heat dissipation layer 16; the first chip 12 is bonded to the upper surface of the first packaging substrate 11; the first plastic sealing layer 13 is located on the upper surface of the first packaging substrate 11 and the first chip 12, and plastic seals the first chip 12; the first thermal conductive adhesive layer 14 is located on the upper surface of the first packaging substrate 11 and the first chip 12 The first heat-conducting lead 15 is located in the first plastic sealing layer 13, and the two ends are respectively connected to the first chip 12 and the first heat-conducting adhesive layer 14; the first heat dissipation layer 16 is located on the side wall surface of the first heat-conducting adhesive layer 14 away from the first plastic sealing layer 13; the second package body 2 is located above the first package body 1; the second package body 2 includes a second package substrate 21, a second chip 22, a second plastic sealing layer 23, a second heat-conducting adhesive layer 24, a second heat-conducting lead 25 and a second heat dissipation layer 26; The second packaging substrate 21 is located above the first plastic packaging layer 13; the second chip 22 is bonded to the upper surface of the second packaging substrate 21; the second plastic packaging layer 23 is located on the upper surfaces of the second packaging substrate 21 and the second chip 22, and the second chip 22 is plastic-sealed; the second thermal conductive adhesive layer 24 is located on the side wall of the second plastic packaging layer 23; the second thermal conductive lead 25 is located in the second plastic packaging layer 23, and the two ends are respectively connected to the second chip 22 and the second thermal conductive adhesive layer 24; the second heat dissipation layer 26 is located on the side wall surface of the second thermal conductive adhesive layer 24 away from the second plastic packaging layer 23; the third packaging body 3 is located above the second packaging body 2; the third packaging body 3 includes a third packaging substrate 31, a third chip 32 and a third plastic packaging layer 33; the third packaging substrate 31 is located above the second plastic packaging layer 23; the third chip 32 is bonded to the upper surface of the third packaging substrate 31; the third plastic packaging layer 33 is located on the upper surfaces of the third packaging substrate 31 and the third chip 32, and the third chip 32 is plastic-sealed. The semiconductor packaging structure of the present invention sets a heat dissipation layer on the periphery of the chip located in the middle of the stacked packaging structure to improve the heat dissipation of the stacked packaging structure. At the same time, the heat emitted by the chip is conducted to the heat dissipation layer through the thermal conductive wire, which helps to quickly dissipate the heat of the chip, prevents device warping caused by poor heat dissipation, and helps to improve the performance of the semiconductor packaging structure.

[0070] The material of the first packaging substrate 11 can be non-metallic materials such as silicon, glass, silicon oxide, ceramics, polymers, etc. according to different needs, or it can be a metal material such as copper (such as a lead frame made of copper), or it can be a composite material of two or more kinds (such as a PCB board or a flexible circuit board). Its shape can be round, square or any other required shape, and its surface area is based on the ability to support subsequent structures. In this embodiment, for the needs of subsequent packaging, the surface area of ​​the first packaging substrate 11 is greater than the surface area of ​​the first chip 12, for example, the surface area of ​​the first packaging substrate 11 is 1.1 to 2 times the surface area of ​​the first chip 12.

[0071] The first chip 12, the second chip 22 and the third chip 32 may include various active or passive components, and the number may be one or more. When there are multiple chips in the same package, the multiple chips may be stacked up and down or spaced apart on the same plane. In this embodiment, as an example, the first chip 12 is bonded to the upper surface of the first package substrate 11 through the first bonding wire 18, that is, the two ends of the first bonding wire 18 are respectively connected to the first package substrate 11 and the first chip 12, and the surface of the first chip 12 may be provided with a connecting pad (not shown) connected to the first bonding wire 18. The material of the first bonding wire 18 is preferably gold wire, because the gold wire not only has good conductivity and oxidation resistance, but also has very good ductility and easy balling, so it helps to improve the performance of the semiconductor packaging structure. Of course, in other examples, according to different needs, the first chip 12 can also be fixed to the surface of the first package substrate 11 in other ways, such as soldering to the surface of the first package substrate 11 through a pad.

[0072] As an example, the material of the first plastic sealing layer 13 may include but is not limited to one or more materials such as polyimide, silicone or epoxy resin. The first plastic sealing layer 13 preferably completely covers the upper surface of the first packaging substrate 11.

[0073] In one example, the first bonding wire 18 and the first heat conductive wire 15 are made of the same material, such as gold wire, so that the first heat conductive wire 15 can be formed in the same process as the first bonding wire 18, which is conducive to the simplification of the preparation process. Of course, in other examples, the first heat conductive wire 15 can also be other metal wires with good thermal conductivity, such as copper wire, aluminum wire and copper alloy wire, etc., which are not strictly limited in this embodiment. The heat generated by the first chip 12 can be quickly transferred to the first thermal conductive adhesive layer 14 through the first heat conductive wire 15 and finally dissipated through the first heat dissipation layer 16. The number of the first heat conductive wire 15 and the first bonding wire 18 is preferably multiple, such as 2 or more, and the 2 or more first heat conductive wires 15 are preferably located on multiple sides of the first chip 12, such as symmetrically distributed on both sides of the first chip 12, so as to guide the heat dissipation of the first chip 12 through multiple directions, realize uniform heat dissipation of the first chip 12, and improve the performance of the semiconductor packaging structure.

[0074] Insulating thermally conductive adhesives, such as silicone, are usually used in conventional semiconductor packaging structures. In this embodiment, the first thermally conductive adhesive layer 14 is preferably made of a conductive material, such as a conductive silver adhesive layer, so that the first heat dissipation layer 16 is grounded through the first thermally conductive adhesive layer 14, so that the first heat dissipation layer 16 can not only achieve the heat dissipation function, but also play the role of electromagnetic shielding, thereby improving the performance of the semiconductor packaging structure.

[0075] The first heat dissipation layer 16 can be made of any material with good heat dissipation performance. In this embodiment, as an example, the first heat dissipation layer 16 includes a metal main layer and a coating layer located on the surface of the metal main layer; the metal main layer can be a copper layer, an aluminum layer, a stainless steel layer, a copper alloy layer or a composite layer of multiple metal layers, and the coating layer can be a nickel layer, a chromium layer or other coatings with good rust and oxidation resistance; the coating layer is used to protect the metal main layer to prevent the metal main layer from being oxidized and / or corroded, which may cause a decrease in heat dissipation performance, thereby ensuring the heat dissipation performance of the first heat dissipation layer 16. The surface area of ​​the first heat dissipation layer 16 is generally not less than the surface area of ​​the side wall of the first plastic sealing layer 13, and the first heat dissipation layer 16 can be a customized one-piece structure to completely cover the side wall of the first plastic sealing layer 13. The side wall surface of the first heat dissipation layer 16 away from the first plastic packaging layer 13 may have a non-flat surface structure, such as a concave-convex structure, a corrugated structure or other arbitrary irregular shapes, so as to increase the surface area of ​​the first heat dissipation layer 16. At the same time, the non-flat surface structure is set to avoid the expansion deformation and stress of the first heat dissipation layer 16 when heated, thereby ensuring the performance of the semiconductor packaging structure.

[0076] As an example, the second chip 22 is bonded to the upper surface of the second packaging substrate 21 through the second bonding wire 28, and the third chip 32 is bonded to the upper surface of the third packaging substrate 31 through the third bonding wire 38; the material of the second packaging substrate 21 and the third packaging substrate 31 can be the same as that of the first packaging substrate 11, and the material of the second bonding wire 28, the third bonding wire 38 and the second thermal conductive wire 25 is preferably the same and preferably the same as the material of the first bonding wire 18 and the first thermal conductive wire 15, for example, they are all gold wires, and the number is preferably 2 or more, preferably distributed in multiple directions of the corresponding chip, such as symmetrically distributed on both sides of the corresponding chip, so as to improve the electrical balance and heat dissipation uniformity of the semiconductor packaging structure.

[0077] The material and structure of the second packaging substrate 21 are preferably the same as those of the first packaging substrate 11; the material and structure of the second heat dissipation layer 26 and the first heat dissipation layer 16 are preferably the same, for example, they are both composite layers of a metal main layer and a coating layer and have a non-flat surface structure; the material and structure of the second thermal conductive adhesive layer 24 and the first thermal conductive adhesive layer 14 are preferably the same, for example, they are both conductive silver adhesive layers; the material and structure of the second plastic sealing layer 23 and the third plastic sealing layer 33 are preferably the same as those of the first plastic sealing layer 13, for example, they are both one or more of materials such as polyimide, silicone or epoxy resin. Please refer to the above content for more detailed description, which will not be repeated for the purpose of brevity.

[0078] As an example, the semiconductor packaging structure also includes a third thermally conductive adhesive layer 34, a third thermally conductive lead 35 and a third heat dissipation layer 36; the third thermally conductive adhesive layer 34 is located on the upper surface of the third plastic sealing layer 33; the third thermally conductive lead 35 is located in the third plastic sealing layer 33, and its two ends are respectively connected to the third chip 32 and the third thermally conductive adhesive layer 34; the third heat dissipation layer 36 is located on the surface of the third thermally conductive adhesive layer 34 away from the third plastic sealing layer 33; the third thermally conductive lead 35 is preferably made of the same material as the third bonding lead 38, the material of the third thermally conductive adhesive layer 34 is preferably the same as the material of the first thermally conductive adhesive layer 14 and the second thermally conductive adhesive layer 24, and the material of the third heat dissipation layer 36 is preferably the same as the material of the first heat dissipation layer 16 and the second heat dissipation layer 26.

[0079] As an example, the semiconductor package structure further includes a plurality of electrical connection structures, such as a first electrical connection structure 17 distributed in the first plastic package layer 13 and a second electrical connection structure 27 distributed in the second plastic package layer 23, so as to electrically connect the first package body 1, the second package body 2 and the third package body 3. Figure 1aAs shown, the first electrical connection structure 17 and the second electrical connection structure 27 can be conductive plugs, which are located in the corresponding plastic packaging layer, then the first package body 1 can be attached to the second package body 2, that is, the second package body 2 is located on the upper surface of the first package body 1; the second package body 2 can be attached to the third package body 3, that is, the third package body 3 is located on the upper surface of the second package body 2; according to different structures, such as different materials of the first package substrate 11, the second package substrate 21 and the third package substrate 31, the first electrical connection structure 17 can extend downward from the first plastic packaging layer 13 until it penetrates the first package substrate 11, and the second electrical connection structure 27 can extend downward from the second plastic packaging layer 23 until it penetrates the second package substrate 21 to electrically connect the first package body 1 and the second package body 2; the third package substrate 31 can be provided with a third electrical connection structure 37 to electrically connect with the second electrical connection structure 27. This electrical connection structure design helps to improve the stability of the semiconductor package structure and is conducive to its further miniaturization.

[0080] like Figure 1b As shown, in another example, the electrical connection structure may include a metal solder ball (not shown) located between two adjacent packages in addition to the conductive plug, and the metal solder ball and the conductive plug are connected to achieve electrical connection between multiple packages, and there may be gaps between adjacent packages, and the connected packages are electrically connected through the metal solder ball. This electrical connection structure design helps to align different packages when bonding them.

[0081] like Figure 1c As shown, in another example, the electrical connection structure also includes a conductive plug and a metal solder ball, which is different from Figure 1b Yes, Figure 1b The metal solder balls in the embodiment are located in the gap between two adjacent packages, while the metal solder balls in this embodiment are located in the plastic layer of the package, for example, the metal solder balls between the first package 1 and the second package 2 are located in the first plastic layer 13 of the first package 1 and exposed to the top surface of the first plastic layer 13; the metal solder balls between the second package 2 and the third package 3 are located in the second plastic layer 23 and exposed to the top surface of the second plastic layer 23; the second package 2 is located on the upper surface of the first package 1, and the third package 3 is located on the upper surface of the second package 2; this structural setting not only helps with bonding alignment, but also helps with the stability and miniaturization of the structure. Of course, this structure is relatively complicated in preparation, for example, after the corresponding metal solder balls are formed in the corresponding plastic layer, the surface needs to be flattened to make the corresponding metal solder balls flush with the corresponding plastic layer upper surface.

[0082] As an example, the semiconductor packaging structure also has a solder ball bump 4, which is located on the lower surface of the first packaging substrate 11 (i.e., the side opposite to the surface where the first chip 12 is located) and is electrically connected to the electrical connection structure, and the material of the solder ball bump 4 may include at least one of copper and tin; and the solder ball bump 4 can also be connected to the first packaging substrate 11 through a solder pad (not shown); the solder ball bump 4 is preferably multiple, and the multiple solder ball bumps 4 are distributed at intervals to electrically lead out the semiconductor packaging structure.

[0083] As an example, the semiconductor packaging structure also has a bottom filling layer 5, which is located on the lower surface of the first packaging substrate 11 and partially covers the solder ball bump 4, and the lower surface of the solder ball bump 4 protrudes outward from the surface of the bottom filling layer 5; the material of the bottom filling layer 5 may include but is not limited to one or more of polyimide, silicone and epoxy resin, and the process of forming the bottom filling layer 5 may include but is not limited to one or more of inkjet process, dispensing process, compression molding process, transfer molding process, liquid sealing molding process, vacuum lamination process or spin coating process; the bottom filling layer 5 can protect the solder ball bump 4 and at the same time play a buffering and protective role for the semiconductor packaging structure.

[0084] The semiconductor packaging structure of the present invention can significantly improve its heat dissipation performance, thereby avoiding device warping caused by poor heat dissipation and improving the electrical performance of the semiconductor packaging structure.

[0085] Embodiment 2

[0086] like Figure 2a and Figure 2bAs shown, the present invention also provides another semiconductor packaging structure. The difference between the semiconductor packaging structure of this embodiment and the semiconductor packaging structure of the first embodiment is that: in the semiconductor packaging structure of the first embodiment, the first thermally conductive adhesive layer 14 and the second thermally conductive adhesive layer 24 are spaced apart from each other, and the first heat dissipation layer 16 and the second heat dissipation layer 26 are spaced apart from each other. The problem is that each structural layer lacks support from other structures and may collapse in the event of an accidental impact, thereby affecting the performance of the device. In this embodiment, as an example, the first thermally conductive adhesive layer 14 is in contact with the second thermally conductive adhesive layer 24, and the first heat dissipation layer 16 is in contact with the second heat dissipation layer 26, that is, the second heat dissipation layer 26 can extend downward to contact with the first heat dissipation layer 16, and the second thermally conductive adhesive layer 24 can extend downward to contact with the first thermally conductive adhesive layer 14; or the first thermally conductive adhesive layer 14 and the second heat dissipation layer 16 are in contact with each other. The thermal adhesive layer 24 can be an integral structure, but it is divided into two parts according to its different positions; the first heat dissipation layer 16 and the second heat dissipation layer 26 can be an integral structure, but they are divided into two parts according to their different positions; in a further example, the third thermally conductive adhesive layer 34 can extend downward along the side wall of the third plastic sealing layer 33 to contact the second thermally conductive adhesive layer 24, and the third heat dissipation layer 36 can extend downward along the side wall of the third thermally conductive adhesive layer 34 to contact the second heat dissipation layer 26; the bottom filling layer 5 can also extend to the side wall of the first packaging substrate 11 to contact the first thermally conductive adhesive layer 14 and the first heat dissipation layer 16, or the first heat dissipation layer 16 and the first thermally conductive adhesive layer 14 can extend downward to the side wall surface of the first packaging substrate 11 until they contact the bottom filling layer 5. Through such a design, the semiconductor packaging structure is made more stable. In addition, the other parts of the semiconductor packaging structure of this embodiment are the same as the semiconductor packaging structure in the first embodiment. Please refer to the above content for details, and it will not be repeated for the purpose of simplicity.

[0087] Embodiment 3

[0088] like Figure 3 As shown, the present invention also provides a method for preparing a semiconductor packaging structure, and the method for preparing the semiconductor packaging structure can be used to prepare the semiconductor packaging structure as described in Example 1, so the aforementioned introduction to the semiconductor packaging structure is completely applicable here, and for the purpose of brevity, the same content is not repeated as much as possible; similarly, the content mentioned in this preparation method is also completely applicable to the aforementioned semiconductor packaging structure.

[0089] The method for preparing the semiconductor packaging structure comprises the following steps:

[0090] S1: forming a first package body 1, wherein the first package body 1 comprises a first package substrate 11, a first chip 12, a first plastic sealing layer 13, a first heat-conducting lead 15, a first heat-conducting adhesive layer 14 and a first heat dissipation layer 16; the first chip 12 is bonded to the upper surface of the first package substrate 11; the first plastic sealing layer 13 is located on the upper surfaces of the first package substrate 11 and the first chip 12, and plastic seals the first chip 12; the first heat-conducting adhesive layer 14 is located on the side wall of the first plastic sealing layer 13; the first heat-conducting lead 15 is located in the first plastic sealing layer 13, and the two ends are respectively connected to the first chip 12 and the first heat-conducting adhesive layer 14; the first heat dissipation layer 16 is located on the side wall surface of the first heat-conducting adhesive layer 14 away from the first plastic sealing layer 13;

[0091] S1: forming a second package body 2, wherein the second package body 2 comprises a second package substrate 21, a second chip 22, a second plastic sealing layer 23, a second heat-conducting lead 25, a second heat-conducting adhesive layer 24 and a second heat dissipation layer 26; the second chip 22 is bonded to the upper surface of the second package substrate 21; the second plastic sealing layer 23 is located on the upper surfaces of the second package substrate 21 and the second chip 22, and plastic seals the second chip 22; the second heat-conducting adhesive layer 24 is located on the side wall of the second plastic sealing layer 23; the second heat-conducting lead 25 is located in the second plastic sealing layer 23, and the two ends are respectively connected to the second chip 22 and the second heat-conducting adhesive layer 24; the second heat dissipation layer 26 is located on the side wall surface of the second heat-conducting adhesive layer 24 away from the second plastic sealing layer 23;

[0092] S1: Bonding the first package body 1 and the second package body 2, wherein the upper surface of the first plastic packaging layer 13 of the first package body 1 and the lower surface of the second package substrate 21 of the second package body 2 are bonding surfaces;

[0093] S1: Bonding the structure obtained after bonding to the third packaging body 3; the third packaging body 3 includes a third packaging substrate 31, a third chip 32 and a third plastic sealing layer 33, the third chip 32 is bonded to the upper surface of the third plastic sealing layer 33, the third plastic sealing layer 33 is located on the upper surfaces of the third packaging substrate 31 and the third chip 32, and the third chip 32 is plastic-sealed; the lower surface of the third packaging substrate 31 and the upper surface of the second plastic sealing layer 23 are bonding surfaces.

[0094] The materials of the first packaging substrate 11, the second packaging substrate 21 and the third packaging substrate 31 can be selected according to different needs, for example, they can be non-metallic materials such as silicon, glass, silicon oxide, ceramics, polymers, etc., or metal materials such as copper, or more than two composite materials. The shape can be round, square or any other required shape, and the surface area is based on the ability to support subsequent structures. In this embodiment, for subsequent packaging needs, the surface area of ​​the first packaging substrate 11, the second packaging substrate 21 and the third packaging substrate 31 is greater than the surface area of ​​the corresponding chip, such as 1.1 to 2 times the surface area of ​​the corresponding chip. In this embodiment, the chip is bonded to the corresponding packaging substrate by wire bonding, that is, by the corresponding bonding wire. Of course, in other examples, the chip can be soldered to the corresponding packaging substrate by die bonding, which is not strictly limited in this embodiment.

[0095] As an example, the process of forming the thermal conductive wire is also through the wire bonding process. The thermal conductive wire and the corresponding bonding wire in the same package are preferably formed in the same process, and the material of the thermal conductive wire and the bonding wire is preferably the same, such as gold wire; therefore, the bonding wire and the thermal conductive wire in the same package can be formed simultaneously without changing equipment and materials, which helps to simplify the preparation process.

[0096] The materials of the first plastic encapsulation layer 13, the second plastic encapsulation layer 23 and the third plastic encapsulation layer 33 may include but are not limited to one or more of polyimide, silicone and epoxy resin, and the process of forming the plastic encapsulation layer may include but is not limited to one or more of inkjet process, dispensing process, compression molding process, transfer molding process, liquid sealing molding process, vacuum lamination process or spin coating process. The thickness of the third plastic encapsulation layer 33 may be greater than the thickness of the first plastic encapsulation layer 13 and the thickness of the second plastic encapsulation layer 23, so as to form a buffer protection for the semiconductor packaging structure.

[0097] The first thermally conductive adhesive layer 14, the second thermally conductive adhesive layer 24 and the third thermally conductive adhesive layer 34 can be insulating material layers, such as silicone layers; but in this embodiment, the first thermally conductive adhesive layer 14, the second thermally conductive adhesive layer 24 and the third thermally conductive adhesive layer 34 are preferably material layers with conductive functions, such as conductive silver adhesive layers, so that the heat dissipation layer located in the same package body can be grounded through the corresponding thermally conductive adhesive layer, so that the heat dissipation layer can not only achieve the heat dissipation function, but also play the role of electromagnetic shielding, thereby improving the performance of the semiconductor packaging structure; the process of forming the thermally conductive adhesive layer may include but is not limited to one or more of inkjet process, dispensing process, compression molding process, transfer molding process, liquid sealing molding process, vacuum lamination process or spin coating process; in this embodiment, inkjet or dispensing process is preferred, so that it is easier to flexibly adjust the thickness and shape of the thermally conductive adhesive layer according to the conditions of different packages. In particular, in the process of forming the third thermally conductive adhesive layer 34, the third thermally conductive adhesive layer 34 having a non-flat surface structure can be formed by an inkjet or dispensing process, and then the third heat dissipation layer 36 having a non-flat surface structure can be formed by physical vapor deposition or electroplating process, so that the third heat dissipation layer 36 has a larger heat dissipation surface area, which can avoid deformation caused by thermal expansion and / or adverse effects caused by stress; at the same time, the third thermally conductive adhesive layer 34 and the third heat dissipation layer 36 can be more closely attached.

[0098] Of course, in other examples, the third heat dissipation layer 36 can also be a pre-customized heat sink, and the heat sink is attached to the third thermally conductive adhesive layer 34 to form the third heat dissipation layer 36. This is not strictly limited in this embodiment, and the surface area of ​​the heat sink is preferably slightly larger than the surface area of ​​the third thermally conductive adhesive layer 34. Therefore, after the heat sink is attached to the third thermally conductive adhesive layer 34, the edge of the heat sink can be bent downward along the side wall of the third thermally conductive adhesive layer 34 until it covers part of the side wall of the third plastic sealing layer 33, so that the heat sink and the third thermally conductive adhesive layer 34 are attached more tightly and firmly, and provide a heat dissipation channel on the side of the semiconductor packaging structure, further improving the performance of the semiconductor packaging structure. The first heat dissipation layer 16 and the second heat dissipation layer 26 are preferably customized metal heat sinks, such as heat sinks with a square hollow frame structure, so as to completely cover the periphery of the first thermally conductive adhesive layer 14 and the second thermally conductive adhesive layer 24 respectively, and provide a circumferential and all-round heat dissipation channel for the corresponding package body, thereby improving the performance of the semiconductor packaging structure.

[0099] As an example, the process of forming the first package body 1 includes: providing the first package substrate 11, bonding the first chip 12 to the upper surface of the first package substrate 11 through the first bonding wire 18, and forming the first thermal conductive wire 15, wherein one end of the first thermal conductive wire 15 is connected to the first chip 12, and the other end extends to be bonded to the surface of the first package substrate 11, the maximum height of the first thermal conductive wire 15 is greater than the height of the first bonding wire 18, and the bonding point of the first thermal conductive wire 15 and the first package substrate 11 is located at the end of the first bonding wire 18 away from the first chip 12, as shown in FIG. Figure 4 As shown; the first plastic sealing layer 13 is formed on the upper surface of the first packaging substrate 11, the first chip 12, the first thermal conductive wire 15 and the first bonding wire 18, and the first plastic sealing layer 13 plastic seals the first chip 12, the first thermal conductive wire 15 and the first bonding wire 18, as shown in FIG. Figure 5 As shown; the portion where the first heat-conducting lead 15 and the first packaging substrate 11 are joined is removed (such as the area shown in the dotted box in 5) so that the end of the first heat-conducting lead 15 away from the first chip 12 is exposed to the side wall surface of the first plastic packaging layer 13, and the obtained structure is as shown Figure 6 As shown; the first thermal conductive adhesive layer 14 is formed on the side wall surface of the first plastic sealing layer 13, and the first thermal conductive adhesive layer 14 is in contact with the first thermal conductive lead 15; the first heat dissipation layer 16 is formed on the side wall surface of the first thermal conductive adhesive layer 14, and the obtained structure is as shown Figure 7 and Figure 8 As shown, Figure 7 is a schematic diagram of the cross-sectional structure. Figure 8 It is a schematic diagram of the structure from a top view.

[0100] It should be particularly noted that, although the process of forming the first package body 1 is divided into multiple steps for the sake of ease of description, there is no strict distinction between the steps and no restrictions on the order of sequence. For example, the step of forming the first thermal conductive wire 15 and the step of bonding the first chip 12 to the upper surface of the first package substrate 11 can be completed simultaneously in the same process, or the bonding of the first chip 12 can be completed first and then the first thermal conductive wire 15 is formed; or the first thermal conductive wire 15 can be formed first and then the first chip 12 is bonded to the first package substrate 11. What is important is to design according to the different processes selected for each step. In this embodiment, as an example, the first chip 12 is bonded to the upper surface of the first packaging substrate 11 through the first bonding wire 18, and the first thermal conductive wire 15 and the first bonding wire 18 are formed in the same process. Therefore, in the process of bonding the first chip 12 to the upper surface of the first packaging substrate 11, that is, in the process of forming the first bonding wire 18, the first thermal conductive wire 15 is also formed on the surface of the first chip 12. The first thermal conductive wire 15 extends from the surface of the first chip 12 to the surface of the first packaging substrate 11, that is, one end of the first thermal conductive wire 15 is bonded to the first chip 12. , the other end is joined to the first packaging substrate 11; the maximum height of the first thermal conductive wire 15 is greater than the height of the first bonding wire 18 and the joining point of the first thermal conductive wire 15 and the first packaging substrate 11 is located at the periphery of the joining point of the first bonding wire 18 and the first chip 12 (that is, one end away from the first chip 12), and the first plastic sealing layer 13 completely seals the first chip 12, the first bonding wire 18 and the first thermal conductive wire 15 in the subsequent plastic sealing process, and the portion where the first thermal conductive wire 15 and the first packaging substrate 11 are joined is removed after the first plastic sealing layer 13 is formed (that is, the first thermal conductive wire 15 and the first packaging substrate 11 are removed). Figure 5 The area marked by the dotted box is removed), and the following is obtained: Figure 6 The first package body 1 shown can also be planarized if necessary to further miniaturize the semiconductor package structure.

[0101] In this embodiment, the junction points between the first heat conducting wire 15 and the first packaging substrate 11 are distributed on both sides of the first packaging substrate 11 (eg Figure 4), so when removing the joint part later, two removal processes (such as cutting process) are required. The purpose of this is to form the first thermal conductive wire 15 located in multiple directions, which is helpful for uniform heat dissipation of the first package body 1 and avoids performance degradation caused by poor local heat dissipation. If the first heat dissipation layer 16 has customized specifications, the joint point of the first thermal conductive wire 15 and the first package substrate 11 is preferably set in advance, such as setting a joint point mark on the first package substrate 11 in advance (while considering the thickness of the first thermal conductive adhesive layer 14), to ensure that the size of the package structure after cutting off the joint point matches the first heat dissipation layer 16.

[0102] As an example, the preparation method of the semiconductor packaging structure also includes forming a first electrical connection structure 17 in the first plastic packaging layer 13 after forming the first packaging body 1, such as using an etching process (such as laser etching) to etch a through hole in the first plastic packaging layer 13, and then filling the through hole with metal by electroplating or physical vapor deposition process to form the first electrical connection structure 17. The first electrical connection structure 17 can penetrate the first packaging substrate 11 to realize the electrical lead-out of the first package body 1, and the through hole can have a larger top opening to facilitate metal filling. At the same time, a metal solder ball can be formed in the top opening of the through hole to ensure sufficient electrical connection with the second package body 2 in the future. This step can be completed before forming the first heat dissipation layer 16, or after forming the first heat dissipation layer 16. In this embodiment, it is preferably completed before forming the first heat dissipation layer 16, more specifically, before removing the junction between the first bonding wire 18 and the first package substrate 11, so that in the process of forming a through hole in the first plastic encapsulation layer 13, the uncut portion can provide good protection for other structures (for example, the uncut first plastic encapsulation layer 13 can disperse the stress in the process of forming the through hole, reducing the possibility of cracks or even collapse of the first plastic encapsulation layer 13 in the process of forming the through hole). In addition, as needed, after forming the first electrical connection structure 17, surface flattening can be performed to make the upper surface of the first electrical connection structure 17 flush with the upper surface of the first plastic encapsulation layer 13 and ensure that the upper surface of the first electrical connection structure 17 is exposed to the upper surface of the first plastic encapsulation layer 13. The flattening treatment is conducive to the subsequent tighter bonding of the first package body 10 and the second package body 20.

[0103] As an example, the process of forming the second package body 2 can be completely the same as the process of forming the first package body 1, for example, specifically comprising: providing the second package substrate 21, bonding the second chip 22 to the upper surface of the second package substrate 21 through the second bonding wire 28, and forming the second heat conductive wire 25, wherein one end of the second heat conductive wire 25 is connected to the second chip 22, and the other end extends to be bonded to the surface of the second package substrate 21, the maximum height of the second heat conductive wire 25 is greater than the height of the second bonding wire 28, and the bonding point of the second heat conductive wire 25 and the second package substrate 21 is located at the end of the second bonding wire 28 away from the second chip 22; The second plastic sealing layer 23 is formed on the upper surface of the substrate 21, the second chip 22, the second thermal conductive wire 25 and the second bonding wire 28, and the second plastic sealing layer 23 plastic seals the second chip 22, the second thermal conductive wire 25 and the second bonding wire 28; the portion where the second thermal conductive wire 25 and the second packaging substrate 21 are joined is removed so that one end of the second thermal conductive wire 25 away from the second chip 22 is exposed to the side wall surface of the second plastic sealing layer 23; the second thermal conductive adhesive layer 24 is formed on the side wall surface of the second plastic sealing layer 23, and the second thermal conductive adhesive layer 24 is in contact with the second thermal conductive wire 25; and the second heat dissipation layer 26 is formed on the side wall surface of the second thermal conductive adhesive layer 24. Please refer to the above content for more details, which will not be described for the purpose of brevity. After forming the second package body 2, a second electrical connection structure 27 can be formed in the second plastic layer 23. The second electrical connection structure 27 can also penetrate the second package substrate 21. The formation process of the second electrical connection structure 27 can refer to the formation process of the first electrical connection structure 17, and it is preferably completed before the junction between the second bonding wire 28 and the second package substrate 21 is removed; the first electrical connection structure 17 and the second electrical connection structure are electrically connected during the bonding process of the first package body 1 and the second package body 2. And if necessary, a flattening treatment can also be performed after forming the second electrical connection structure 27 so that the upper surface of the second electrical connection 27 is flush with the upper surface of the second plastic layer 23.

[0104] As an example, the preparation method of the semiconductor packaging structure also includes the steps of sequentially forming a third thermal conductive adhesive layer 34 and a third heat dissipation layer 36 on the upper surface of the third plastic sealing layer 33, the third chip 32 is bonded to the upper surface of the third packaging substrate 31 through a third bonding wire 38, and in the process of bonding the third chip 32 to the upper surface of the third packaging substrate 31 through the third bonding wire 38, it also includes the step of forming a third thermal conductive wire 35, the third thermal conductive wire 35 is plastic-sealed by the third plastic sealing layer 33 and extends upward along the third plastic sealing layer 33, one end of the third thermal conductive wire 35 is exposed to the surface of the third plastic sealing layer 33 and contacts with the third thermal conductive adhesive layer 34 formed subsequently. The process may refer to the aforementioned content. For example, in the process of bonding the third chip 32 to the upper surface of the third packaging substrate 31 through the third bonding wire 38, the third thermal conductive wire 35 having a maximum height greater than the height of the third bonding wire 38 is formed, and the junction point between the third thermal conductive wire 35 and the third packaging substrate 31 is located at the periphery of the junction point between the third bonding wire 38 and the third packaging substrate 31 (i.e., away from one end of the third chip 32). Then, the third plastic encapsulation layer 33 is formed to complete the plastic encapsulation of the third chip 32, the third bonding wire 38 and the third thermal conductive wire 35. After that, the junction part between the third thermal conductive wire 35 and the third packaging substrate 31 is removed by a cutting process, and one end of the third thermal conductive wire 35 is exposed to the surface of the third plastic encapsulation layer 33 by a flattening process. The process for forming the third thermally conductive adhesive layer 34 is preferably an inkjet and dispensing process so as to form the third conductive adhesive layer having a non-flat surface structure. The third thermally conductive adhesive layer 34 is preferably a conductive silver paste. The third heat dissipation layer 36 can be a composite structure including a metal main layer and a coating layer located on the surface of the metal main layer, or it can be a graphene layer. The surface of the third heat dissipation layer 36 preferably has a non-flat surface structure to increase the heat dissipation area and avoid problems such as device deformation and stress caused by thermal expansion.

[0105] As an example, the method for preparing the semiconductor packaging structure further includes the step of forming a bottom filling layer 5 on the lower surface of the first packaging substrate 11; the material of the bottom filling layer 5 may include but is not limited to one or more of polyimide, silicone and epoxy resin, and the step of forming the bottom filling layer 5 includes but is not limited to one or more of inkjet process, dispensing process, compression molding process, transfer molding process, liquid sealing molding process, vacuum lamination process or spin coating process. The bottom filling layer 5 can also extend along the side wall of the first packaging substrate 11 until it contacts the first thermal conductive adhesive layer 14 and the first heat dissipation layer 16 to support the first heat dissipation layer 16 and the first thermal conductive adhesive layer 14, thereby enhancing the stability of the semiconductor packaging structure.

[0106] As an example, the preparation method further includes the step of forming a solder ball bump 4 after forming the bottom filling layer 5, such as forming a through hole in the bottom filling layer 5 to expose the first electrical connection structure 17, and then depositing metal in the formed through hole by physical vapor deposition or electroplating to form the solder ball bump 4, the solder ball bump 4 is electrically connected to the first packaging substrate 11 (such as correspondingly connected to the first electrical connection structure 17 that passes through the first packaging substrate 11) and is partially covered by the bottom filling layer 5, that is, the solder ball bump 4 protrudes outward from the surface of the bottom filling layer 5, and the solder ball bump 4 is used to electrically lead out the semiconductor packaging structure, and its material includes but is not limited to one or more of copper or tin; the bottom filling layer 5 can form good protection for the solder ball bump 4 and the first chip 12. The structure finally prepared by the preparation method of this embodiment is shown in Figure 1.

[0107] It should be noted that the formation order of the above steps is not strictly limited. For example, the first package body 1, the second package body 2 and the third package body 3 can be formed simultaneously in different devices, or can be formed successively in the same device, and the third package body 3 can be bonded to the second package body 2 first and then bonded to the first package body 1; the bottom filling layer 5 and the solder ball bump 4 can be formed after the bonding of the three packages is completed, or the solder ball bump 4 and the bottom filling layer 5 can be formed at the bottom of the first package body 1 and then bonded to the second package body 2 or to the structure after the second package body 2 and the third package body 3 are bonded. This is not strictly limited in this embodiment.

[0108] Embodiment 4

[0109] The present embodiment provides another method for preparing a semiconductor packaging structure, and the preparation method of the present embodiment can be used to prepare the semiconductor packaging structure in the second embodiment; the main difference between the preparation method of the semiconductor packaging structure in the present embodiment and the third embodiment is that: in the third embodiment, in the process of forming the first packaging body 1, after the bonding portion between the first heat-conducting lead 15 and the first packaging substrate 11 is removed, the first heat-conducting adhesive layer 14 and the first heat dissipation layer 16 are formed on the side wall of the first plastic packaging layer 13; in the process of forming the second packaging body 2, after the bonding portion between the second heat-conducting lead 25 and the second packaging substrate 21 is removed, the second heat-conducting adhesive layer 24 and the second heat dissipation layer 26 are formed on the side wall of the second plastic packaging layer 23, and then the first packaging body 1 and the third packaging body 3 are bonded; while in the present embodiment, in the process of forming the first packaging body 1, after the bonding portion between the first heat-conducting lead 15 and the second packaging substrate 21 is removed, the second heat-conducting adhesive layer 24 and the second heat dissipation layer 26 are formed on the side wall of the second plastic packaging layer 23. After the bonding portion with the first packaging substrate 11 is removed, the first thermally conductive adhesive layer 14 and the first heat dissipation layer 16 are not formed first; in the formation process of the second packaging body 2, after the bonding portion with the second thermally conductive lead 25 and the second packaging substrate 21 is removed, the second thermally conductive adhesive layer 24 and the second heat dissipation layer 26 are not formed first, but the first thermally conductive adhesive layer 14, the second thermally conductive adhesive layer 24, the first heat dissipation layer 16, and the second heat dissipation layer 26 are sequentially formed on the side walls of the first plastic sealing layer 13 and the second plastic sealing layer 23 after the two packaging bodies are bonded; the first thermally conductive adhesive layer 14 and the second thermally conductive adhesive layer 24 can be independent structures in contact with each other or can be a continuous integrated structure, and the first heat dissipation layer 16 and the second heat dissipation layer 26 can be independent structures in contact with each other or can be a continuous integrated structure. Through such an arrangement, the preparation process can be simplified and at the same time it helps to improve the stability of the semiconductor packaging structure.

[0110] In another example, during the formation of the first package body 1, after the joining portion between the first thermally conductive lead 15 and the first package substrate 11 is removed, the first thermally conductive adhesive layer 14 and the first heat dissipation layer 16 are not formed first; during the formation of the second package body 2, after the joining portion between the second thermally conductive lead 25 and the second package substrate 21 is removed, the second thermally conductive adhesive layer 24 and the second heat dissipation layer 26 are not formed first, but the three package body prototypes without thermally conductive adhesive layers and heat dissipation layers are first bonded, and then the first thermally conductive adhesive layer 14, the second thermally conductive adhesive layer 24, the third thermally conductive adhesive layer 34, the first heat dissipation layer 16, the second heat dissipation layer 26 and the third heat dissipation layer 36 are formed in sequence; or the third thermally conductive adhesive layer 34 is formed on the surface of the third plastic sealing layer 33, and the third thermally conductive adhesive layer 34 extends downward from the side wall of the third plastic sealing layer 33 to the second plastic sealing layer 23 and the first plastic sealing layer 13 The side wall of the first package substrate 11 can also be extended to the side wall of the first package substrate 11. In this case, the first thermal conductive adhesive layer 14, the second thermal conductive adhesive layer 24, and the third thermal conductive adhesive layer 34 are actually an integrated structure, but they are distinguished and defined according to their different locations for the sake of clarity and uniformity of description. Then, the third heat dissipation layer 36 is formed on the surface of the third thermal conductive adhesive layer 34. The third heat dissipation layer 36 extends downward along the side wall of the third thermal conductive adhesive layer 34 to the side wall of the second thermal conductive adhesive layer 24 and the first thermal conductive adhesive layer 14, that is, the third heat dissipation layer 36 and the second heat dissipation layer 26 and the first heat dissipation layer 16 can also be an integrated structure, but they are distinguished and defined according to their different locations for the sake of clarity and uniformity of description. Such a setting is conducive to further stabilization of the semiconductor package structure, and at the same time provides the semiconductor package structure with a more comprehensive heat dissipation channel, which helps to improve the performance of the semiconductor package structure. In addition, the preparation method of this embodiment is basically the same as the preparation method of the third embodiment, such as the material selection and formation process of each structural layer are the same. Please refer to the above content for details, and it will not be repeated for the purpose of brevity.

[0111] In summary, the present invention provides a semiconductor packaging structure and a preparation method thereof. The semiconductor packaging structure comprises: a first packaging body, the first packaging body comprises a first packaging substrate, a first chip, a first plastic sealing layer, a first thermally conductive adhesive layer, a first thermally conductive lead and a first heat dissipation layer; the first chip is bonded to the upper surface of the first packaging substrate; the first plastic sealing layer is located on the upper surface of the first packaging substrate and the first chip, and plastic seals the first chip; the first thermally conductive adhesive layer is located on the side wall of the first plastic sealing layer; the first thermally conductive lead is located in the first plastic sealing layer, and the two ends are respectively connected to the first chip and the first thermally conductive adhesive layer; the first heat dissipation layer is located on the side wall surface of the first thermally conductive adhesive layer away from the first plastic sealing layer; a second packaging body, located above the first packaging body; the second packaging body comprises a second packaging substrate, a second chip, a second plastic sealing layer, a second thermally conductive adhesive layer, a second thermally conductive lead and a second heat dissipation layer; the second packaging substrate is located The semiconductor packaging structure of the present invention is provided with a heat dissipation layer around the chip located in the middle of the stacked packaging structure to improve the heat dissipation of the stacked packaging structure, and at the same time, the heat dissipated by the chip is conducted to the heat dissipation layer through the heat conductive lead, which is helpful for the rapid heat dissipation of the chip, and can prevent the device from warping due to poor heat dissipation, and help improve the performance of the semiconductor packaging structure.

[0112] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A semiconductor packaging structure, characterized in that: The semiconductor packaging structure comprises: A first package body, the first package body comprising a first package substrate, a first chip, a first plastic sealing layer, a first thermal conductive adhesive layer, a first thermal conductive lead and a first heat dissipation layer; the first chip is bonded to the upper surface of the first package substrate through a first bonding wire; the first plastic sealing layer is located on the upper surface of the first package substrate and the first chip, and plastic seals the first chip; the first thermal conductive adhesive layer is located on the side wall of the first plastic sealing layer; the first thermal conductive lead is located in the first plastic sealing layer, and the two ends are respectively connected to the first chip and the first thermal conductive adhesive layer; the first heat dissipation layer is located on the side wall surface of the first thermal conductive adhesive layer away from the first plastic sealing layer; A second package body is located above the first package body; the second package body includes a second package substrate, a second chip, a second plastic layer, a second thermal conductive adhesive layer, a second thermal conductive lead and a second heat dissipation layer; the second package substrate is located above the first plastic layer; the second chip is bonded to the upper surface of the second package substrate through a second bonding wire; the second plastic layer is located on the upper surface of the second package substrate and the second chip, and plastic-seales the second chip; the second thermal conductive adhesive layer is located on the side wall of the second plastic layer; the second thermal conductive lead is located in the second plastic layer, and the two ends are respectively connected to the second chip and the second thermal conductive adhesive layer; the second heat dissipation layer is located on the side wall surface of the second thermal conductive adhesive layer away from the second plastic layer; the first thermal conductive adhesive layer is in contact with the second thermal conductive adhesive layer, and the first heat dissipation layer is in contact with the second heat dissipation layer; The third packaging body is located above the second packaging body; the third packaging body includes a third packaging substrate, a third chip and a third plastic packaging layer; the third packaging substrate is located above the second plastic packaging layer; the third chip is bonded to the upper surface of the third packaging substrate; the third plastic packaging layer is located on the upper surfaces of the third packaging substrate and the third chip, and plastic-seales the third chip.

2. The semiconductor package structure according to claim 1, wherein: The first bonding wire, the second bonding wire, the first thermal conductive wire and the second thermal conductive wire are all made of the same material.

3. The semiconductor package structure according to claim 1, wherein: The semiconductor package structure further includes a plurality of electrical connection structures, which are distributed in the first plastic packaging layer and the second plastic packaging layer to electrically connect the first package body, the second package body and the third package body.

4. The semiconductor package structure according to any one of claims 1 to 3, characterized in that: The semiconductor packaging structure also includes a third thermally conductive adhesive layer, a third thermally conductive lead and a third heat dissipation layer; the third thermally conductive adhesive layer is located on the upper surface of the third plastic sealing layer; the third thermally conductive lead is located in the third plastic sealing layer, and its two ends are respectively connected to the third chip and the third thermally conductive adhesive layer; the third heat dissipation layer is located on the surface of the third thermally conductive adhesive layer away from the third plastic sealing layer.

5. The semiconductor package structure according to claim 4, wherein: The third heat dissipation layer extends downward along the side wall of the third thermal conductive adhesive layer until it contacts the second heat dissipation layer.

6. A method for preparing a semiconductor packaging structure, characterized in that: The method for preparing the semiconductor packaging structure comprises the following steps: A first package is formed, wherein the first package comprises a first package substrate, a first chip, a first plastic layer, a first heat-conducting lead, a first heat-conducting adhesive layer and a first heat dissipation layer; the first chip is bonded to the upper surface of the first package substrate; the first plastic layer is located on the upper surface of the first package substrate and the first chip, and plastic-seales the first chip; the first heat-conducting adhesive layer is located on the side wall of the first plastic layer; the first heat-conducting lead is located in the first plastic layer, and the two ends are respectively connected to the first chip and the first heat-conducting adhesive layer; the first heat dissipation layer is located on the side wall surface of the first heat-conducting adhesive layer away from the first plastic layer; A second package is formed, wherein the second package includes a second package substrate, a second chip, a second plastic layer, a second heat-conducting lead, a second heat-conducting adhesive layer and a second heat dissipation layer; the second chip is bonded to the upper surface of the second package substrate; the second plastic layer is located on the upper surface of the second package substrate and the second chip, and plastic-seales the second chip; the second heat-conducting adhesive layer is located on the side wall of the second plastic layer; the second heat-conducting lead is located in the second plastic layer, and the two ends are respectively connected to the second chip and the second heat-conducting adhesive layer; the second heat dissipation layer is located on the side wall surface of the second heat-conducting adhesive layer away from the second plastic layer; Bonding the first package body and the second package body, wherein the upper surface of the first plastic packaging layer of the first package body and the lower surface of the second package substrate of the second package body are bonding surfaces; The structure obtained after bonding is bonded to a third packaging body; the third packaging body includes a third packaging substrate, a third chip and a third plastic packaging layer, the third chip is bonded to the upper surface of the third plastic packaging layer, the third plastic packaging layer is located on the upper surfaces of the third packaging substrate and the third chip, and plastic-seales the third chip; the lower surface of the third packaging substrate and the upper surface of the second plastic packaging layer are bonding surfaces.

7. The method for preparing a semiconductor packaging structure according to claim 6, characterized in that: The process of forming the first package body includes: Providing the first packaging substrate, bonding the first chip to the upper surface of the first packaging substrate through a first bonding wire, and forming the first thermal conductive wire, wherein one end of the first thermal conductive wire is connected to the first chip, and the other end extends to be bonded to the surface of the first packaging substrate, the maximum height of the first thermal conductive wire is greater than the height of the first bonding wire, and the bonding point between the first thermal conductive wire and the first packaging substrate is located at the end of the first bonding wire away from the first chip; Forming the first plastic encapsulation layer on the upper surfaces of the first packaging substrate, the first chip, the first thermal conductive wire and the first bonding wire, wherein the first plastic encapsulation layer plastic encapsulates the first chip, the first thermal conductive wire and the first bonding wire; removing a portion where the first heat-conducting wire and the first packaging substrate are joined so that an end of the first heat-conducting wire away from the first chip is exposed to a sidewall surface of the first plastic packaging layer; Forming the first thermally conductive adhesive layer on the side wall surface of the first plastic packaging layer, wherein the first thermally conductive adhesive layer is in contact with the first thermally conductive lead; The first heat dissipation layer is formed on the side wall surface of the first thermal conductive adhesive layer.

8. The method for preparing a semiconductor packaging structure according to claim 6, characterized in that: The process of forming the second package body includes: Providing the second packaging substrate, bonding the second chip to the upper surface of the second packaging substrate through a second bonding wire, and forming a second thermal conductive wire, wherein one end of the second thermal conductive wire is connected to the second chip, and the other end extends to be bonded to the surface of the second packaging substrate, the maximum height of the second thermal conductive wire is greater than the height of the second bonding wire, and the bonding point between the second thermal conductive wire and the second packaging substrate is located at the end of the second bonding wire away from the second chip; Forming the second plastic encapsulation layer on the upper surfaces of the second packaging substrate, the second chip, the second heat conductive wire and the second bonding wire, wherein the second plastic encapsulation layer plastic encapsulates the second chip, the second heat conductive wire and the second bonding wire; removing a portion where the second heat-conducting lead and the second packaging substrate are joined so that an end of the second heat-conducting lead away from the second chip is exposed to a side wall surface of the second plastic packaging layer; Forming the second thermally conductive adhesive layer on the side wall surface of the second plastic packaging layer, wherein the second thermally conductive adhesive layer is in contact with the second thermally conductive lead; The second heat dissipation layer is formed on the side wall surface of the second thermal conductive adhesive layer.

9. The method for preparing a semiconductor packaging structure according to claim 6, wherein: The method for preparing the semiconductor packaging structure also includes the steps of forming a first electrical connection structure in the first plastic packaging layer after forming the first packaging body, and forming a second electrical connection structure in the second plastic packaging layer after forming the second packaging body, and electrically connecting the first electrical connection structure and the second electrical connection structure during bonding the first packaging body and the second packaging body.

10. The method for preparing a semiconductor package structure according to any one of claims 6 to 9, characterized in that: The method for preparing the semiconductor packaging structure further includes the steps of sequentially forming a third thermal conductive adhesive layer and a third heat dissipation layer on the upper surface of the third plastic packaging layer.

Citation Information

Patent Citations

  • Semiconductor packaging structure

    CN209880583U