A multi-path power voltage fast discharge circuit

Abstract

The application relates to a multi-path power supply voltage fast discharging circuit, which comprises a control circuit, a switch circuit and a first discharging circuit, the first end of the control circuit is connected with a power management chip, the second end is connected with the first end of the first discharging circuit, the power management chip outputs a level signal to control the conduction of the control circuit, the control circuit outputs a control signal to the first discharging circuit, the first end of the switch circuit is connected with the power management chip, the power management chip outputs a level signal to control the opening and closing of the switch circuit, the second end of the first discharging circuit is connected with the second end of the switch circuit, when the switch circuit is conducted, the first discharging circuit discharges through the switch circuit, and the first discharging circuit comprises a plurality of power supply circuits. The technical scheme provided by the application discharges all the power supply circuits through a switch circuit, so that the number of electronic elements is greatly reduced, the space occupied by the circuit board is saved, and the product is miniaturized.

Description

TECHNICAL FIELD

[0001] The application relates to a protection circuit, in particular to a multi-path power voltage fast discharge circuit. BACKGROUND

[0002] When the Arria 10 FPGA is powered off, the discharge circuit controls the power supply rails of each group of FPGAs to be powered off in sequence through a power management chip, and controls the MOS transistors to be turned on in sequence.

[0003] When the FPGA is discharged, each power supply rail needs a group of MOS transistors and a large power resistor for discharging, and the large power resistor has a relatively large volume, so that multiple large power resistors occupy a large space on a PCB (Printed Circuit Board), resulting in a large size of the chip.

[0004] Therefore, it is necessary to provide a multi-path power voltage fast discharge circuit to solve the problems in the prior art. SUMMARY

[0005] In order to solve the problems in the prior art, the application provides a multi-path power voltage fast discharge circuit, which optimizes the structure of the circuit, reduces electronic components, saves the space occupied by the circuit board, and miniaturizes the product.

[0006] The application provides a multi-path power voltage fast discharge circuit, which comprises a control circuit, a switch circuit and a first discharge circuit,

[0007] The first end of the control circuit is connected with a power management chip, the second end is connected with the first end of the first discharge circuit, the power management chip outputs a level signal to control the conduction of the control circuit, and the control circuit outputs a control signal to the first discharge circuit;

[0008] The first end of the switch circuit is connected with the power management chip, and the power management chip outputs a level signal to control the opening and closing of the switch circuit;

[0009] The second end of the first discharge circuit is connected with the second end of the switch circuit, the first discharge circuit discharges through the switch circuit when the switch circuit is turned on, and the first discharge circuit comprises a plurality of power circuits.

[0010] Further, the control circuit comprises a first control circuit and a second control circuit,

[0011] The input end of the first control circuit is connected with the power management chip, and the output end is connected with the reset input end of the circuit board;

[0012] An input end of the second control circuit is connected with the power management chip, and an output end is connected with a first end of the first discharge circuit.

[0013] Further, the first control circuit comprises a first switching device,

[0014] A first end of the first switching device is connected with the power management chip, a second end is connected with a reset output end of the circuit board, and a third end is grounded.

[0015] The first switching device is used for inverting a signal output by the power management chip, and the first switching device controls a reset input end of the circuit board through the inverted signal.

[0016] Further, the second control circuit comprises a plurality of sub-control circuits connected in parallel.

[0017] The number of sub-control circuits of the second control circuit is equal to the number of power circuits of the first discharge circuit.

[0018] Further, any one of the sub-control circuits of the second control circuit comprises a second switching device,

[0019] A first end of the second switching device is connected with the power management chip, a second end is connected with the first end of the first discharge circuit, and a third end is grounded.

[0020] The second switching device is used for inverting a signal output by the power management chip, and the second switching device controls the first discharge circuit through the inverted signal.

[0021] Further, the switching circuit comprises a third switching device and a first resistor,

[0022] A first end of the third switching device is connected with the power management chip, a second end is connected with a second end of the first discharge circuit, and a third end is connected with one end of the first resistor.

[0023] The other end of the first resistor is grounded.

[0024] Further, any one of the power circuits of the first discharge circuit comprises a fourth switching device and a second resistor,

[0025] A first end of the fourth switching device is connected with the second end of the control circuit and one end of the second resistor respectively, a second end is connected with a second end of the switching circuit, and a third end is connected with the power management chip.

[0026] The other end of the second resistor is grounded.

[0027] Further, the fast discharge circuit further comprises a delay circuit,

[0028] The first end of the delay circuit is connected with the power management chip, and the second end is connected with the third end of the first discharging circuit.

[0029] Further, the delay circuit comprises a third resistor and a first capacitor,

[0030] One end of the third resistor is connected with the power management chip, and the other end is connected with the third end of the first discharging circuit and one end of the first capacitor respectively.

[0031] The other end of the first capacitor is grounded.

[0032] Further, the fast discharging circuit further comprises a second discharging circuit,

[0033] The first end of the second discharging circuit is connected with the power terminal, and the second end is grounded.

[0034] The second discharging circuit comprises a second capacitor and a third capacitor connected in parallel, one end of the second capacitor is connected with the power terminal, and the other end is grounded.

[0035] The technical solution provided by the present application has the following advantages compared with the closest prior art:

[0036] The technical solution provided by the present application comprises a control circuit, a switching circuit and a first discharging circuit, the control circuit generates a control signal to control the first discharging circuit according to the level signal of the power management chip, the switching circuit is opened and closed according to the level signal of the power management chip, when the switching circuit is turned on, the first discharging circuit discharges through the switching circuit, and the first discharging circuit comprises a plurality of power supply circuits. When the circuit board is powered off, the plurality of power supply circuits of the first discharging circuit can discharge through the switching circuit, and all the power supply circuits discharge through one switching circuit, so that the number of electronic components is greatly reduced, thereby saving the space occupied by the circuit board and miniaturizing the product. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1 is a block diagram of a multi-path power supply voltage fast discharging circuit provided by an embodiment of the present application;

[0038] Figure 2 is a detailed structure schematic diagram of a multi-path power supply voltage fast discharging circuit provided by an embodiment of the present application. DETAILED DESCRIPTION

[0039] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0040] As shown in Figure 1 The present application provides a multi-path power supply voltage fast discharge circuit, which comprises a control circuit, a switch circuit and a first discharge circuit.

[0041] The first end of the control circuit is connected with a power management chip, the second end is connected with the first end of the first discharge circuit, and the power management chip outputs a level signal to control the conduction of the control circuit. The control circuit outputs a control signal to the first discharge circuit.

[0042] The first end of the switch circuit is connected with the power management chip, and the power management chip outputs a level signal to control the opening and closing of the switch circuit.

[0043] The second end of the first discharge circuit is connected with the second end of the switch circuit, and the first discharge circuit discharges through the switch circuit when the switch circuit is turned on.

[0044] The first discharge circuit comprises a plurality of power supply circuits.

[0045] Further, the control circuit comprises a first control circuit and a second control circuit.

[0046] The input end of the first control circuit is connected with the power management chip, and the output end is connected with the reset input end of a circuit board. The input end of the second control circuit is connected with the power management chip, and the output end is connected with the first end of the first discharge circuit.

[0047] Specifically, the first control circuit comprises a first switch device.

[0048] The first end of the first switch device is connected with the power management chip, the second end is connected with the reset output end of the circuit board, and the third end is grounded.

[0049] The second control circuit comprises a plurality of parallelly connected sub-control circuits. Each sub-control circuit comprises a second switch device, the first end of the second switch device is connected with the power management chip, the second end is connected with the first end of the first discharge circuit, and the third end is grounded, for inverting the signal output by the power management chip and controlling the first discharge circuit through the inverted signal.

[0050] The number of sub-control circuits of the second control circuit is equal to the number of power supply circuits of the first discharge circuit.

[0051] Further, the switch circuit comprises a third switch device and a first resistor.

[0052] The first end of the third switch device is connected with the power management chip, the second end is connected with the first discharge circuit, and the third end is connected with one end of the first resistor; the other end of the first resistor is grounded.

[0053] Further, any one power supply circuit of the first discharge circuit comprises a fourth switch device and a second resistor.

[0054] The first end of the fourth switch device is connected with the second end of the control circuit and one end of the second resistor respectively, the second end is connected with the second end of the switch circuit, and the third end is connected with the power management chip; the other end of the second resistor is grounded.

[0055] Further, the fast discharge circuit further comprises a delay circuit.

[0056] The first end of the delay circuit is connected with the power management chip, and the second end is connected with the third end of the first discharge circuit.

[0057] Specifically, the delay circuit comprises a third resistor and a first capacitor.

[0058] One end of the third resistor is connected with the power management chip, and the other end is connected with the third end of the first discharge circuit and one end of the first capacitor respectively; the other end of the first capacitor is grounded.

[0059] Further, the fast discharge circuit further comprises a second discharge circuit.

[0060] The first end of the second discharge circuit is connected with the power terminal, and the second end is grounded.

[0061] Specifically, the second discharge circuit comprises a second capacitor and a third capacitor connected in parallel. One end of the second capacitor is connected with the power terminal, and the other end is grounded.

[0062] More specifically, as shown in the detailed structure diagram of the multi-path power voltage fast discharge circuit. Figure 2

[0063] The first control circuit specifically comprises a first switch device D1, the first end of which is connected with the level signal output terminal of the power management chip, the second end is connected with the reset output (RSTB in the figure) terminal and the start load input signal (NCONFIG in the figure) terminal of the circuit board, and the third end is grounded.

[0064] ​The second control circuit specifically comprises five parallel sub-control circuits, namely a first sub-control circuit, a second sub-control circuit, a third sub-control circuit, a fourth sub-control circuit and a fifth sub-control circuit.

[0065] Specifically, the first sub-control circuit comprises a switching device D2, a first end of which is connected with a level signal output terminal of the power management chip, a second end of which is connected with a first end of a 1.03V power supply circuit of the power terminal of the first discharge circuit, and a third end of which is grounded.

[0066] The switching device D2 outputs a low level to the first end of the 1.03V power supply circuit of the power terminal of the first discharge circuit after receiving the high level signal output by the power management chip, so that the 1.03V power supply is powered off, and the power supply circuit enters the discharge mode.

[0067] The second sub-control circuit comprises a switching device D3, a first end of which is connected with a level signal output terminal of the power management chip, a second end of which is connected with a first end of a 1.8V power supply circuit of the power terminal of the first discharge circuit, and a third end of which is grounded.

[0068] The switching device D3 outputs a low level to the first end of the 1.8V power supply circuit of the power terminal of the first discharge circuit after receiving the high level signal output by the power management chip, so that the 1.8V power supply is powered off, and the circuit enters the discharge mode.

[0069] The third sub-control circuit comprises a switching device D4, a first end of which is connected with a level signal output terminal of the power management chip, a second end of which is connected with a first end of a 2.5V power supply circuit of the power terminal of the first discharge circuit, and a third end of which is grounded.

[0070] The switching device D4 outputs a low level to the first end of the 2.5V power supply circuit of the power terminal of the first discharge circuit after receiving the high level signal output by the power management chip, so that the 2.5V power supply is powered off, and the circuit enters the discharge mode.

[0071] The fourth sub-control circuit comprises a switching device D5, a first end of which is connected with a level signal output terminal of the power management chip, a second end of which is connected with a first end of a 3.3V power supply circuit of the power terminal of the first discharge circuit, and a third end of which is grounded.

[0072] The switching device D5 outputs a low level to the first end of the 3.3V power supply circuit of the power terminal of the first discharge circuit after receiving the high level signal output by the power management chip, so that the 3.3V power supply is powered off, and the circuit enters the discharge mode.

[0073] The fifth sub-control circuit includes a switching device D6, a first end of which is connected with the level signal output terminal of the power management chip, a second end of which is connected with the first end of the 1.2V power supply circuit of the power terminal of the first discharge circuit, and a third end of which is grounded.

[0074] The switching device D6 receives the high level signal output by the power management chip, and outputs a low level signal to the first end of the 1.2V power supply circuit of the power terminal of the first discharge circuit, so that the 1.2V power supply is disconnected, and the circuit enters the discharge mode.

[0075] It should be noted that the power management chip outputs a high level signal when the main power of the circuit board is cut off, and outputs a low level signal when the main power is restored. The output signal of the power management chip in the figure is F_DISCHARGE_EN.

[0076] The switching circuit specifically includes a third switching device Q1 and a first resistor R1.

[0077] Specifically, a first end of the third switching device Q1 is connected with the level signal output terminal of the power management chip, a second end of which is connected with the second end of the first discharge circuit, and a third end of which is connected with one end of the first resistor R1; the other end of the first resistor R1 is grounded.

[0078] The third switching device Q1 is turned on after receiving the high level signal output by the power management chip, at which time the first discharge circuit can discharge on the first resistor R1 through the third switching device Q1.

[0079] More specifically, the first resistor R1 can be selected as 0.5-1 ohm, 2512 or more packaging, and 1W or more rated power resistor.

[0080] The first discharge circuit specifically includes the same number of power supply circuits as the control circuit, i.e. five power supply circuits. That is, the 1.03V power supply circuit, the 1.8V power supply circuit, the 2.5V power supply circuit, the 3.3V power supply circuit and the 1.2V power supply circuit mentioned above.

[0081] It should be noted that the number of sub-control circuits of the second control circuit is equal to the number of the first discharge circuit.

[0082] Specifically, the 1.03V power supply circuit includes a switching device Q6 and a resistor R6.

[0083] A first end of the switching device Q6 is connected with the second end of the first sub-control circuit of the control circuit and one end of the resistor R6, respectively, a second end of which is connected with the second end of the third switching device Q1 of the switching circuit, and a third end of which is connected with the level signal output terminal of the power management chip.

[0084] The power supply circuit of 1.03V receives the output signal of the first control sub-circuit of the control circuit, cuts off the 1.03V power supply, and the diode inside the switching device Q6 is turned on. The energy stored in the power supply circuit is discharged on the first resistor R1 of the switching circuit through the diode of the switching device Q6.

[0085] Based on the same working principle, the structures and conduction discharge principles of the power supply circuits of 1.8V, 2.5V, 3.3V and 1.2V are the same, and will not be described here.

[0086] It should be noted that in the present application, each switching device can be a MOS tube or other device with switching function. Figure 2 All are N-channel MOS tubes.

[0087] MOS tube is a metal (metal), oxide (oxide), semiconductor (semiconductor) field effect transistor, which has the advantages of high input impedance, low noise and good thermal stability. In the fast discharge circuit provided in the present application, the MOS tube plays the role of switch.

[0088] More specifically, the switching devices Q2-Q6 of each power supply circuit of the first discharge circuit function as follows: when the switching device Q1 is turned on, the power supply voltage of the source (i.e. S pole) of Q2-Q6 is sequentially discharged through the diode inside the corresponding switching device (i.e. MOS tube) from high to low. When the circuit board is working normally, these MOS tubes are closed and do not discharge.

[0089] The delay circuit specifically includes a third resistor R7 and a first capacitor C1.

[0090] Specifically, one end of the third resistor R7 is connected to the level signal output terminal of the power management chip, and the other end is connected to the third end of the first discharge circuit (i.e. the third end of the switching device in each power supply circuit of the third circuit in the figure); the other end of the first capacitor C1 is grounded.

[0091] The RC circuit composed of the third resistor R7 and the first capacitor C1 functions to make Q2-Q6 need to pass a certain time delay to be turned on. The purpose is to avoid the following situation: if the F_DISCHARGE_EN signal becomes high level, Q2-Q6 are immediately turned on, at this time, the power supply voltage of each S pole in Q2-Q6 is connected to the drain (i.e. D pole), and each voltage is connected together without discharging, which will cause short circuit and damage the low voltage pin of FPGA. After a period of time delay, each power supply voltage has been partially discharged by the diode inside each MOS tube, so that each power supply voltage becomes a consistent lower voltage value. After the delay, Q2-Q6 are all turned on to discharge the remaining voltage together. The RC device is valued to meet the delay of 30-50 milliseconds.

[0092] The second discharging circuit specifically includes a second capacitor C2 and a third capacitor C3 connected in parallel.

[0093] Specifically, one end of the second capacitor C2 is connected to a 0.9V power supply terminal, and the other end is grounded.

[0094] Wherein, after the completion of the discharging of each power supply circuit in the above first discharging circuit, the second discharging circuit can maintain for a longer time due to the energy storage of the capacitor, so as to achieve the requirement of discharging the last power supply voltage, and finally realize the power-off sequence protection of the entire circuit board.

[0095] More specifically, the working principle of the entire circuit is as follows:

[0096] When the power supply management chip is normally powered, F_DISCHARGE_EN is low level. When the main power supply of the circuit board is cut off, the power supply management chip outputs a high level signal of the trigger signal F_DISCHARGE_EN, so as to cause the switching devices D1-D6 to be turned on, so that the reset signal (i.e. RSTB) of the circuit board becomes a low level signal and enters the reset state. The enable signal of the power supply chip corresponding to each power supply voltage also becomes low level, so that each power supply chip stops outputting the power supply voltage. At this time, each power supply circuit will not be powered off immediately due to the energy storage of a large number of capacitors on the board, and needs to be discharged through the fast discharging circuit.

[0097] Q1 is turned on, the 3.3V power supply circuit first discharges through the diode in the switching device Q3. Since the forward voltage of the diode after being turned on is 0.8V, the voltage across the high-power resistor R1 is about 2.5V, and the instantaneous discharge current reaches 5A. R1 can withstand 30W of instantaneous power in 100ms, so the 5A current is not a problem. During the discharge process, the voltage at the D terminal of Q1 drops rapidly, and when it drops to 1.7V, the voltage in the 2.5V power supply circuit also begins to discharge through the diode in the switching device Q4. Then the voltages in the 1.8V, 1.2V, and 1.03V power supply circuits are discharged in turn through the diodes in the respective switching devices. When the voltage at the D terminal of Q1 drops to 0V, the voltages in the power supply circuits are still below 0.8V, and the discharge current will gradually decrease until the diodes in the switching devices are not conductive and the discharge current becomes 0.

[0098] After F_DISCHARGE_EN becomes high and starts to discharge the remaining voltage, the ALL_DISC_EN signal charges through R7 and C1 and becomes high, causing the switching devices Q2-Q6 to be turned on and the remaining voltages (less than 0.8V) in the power supply circuits to be discharged. The entire discharge time is about 30ms, and the 0.9V power supply circuit that needs to be powered off can maintain a longer event due to the energy storage of the capacitor, thereby meeting the requirement of discharging the last power supply circuit and achieving the sequence protection of powering off the entire circuit board.

[0099] It should be noted that, in this document, relational terms such as“first” and“second”, and the like can be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

[0100] It can be understood that the embodiments described herein can be realized by hardware, software, firmware, middleware, microcode or a combination thereof. For hardware implementation, the processing unit can be realized in one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), general purpose processors, controllers, micro-controllers, microprocessors, other electronic units designed to perform the functions described in the present application, or a combination thereof.

[0101] For software implementation, the techniques described herein can be implemented with a combination of hardware and software. The software code can be stored in a memory and executed by a processor.

[0102] Those skilled in the art can understand that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0103] In the embodiments provided by the present application, it should be understood that the disclosed device and method can be implemented in other ways. For example, the device embodiments described above are only schematic. The division of the units is only a logical function division. There can be another division during actual implementation. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, can be indirect couplings or communication connections through some interfaces, devices or units, and can be electrical, mechanical or in other forms.

[0104] In addition, each functional unit in the various embodiments of the present application can be integrated in one processing unit, or each unit can exist physically as a separate unit, or two or more units can be integrated in one unit.

[0105] If the functions are implemented in the form of software function units and sold or used as an independent product, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the embodiments of the present application essentially or partly contribute to the prior art, or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The foregoing storage medium includes various media that can store program codes, such as U disk, mobile hard disk, ROM, RAM, magnetic disk or optical disk, etc.

[0106] It should be noted that the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises... a" does not, without more constraints, exclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0107] Finally, it should be noted that the above examples are merely used to illustrate the technical solutions of the present application, rather than limiting them; although the present application has been described in detail with reference to the foregoing examples, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A multipath power supply voltage quick discharge circuit, characterized by comprising: The application relates to a power management chip and a power supply circuit thereof. The power management chip is connected with a delay circuit, a control circuit, a switch circuit and a first discharge circuit; a first end of the control circuit is connected with the power management chip, a second end of the control circuit is connected with a first end of the first discharge circuit, and a power level signal output by the power management chip controls the conduction of the control circuit; and the control circuit outputs a control signal to the first discharge circuit. A first end of the switch circuit is connected with the power management chip, and a power level signal output by the power management chip controls the opening and closing of the switch circuit. A second end of the first discharge circuit is connected with a second end of the switch circuit, and the first discharge circuit discharges through the switch circuit when the switch circuit is conducted; the first discharge circuit comprises a plurality of power supply circuits; a first end of the delay circuit is connected with the power management chip, and a second end of the delay circuit is connected with a third end of the first discharge circuit; and the delay of the delay circuit is 30-50 milliseconds.

2. A multiple power supply voltage quick discharge circuit according to claim 1, wherein The control circuit comprises a first control circuit and a second control circuit; an input end of the first control circuit is connected with the power management chip, and an output end of the first control circuit is connected with a reset input end of a circuit board; an input end of the second control circuit is connected with the power management chip, and an output end of the second control circuit is connected with a first end of the first discharge circuit.

3. A multiple supply voltage quick discharge circuit according to claim 2, wherein The first control circuit comprises a first switch device; a first end of the first switch device is connected with the power management chip, a second end of the first switch device is connected with a reset output end of the circuit board, and a third end of the first switch device is grounded; the first switch device is used for inverting a signal output by the power management chip and controlling the reset input end of the circuit board through the inverted signal. The second control circuit comprises a plurality of parallelly connected sub-control circuits; the number of the sub-control circuits of the second control circuit is equal to the number of the power supply circuits of the first discharge circuit.

4. A multiple power supply voltage quick discharge circuit according to claim 2, wherein Any one of the sub-control circuits of the second control circuit comprises a second switch device; a first end of the second switch device is connected with the power management chip, a second end of the second switch device is connected with the first end of the first discharge circuit, and a third end of the second switch device is grounded; the second switch device is used for inverting a signal output by the power management chip and controlling the first discharge circuit through the inverted signal. The switch circuit comprises a third switch device and a first resistor; a first end of the third switch device is connected with the power management chip, a second end of the third switch device is connected with a second end of the first discharge circuit, and a third end of the third switch device is connected with one end of the first resistor; the other end of the first resistor is grounded.

5. A multiple supply voltage quick discharge circuit according to claim 4, wherein Any one of the power supply circuits of the first discharge circuit comprises a fourth switch device and a second resistor; a first end of the fourth switch device is connected with the second end of the control circuit and one end of the second resistor respectively, a second end of the fourth switch device is connected with the second end of the switch circuit, and a third end of the fourth switch device is connected with the power management chip; the other end of the second resistor is grounded.

6. A multiple supply voltage quick discharge circuit according to claim 1, wherein The delay circuit comprises a third resistor and a first capacitor; one end of the third resistor is connected with the power management chip, and the other end of the third resistor is connected with the third end of the first discharge circuit and one end of the first capacitor respectively; the other end of the first capacitor is grounded. ​ 7. A multiple supply voltage quick discharge circuit according to claim 1, wherein ​ 8. A multiple supply voltage quick discharge circuit according to claim 1, wherein ​ 9. The multiple power supply voltage quick discharge circuit according to claim 1, wherein The fast discharge circuit further comprises a second discharge circuit, a first end of the second discharge circuit being connected with the power supply terminal and a second end being grounded; the second discharge circuit comprises a second capacitor and a third capacitor connected in parallel, one end of the second capacitor being connected with the power supply terminal and the other end being grounded.

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