Circuit, corresponding polyphase converter device and operating method

Abstract

A circuit, a corresponding multiphase converter device, and an operating method are disclosed. A first switch couples an input node, which receives a main control signal for a main switch stage of a multiphase converter, to an output node that follows actuation of a secondary switch stage to deliver a secondary control signal for the secondary switch stage. A second switch couples the output node to a capacitor during a period of actuation / de-actuation of the secondary switch stage. Current is supplied to the capacitor during the actuation period or absorbed from the capacitor during the de-actuation period. A source current or an absorption current can be generated in proportion to the main control signal.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims priority to Italian Patent Application No. 102019000010662, filed on Jul. 2, 2019, the content of which is incorporated herein by reference in its entirety to the maximum extent permitted by law. Technical Field

[0003] This description relates to multiphase electronic converters, such as DC / DC converter devices.

[0004] In particular, one or more embodiments relate to techniques for managing transitions of a multiphase DC / DC converter between different operating states (e.g., managing powering on and off of secondary phases). Background Art

[0005] Electronic converters, such as DC / DC converters, are widely used in many applications to generate the power voltage levels required for the operation of complex electronic systems, such as smartphones, laptops, or other devices. A stable and precise power voltage provided at the output of the converter can also facilitate matching the performance expected from such electronic systems.

[0006] In many applications, the converter can be designed, for example, considering power efficiency in order to reduce energy consumption.

[0007] For example, low energy consumption of the converter can facilitate increasing the operating life of battery-powered electronic devices.

[0008] In the case of cable-powered devices, low energy consumption can be beneficial, for example, due to a reduction in thermal stress caused by power dissipation.

[0009] Certain applications may involve a wide range of output current capabilities from an electronic converter. To provide satisfactory converter power efficiency across the entire output current range, multiphase DC / DC converters have been developed to avoid high currents flowing simultaneously in transistors (e.g., MOS transistors) and components external to the converter.

[0010] A multiphase DC / DC converter includes more than two switching stages coupled (e.g., in parallel) at an output node of the converter, each of the switching stages being controlled by a respective PWM generation circuit. Typically, the main phase of the converter (i.e., the main switching stage) operates when the output load current is low, and at least one secondary phase can be activated as a result of an increase in the output current. In the latter case, each of the activated phases provides a small portion of the total output current.

[0011] In such a multiphase DC / DC converter, transitions between different operating states, where each state corresponds to a different set of phases being activated and the transition includes powering on or off at least one secondary phase, should be managed appropriately.

[0012] Both powering on and off of the secondary phase can affect the performance of the converter, which may create problems for the overall application, i.e., the converter and / or the electronic device being supplied thereby.

[0013] It may be desirable to have a fast transition to quickly respond to changes in the output load current and avoid regulation losses, for example, due to the limited output current capacity of a single phase (e.g., the primary phase) of the converter.

[0014] Conversely, a transition that occurs too fast may result in an undesired response (e.g., a spike) in the output voltage. Therefore, the timing requirements of the transition should be subject to a trade-off in order to provide improved performance under various different operating conditions of the converter, e.g., different values of the input voltage Vin, output voltage Vout, output load current, and possible process, voltage, and temperature (PVT) variations, etc.

[0015] Despite extensive activity in the art, other improved solutions are still desired.

[0016] There is a need in the art to provide such improved solutions. SUMMARY OF THE INVENTION

[0017] One or more embodiments may relate to corresponding multiphase converter devices.

[0018] One or more embodiments may relate to an operating circuit or a corresponding method for a multiphase converter device.

[0019] One or more embodiments may provide a circuit configured to generate a control signal for a secondary switching stage in a multiphase converter device, wherein the circuit is configured to generate the control signal for the secondary switching stage based on a control signal for a primary switching stage.

[0020] One or more embodiments may thus help to provide a selected timing for powering on and off the secondary phases of a multiphase converter, thereby matching a wide output current capacity requirement with a small transient at the output voltage during the transition.

[0021] One or more embodiments may help to provide such a transition timing that is independent of the operating conditions of the converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] One or more embodiments will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0023] Figure 1 is an exemplary circuit block diagram of a multiphase converter;

[0024] Figure 2 is an exemplary circuit diagram of a circuit for managing state transitions in a multiphase converter; and

[0025] Figure 3 is an exemplary circuit diagram of another circuit for managing state transitions in a multiphase converter. DETAILED DESCRIPTION

[0026] In the following description, one or more specific details are illustrated, which are intended to provide an in - depth understanding of examples of embodiments of this description. Embodiments may be obtained without one or more specific details, or in the case of other methods, components, materials, etc. In other cases, known structures, materials, or operations are not illustrated or described in detail so that certain aspects of the embodiments will not be obscured.

[0027] References to "an embodiment" or "one embodiment" in the framework of this specification are intended to indicate that a particular configuration, structure, or characteristic described with respect to the embodiment is included in at least one embodiment. Thus, phrases such as "in an embodiment" or "in one embodiment" that may appear at one or more points in this specification do not necessarily refer to one and the same embodiment. Moreover, the particular configurations, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0028] In all the attached drawings herein, similar parts or elements are indicated by similar reference numerals / numbers, and corresponding descriptions will not be repeated for the sake of brevity.

[0029] The reference numerals used herein are provided only for convenience and thus do not limit the scope of protection or the scope of the embodiments.

[0030] By way of introducing a detailed description of exemplary embodiments, first reference may be made to Figure 1 , Figure 1 which illustrates an exemplary circuit block diagram of a two - phase DC / DC converter. In this detailed description, only the exemplary case of a two - phase converter is referred to in a simplified manner. One or more embodiments can generally be applied to multiphase converters having more than two phases (i.e., a main phase and at least one secondary phase).

[0031] As Figure 1 illustrates, the two - phase DC / DC converter 10 may include a first switch stage 100, a second switch stage 100', and a control circuit coupled thereto.

[0032] Each of switch stages 100 and 100' may include a respective half-bridge arrangement including a high-side switch and a low-side switch (e.g., MOS transistors), a respective reactive component (e.g., an inductor) coupled to the half-bridge arrangement, and respective drive circuits 1000, 1000' coupled to the high-side switch and the low-side switch to control their switching according to respective PWM modulation signals PWM, PWM'. The switch stages 100, 100' may be configured to receive an input voltage Vin and generate an output voltage Vout of the converter 10. For example, in one or more embodiments, the switch stages 100, 100' may be implemented according to conventional buck, boost, or buck-boost topologies.

[0033] The control circuit in the converter 10 may include a (e.g., resistive) voltage divider 102 configured to generate a feedback voltage signal Vfb by dividing the output voltage Vout. The control circuit may include an error amplifier 104 configured to determine the difference between the feedback voltage signal Vfb and a reference voltage signal Vref, thereby generating a first control signal Vc indicative of the determined difference for controlling the operation of the converter 10.

[0034] In a first comparator 106, the first control signal Vc may be compared with a periodic ramp signal (e.g., a triangular or sawtooth signal), thereby generating a first output oscillating signal PWM (e.g., a first pulse width modulation signal) for controlling the switching operation of the first switch stage 100.

[0035] In the Figure 1 two-phase converter 10 illustrated as such, the first control signal Vc may be provided at the input of a phase management circuit block 108, where the phase management circuit block 108 is configured to generate a second control signal Vc' at the output. In a second comparator 106', the second control signal Vc' may be compared with a periodic ramp signal, thereby generating a respective output oscillating signal PWM' for controlling the switching operation of the second switch stage 100'. Thus, in one or more embodiments, the phase management circuit block 108 may be configured to generate the second control signal Vc' such that the transition timing between different operating states of the converter 10 (i.e., operating in only one phase, or in two phases in parallel) is independent of the operating conditions of the converter.

[0036] As Figure 1 illustrated, the signals PWM and PWM' may be provided as inputs to a finite state machine (FSM) circuit block 110 in the converter 10, and the finite state machine 110 may be configured to receive input signals from the following:

[0037] - A first discontinuous mode detector (DMD) comparator 112 configured to detect whether the inductor current in the first switching stage 100 reaches a certain threshold (e.g., zero),

[0038] - A second DMD comparator 112' configured to detect whether the inductor current in the second switching stage 100' reaches a certain threshold (e.g., zero),

[0039] - A first comparator jump block 114 configured to control the transition of the first phase to the pulse jump mode,

[0040] - A second comparator jump block 114' configured to control the transition of the second phase to the pulse jump mode,

[0041] - A first overcurrent protection OCP circuit block 116 configured to limit the inductor current in the first switching stage 100 to a maximum value,

[0042] - A second OCP circuit block 116' configured to limit the inductor current in the second switching stage 100' to a maximum value, and

[0043] - Signals (e.g., digital signals) external to the converter 10, such as an enable signal EN, a clock signal CK, and a test signal TEST.

[0044] The finite state machine circuit block 110 can be configured to control the ramp generator circuit block 118, which can generate a ramp signal for application to the first comparator 106 and the second comparator 106'. The ramp generator circuit block 118 can receive an additional input signal from the high-side current sensing circuit block 120, which can be configured to sense the current flowing in the first switching stage 100 and the second switching stage 100'.

[0045] The finite state machine circuit block 110 can additionally be configured to control the loop suppressor circuit block 122, which is configured to be powered on due to the corresponding phase entering the pulse jump mode.

[0046] Figure 2 is an exemplary circuit diagram of a possible implementation of the phase management circuit block 108, which is used to generate a second control signal Vc' and manage the transition between the operating states of the two-phase converter 10.

[0047] As Figure 2 illustrated, the phase management circuit block 108 can include an input node 1080 for receiving the first control signal Vc and an output node 1082 for providing the second control signal Vc', where:

[0048] - The output node 1082 can be selectively coupled to the input node 1080 via the electronic switch SW1,

[0049] - The output node 1082 can be selectively coupled to the intermediate node 1084 via the electronic switch SW2, and

[0050] - A capacitive component C (e.g., a capacitor) is coupled between the intermediate node 1084 and the reference (ground) node GND.

[0051] The capacitor C is configured to:

[0052] - Be charged by means of a current generator G1, which can be selectively coupled between the power supply node Vsupply and the intermediate node 1084 via the electronic switch SW3 to inject a constant reference current Iref into the capacitor C; and

[0053] - Be discharged by means of a current generator G2, which can be selectively coupled between the intermediate node 1084 and the reference (ground) node via the electronic switch SW4 to absorb a constant reference current Iref from the capacitor C.

[0054] Thus, the operation of the circuit 108, as Figure 2 illustrated, can be summarized as follows:

[0055] - During the period when the secondary phase of the converter 10 is activated, the switches SW2 and SW3 can be closed and the switches SW1 and SW4 can be opened, resulting in the secondary control signal Vc' increasing from 0V to Vc (where Vc is the steady-state value of the control voltage of the entire loop of the converter 10), and having a ramp with a constant conversion rate due to the capacitor 10 being charged with a constant current Iref;

[0056] - When the power-on transition of the secondary phase is terminated (i.e., when Vc' = Vc; the activation period ends), the switch SW2 can be opened while the switch SW1 can be closed, thereby coupling the output node 1082 to the input node 1080 and propagating the main control voltage Vc of the entire DC / DC control loop to the second comparator 106';

[0057] During the period when the secondary phase is deactivated, the switches SW2 and SW4 can be closed while the switches SW1 and SW3 can be opened, resulting in the secondary control signal Vc' decreasing from Vc to 0V, and having a ramp with a constant conversion rate due to the capacitor C being discharged with a constant current Iref; and

[0058] - When the de - activation transition of the secondary phase is terminated (i.e., when Vc' = 0 V; at the end of the de - activation time period), switches SW2 and SW4 can be kept closed to maintain the secondary control signal Vc' = 0 V.

[0059] Alternatively, for example, in the case where the total value to be obtained is lower than the reference current Iref available in the system, a switched current can be used to charge / discharge the capacitor C. The switched current can be obtained by arranging an electronic switch in series with a current generator providing the reference current Iref, where the electronic switch is alternately activated and de - activated (i.e., made conductive and non - conductive respectively) with a duty cycle D (where D is included between 0 and 1). Thus, the average value of the switched current can be equal to Iref*D and is therefore lower than Iref.

[0060] As Figure 2 illustrated, the phase management circuit 108 may not allow for a well - defined timing for the power - on and power - off transitions of the second phase of the converter 10, especially in the case of changes in the operating point of the converter due to changes in the input voltage Vin, output voltage Vout, and output current.

[0061] In fact, changes in the operating conditions may cause changes in the control voltage signal Vc. As Figure 2 illustrated, the circuit can operate with a power - on and power - off timing proportional to the value of the control signal Vc itself. Thus, in the circuit as Figure 2 illustrated, the total transition time may not be optimized, which may require a design trade - off that may result in poor output voltage regulation performance or poor performance in quickly recovering from changes in the output current capacity request.

[0062] As Figure 3 illustrated, one or more of the embodiments can provide an improvement in this regard, providing the duration of the power - on and power - off transitions of the (multiple) secondary phases that is independent of a constant conversion rate ramp of Vc', but related to a variable conversion rate ramp.

[0063] In particular, in one or more of the embodiments as Figure 3 illustrated, the conversion rate of the control signal Vc' during the power - on and power - off transitions can be a function (e.g., proportional) of the control voltage Vc itself. For example, this can be obtained by charging and / or discharging the capacitor C with a variable current generated as a function of the control voltage Vc.

[0064] In particular, Figure 3 is an example of a possible circuit implementation for generating a charge / discharge current as a function of Vc, but other implementations are also possible. As Figure 3 illustrated (where, withFigure 2 Elements and components similar to those illustrated in [FIGURE] have been indicated using similar reference numerals. During the activation of the secondary phase of the converter 10 (i.e., when switches SW2 and SW3 are closed and switches SW1 and SW4 are open), the capacitor C can be charged with the current I3 injected into node 1084, where the value of I3 depends on the value of the control voltage Vc.

[0065] In particular, according to one or more embodiments, the phase management circuit block 108 can include a transconductance amplifier circuit arrangement TA (e.g., including an operational amplifier 1086, a transistor M1, and a resistor R arranged as shown), which is configured as a voltage-to-current converter to generate a current I1 that is a function of the value of the control voltage Vc (e.g., proportional to Vc: I1 = Vc / R). The current I1 generated by the transconductance amplifier TA can be mirrored by means of a current mirror circuit arrangement including transistors M2 and M4, thereby providing a current I3 = n*I1 = n*Vc / R, where n is a mirror factor depending on the dimensions of transistors M2 and M4. Figure 3 Similarly, during the deactivation of the secondary phase of the converter 10 (i.e., when switches SW2 and SW4 are closed and switches SW1 and SW3 are open), the capacitor C can be discharged using the current I4 absorbed from node 1084, where the value of the current I4 depends on the value of the control voltage Vc. The current I1 generated by the transconductance amplifier TA can be mirrored by means of a cascaded current mirror circuit arrangement (e.g., a first current mirror including transistors M2 and M3 and a second current mirror including transistors M5 and M6), thereby providing a current I4 = m*I1 = m*Vc / R, where m is a mirror factor depending on the dimensions of transistors M2, M3, M5, and M6.

[0066] Therefore, according to one or more embodiments of [FIGURE] can provide power-on and power-off timings independent of the operating conditions of the converter device 10, provided that they can be independent of the value of the control voltage Vc.

[0067] Thus, according to Figure 3 one or more embodiments can provide power-on and power-off timings independent of the operating conditions of the converter device 10, provided that they can be independent of the value of the control voltage Vc.

[0068] For example, in the case of a high Vc, the current generated to control the conversion rate of Vc' (i.e., I3 or I4) can be high accordingly, thereby compensating for the high value of Vc to be reached. In the case of a low Vc, the current generated to control the conversion rate of Vc' can be low, thereby compensating for the low value of Vc to be reached, resulting in power-on and power-off timings (t up and t down ) independent of the value of Vc, provided that:

[0069]

[0070]

[0071]

[0072] Except for being independent of Vc, such transition times t up and t down can also be adjusted by selecting the value of resistor R and / or the values of mirror factors n and m, thereby helping to set the duration of the transition of converter device 10 to provide improved performance in terms of output current capacity response and output voltage regulation.

[0073] In one or more embodiments, the transition times t up and t down can be "real-time" adjusted by providing a variable capacitor C and / or a variable resistor R in the Figure 3 circuit.

[0074] Again, it should be noted that Figure 3 a non-limiting example of a possible implementation of a circuit is provided that is used to generate a charging current I3 and / or a discharging current I4 that depends on the value of a control voltage Vc, and this current is used to provide a transition timing of a multiphase converter device that is almost independent of Vc itself and thus almost independent of the operating conditions of the converter device. Alternative implementations are possible

[0075] For example, in one or more embodiments, the values of the charging current I3 (e.g., flowing in transistor M4) and / or the discharging current I4 (e.g., flowing in transistor M6) can be set by a digital controller that is configured to sense the control signal Vc and select the values of the charging and discharging currents as a function thereof.

[0076] Thus, one or more embodiments can provide the following advantages over existing solutions:

[0077] - The possibility of generating a fixed and constant power-on / power-off timing of the secondary phase under different operating conditions since the charging / discharging current depends on the control voltage Vc (e.g., is proportional thereto);

[0078] - The possibility of selecting the power-on / power-off timing to avoid output voltage variations and / or current capacity problems:

[0079] i) To avoid output voltage variations, a sufficiently long time can be selected to prevent ripple phenomena on the output voltage,

[0080] ii) To provide a satisfactory output current capacity, a sufficiently short time can be selected to prevent the converter from operating with insufficient output current capacity;

[0081] The architecture of one or more embodiments described herein can provide improved usage flexibility and can be used with different trigger signals to manage the activation and deactivation of a second (or generally secondary) phase, such as:

[0082] - A signal provided by an output current sensor (e.g., a comparator circuit) configured to manage the activation and deactivation of the secondary phase based on the output current requested by the applied load,

[0083] - A signal provided by an input voltage sensor (e.g., a comparator circuit) configured to manage the secondary phase based on the converter input voltage,

[0084] - A signal provided by a control voltage (Vc) comparator configured to power on or power off the secondary phase based on the converter control voltage, which depends on the behavior of the converter, and

[0085] - An external trigger signal and / or other application-dependent signals.

[0086] As illustrated herein, a circuit (e.g., 108) can be configured to generate a secondary switch stage control signal (e.g., Vc') for a multiphase converter device (e.g., 10). The multiphase converter device includes a primary switch stage (e.g., 100) and at least one secondary switch stage (e.g., 100'). Such a circuit can include:

[0087] - An input node (e.g., 1080) configured to receive a control signal (e.g., Vc) for the primary switch stage of the multiphase converter device,

[0088] - An output node (e.g., 1082) configured to provide the secondary switch stage control signal for the at least one secondary switch stage of the multiphase converter device,

[0089] - A first electronic switch (e.g., SW1) configured to couple the output node to the input node due to the activation of the at least one secondary switch stage, and

[0090] - A second electronic switch (e.g., SW2) configured to couple the output node to a capacitive component (e.g., capacitor C) during the activation or deactivation of the at least one secondary switch stage.

[0091] The circuit may include: a first current generation circuit configured to generate a first current (e.g., I3) for selectively charging (e.g., SW3) a capacitive component during activation of the at least one secondary switch stage; and a second current generation circuit configured to generate a second current (e.g., I4) for selectively discharging the capacitive component during deactivation of the at least one secondary switch stage (e.g., SW4). The first current generation circuit and the second current generation circuit may be configured to generate at least one of the first current and the second current based on the control signal received at the input node.

[0092] As illustrated herein, the first current generation circuit and the second current generation circuit may be configured to generate at least one of the first current and the second current that is proportional to the control signal.

[0093] As illustrated herein, the circuit may include:

[0094] - A transconductance amplifier arrangement (e.g., TA) coupled to the input node and configured to generate a control current (e.g., I1) based on the control signal received at the input node,

[0095] - A first current mirror circuit block (e.g., M2, M4) configured to mirror the control current to generate the first current, and

[0096] - A second current mirror circuit block (e.g., M2, M3, M5, M6) configured to mirror the control current to generate the second current.

[0097] As illustrated herein, the circuit may include a digital controller circuit block configured to sense the control signal and set a value of at least one of the first current and the second current based on the sensed control signal.

[0098] As illustrated herein, a multiphase converter device may include a main switch stage controllable by a main control signal and at least one secondary switch stage controllable by respective control signals, wherein the at least one secondary switch stage may be activated to provide current in parallel with the main switch stage. The multiphase converter device may include at least one circuit according to one or more embodiments configured to generate the control signal for the at least one secondary switch stage based on the main control signal.

[0099] As illustrated herein, a multiphase converter device may include a plurality of secondary switch stages and a plurality of circuits according to one or more embodiments, the plurality of circuits being configured to generate respective control signals for the secondary switch stages among the plurality of secondary switch stages.

[0100] As illustrated herein, a method of operating a circuit according to one or more embodiments or a multiphase converter device according to one or more embodiments may include:

[0101] - Receiving, at an input node of the circuit, a control signal for a primary switch stage of a multiphase converter device,

[0102] - As a result of activation of the at least one secondary switch stage, coupling an output node of the circuit to the input node of the circuit,

[0103] - During activation or deactivation of the at least one secondary switch stage, coupling the output node of the circuit to a capacitive component,

[0104] - Generating a first current for selectively charging the capacitive component during activation of the at least one secondary switch stage and a second current for selectively discharging the capacitive component during deactivation of the at least one secondary switch stage, and

[0105] - Generating at least one of the first current and the second current according to the control signal received at the input node of the circuit.

[0106] Without prejudice to the basic principle, details and embodiments may vary, even significantly, from what has been described by way of example only, without departing from the scope of protection.

[0107] The scope of protection is defined by the appended claims.

[0108] The claims are an integral part of the technical teaching provided herein for the embodiments.

Claims

1. A control circuit configured to control the operation of a multiphase converter device including a primary switch stage and a secondary switch stage, the control circuit comprising: An input node configured to receive a primary control signal for the primary switch stage; An output node configured to provide a secondary control signal for the secondary switch stage; A first electronic switch configured to couple the output node to the input node after completion of activation of the secondary switch stage; A second electronic switch configured to couple the output node to a capacitive component during a period of activation of the secondary switch stage and during a period of deactivation of the secondary switch stage; A first current generation circuit configured to generate a first current for selectively charging the capacitive component during the period of activation of the secondary switch stage; And A second current generation circuit configured to generate a second current for selectively discharging the capacitive component during the period of deactivation of the secondary switch stage.

2. The control circuit according to claim 1, wherein the first current is generated in accordance with the primary control signal.

3. The control circuit according to claim 2, wherein the first current is proportional to the voltage of the primary control signal.

4. The control circuit according to claim 1, wherein the second current is generated in accordance with the primary control signal.

5. The control circuit according to claim 4, wherein the second current is proportional to the voltage of the primary control signal.

6. The control circuit according to claim 1, wherein the first current generated by the first current generation circuit is proportional to the primary control signal, and wherein the second current generated by the second current generation circuit is proportional to the primary control signal.

7. The control circuit according to claim 1, further comprising: A transconductance amplifier coupled to the input node and configured to generate a control current in accordance with the primary control signal received at the input node; And wherein the first current generation circuit includes a first current mirror circuit configured to mirror the control current to generate the first current; and wherein the second current generation circuit includes a second current mirror circuit block configured to mirror the control current to generate the second current.

8. The control circuit according to claim 1, further comprising a digital controller circuit configured to sense the primary control signal and set a value of at least one of the first current and the second current in accordance with the sensed primary control signal.

9. A multiphase converter device, comprising: A primary switch stage controllable by a primary control signal; A secondary switch stage controllable by a secondary control signal; wherein the secondary switch stage is capable of being activated to provide current in parallel with the primary switch stage; A control circuit, comprising: An input node configured to receive the primary control signal; An output node configured to provide the secondary control signal; A first electronic switch configured to couple the output node to the input node after completion of activation of the secondary switch stage; A second electronic switch configured to couple the output node to a capacitive component during a period of activation of the secondary switch stage and during a period of deactivation of the secondary switch stage; A first current generation circuit configured to generate a first current for selectively charging the capacitive component during the period of activation of the secondary switch stage; and A second current generation circuit configured to generate a second current for selectively discharging the capacitive component during the period of deactivation of the secondary switch stage.

10. The multiphase converter device according to claim 9, wherein the first current is generated in accordance with the main control signal.

11. The multiphase converter device according to claim 10, wherein the first current is proportional to the voltage of the main control signal.

12. The multiphase converter device according to claim 9, wherein the second current is generated in accordance with the main control signal.

13. The multiphase converter device according to claim 12, wherein the second current is proportional to the voltage of the main control signal.

14. The multiphase converter device according to claim 9, wherein the first current generated by the first current generation circuit is proportional to the main control signal, and wherein the second current generated by the second current generation circuit is proportional to the main control signal.

15. The multiphase converter device according to claim 9, further comprising: A transconductance amplifier coupled to the input node and configured to generate a control current in accordance with the main control signal received at the input node; And wherein the first current generation circuit includes a first current mirror circuit configured to mirror the control current to generate the first current; and wherein the second current generation circuit includes a second current mirror circuit block configured to mirror the control current to generate the second current.

16. The multiphase converter device according to claim 9, further comprising a digital controller circuit configured to sense the main control signal and set a value of at least one of the first current and the second current in accordance with the sensed main control signal.

17. A multiphase converter circuit, comprising: A main switch stage coupled to a first output node and controlled for switching by a first pulse width modulation signal; A secondary switch stage coupled to the first output node and controlled for switching by a second pulse width modulation signal; A first circuit configured to determine a difference between a voltage at the first output node and a reference voltage and generate a first control voltage; A first comparator configured to compare the first control voltage with a first ramp signal to generate the first pulse width modulation signal; A second comparator configured to compare a second control voltage with a second ramp signal to generate the second pulse width modulation signal; A second circuit configured to generate the second control voltage, wherein the second circuit causes the level of the second control voltage to gradually increase to the level of the first control voltage in response to a change of the secondary switch stage from a deactivated state to an activated state; wherein the second circuit comprises: A second output node for outputting the second control voltage; A capacitor; A first switch that selectively couples the capacitor to the second output node in response to the change of the secondary switch stage from the deactivated state to the activated state; and A current source configured to generate a charging current applied to charge the capacitor in response to the change of the secondary switch stage from the deactivated state to the activated state.

18. The circuit according to claim 17, wherein the second circuit further comprises: An input node for receiving the first control voltage; and A second switch that selectively couples the input node to the second output node in response to the level of the second control voltage gradually increasing to the level of the first control voltage.

19. The circuit according to claim 18, wherein the first switch is controlled to decouple the capacitor from the second output node.

20. The circuit according to claim 17, wherein the current source comprises a voltage-to-current converter circuit having: an input configured to receive the first control voltage; and an output that generates the charging current according to the level of the first control voltage.

21. The circuit according to claim 17, wherein the current source comprises a fixed current source that generates the charging current.

22. The circuit according to claim 17, wherein the current source comprises a variable current source that generates the charging current proportional to the level of the first control voltage.

23. The circuit according to claim 17, wherein the second circuit is further configured to cause the level of the second control voltage to gradually decrease from the level of the first control voltage in response to a change of the secondary switch stage from the activated state to the deactivated state. In response to the change of the secondary switch stage from the activated state to the deactivated state, the first switch selectively couples the capacitor to the output node, and the second circuit further comprises an additional current source configured to generate a discharging current applied to discharge the capacitor in response to the change of the secondary switch stage from the activated state to the deactivated state.

24. A multiphase converter circuit comprising: A main switch stage coupled to a first output node and controlled for switching by a first pulse width modulation signal; A secondary switch stage coupled to the first output node and controlled for switching by a second pulse width modulation signal; A first circuit configured to determine a difference between a voltage at the first output node and a reference voltage and generate a first control voltage; A first comparator configured to compare the first control voltage with a first ramp signal to generate the first pulse width modulation signal; A second comparator configured to compare a second control voltage with a second ramp signal to generate the second pulse width modulation signal; A second circuit configured to generate the second control voltage, wherein the second circuit causes the level of the second control voltage to gradually increase to the level of the first control voltage in response to a change of the secondary switch stage from a deactivated state to an activated state wherein the second circuit includes: A second output node for outputting the second control voltage; A capacitor; A first switch selectively coupling the capacitor to the second output node in response to the change of the secondary switch stage from the activated state to the deactivated state; and A current source configured to generate a discharge current applied to discharge the capacitor in response to the change of the secondary switch stage from the activated state to the deactivated state.

25. The circuit according to claim 24, wherein the first switch is controlled to decouple the capacitor from the second output node.

26. The circuit according to claim 24, wherein the current source includes a voltage-to-current converter circuit having an input configured to receive the first control voltage and an output generating the discharge current according to the level of the first control voltage.

27. The circuit according to claim 24, wherein the current source includes a fixed current source generating the discharge current.

28. The circuit according to claim 24, wherein the current source includes a variable current source generating the discharge current proportional to the level of the first control voltage.

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