Method, system and device for verifying authentication

Abstract

The present disclosure relates to a method, system and device for verifying authentication. A processing circuit is used to authenticate a device, and the processing circuit generates a fingerprint based on the state of multiple nodes coupled to multiple circuits. A first fingerprint is generated at a first time based on a first state of the multiple nodes. A second fingerprint is generated at a second time based on a second state of the multiple nodes, and the first fingerprint affects the second state. Electronic data is obtained from the device to be authenticated. The electronic data is compared with the generated fingerprint, and it is determined whether the operation of the device is authorized based on the comparison result.

Description

Technical Field

[0001] The present disclosure relates generally to electronic circuits and systems, and more particularly to electronic devices capable of verifying the authenticity of products associated with consumables or peripheral devices. Background Art

[0002] Especially in the case of returns due to functional issues, the presence of non-authentic consumables of a product is a problem for product manufacturers and authorized suppliers of authentic consumables. It is beneficial to be able to distinguish authentic products from non-authentic products.

[0003] The authentication method has the function of verifying that the consumable paired with the product is effectively authenticated or authorized. In some cases, such an authentication method can be used to verify the authenticity of the device.

[0004] It may be beneficial to at least partially improve certain aspects of product authentication methods, and more particularly, certain aspects of methods of implementing functions used in authentication methods. Summary of the invention

[0005] It is expected to provide a higher performance and more secure product authentication method.

[0006] An embodiment may facilitate overcoming all or part of the shortcomings of known product authentication methods.

[0007] One embodiment provides a method for implementing a first unidirectional function by a device: wherein a second function takes into account the state of digital nodes distributed in the circuit of the device implementing a third function; the state of the nodes is related to a previous result of the first function; and wherein the second function and / or the third function is a unidirectional function.

[0008] According to one embodiment, the second function is a signing function.

[0009] According to one embodiment, the second function is a hash function.

[0010] According to one embodiment, said previous result of the first function has an influence on the third function.

[0011] According to one embodiment, the result is also used to modify a clock signal of the device.

[0012] According to one embodiment, the result is also used to modify a clock signal that has an impact on the implementation of a third function.

[0013] Another embodiment provides a method of authenticating a first electronic device through a second electronic device using the aforementioned method.

[0014] Another embodiment provides an encryption method using the aforementioned method.

[0015] Another embodiment provides a hashing method using the aforementioned method.

[0016] Another embodiment provides an electronic device including circuits capable of implementing the aforementioned method.

[0017] According to one embodiment, the device is a consumable or a peripheral device.

[0018] According to one embodiment, the device is capable of implementing the aforementioned authentication method.

[0019] According to one embodiment, the device is capable of implementing the aforementioned encryption method.

[0020] According to one embodiment, the device is capable of implementing the aforementioned hashing method.

[0021] The method according to the present disclosure can be summarized as including: generating a first fingerprint using a first circuit of the device at a first time based on a first state of multiple second circuits of the device; generating a second fingerprint using the first circuit at a second time based on a second state of the multiple second circuits, the second state of the second circuit being based on an output of the first circuit; comparing the second fingerprint with electronic data received from an external device; and authorizing the device to operate using the external device based on the comparison result.

[0022] According to one embodiment, the method includes providing a first fingerprint to a plurality of second circuits that determine a first state, one or more of the plurality of second circuits performing an operation based on the first fingerprint to determine a second state. According to one embodiment, a hash function is used to generate the second fingerprint, and the method includes generating the second state of the plurality of second circuits based on the second fingerprint. According to one embodiment, the plurality of second circuits use a signature function to generate the second state. According to one embodiment, the first circuit performs a one-way function to generate the first fingerprint. According to one embodiment, the method includes modifying a clock signal of a device based on the first fingerprint. According to one embodiment, the operations performed by the plurality of second circuits are based on the modified clock signal. According to one embodiment, the method includes providing the first fingerprint to a third circuit, the third circuit controlling which of the plurality of second circuits performs a cryptographic operation within a given cycle.

[0023] The system according to the present disclosure can be summarized as including a first device; and a second device coupled to the first device. The second device includes: a plurality of logic circuits having outputs coupled to a plurality of nodes of the second device, and a processing circuit coupled to the plurality of nodes and coupled to the inputs of the plurality of logic circuits. The processing circuit is configured to: generate a plurality of digital fingerprints within a time period, each digital fingerprint being generated based on a current state of a plurality of nodes, and a subsequent state of a plurality of nodes being generated based on each digital fingerprint; receive electronic data from the first device; compare the electronic data with a digital fingerprint in a plurality of fingerprints generated by the processing circuit; and authorize the second device to operate with the first device based on whether the electronic data matches the digital fingerprint.

[0024] According to one embodiment, the second device is an electronic device and the first device is a consumable. According to one embodiment, the second device is a printer and the first device is an ink cartridge. According to one embodiment, the processing circuit generates a first digital fingerprint based on a first state of the plurality of nodes and generates a second digital fingerprint based on a second state of the plurality of nodes, and the plurality of logic circuits generate the second state based on the first digital fingerprint. According to one embodiment, the processing circuit includes a one-way circuit having an input coupled to the plurality of nodes and an output coupled to the plurality of logic circuits, the one-way circuit being configured to perform a cryptographic hash function using the states of the plurality of nodes as input.

[0025] The device according to the present disclosure can be summarized as including: multiple logic circuits having outputs coupled to multiple nodes; a processing circuit coupled to the multiple nodes and coupled to the inputs of the multiple logic circuits; a connector configured to electrically connect the processing circuit to the circuit of an external device, the processing circuit being configured to: generate multiple digital fingerprints within a time period, each digital fingerprint being generated based on the current state of the multiple nodes, and subsequent states of the multiple nodes being generated based on each digital fingerprint; receive electronic data from the circuit of the external device; compare the electronic data with a digital fingerprint among the multiple fingerprints generated by the processing circuit; and authorize the device to utilize the operation of the external device based on a match between the electronic data and the digital fingerprint.

[0026] According to one embodiment, the device is a printer. According to one embodiment, the processing circuit is configured to send a signal to an external device requesting electronic data. According to one embodiment, the processing circuit includes a unidirectional circuit having an input coupled to a plurality of nodes and an output coupled to a plurality of logic circuits, the unidirectional circuit being configured to perform a cryptographic hash function using the states of the plurality of nodes as input. According to one embodiment, the processing circuit includes a loop circuit that defines a number of loops for generating a plurality of digital fingerprints. According to one embodiment, the processing circuit uses a hash function to generate a second fingerprint, and the plurality of logic circuits generate a second state based on the second fingerprint. According to one embodiment, the plurality of logic circuits use a signature function to generate the second state. According to one embodiment, the processing circuit includes a loop circuit that modifies a clock signal of the device based on the first fingerprint. According to one embodiment, the plurality of logic circuits perform operations based on the modified clock signal. According to one embodiment, the processing circuit includes a loop circuit that selects which of the plurality of second circuits performs a cryptographic operation within a given loop.

[0027] The device according to the present disclosure can be summarized as including: a plurality of logic circuits having outputs coupled to a plurality of nodes; a processing circuit coupled to the plurality of nodes and coupled to inputs of the plurality of logic circuits; and a connector configured to electrically connect the processing circuit to a circuit of an electronic device. The processing circuit is configured to receive a request from an electronic device via the connector to provide electronic data for verifying the authenticity of the device; generate a plurality of digital fingerprints within a time period, each digital fingerprint being generated based on a current state of a plurality of nodes, and each digital fingerprint affecting a subsequent state of the plurality of nodes provided by the plurality of logic circuits; and transmit the digital fingerprints to the electronic device to complete the request.

[0028] According to one embodiment, the device is an ink cartridge and the electronic device is a printer device. According to one embodiment, the processing circuit includes a unidirectional circuit having an input coupled to a plurality of nodes and an output coupled to a plurality of logic circuits, the unidirectional circuit being configured to perform a cryptographic hash function using the states of the plurality of nodes as input.

[0029] The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of specific embodiments in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a schematic diagram of one embodiment of an electronic circuit equipped with types of consumables and products.

[0031] Figure 2 is a schematic diagram of one embodiment of a circuit pertaining to an authentication circuit.

[0032] Figure 3is a schematic diagram of one embodiment of a circuit pertaining to an authentication circuit.

[0033] Figure 4 A flow chart illustrating one embodiment of an authentication method is shown. DETAILED DESCRIPTION

[0034] Unless the context indicates otherwise, the same elements in different drawings have been denoted by the same reference numerals. In particular, structural and / or functional elements common to different embodiments may be designated by the same reference numerals and may have the same structure, size, and material properties.

[0035] For clarity, only those steps and elements that are useful for understanding the described embodiments are shown and described in detail.

[0036] Throughout this disclosure, the term “connected” is used to specify a direct electrical connection between circuit elements (without intermediate elements other than conductors), while the term “coupled” is used to specify an electrical connection between circuit elements that may be direct or via one or more other elements.

[0037] In the following description, when referring to terms defining absolute positions (for example, terms “front”, “back”, “top”, “bottom”, “left”, “right”, etc.) or terms defining relative positions (for example, terms “above”, “below”, “upper”, “lower”, etc.) or terms defining directions (for example, terms “horizontal”, “vertical”, etc.), unless otherwise specified, reference is made to the orientation of the accompanying drawings.

[0038] The terms "approximately," "approximately," "substantially," and "on the order of" are used herein to indicate a tolerance of plus or minus 10% (eg, plus or minus 5%) of the value in question.

[0039] In the following description, the term "consumable" will refer to an electronic device that can be coupled to an electronic product for operation. Consumables are usually replaceable after their use. As an example, a memory device (e.g., a non-volatile memory card) is a consumable for a digital camera. The same is true for ink cartridges for printers, replaceable batteries for cell phones, liquid cartridges for electronic cigarettes, and video game cartridges for video game systems. Figures 1 to 4 The described embodiments are non-limiting examples of consumable product pairs and are applicable to many other consumable product pairs.

[0040] Figure 1 A schematic diagram of one embodiment of an electronic circuit or device 3 is shown in block diagram form, the electronic circuit or device 3 being of the type equipped with equipment and consumables.

[0041] Circuit 3 includes:

[0042] a processing unit or circuit 31 (PU), which may be, by way of non-limiting example, a state machine, a microprocessor or a programmable logic circuit;

[0043] one or more volatile and / or non-volatile data storage areas 33 (MEM) for storing all or part of data and / or programs suitable for performing the operations disclosed herein;

[0044] one or more data, address and / or control buses 35 between different components within the circuit 3;

[0045] An input / output interface 37 (I / O) for communicating with the outside of the circuit 3; and Figure 1 Various other circuits according to the present application are represented by box 39 (FCT).

[0046] According to the embodiment shown, the circuit 3 also comprises an authentication circuit 4 (ALGO) implementing the authentication method. To this end, the block 4 is a device with hardware specifically configured to perform cryptographic operations (e.g. via wired logic, application specific integrated circuits, system on chip) to implement the authentication method, for example.

[0047] In one embodiment, an authentication mechanism based on a digital fingerprint, digital signature or other such digital code is provided, which authentication mechanism specifically has a topography linked to an integrated circuit or circuit portion that participates in and performs cryptographic operations. Although reference will be made to an authentication circuit hereinafter, the description may only relate to a portion of that circuit. The topography here refers to the layout of the components forming the circuit 3 on an electronic chip or substrate.

[0048] There is also provision for equipping the product and the consumable with identical authentication circuitry (i.e., circuitry having the same topography) so that when a process is performed on one circuit, the process performed on the other circuit has the same behavior thereof. "Behavior" means that the electronic behavior of the circuit is the same when performing a calculation, program, or the same operation.

[0049] Figure 2 A schematic diagram of one embodiment of a circuit 5 implementing the functions used by the authentication circuit 4 is shown in block diagram form. Figure 1 In other words, circuit 5 forms part of authentication circuit 4.

[0050] The circuit 5 is able to implement a unidirectional function that can be used in an authentication method.

[0051] The circuit 5 includes different logic circuits 53 that implement complex functions, which may include logical operations and / or cryptographic operations. The circuit 5 may include two or more logic circuits 53 ( Figure 35 ). The more logic circuits 53 the circuit 5 includes, the more complex the functions implemented by the circuit 5. The logic circuits 53 each perform a set of operations that vary based on inputs received by the logic circuit 53.

[0052] The digital nodes 51 of the circuit 5 are input nodes and output nodes of the logic circuit 53. The digital nodes 51 can transmit a set of one or more bits, each bit having a high state "1" or a low state "0". Each node in the node 51 can also be a node inside the logic circuit 53, so that the output of the logic circuit 53 is also internally connected to be used as the input of the same logic circuit 53 in the next iteration. The distribution of the digital nodes 51 is related to the topography of the circuit 5. The number of nodes 51 sampled by the circuit 5 and the electrical state of its signature are considered to adjust the robustness of the calculated unique identifier. For example, the circuits 53 may each include multiple internal nodes (e.g., 64 nodes, 128 nodes) to obtain complex functions.

[0053] Circuit 4 may also use circuit 53 for other operations, such as encryption operations, hash operations, etc. The distribution of nodes 51 of circuit 53 considered in the set of operations performed by circuit 53 is related to the application of the hash function of circuit 5. The more nodes are distributed across the larger surface area of ​​circuit 3, the more complex the unidirectional function implemented by circuit 5.

[0054] The circuit 5 also includes a main device 55 having a processing circuit. The processing circuit is hardware including the following items:

[0055] a one-way component or circuit 551 configured to perform a one-way function (e.g., a non-linear hash function that generates a unique value of a fixed size for a given input);

[0056] A loop component or circuit 553 is configured to manage the counting of loops or iterations; and an ID mode component or circuit 555 is configured to activate the authentication method.

[0057] The one-way component 551, the loop component 553, and the ID mode component 555 may be implemented as hardware, software, or a combination thereof.

[0058] The cryptographic operation(s) performed by the one-way component 551 are functions capable of delivering a result, called a code R, based on the state of the node 51. In general, the component 551 is adapted to implement a family of functions capable of providing a result R, to select which function of the family of functions to implement; the circuit 53 may receive a parameter P to allow configuration of the cryptographic function implemented by each circuit 53. The result R is a digital fingerprint generated by applying a one-way function (e.g., a cryptographic hash function) to the code(s) or electronic data received from the circuit 53. The one-way function selected and implemented by the component 551 may be used in multiple iterations, the number of iterations being managed by the function of the loop component 553. The loop component 553 may control the one-way component 551 to execute multiple iterations or loops to be performed.

[0059] According to one embodiment, in each new iteration, code R or a portion of code R calculated in a previous iteration is injected into circuit 53 to modify its internal state and thus its operation. The state of each of the circuits 53 and the operations performed by the circuits 53 can be modified based on all or part of the code R provided. For example, each of the circuits 53 can implement various permutations of operations performed based on all or part of the code R provided. Injecting code R or portions of code R into circuit 53 can add arguments to the operations implemented by circuit 53, thereby modifying the operation of the circuit 53. The various permutations implemented by circuit 53 include (as non-limiting examples) changes in the order of operations, shifting numbers, changing the type of operation, and which portions of code R are operated on. A loop component 553 can be coupled to circuit 53 and configured to control when and which circuit in circuit 53 performs the operations of a given loop.

[0060] The arrangement of operations implemented by the circuit 53 can be at least partially related to the code R. The circuit 53 can select whether to use an internal signal (e.g., the state of the node 51), an external signal (e.g., the code R, a clock signal, a data signal provided by the loop component 553), or both as inputs to the set of operations to be performed in the loop based on the code R. In some implementations, the code R can be divided so that a first portion of the code R is provided as a first input to the separate logic circuit 53, and a second portion of the code R is provided as a second input to the separate logic circuit 53. The loop component 553 can also select (e.g., via an enable line, via a select line) one or more of the logic circuits 53 to perform a complex function for a given loop based on the code R. Therefore, within several loops, even if the separate logic circuit 53 and another separate logic circuit 53 both receive the same series of codes R, the state of one separate logic circuit 53 is different from the state of another separate logic circuit 53.

[0061] The state (e.g., binary coded value) of node 51 is thereby modified. This complicates the calculation of the code R. Once the iteration is complete, the operation of circuit 5 will deliver the final code Rf. Device 55 may include additional logic circuits (e.g., an array of OR gates, an array of XOR gates, an array of AND gates) that combine the outputs from circuit 53.

[0062] When the operation of circuit 5 is used for the authentication method, the final code Rf is generated by two identical authentication circuits of unidirectional component 551. Therefore, any signature calculation is appropriate (for example, using a hash value generated by a hash function, or even directly comparing words representing all sampled states). However, providing an encryption process or a combination or a one-way function to calculate the signature will increase the robustness of the authentication. More specifically, the operation of the one-way component 551 is, for example, a one-way function (for example, a hash function). If the function of the one-way component 551 is not a one-way function, at least one operation performed by circuit 53 is a one-way function. In at least some embodiments, circuit 53 is included in the authentication circuit 4.

[0063] The ID mode component 555 activates the authentication method that enables the initiation of Figure 1 Activation method of circuit 3.

[0064] In this example, the method of authenticating a circuit comprises generating a signature or code using the functionality implemented by the circuit 5. During an initial phase or first iteration, the circuit 53 is initialized or left in its initial state by the processor 31. Thus, the state of the node 51 is in an initial state, and the functionality of the unidirectional component 551 loads a first code R from these states. During the next iteration, the functionality implemented by the circuit 53 is modified using the code R of the previous iteration. Thus, in each iteration, the state of the node 51 is modified, and a new code R is generated based on these states and the code R of the previous iteration.

[0065] Figure 3 A further embodiment of an authentication circuit 5 ′ is shown very schematically in the form of a block diagram.

[0066] Circuit 5' also includes a block or circuit 557 (CLK CTRL), which represents the Figure 2 The circuit 557 thus provides one or more clock signals CLK to the circuit 53 and the component 551 .

[0067] Block 557 may receive information (e.g., code R or portions of code R) from unidirectional component 551. This information enables, for example, the clock signal to be modified, for example, by triggering or not triggering a new cycle, or by modifying the frequency of the clock signal. More specifically, code R may be used to slow down or speed up the execution of the function implemented by circuit 53, and thus modify the code R for the next iteration by modifying the state of node 51.

[0068] An advantage of this embodiment is that modifying the clock signal with the code R enables further complication in obtaining the final code Rf.

[0069] Figure 4 is a diagram showing the use of a combination Figure 2 3 or 4. A flowchart of an exemplary embodiment of an authentication method of one of the circuits 5 and 5' described in FIG. 3. As an example, the authentication method can be implemented by a product and a consumable.

[0070] At step 61 (initial state), the circuit 5 makes wired or wireless contact with another circuit that is identical to it or includes the same authentication circuit part. Then, the authentication method is started by activating the functions of the authentication method (ID mode component 555) of each circuit 3 (for example, by exchanging first data). The first step is the initialization of the logic circuit of the circuit 53.

[0071] At step 62 (initial state ID), the functions forming the device 55 are initialized. As an example, a parameter P for selecting the function of the component 551 is generated.

[0072] At step 63 (ID Enable), the control signal requests activation of the authentication mode of the circuit 3 .

[0073] At step 64 (ID ready), it is verified whether the authentication mode is ready to be used. If it is not possible to activate the mode (output of block 64 is N), the next step is again step 62, otherwise (output of block 64 is Y), the next step is step 65.

[0074] At step 65 (Start ID), the authentication method begins.

[0075] At step 66 (R DET), a first code R is generated by the signature function of the unidirectional component 551 based on the state of the digital node 51. Then iterations are started and the code is modified throughout the code to finally provide the final code Rf. Each iteration includes the generation of the first code R by the unidirectional component 551 and the execution of one or more logic operations by the circuit 53 to provide an output at the node 51.

[0076] At step 67 (end of loop?), the function of loop component 553 verifies whether the number of iterations defined by the function of loop component 553 has been reached. If yes (output of step 67 is Y), the next step is step 68 (COMP). If no (output of block 67 is N), the next step is again step 66, and the signature function continues to iterate.

[0077] At step 68, the final code Rf of circuit 3 is obtained and compared with the code obtained in parallel by the circuit through which circuit 3 expects to be authenticated. If the two codes are the same, the authentication is successful, otherwise the authentication fails. As an example, ID mode component 555 can obtain the final code Rf and compare the final code Rf with the code provided by an external device coupled to device 55. If the final code Rf matches the code provided by the external device, ID mode component 555 authenticates the external device as authentic and can authorize device 55 to operate with the external device.

[0078] According to an alternative embodiment, step 68 may be a step of forming a link towards other calculations having the final code Rf as input.

[0079] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these various embodiments and variations may be combined, and that other variations will occur to those skilled in the art.

[0080] The described embodiment is a simplified one in order to disclose the principle of the authentication performed. The calculations and exchanges may be accompanied by any protection measures customary per se (eg symmetric or asymmetric encryption of the transmissions between the circuits to be authenticated).

[0081] Furthermore, the one-way function of the circuit 5 can be used in the same way as the one-way function, ie for a circuit authentication method, for a data encryption method or for a data hashing method.

[0082] According to one or more embodiments of the present invention, a system includes a device and a consumable. As a non-limiting example, the device can be a printer and the consumable can be a printer cartridge. The device has a circuit, and the consumable has a circuit, and the circuit of the device and the circuit of the consumable each have a structure and are configured to operate as described herein with respect to circuit 3. In the system, the consumable includes a connector that is connected to a corresponding connector of the device. The connector of the consumable and the connector of the device are coupled together to provide an electrical connection between the circuit of the device and the circuit of the consumable via its I / O interface.

[0083] Equipment and consumables each perform Figure 4and authentication methods described elsewhere herein. The circuit of the device may transmit a signal requesting the circuit of the consumable to provide electronic data for verifying the authenticity of the consumable 60. Each of the circuit of the device and the circuit of the consumable generates a final code. In an initial iteration, a processor of one of the circuit of the device and the circuit of the consumable may transmit information indicating an initial state or input of the circuit to another of the circuit of the device and the circuit of the consumable. The device may obtain the final code generated by the circuit of the consumable and compare the final code generated by the circuit of the consumable with the final code generated by the circuit of the device. As a result of determining a match between the final signatures generated by the circuit of the device and the circuit of the consumable, the circuit may determine that the consumable is authentic and authorize the device to operate using the consumable. For example, the authorization circuit may send a signal to another circuit of the device to authorize the device to operate using the consumable.

[0084] Another system includes a device and a counterfeit consumable. Compared to the previous system, the counterfeit consumable includes a circuit that is substantially dissimilar to the circuit 3 described herein. The circuit of the device can attempt to obtain electronic data (e.g., a digital signature) from the counterfeit consumable and compare the obtained data with the final code generated by the circuit of the device. Due to the difference between the circuit 3A of the device and the circuit of the counterfeit consumable, the device will determine that the obtained digital object does not match the final code. As a result, the circuit will not authorize the device to operate using the counterfeit consumable or can restrict the device from operating using the counterfeit consumable.

[0085] Various changes, modifications and improvements are intended to be part of this disclosure and are intended to fall within the spirit and scope of this disclosure. Therefore, the foregoing description is only exemplary and is not intended to be limiting. This disclosure is limited only by the appended claims and their equivalents.

[0086] Some embodiments may take the form of or include a computer program product. For example, according to one embodiment, a computer-readable medium including a computer program suitable for performing one or more of the above methods or functions is provided. The medium may be a physical storage medium (e.g., a read-only memory (ROM) chip, or a disk such as a digital versatile disk (DVD-ROM), a compact disk (CD-ROM), a hard disk, a memory, a network, or a portable medium product read by an appropriate drive or read via an appropriate connection) that includes one or more bar codes or other related codes encoded as stored on one or more such computer-readable media and can be read by a suitable reader device.

[0087] In addition, in some embodiments, some or all of the methods and / or functions may be implemented or provided in other ways (e.g., at least partially implemented or provided in firmware and / or hardware), including but not limited to one or more application-specific integrated circuits (ASICs), digital signal processors, discrete circuits, logic gates, standard integrated circuits, controllers (e.g., by executing appropriate instructions, convolution accelerators, and including microcontrollers and / or embedded controllers), field programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), etc., as well as devices using RFID technology and various combinations thereof.

[0088] The various embodiments described above can be combined to provide other embodiments. If it is desired to employ the concepts of the various patents, applications and publications to provide other embodiments, aspects of the embodiments can be modified.

[0089] These and other changes can be made to the embodiments in light of the above detailed description. Generally, in the following claims, the terms used should not be interpreted as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments of the protection claimed and the full scope of equivalents. Therefore, the claims are not limited by the disclosure.

Claims

1. A method for verifying authentication, comprising: generating a first fingerprint by performing a cryptographic operation using a processing circuit of the device at a first time based on a first state of a plurality of logic circuits of the device; generating a second fingerprint by performing the cryptographic operation using the processing circuit at a second time based on a second state of the plurality of logic circuits, wherein the second state of the logic circuit is obtained based on an output of the processing circuit and by modifying the first state; performing a comparison between the second fingerprint and electronic data received from an external device; as well as Based on a result of the comparison being a match, the device is authorized to operate with the external device.

2. The method according to claim 1, comprising: The first fingerprint is provided to the plurality of logic circuits that determine the first state, and one or more logic circuits of the plurality of logic circuits perform operations based on the first fingerprint to determine the second state.

3. The method according to claim 1, wherein the second fingerprint is generated using a hash function, the method comprising: Based on the first fingerprint, the second states of the plurality of logic circuits are generated. The method of claim 3 , wherein the plurality of logic circuits use a signature function to generate the second state. The method of claim 1 , wherein the processing circuit performs a one-way function to generate the first fingerprint.

6. The method according to claim 1, comprising: A clock signal of the device is modified based on the first fingerprint.

7. The method of claim 6, wherein operations performed by the plurality of logic circuits are performed based on the modified clock signal.

8. The method according to claim 1, comprising: The first fingerprint is provided to a loop circuit, the loop circuit controlling which of the plurality of logic circuits performs the cryptographic operation within a given loop based on the provided first fingerprint, wherein the loop circuit is within the processing circuit.

9. A system for verifying authentication, comprising: First device; as well as A second device is coupled to the first device, wherein the second device comprises: a plurality of logic circuits having outputs coupled to a plurality of nodes of the second device; and a processing circuit coupled to the plurality of nodes and to inputs of the plurality of logic circuits, the processing circuit being configured to: generating a plurality of digital fingerprints by performing a cryptographic operation at a first time within a time period, each digital fingerprint being generated based on a state of the plurality of nodes at the first time; at a second time within the time period after the first time, modifying the state of the plurality of nodes based on each of the generated plurality of digital fingerprints; receiving electronic data from the first device; comparing the electronic data to a digital fingerprint of the plurality of fingerprints generated by the processing circuit; and Based on a result of the comparing being a match, the second device is authorized to operate with the first device.

10. The system of claim 9, wherein the second device is an electronic device and the first device is a consumable.

11. The system of claim 9, wherein the second device is a printer and the first device is an ink cartridge.

12. The system of claim 9, wherein the processing circuit generates a first digital fingerprint based on a first state of the plurality of nodes and generates a second digital fingerprint based on a second state of the plurality of nodes, and the plurality of logic circuits generates the second state based on the first digital fingerprint.

13. The system of claim 9, wherein the processing circuit comprises: A unidirectional circuit has an input coupled to the plurality of nodes and an output coupled to the plurality of logic circuits, the unidirectional circuit being configured to perform a cryptographic hash function using states of the plurality of nodes as input.

14. A device for verifying authentication, comprising: a plurality of logic circuits having outputs coupled to the plurality of nodes; processing circuitry coupled to the plurality of nodes and to inputs of the plurality of logic circuits; A connector configured to electrically connect the processing circuit to a circuit of an external device, wherein the processing circuit is configured to: generating a plurality of digital fingerprints by performing a cryptographic operation at a first time within a time period, each digital fingerprint being generated based on a state of the plurality of nodes at the first time; at a second time within the time period after the first time, modifying the state of the plurality of nodes based on each of the generated plurality of digital fingerprints; receiving electronic data from circuitry of the external device; comparing the electronic data to a digital fingerprint from among the plurality of fingerprints generated by the processing circuit; as well as The device is authorized to operate with the external device based on a match between the electronic data and the digital fingerprint.

15. The device of claim 14, wherein the device is a printer.

16. The device of claim 14, wherein the processing circuit is configured to send a signal to the external device requesting the electronic data.

17. The apparatus of claim 14, the processing circuit comprising: A unidirectional circuit has an input coupled to the plurality of nodes and an output coupled to the plurality of logic circuits, the unidirectional circuit being configured to perform a cryptographic hash function using states of the plurality of nodes as input.

18. The apparatus of claim 14, the processing circuit comprising: The loop circuit defines a number of loops for generating the plurality of digital fingerprints.

19. The apparatus of claim 14, wherein the processing circuit generates a first digital fingerprint based on a first state of the plurality of nodes and generates a second digital fingerprint based on a second state of the plurality of nodes, the plurality of logic circuits generating the second state based on the first digital fingerprint; and The processing circuit generates the second digital fingerprint using a hash function, and the plurality of logic circuits generates the second state based on the first digital fingerprint.

20. The apparatus of claim 19, wherein the plurality of logic circuits use a signature function to generate the second state.

21. The apparatus of claim 19, the processing circuit comprising: A loop circuit modifies a clock signal of the device based on the first digital fingerprint.

22. The apparatus of claim 21, wherein the plurality of logic circuits perform operations based on a modified clock signal.

23. The apparatus of claim 19, the processing circuit comprising: A loop circuit selects which of the plurality of logic circuits performs the encryption operation in a given loop based on the first digital fingerprint provided.

24. A device for verifying authentication, comprising: a plurality of logic circuits having outputs coupled to the plurality of nodes; a processing circuit coupled to the plurality of nodes and to inputs of the plurality of logic circuits; as well as A connector configured to electrically connect the processing circuit to a circuit of an electronic device, wherein the processing circuit is configured to: receiving, via the connector, from the electronic device a request to provide electronic data for verifying the authenticity of the device; generating a plurality of digital fingerprints by performing a cryptographic operation at a first time within a time period, each digital fingerprint being generated based on a state of the plurality of nodes at the first time; at a second time within the time period after the first time, modifying the state of the plurality of nodes based on each of the generated plurality of digital fingerprints; as well as The digital fingerprint is transmitted to the electronic device to complete the request.

25. The device of claim 24, wherein the device is an ink cartridge and the electronic device is a printer device.

26. The apparatus of claim 24, the processing circuit comprising: A unidirectional circuit has an input coupled to the plurality of nodes and an output coupled to the plurality of logic circuits, the unidirectional circuit being configured to perform a cryptographic hash function using states of the plurality of nodes as input.

Images