Method for realizing two-qubit gate using tunable coupler

Abstract

Methods, systems, and apparatus for implementing a two-qubit gate using a tunable coupler. In one aspect, a method of implementing a two-qubit gate includes applying a unitary transformation control signal to a tunable coupler disposed between a first data qubit and a second data qubit to obtain a target unitary transformation of the first data qubit and the second data qubit, wherein the unitary transformation control signal is applied to the tunable coupler for a predetermined period of time to allow coupling between the first data qubit and the second data qubit through the tunable coupler.

Description

Background Art

[0001] The present disclosure relates to quantum computing.

[0002] A typical computer has a memory composed of bits, where each bit can represent either zero or one. A quantum computer maintains a sequence of quantum bits, called qubits, where each qubit can represent zero, one, or any quantum superposition of zero and one. A quantum computer operates by setting the qubits to an initial state and controlling the qubits, for example, according to a sequence of quantum logic gates. The computation ends with a qubit readout, which collapses the system of qubits to an eigenstate, where each qubit represents either zero or one. Summary of the invention

[0003] This disclosure describes techniques for implementing two-qubit quantum logic gates using tunable couplers.

[0004] Generally, one innovative aspect of the disclosed subject matter can be embodied as a method, comprising: applying a unitary transformation control signal to a tunable coupler disposed between a first data qubit and a second data qubit to obtain a target unitary transformation of the first data qubit and the second data qubit, wherein the unitary transformation control signal is applied to the tunable coupler for a predetermined period of time to allow coupling between the first data qubit and the second data qubit via the tunable coupler.

[0005] The above and other implementations can each optionally include one or more of the following features. In some implementations, a unitary transformation control signal is selected from a plurality of different candidate control signals, wherein when the unitary transformation control signal is applied to the tunable coupler for a predetermined period of time, the selected unitary transformation control signal results in a target unitary transformation of the first data qubit and the second data qubit with a precision above a predetermined threshold.

[0006] In some implementations, selecting the unitary transformation control signal from a plurality of different candidate control signals includes: for each different candidate control signal, applying the candidate control signal to a tunable coupler, wherein two or more of the different candidate control signals include different maximum amplitude values; for each different candidate control signal applied to the tunable coupler, determining a corresponding precision of the unitary transformation of the first data qubit and the second data qubit; and identifying one of the candidate control signals as the selected unitary transformation control signal, wherein the identified one of the candidate control signals has a corresponding precision above a predetermined threshold.

[0007] In some implementations, the method further includes: before applying each different candidate control signal to the tunable coupler: applying a disconnect control signal to the tunable coupler to turn a coupling between the first data qubit and the second data qubit; and tuning each of the first data qubit and the second data qubit to the same resonant frequency.

[0008] In some implementations, two or more different candidate control signals are applied over different time periods, and the method further includes setting a time period associated with an identified candidate control signal to a predetermined time period.

[0009] In some implementations, for each different candidate control signal, applying the candidate control signal to the tunable coupler includes changing an amplitude of the candidate control signal from a first value to a maximum amplitude value of the candidate control signal.

[0010] In some implementations, for each different candidate control signal, applying the candidate control signal to the tunable coupler further includes changing the candidate control signal from the maximum amplitude value back to the first value.

[0011] In some implementations, the first value corresponds to a value at which there is no coupling between the first data qubit and the second data qubit.

[0012] In some implementations, the different time periods are selected based on the two-qubit gate execution time.

[0013] In some implementations, the candidate control signal has a predetermined waveform profile.

[0014] In some implementations, the predetermined waveform includes a continuous waveform profile.

[0015] In some implementations, the predetermined waveform profile is in the form of amplitude(t)=constant*(1-cos(t)).

[0016] In some implementations, applying a unitary transformation control signal to a tunable coupler causes an operating frequency of the tunable coupler to change.

[0017] In some implementations, applying the unitary transformation control signal to the tunable coupler includes applying a voltage or current signal to the tunable coupler qubit.

[0018] In some implementations, the two-qubit gate comprises a fermionic swap gate.

[0019] In some implementations, the first data qubit and the second data qubit comprise superconducting qubits.

[0020] In some implementations, the first data qubit and the second data qubit include transmon qubits.

[0021] The subject matter described in this specification can be implemented in a specific way to realize one or more of the following advantages.

[0022] Systems that implement dual-qubit quantum logic gates using the techniques described in this specification can implement dual-qubit gates significantly faster than systems that implement other known techniques. For example, in some cases, dual-qubit gates can be implemented in 14ns or less using the techniques described in this specification. In addition, when performing calculations, systems that implement dual-qubit gates using the techniques described in this specification achieve a reduction in circuit depth. For example, in some cases, the circuit depth for establishing quantum supremacy can be 16 or 10 or less. The improved circuit depth and gate / algorithm execution time improve the operation and efficiency of quantum computing systems that implement the techniques described in this specification.

[0023] In addition, two-qubit gates implemented using the techniques described in this specification have high fidelity and small intrinsic errors, such as errors due to decoherence. For example, in some cases, the intrinsic error can be 8×10 -5 The implementation of the two-qubit gate is also robust to controlling pulse shape imperfections. The two-qubit gate can be successfully implemented despite pulse shape imperfections and achieve the desired results.

[0024] Systems that implement two-qubit quantum logic gates using the techniques described in this specification can realize quantum gates (unitary operators) that are difficult for classical computers to simulate, such as the Fermi SWAP gate, and thus help establish quantum supremacy.

[0025] In addition, in some cases, the implementation of a two-qubit gate using the techniques described in this specification requires reduced physical and computational complexity, for example, due to the range and flexibility of waveform profiles of pulses that can be applied to the tunable couplers of a two-qubit system. For example, the techniques described in this specification for implementing a two-qubit gate do not require knowledge of the electronic transfer function to reverse engineer a suitable control sequence or control waveform for a directly adjustable control parameter (e.g., voltage) to implement the desired gate. In contrast, the currently described techniques allow the gate to be calibrated and implemented by directly tuning those control parameters. In addition, unlike other known techniques, the control waveform is not limited by a specific coupler implementation or the signal interaction trajectory provided by the coupler. The techniques described in this specification can be used to implement a two-qubit gate that is combined with a single-qubit gate to form a universal quantum gate set. For example, the Fermi SWAP gate forms a universal quantum gate set together with the single-qubit gate.

[0026] Systems implementing two-qubit quantum gates using the techniques described in this specification can avoid frequency crowding. Two-qubit gates implemented using the techniques described in this specification can be executed simultaneously on a qubit system including more than two qubits without frequency conflicts and unnecessary interactions. Controllable couplers can be used to turn off unnecessary interactions with adjacent qubits. Executing two-qubit gates simultaneously may reduce circuit depth. For example, executing two-qubit gates simultaneously may reduce circuit depth by a factor of 2 compared to not executing two-qubit gates simultaneously.

[0027] The details of one or more implementations of the subject matter of this specification are set forth in the accompanying drawings and the following description. Other features, aspects, and advantages of the subject matter will become apparent from the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 An exemplary system for implementing a two-qubit gate with a tunable coupler is depicted.

[0029] Figure 2 is a flow chart of an exemplary process for implementing a two-qubit gate on a first data qubit and a second data qubit using a tunable coupler disposed between the first data qubit and the second data qubit.

[0030] Figure 3 is a flow chart of an example process for selecting a unitary transformed control signal from a plurality of different candidate control signals.

[0031] Figure 4 is a graph illustrating exemplary unitary transformation control signal waveforms for implementing a two-qubit Fermi SWAP gate.

[0032] Figure 5 is a graph comparing the results of numerically simulating randomly selected quantum gates on a 6-qubit chain.

[0033] Figure 6 is a graph showing simulation results for a Fermi SWAP gate implemented using the techniques described in this disclosure. DETAILED DESCRIPTION

[0034] This specification describes methods and systems for implementing high-fidelity two-qubit logic gates with reduced execution time by directly tuning adjustable control parameters associated with corresponding gate parameters.

[0035] The tunable coupler is located between the two qubits. The qubits and the tunable coupler are configured and arranged so that during the operation of the qubits, the tunable coupler provides a dynamic control range of the interaction between the two qubits, including an OFF state of zero interaction between the two qubits. The interaction between the two qubits is tuned by directly adjusting the control parameters, such as by adjusting the voltage, and tuning the tunable coupler. Therefore, the two-qubit gate can be realized by directly adjusting the control parameters according to the corresponding control waveform within a predetermined duration or time period. There is no need to know the functional dependence of the two-qubit gate on the tunable coupler parameters (such as the tunable coupler frequency) or the related control parameters (such as voltage).

[0036] The specific form of the control waveform is determined by performing a series of experiments. For example, a set of maximum values ​​of the corresponding control parameter, such as a set of maximum values ​​of the voltage, is selected. Then, the corresponding control parameter is continuously increased from an initial voltage to one of the selected maximum values ​​and then decreased back to the initial voltage over a fixed selected time period. This tuning of the coupler results in a corresponding tuning of the interaction between the two qubits and a corresponding unitary transformation of the qubits.

[0037] By determining the initial state of the qubit prior to an interaction, and measuring the state of the qubit after different interactions corresponding to different control waveforms for different maximum values ​​of the control parameter, a unitary transformation associated with a corresponding control waveform of the control parameter can be determined from the control parameter (e.g., voltage). The maximum value of the control parameter and the duration corresponding to a particular unitary transformation need only be determined once. Thereafter, a unitary transformation can be achieved by continuously increasing the value of the control parameter to the determined corresponding maximum value and continuously decreasing it back to the initial value over a determined time interval. A wide range of waveform profiles can be used to achieve a particular two-qubit gate operation with high fidelity.

[0038] Example operating environment

[0039] Figure 1 Can be executed as a reference Figures 2 to 3 Example systems of the described methods.

[0040] System 100 includes quantum hardware 102 that includes at least a first data qubit 104, a second data qubit 106, and a tunable coupler 108 between the first data qubit and the second data qubit. First data qubit 104, second data qubit 106, and tunable coupler 108 may be subcomponents of quantum hardware 102. For example, quantum hardware 108 may include additional data qubits and additional tunable couplers. Each of first data qubit 104, second data qubit 106, and tunable coupler 108 may be frequency tunable.

[0041] First data qubit 104 and second data qubit 106 may be superconducting qubits. For example, first data qubit 104 and second data qubit 106 may be transmon qubits. Other qubit architectures may alternatively be used.

[0042] A variety of different tunable coupler designs may be used. For example, the tunable coupler 108 may include a three-terminal device constructed from superconductor material, using a fixed negative mutual inductance and a single current biased Josephson junction that serves as a tunable positive inductance. Further discussion and examples of tunable couplers are described in detail in “Atunable coupling scheme for implementing high-fidelity two-qubit gates”, Fei Yan et al., arxiv:quant-ph / 180309813v1, “Demonstration of a TuneableCoupler for Superconducting Qubits Using Coherent, Time Domain, Two-QubitOperations”, RCBialczak et al., arxiv:quant-ph / 1007.2219v1, “Sign-andmagnitude-tunable coupler for superconducting flux qubits”, and R.Harris etal., arxiv:cond-mat / 0608253v4, “Tunable coupler for superconducting Xmonqubits: Perturbative nonlinear model”, Michael R.Geller et al., arxiv:quant-ph / 1405.1915v1, each of which is incorporated herein by reference in its entirety.

[0043] System 100 includes control electronics 110. Control electronics 110 may include an arbitrary waveform generator.

[0044] System 100 includes qubit control lines 112 from control electronics 110 to first data qubit 104 and second data qubit 106, respectively. For example, qubit control lines 112 may be used to tune the frequencies of first data qubit 104 and second data qubit 106. The frequencies of first data qubit 104 and second data qubit 106 may be tuned by applying a control signal to qubit control lines 112 via control electronics 110. Additionally, control electronics 110 may perform measurements of first data qubit 104 and second data qubit 106 via qubit control lines 112. The measurements of first data qubit 104 and the measurements of second data qubit 106 determine the states of first data qubit 104 and second data qubit 106, respectively. Control electronics 110 may store, display, and / or further process the results of each measurement of first data qubit 104 and second data qubit 106.

[0045] System 100 includes a tunable coupler control line 114. Control electronics 110 may dynamically tune the coupling or interaction between first data qubit 104 and second data qubit 106 by applying a control signal to tunable coupler control line 114 to tune the frequency of tunable coupler 108. For example, control electronics 110 may apply a voltage pulse to tunable coupler control line 114 to tune the frequency of tunable coupler 108. In some implementations, control electronics 110 may include a data processing device and associated memory. The memory may include a computer program having instructions that, when executed by the data processing device, cause the data processing device to perform one or more functions described herein, such as applying control signals to qubits and / or tunable couplers.

[0046] Example method to realize a two-qubit gate using a tunable coupler

[0047] Figure 2 is a flow chart of an example process 200 for implementing a two-qubit gate on a first data qubit and a second data qubit using a tunable coupler disposed between the first data qubit and the second data qubit. For example, process 200 can be used to implement a fermionic SWAP gate on the first data qubit and the second data qubit. For convenience, process 200 is described as being performed by quantum hardware in communication with control electronics located at one or more locations. For example, a process appropriately programmed according to the present specification Figure 1 The system 100 may perform the process 200 .

[0048] In a first step of the process, a unitary transformation control signal is selected from a plurality of different candidate control signals to achieve a dual qubit when applied to a first data qubit and a second data qubit (step 202). When the unitary transformation control signal is applied to a tunable coupler for a predetermined period of time, the selected unitary transformation control signal results in a target unitary transformation of the first data qubit and the second data qubit with a precision above a predetermined threshold.

[0049] The predetermined threshold of accuracy for the target unitary transformation can be determined based on a target fidelity for the two-qubit gate. For example, the predetermined threshold of accuracy can be selected to be above a critical value to successfully execute a quantum algorithm using a two-qubit gate or to successfully establish quantum supremacy using a two-qubit gate.

[0050] Multiple different candidate control signals can have predetermined waveform profiles. In some cases, the predetermined waveform profile can be a continuous waveform profile, for example, in the form of amplitude(t)=constant*(1-cos(t)). However, as long as the maximum amplitude, the predetermined time period, and the area under the amplitude trajectory are fixed to predetermined values, the waveform profile can vary. This allows a variety of different control waveforms to implement a two-qubit gate. In some cases, the period of the sinusoid can also be changed. However, in order to minimize the effects of decoherence, a shorter total pulse length can be selected that does not reduce the intrinsic fidelity of the gate. Refer to the following Figure 3 An example process for determining a unitary transform control signal is described.

[0051] In a second step of the process, the unitary transformation control signal selected in step 202 is applied to the tunable coupler to obtain a target unitary transformation of the first data qubit and the second data qubit (step 204). Applying the unitary transformation control signal to the tunable coupler may include applying a voltage or current signal to the tunable coupler to cause the operating frequency of the tunable coupler to change. The unitary transformation control signal is applied to the tunable coupler for a predetermined time period to allow coupling between the first data qubit and the second data qubit through the tunable coupler. The predetermined time period may be selected based on a target two-qubit gate execution time, as described below with reference to Figure 3 As described.

[0052] Figure 3 is a flow chart of an example process 300 for selecting a unitary transformation control signal from a plurality of different candidate control signals. For convenience, process 300 is described as being performed by quantum hardware in communication with control electronics located at one or more locations. For example, a properly programmed according to the present specification Figure 1 The system 100 may perform the process 300 .

[0053] In a first step of the process, each different candidate control signal is applied to a tunable coupler (step 302). Two or more different candidate control signals have different maximum amplitude values. The different maximum amplitude values ​​for the different candidate control signals can be selected based on the hardware implementing the two-qubit gate. For example, the maximum amplitude value can be selected to be below a critical value that may cause an undesirable transition of the first data qubit or the second data qubit to a non-computational ground state.

[0054] Prior to applying the candidate control signal to the tunable coupler, the first data qubit and the second data qubit may be tuned to the same resonant frequency. Tuning the first data qubit and the second data qubit to the same resonant frequency aligns the first qubit and the second qubit and enables the tunable coupler to facilitate interaction between the first qubit and the second qubit. For example, the first data qubit and the second data qubit may be tuned to a resonant frequency of 6 GHz or a resonant frequency in a range between 5 GHz and 7 GHz. Additionally, a disconnect control signal may be applied to the tunable coupler to change the coupling between the first data qubit and the second data qubit. The candidate control signal may then be applied to the tunable coupler.

[0055] Applying two or more different candidate control signals to the tunable coupler may include applying the two or more different candidate control signals to the tunable coupler at different time periods. The different time periods may be selected based on the target two-qubit gate execution time and the details of the hardware implementing the two-qubit gate. For example, the candidate time periods may include time periods that are slow enough so as not to cause an undesired transition of the first data qubit or the second data qubit to a non-computational basis state, but are close enough to the target gate execution time. For example, in some cases, the minimum distance between the computational basis state and the non-computational basis state may be at least 200-250 MHz. In these cases, the candidate time period may be selected to be longer than 1 / 200 MHz, such as 5ns, 6ns, 7ns, 8ns, or slower.

[0056] Applying the candidate control signal to the tunable coupler may include changing the candidate control signal amplitude from a first value (e.g., a value at which there is no coupling between the first data qubit and the second data qubit) to a maximum amplitude value for that particular candidate control signal. Optionally, this may further include changing the candidate control signal from the maximum amplitude value back to the first value.

[0057] In a second step of the process, for each different candidate control signal applied to the tunable coupler, a corresponding precision of the unitary transformation of the first data qubit and the second data qubit is determined (step 304). The precision may be determined by measuring the state of the first data qubit and the second data qubit after each application of one of the different candidate control signals to the tunable coupler.

[0058] In the third step of the process, candidate control signals that result in a unitary transformation with an accuracy above a predetermined threshold are identified (step 306). The time period associated with the identified candidate control signal may be set to a predetermined time period. Figures 4 to 6 Example unitary transformation control signals for implementing a two-qubit Fermi SWAP gate identified using processes 200 and 300 are described.

[0059] Figure 4 is a graph 400 illustrating exemplary unitary transformation control signal waveforms for implementing a two-qubit Fermi SWAP gate represented by a 4×4 matrix.

[0060]

[0061] The graph includes a horizontal axis 404 representing time (ns) and a vertical axis 406 representing coupling strength (MHz) (voltage applied to the tunable coupler control line). The unitary transformation control signal waveform 402 is a reference to Figure 2 and Figure 3 Examples of waveforms determined by methods 200 and 300 are described. For example, the unitary transformation control signal waveform 302 is configured to implement a Fermi SWAP gate on the first data qubit and the second data qubit by applying to a tunable coupler located between the first data qubit and the second data qubit.

[0062] The unitary transformation control signal waveform 402 is one non-limiting example of many unitary transformation control signal waveforms that can implement the Fermi SWAP gate. For example, control signal waveforms having different durations combined with different maximum amplitudes can also be used to achieve the same target unitary transformation. The same target unitary transformation can also be achieved for different waveform profiles as long as the maximum amplitude, duration, and area under the amplitude curve are the same. In general, the control signal waveforms with respect to the Fermi SWAP gate can be used. Figure 2 The described method 200 determines different unitary transform control signal waveforms incorporating the same or different durations and maximum amplitudes to achieve different target unitary transforms.

[0063] As shown in graph 400, unitary transformation control signal waveform 402 can perform a two-qubit Fermi SWAP operation in 14 ns. Alternative methods of implementing a two-qubit Fermi SWAP operation may be 3 times slower. In addition, the Fermi SWAP gate implemented by unitary transformation control signal waveform 402 has an 8×10 -5 The inherent error.

[0064] Figure 55 is a graph 500 comparing the results of numerically simulating a randomly selected quantum gate on a 6-qubit chain. The graph includes a horizontal axis 502 representing the number of cycles applied to the gate and a vertical axis 504 representing the distance from the Porter-Thomas distribution (i.e., a measure of computational complexity). The first line 506 shows the results of simulating a randomly selected quantum gate using a controlled Z (CZ) gate. The second line 508 shows the results of simulating a randomly selected quantum gate using a FermiSWAP gate implemented by using the unitary transformation control signal waveform described herein.

[0065] As shown in graph 500, using a Fermi SWAP gate instead of a CZ gate results in a convergence of the Porter-Thomas distribution and a 2.5x reduction in circuit depth.

[0066] Figure 6 6 is a graph 600 showing simulation results for a FermiSWAP gate implemented using the techniques described in the present disclosure. The graph includes a horizontal axis 602 representing circuit depth and a vertical axis 604 representing performance metrics purity and crossentropy benchmarking (XEB), both of which take values ​​between 0 and 1. Cross entropy measures the overall fidelity of the FermiSWAP gate. Purity measures the error due to decoherence.

[0067] The simulation results show that the cross entropy (606) is nearly consistent with the purity measure (608), which indicates that the quantum algorithm using the Fermi SWAP gate is a coherently limited algorithm. Furthermore, the simulation results show that, as shown in reference Figure 2 and Figure 3 As described, the Fermi SWAP gates implemented by applying a unitary transformation control signal to a tunable coupler have high fidelity, with an error of about 0.4% or about 0.2% for each Fermi SWAP gate. The 0.2% error is about three times the error of the smallest two-qubit gate that can be achieved using other known techniques.

[0068] Implementation of the subject matter and operations described in this specification may be implemented in tangibly embodied software or firmware, in computer hardware in digital electronic circuits, analog electronic circuits, suitable quantum circuits, or more generally in quantum computing systems, including the structures disclosed in this specification and their equivalents, or a combination of one or more of them. The term "quantum computing system" may include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptographic system, or a quantum simulator.

[0069] Implementations of the subject matter described in this specification may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a tangible, non-transitory storage medium, to be executed by a data processing device or to control the operation of the processing device. The computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access storage device, one or more qubits, or a combination of one or more of them. Alternatively or in addition, the program instructions may be encoded on an artificially generated propagated signal capable of encoding digital and / or quantum information, such as a machine-generated electrical, optical, or electromagnetic signal, which is generated to encode digital and / or quantum information for transmission to a suitable receiver device for execution by a data processing device.

[0070] The terms quantum information and quantum data refer to information or data carried, held or stored by a quantum system, wherein the smallest non-trivial system is a qubit, i.e., a system that defines a unit of quantum information. It should be understood that the term "qubit" encompasses all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems may include, for example, multi-level systems having two or more levels. For example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the ground state and the first excited state are used to identify the computational basis state, but it should be understood that other arrangements that identify the computational state using higher level excited states are also possible.

[0071] The term "data processing device" refers to digital and / or quantum data processing hardware, and includes various devices, devices and machines for processing digital and / or quantum data, including, for example, programmable digital processors, programmable quantum processors, digital computers, quantum computers, multiple digital and quantum processors or computers, and combinations thereof. The device may also be or further include a dedicated logic circuit, such as an FPGA (field programmable gate array), an ASIC (application-specific integrated circuit), or a quantum simulator, i.e., a quantum data processing device designed to simulate or generate information about a specific quantum system. In particular, a quantum simulator is a dedicated quantum computer without the ability to perform general-purpose quantum computations. In addition to the hardware, the device may optionally include code that creates an execution environment for a digital and / or quantum computer program, for example, code constituting processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof.

[0072] A digital computer program, which may also be referred to or described as a program, software, software application, module, software module, script or code, may be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, object or other unit suitable for use in a computing environment. A quantum computer program, which may also be referred to or described as a program, software, software application, module, software module, script or code, may be written in any form of programming language, including compiled or interpreted languages ​​or declarative or procedural languages, and translated into a suitable quantum programming language, or may be written in a quantum programming language such as QCL or Quipper.

[0073] A computer program may, but need not, correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., a file storing one or more modules, subroutines, or portions of code). A computer program may be deployed to execute on one computer, or on multiple computers located at one site or distributed across multiple sites and interconnected by a data communications network. A quantum data communications network is understood to be a network that can send quantum data using quantum systems (e.g., qubits). Typically, digital data communications networks cannot send quantum data, but quantum data communications networks can send both quantum data and digital data.

[0074] The processes and logic flows described in this specification can be performed by one or more programmable computers, operating appropriately with one or more processors, executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by a dedicated logic circuit (e.g., FPGA or ASIC) or a quantum simulator, or the apparatus can also be implemented as a dedicated logic circuit or quantum simulator, or by a dedicated logic circuit or quantum simulator and one or more programmed digital and / or quantum computers.

[0075] For a system of one or more computers to be "configured to" perform a particular operation or action, it is meant that the system has installed thereon software, firmware, hardware, or a combination thereof, which, in operation, causes the system to perform those operations or actions. For one or more computer programs to be configured to perform a particular operation or action, it is meant that the one or more programs include instructions that, when executed by a data processing device, cause the device to perform the operation or action. For example, a quantum computer may receive instructions from a digital computer that, when executed by the quantum computing device, cause the device to perform the operation or action.

[0076] A computer suitable for executing a computer program may be based on a general or special purpose processor or any other kind of central processing unit. Typically, the central processing unit will receive instructions and data from a read-only memory, a random access memory, or a quantum system suitable for transmitting quantum data (e.g., photons or a combination thereof).

[0077] Elements of a computer include a central processing unit for performing or executing instructions and one or more storage devices for storing instructions and digital, analog and / or quantum data. The central processing unit and the memory may be supplemented or incorporated by a dedicated logic circuit or a quantum simulator. Typically, a computer will also include or be operably coupled to receive data from or transfer data to one or more mass storage devices or both for storing data (e.g., magnetic, magneto-optical disks, optical disks, or quantum systems suitable for storing quantum information). However, a computer need not have such devices.

[0078] Quantum circuit elements (also called quantum computing circuit elements) include circuit elements for performing quantum processing operations. That is, quantum circuit elements are configured to perform operations on data in an uncertain manner using quantum mechanical phenomena such as superposition and entanglement. Specific quantum circuit elements (such as qubits) can be configured to represent and operate on information in more than one state simultaneously. Examples of superconducting quantum circuit elements include circuit elements such as quantum LC oscillators, qubits (e.g., flux qubits, phase qubits, or charge qubits), and superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUIDs or DC-SQUIDs).

[0079] In contrast, classical circuit elements typically process data in a deterministic manner. Classical circuit elements can be configured to collectively execute the instructions of a computer program by performing basic arithmetic, logic, and / or input / output operations on data, where the data is represented in analog or digital form. In some implementations, classical circuit elements can be used to send data to and / or receive data from quantum circuit elements via electrical or electromagnetic connections. Examples of classical circuit elements include circuit elements based on CMOS circuits, fast single flux quantum (RSFQ) devices, reciprocal quantum logic (RQL) devices, and ERSFQ devices, which are energy-efficient versions of RSFQ that do not use bias resistors.

[0080] In certain cases, some or all of quantum and / or classical circuit elements can be realized using, for example, superconducting quantum and / or classical circuit elements. The manufacture of superconducting circuit elements may require the deposition of one or more materials, such as superconductors, dielectrics and / or metals. Depending on the selected material, these materials can be deposited using a deposition process, such as chemical vapor deposition, physical vapor deposition (e.g., evaporation or sputtering) or other deposition processes of epitaxial technology. The process for manufacturing circuit elements described herein may require the removal of one or more materials from the device during manufacture. Depending on the material to be removed, the removal process may include, for example, wet etching techniques, dry etching techniques or stripping processes. The material forming the circuit elements described herein can be patterned using known lithography techniques (e.g., photolithography or electron beam lithography).

[0081] During operation of a quantum computing system using superconducting quantum circuit elements and / or superconducting classical circuit elements (such as the circuit elements described herein), the superconducting circuit elements are cooled in a cryostat to a temperature that allows the superconductor material to exhibit superconducting properties. Superconductor (alternatively superconducting) materials can be understood as materials that exhibit superconducting properties at or below the superconducting critical temperature. Examples of superconducting materials include aluminum (superconducting critical temperature of 1.2 Kelvin) and niobium (superconducting critical temperature of 9.3 Kelvin). Therefore, superconducting structures (such as superconducting traces and superconducting ground planes) are formed of materials that exhibit superconducting properties at or below the superconducting critical temperature.

[0082] In certain implementations, control signals for quantum circuit elements (e.g., qubits and qubit couplers) may be provided using classical circuit elements electrically and / or electromagnetically coupled to the quantum circuit elements. The control signals may be provided in digital and / or analog form.

[0083] Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile digital and / or quantum memory, media and storage devices, including, for example, semiconductor memory devices, such as EPROM, EEPROM and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; CD-ROM and DVD-ROM disks; and quantum systems, such as trapped atoms or electrons. It is understood that quantum memory is a device that can store quantum data for a long time with high fidelity and high efficiency, such as a light-matter interface, where light is used for transmission and matter is used for storage and preservation of quantum characteristics of quantum data, such as superposition or quantum coherence.

[0084] Control of the various systems or parts thereof described in this specification may be implemented in a computer program product that includes instructions stored on one or more non-transitory machine-readable storage media and executable on one or more processing devices. The systems or parts thereof described in this specification may each be implemented as an apparatus, method, or system, which may include one or more processing devices and memory to store executable instructions to perform the operations described in this specification.

[0085] Although this specification contains many specific implementation details, these details should not be interpreted as limitations on any invention or the scope of the claimed protection, but should be interpreted as descriptions of features specific to a particular implementation of a particular invention. Specific features described in this specification in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented in multiple implementations or in any suitable sub-combination. In addition, although features may be described above as working in a particular combination and even initially claimed as such, in some cases one or more features in the claimed combination may be deleted from the combination, and the claimed combination may be used in a sub-combination or a variation of the sub-combination.

[0086] Similarly, although operations are depicted in a particular order in the drawings and recited in the claims, this should not be construed as requiring that such operations be performed in the particular order shown or in a sequential order, or that all of the illustrated operations be performed to achieve the desired results. In certain circumstances, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system modules and components in the above implementations should not be construed as requiring such separation in all implementations, and it should be understood that the described program components and systems may generally be integrated together in a single software product or packaged into multiple software products.

[0087] Certain embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order and still achieve the desired results. As an example, the processes depicted in the accompanying drawings do not necessarily require the particular order shown, or sequential order, to achieve the desired results. In certain circumstances, multitasking and parallel processing may be advantageous.

Claims

1. A method for implementing a two-qubit gate, the method comprising: applying a unitary transformation control signal to a tunable coupler disposed between the first data qubit and the second data qubit to obtain a target unitary transformation of the first data qubit and the second data qubit, wherein a unitary transformation control signal is applied to the tunable coupler within a predetermined time period to allow coupling between the first data qubit and the second data qubit through the tunable coupler; and selecting a unitary transformation control signal from a plurality of different candidate control signals, wherein the selected unitary transformation control signal, when applied to the tunable coupler for a predetermined period of time, results in a target unitary transformation of the first data qubit and the second data qubit with a precision above a predetermined threshold, Wherein, selecting a unitary transformation control signal from a plurality of different candidate control signals comprises: for each different candidate control signal, applying the candidate control signal to the tunable coupler, wherein two or more different candidate control signals include different maximum amplitude values; For each different candidate control signal applied to the tunable coupler, determining a corresponding accuracy of the unitary transformation of the first data qubit and the second data qubit; and One of the candidate control signals is identified as the selected unitary transformed control signal, wherein the identified one of the candidate control signals has a corresponding accuracy above a predetermined threshold.

2. The method according to claim 1, further comprising: Before applying each different candidate control signal to the tunable coupler: applying an off control signal to the tunable coupler to change the coupling between the first data qubit and the second data qubit; and Each of the first data qubit and the second data qubit is tuned to the same resonant frequency.

3. The method according to claim 1, wherein: Two or more different candidate control signals are applied over different time periods, the method further comprising setting a time period associated with an identified candidate control signal to a predetermined time period.

4. The method according to claim 1, wherein: For each different candidate control signal, applying the candidate control signal to the tunable coupler includes changing the amplitude of the candidate control signal from a first value to a maximum amplitude value of the candidate control signal.

5. The method according to claim 4, wherein: For each different candidate control signal, applying the candidate control signal to the tunable coupler further includes changing the candidate control signal from the maximum amplitude value back to the first value.

6. The method according to claim 4, wherein: The first value corresponds to a value where there is no coupling between the first data qubit and the second data qubit.

7. The method according to claim 3, wherein: The different time periods are selected based on the execution time of the two-qubit gate.

8. The method according to any one of claims 1 to 7, wherein: The candidate control signal has a predetermined waveform profile.

9. The method according to claim 8, wherein: The predetermined waveform includes a continuous waveform profile.

10. The method according to claim 9, wherein: The predetermined waveform profile is in the form of amplitude(t)=constant*(1-cos(t)).

11. The method according to claim 1, wherein: Applying a unitary transformation control signal to the tunable coupler causes the operating frequency of the tunable coupler to change.

12. The method according to claim 1, wherein: Applying the unitary transformation control signal to the tunable coupler includes applying a voltage or current signal to the tunable coupler qubit.

13. The method according to claim 1, wherein: Two-qubit gates include the Fermi SWAP gate.

14. The method according to claim 1, wherein: The first data qubit and the second data qubit comprise superconducting qubits.

15. The method according to claim 1, wherein: The first data qubit and the second data qubit comprise transmon qubits.

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