Wafer optical processing equipment and sintering furnace

Abstract

The present application provides a wafer optical processing device and a sintering furnace. The wafer optical processing device includes: a wafer support device, an upper light source device, and a lower light source device. The wafer support device includes a support member configured to support the wafer above the upper surface; the upper light source device is disposed above the wafer support device and configured to provide a light source that illuminates the upper surface of the support member; the lower light source device is disposed below the wafer support device and configured to provide a light source that illuminates the lower surface of the support member. The wafer optical processing device provided by the present application can efficiently process wafers.

Description

Technical Field

[0001] The present application relates to a wafer optical processing device, in particular to a wafer optical processing device used in a sintering furnace. Background Art

[0002] Currently, PERC solar cells are one of the solar cells that have been widely commercialized. During the production of PERC solar cells, after the cell electrode wafers undergo the sintering process, a process of light attenuation and recovery naturally occurs. This process usually takes a certain amount of time. To shorten this process, the solar cell wafers are subjected to light treatment after the sintering process, so that the solar cell wafers can complete the attenuation and recovery process in a shorter time. Currently, the production of solar cell wafers uses assembly line operations. Light treatment of the wafers after the sintering process will effectively improve production efficiency. Summary of the Invention

[0003] The present application provides a wafer optical processing device for optically processing a sintered wafer, comprising:

[0004] A wafer support device, the wafer support device comprising a support member having an upper surface and a lower surface disposed opposite to each other, the support member being hollowed out in a direction from the upper surface to the lower surface, the support member being configured to support the wafer above the upper surface;

[0005] an upper light source device disposed above the wafer support device and configured to provide a light source irradiated toward an upper surface of the support member; and

[0006] A lower light source device is disposed below the wafer support device and is configured to provide a light source irradiated toward a lower surface of the support member.

[0007] In the wafer optical processing device as described above, the wafer supporting device includes a conveyor belt, and the conveyor belt forms the supporting member.

[0008] In the wafer optical processing device as described above, an isolation member is provided on the conveyor belt, and the isolation member is configured to separate the wafer from the upper surface of the conveyor belt by a certain distance.

[0009] In the wafer optical processing device as described above, the upper light source device and the lower light source device each include a plurality of light source modules. When performing optical processing on a wafer, one or more of the plurality of light source modules may be activated.

[0010] In the wafer light processing device as described above, the light source module provides an LED light source.

[0011] In the wafer light processing device as described above, the maximum illumination energy that can be provided by the upper light source device per unit time is greater than the maximum illumination energy that can be provided by the lower light source device per unit time.

[0012] The wafer optical processing device as described above, further comprising:

[0013] an upper transparent baffle, the upper transparent baffle being located between the upper light source device and the wafer support device, and having a distance therebetween from the upper light source device, and having a plurality of holes formed on the upper transparent baffle;

[0014] A lower transparent baffle is located between the lower light source device and the supporting device, and has a distance between the lower transparent baffle and the lower light source device.

[0015] The wafer optical processing device as described above, further comprising:

[0016] an upper cooling device, the upper cooling device being arranged above the upper light source device to provide cooling for the upper light source device,

[0017] A lower cooling device is provided below the lower light source device and is used to provide cooling for the lower light source device.

[0018] The wafer optical processing device as described above, wherein the wafer optical processing component further comprises:

[0019] The shell comprises an upper lighting device and a lower light source device, wherein the upper lighting device and the lower light source device are both located in the shell, and the shell comprises an air inlet and an air outlet, wherein the air inlet is located above the shell and the air outlet is located below the shell, so that air flow can flow in from the air inlet and out from the air outlet.

[0020] The present application provides a sintering furnace, comprising:

[0021] Wafer sintering processing equipment; and

[0022] The wafer optical processing device as described above is arranged downstream of the wafer sintering processing device.

[0023] The wafer optical processing device in the present application can process the front and back sides of the wafer simultaneously while ensuring the optical processing effect, thereby greatly improving the processing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a perspective view of a wafer optical processing device;

[0025] Figure 2A yes Figure 1 A perspective view of the front and rear of the wafer optical processing device without the housing

[0026] Figure 2B yes Figure 2A A cross-sectional view of the wafer optical processing device along line AA;

[0027] Figure 3 is a perspective view of an upper optical processing assembly, a wafer support device, and a lower optical processing assembly;

[0028] Figure 4 for Figure 3 Exploded view of the upper light handling assembly;

[0029] Figure 5 for Figure 3 Exploded view of the lower light processing assembly in FIG;

[0030] Figure 6 yes Figure 2B Simplified view of the upper light handling assembly, wafer support device, and lower light handling assembly in FIG. DETAILED DESCRIPTION

[0031] Various embodiments of the present invention will be described below with reference to the accompanying drawings, which form a part of this specification. It should be understood that although directional terms such as "front," "rear," "upper," "lower," "left," and "right" are used in this application to describe various example structural parts and elements of this application, these terms are used for convenience of description only and are determined based on the example orientations shown in the accompanying drawings. Because the embodiments disclosed in this application can be arranged in different orientations, these directional terms are intended to be illustrative only and should not be construed as limiting.

[0032] Figure 1 FIG1 is a perspective view of a wafer optical processing device, used to illustrate the external structure of the wafer optical processing device 100. Figure 1As shown, the wafer optical processing device 100 includes a housing 101 and a pair of transport channels 130a and 130b. The housing 101 has a front portion 111, a rear portion 112, an upper portion 113, a lower portion 114, a left portion 115, and a right portion 116, thereby roughly forming a box. The front portion 111 has wafer inlets 162a and 162b, and the rear portion 112 has a wafer outlet. The wafer inlets 162a and 162b and the wafer outlet are connected to upstream and downstream devices, respectively. Transport channels 130a and 130b are formed between the wafer inlets 162a and 162b and the wafer outlets. In other words, the transport channels 130a and 130b extend through the front portion 111 and the rear portion 112 of the housing 101. Wafer support devices 140a and 140b are provided in the transport channels 130a and 130b for supporting and transporting wafers 150 to be processed. The upper portion 113 of the housing 101 has air inlets 103a and 103b, and the lower portion 114 of the housing 101 has air outlets 104a and 104b. The air inlets 103a and 103b or the air outlets 104a and 104b are connected to a fan (not shown in the figure) so that air can enter the interior of the housing 101 from the air inlets 103a and 103b and then flow out from the air outlets 104a and 104b. The air flow flowing in the housing 101 can take away some of the heat of the housing 101, ensuring that the temperature inside the housing 101 is maintained within a predetermined range. The lower portion 114 of the housing 101 includes a bottom plate 170 and air outlet boxes 172a and 172b. The four sides of the bottom plate 170 are respectively connected to the front portion 111, the rear portion 112, the left portion 115, and the right portion 116 of the housing. The bottom plate 170 has an opening, one end of the air outlet boxes 172a, 172b is connected to the opening on the bottom plate 170, and the other end forms the air outlets 104a, 104b, so that the air flow can pass through the air outlet boxes 172a, 172b from the opening on the bottom plate 170 and then flow out from the air outlets 104a, 104b.

[0033] Figure 2A yes Figure 1 A perspective view of a wafer optical processing device with the front and rear portions of the housing removed, showing the internal components of the wafer optical processing device, Figure 2B yes Figure 2A A cross-sectional view of . Figure 2A The front portion 111 and the rear portion 112 of the housing 101 are removed to reveal the internal components of the wafer optical processing device. Figure 2A and Figure 2BAs shown, wafer optical processing device 100 includes two side-by-side wafer processing assemblies 201a and 201b. Wafer processing assemblies 201a and 201b have identical structures. In practical applications, both wafer processing assemblies 201a and 201b can be used simultaneously, or only one of them can be used. In other embodiments, only one or more wafer processing assemblies may be provided. The internal structure of wafer processing assembly 201a will be described below. Wafer processing assembly 201b has the same structure as wafer processing assembly 201a.

[0034] The wafer processing assembly 201a includes an upper plate 213, a lower plate 214, a left plate 215, and a right plate 216. The upper plate 213, the lower plate 214, the left plate 215, and the right plate 216 enclose a cylindrical space 270. The air inlet 103a is provided on the upper plate 213, and the air outlet box 172a is connected to the lower plate 214. A guide frame 281 is provided below the air inlet 103a. The guide frame 281 is arranged along the Figure 2A The guide frame 281 extends in the front-to-back direction, and the length of the guide frame 281 in the front-to-back direction is greater than the diameter of the air inlet 103a and less than the length of the upper plate 213 in the front-to-back direction. The guide frame 281 has a bottom plate 282 and a bottom plate 282 extending in the width direction (i.e. Figure 2B Side panels 283 and 284 extend upward from both sides (in the left-right direction shown). The upper ends of the side panels 283 and 284 are connected to the upper plate 213 of the wafer processing assembly 201a. Thus, a guide channel 285 with openings at both ends is formed between the guide frame 281 and the upper plate 213 of the wafer processing assembly 201a. The guide channel 285 guides the airflow within the housing 101. Air entering through the air inlet 103 flows along the guide channel 285 and exits through the front and rear openings of the guide channel 285. The cylindrical space 270 houses the wafer support device 140a, the upper optical processing assembly 231, and the lower optical processing assembly 232. The upper optical processing assembly 231 is connected to the left plate 215 and the right plate 216 on both sides via support frames, respectively. The upper optical processing assembly 231 is located above the wafer support device 140a and is spaced apart from the wafer support device 140a. Similarly, the lower optical processing assembly 232 is connected to the left plate 215 and the right plate 216 on both sides, and is located below the wafer support device 140a and spaced apart from the wafer support device 140a. The upper optical processing assembly 231 and the lower optical processing assembly 232 respectively perform optical processing on the front and back sides of the wafer 150 placed on the wafer support device 140a, with the front side of the wafer 150 facing the upper optical processing assembly 231 and the back side of the wafer 150 facing the lower optical processing assembly 232.

[0035] Figure 32 is a perspective view of the upper optical processing assembly 231, the wafer support device 140a and the lower optical processing assembly 232, as shown in FIG. Figure 3 As shown, the wafer support device 140a includes a conveyor belt 305 and a pair of quartz rods 307. The conveyor belt 305 is supported by the pair of quartz rods 307. The conveyor belt 305 constitutes a support member for supporting the wafer 150. Under the action of an external force, the conveyor belt 305 can move relative to the quartz rods 307, thereby moving the wafer 150 placed on the conveyor belt 305 together, allowing the wafer 150 to enter the wafer optical processing device 100 through the wafer entrances 162a and 162b on the front portion 111 and then exit the wafer optical processing device 100 through the wafer exit on the rear portion 112. It should be noted that the drawings of this application only illustrate the conveyor belt 305 within the wafer optical processing device 100; the conveyor belt outside the wafer optical processing device 100 is not shown in the drawings. In the equipment including the wafer optical processing device 100, the conveyor belt 305 runs through the wafer optical processing device 100 and related devices upstream and downstream of the wafer optical processing device 100. That is, after the wafer 150 is processed by the device upstream of the wafer optical processing device 100 on the conveyor belt 305, it enters the wafer optical processing device 100 from the conveyor belt 305. In the process of moving through the wafer optical processing device 100, the wafer 150 is optically processed by the upper optical processing component 231 and the lower optical processing component 232. Then, the wafer 150 is conveyed by the conveyor belt 305 to the downstream device for processing in the next process.

[0036] Both the upper and lower optical processing assemblies 231 and 232 generate light of a certain intensity, respectively illuminating the front and back surfaces of the wafer 150, thereby accelerating the light attenuation process. The conveyor belt 305 is a mesh structure with hollow sections, allowing light from the lower optical processing assembly 232 to pass through the hollow sections of the conveyor belt 305 and illuminate the back surfaces of the wafer 150.

[0037] Figure 4 for Figure 3 An exploded view of the upper light processing assembly 231 in FIG. Figure 4As shown, the upper optical processing assembly 231 includes an upper cooling device 401, an upper light source assembly 402, and an upper transparent baffle 403. The upper cooling device 401, the upper light source assembly 402, and the upper transparent baffle 403 are secured together by a support frame 480. The upper light source assembly 402 is used to provide light for irradiating the front surface (i.e., the upper surface) of the wafer 150. The upper cooling device 401 is used to absorb heat generated by the upper light source assembly 402. The upper transparent baffle 403 is used to block impurities in the transfer channel 130a, preventing them from adhering to the upper light source assembly 402. The upper light source assembly 402 includes a light source board 471 that integrates multiple LED light sources. The light source board 471 can be divided into multiple LED light source modules. In applications, all or some of the LED light source modules can be activated as needed. The upper light source assembly 402 generates a large amount of heat during operation. To ensure that the temperature within the wafer processing assembly 201a remains within a suitable range, the upper cooling device 401 is used to absorb the heat generated by the upper light source assembly 402. The upper cooling device includes a cooling plate 425 and a coil 426, both made of metal. The cooling plate 425 is roughly plate-shaped and has a certain thickness. The lower surface 429 of the cooling plate 425 is a generally smooth surface. The light source board 471 is connected to the lower surface of the cooling plate 425. The cooling plate 425 has several grooves formed inward from its upper surface. The grooves match the shape of the coil 426 and are used to accommodate the coil 426. The coil 426 is embedded in the cooling plate 425 to maximize the contact area between the coil 426 and the cooling plate 425. The coil 426 has an inlet 441 and an outlet 442. Cooling water flows into the coil from the inlet 441 and out from the outlet 442. Heat generated by the upper light source device 402 is transferred to the interior of the coil 426 through the cooling plate 425 and the coil 426. Heat exchange occurs with the cooling water within the coil 426, causing the cooling water to absorb heat and increase in temperature. The cooling water eventually flows out of the outlet 442, removing some of the heat. An upper transparent baffle 403 is provided below the upper light source assembly 402. This baffle 403 has several holes 445 formed therein. These holes 445 facilitate vertical airflow around the upper light processing assembly 431, preventing localized overheating near the upper light source assembly 402. The upper transparent baffle 403 is made of glass or other transparent material and, to a certain extent, blocks impurities from reaching the upper light source assembly 402. Once a certain amount of impurities have accumulated, the upper transparent baffle 403 can be cleaned by wiping it.

[0038] Figure 5 for Figure 3 The exploded view of the lower light processing assembly 232 in FIG. Figure 4Similar to the upper optical processing assembly 231 shown, the lower optical processing assembly 232 includes a lower cooling device 501, a lower light source device 502, and a lower transparent baffle 503. The lower cooling device 501, the lower light source device 502, and the lower transparent baffle 503 are secured together by a support frame 580. The lower light source device 502 is used to provide light for irradiating the back surface of the wafer 150. The lower cooling device 501 is used to absorb heat generated by the lower light source device 502. The lower transparent baffle 503 is used to prevent impurities in the transfer channel 130a from adhering to the lower light source device 502. The lower light source device 502 is formed by a plurality of light source modules 571, each of which is an LED light source module. During application, all or some of the light source modules 571 can be activated as needed. The plurality of light source modules 571 can be independent of each other and each is connected to the lower cooling device 501. The power of the lower light source device 502 and the upper light source device 402 can be set to the same or different, which is determined by the processing requirements of the front and back sides of the wafer 150. In this application, the light processing requirements of the front side of the wafer 150 are greater than the light processing requirements of the back side of the wafer 150. Therefore, the maximum light energy that the upper light source device 402 can provide per unit time is greater than the maximum light energy that the lower light source device 502 can provide per unit time. In this application, the lower light source device 502 uses multiple separate detachable light source modules, and the upper light source device 501 uses an integrated light source module. However, in other embodiments, other forms of light source modules can also be used as needed. The structure of the lower cooling device 501 is the same as that of the upper cooling device 401, but the lower cooling device 501 is placed in a different direction than the upper cooling device. The upper surface 529 of the lower cooling device 501 forms a generally smooth plane, and the coil 526 is installed from the bottom of the cooling plate 525 into the groove of the cooling plate 525 so as to be located in the cooling plate 525. That is, the lower cooling device 501 and the upper cooling device 401 are arranged opposite each other. The light source module 571 of the lower light processing assembly 232 is connected to the upper surface 529 of the cooling plate 525. The heat generated by the lower light source device 502 is transferred to the interior of the coil 526 through the cooling plate 525 and the coil 526, where it exchanges heat with the cooling water inside the coil 526, thereby removing some of the heat. A lower transparent baffle 503 is provided above the lower light source device 502. Unlike the upper transparent baffle 403, the lower transparent baffle 503 does not have a hole. This is because gravity and the generally downward flow of air within the housing 101 make it relatively easy for impurities to deposit downward and accumulate on the lower transparent baffle 503. The lack of a hole in the lower transparent baffle 503 prevents impurities from passing through the hole and landing on the lower light source device 502. The lower transparent baffle 503 is made of glass or other transparent materials. After a certain amount of impurities have accumulated, the lower transparent baffle 503 may be wiped for cleaning.In this application, the heat generated by the lower light source device 502 is generally less than the heat generated by the upper light source device 402 , and the lack of holes in the lower transparent baffle 503 will not cause local overheating near the lower light source device 502 .

[0039] Figure 6 yes Figure 2B The simplified view of the upper optical processing assembly 231, the wafer support device 140a and the lower optical processing assembly 232 is used to more clearly express the relative positional relationship between the above components. Figure 6 As shown, the upper light source device 402 of the upper optical processing assembly 231 is close to the lower surface of the upper cooling device 401, so that the upper cooling device 401 can effectively absorb the heat generated by the upper light source device 402. The close proximity mentioned here means that the distance is relatively close, but there can also be a certain gap between the upper light source device 402 and the upper cooling device 401. There is a certain distance 601 between the upper transparent baffle 403 and the upper light source device 402, so that in the front-to-back direction of the wafer optical processing device 100, an opening 351 is formed between the upper transparent baffle 403 and the upper light source device 402 (see Figure 3 The gap 601 allows airflow between the upper transparent baffle 403 and the upper light source device 402. The airflow flows out through the opening 351, thereby removing some heat and preventing local overheating of the upper light source device 402. Furthermore, a plurality of holes 445 are provided in the upper transparent baffle 403. These holes 445 further facilitate the flow of air, allowing airflow to flow out from top to bottom through the holes 445.

[0040] Similarly, the lower optical processing assembly 232 includes a lower cooling device 501, a lower light source device 502 and a lower transparent baffle 503, wherein the lower light source device 502 is close to the lower surface of the lower cooling device 501, so that the cooling device 501 can effectively absorb the heat generated by the lower light source device 502. The close distance mentioned here means that the distance is relatively close, but there may also be a certain gap between the lower light source device 502 and the lower cooling device 501. There is a certain distance 602 between the lower transparent baffle 503 and the lower light source device 502, so that in the front-to-back direction of the wafer optical processing device 100, an opening 352 is formed between the lower transparent baffle 503 and the lower light source device 502 (see Figure 3 ), the gap 602 allows airflow to flow between the lower transparent baffle 503 and the lower light source device 502 and out through the opening 352, thereby removing some heat and preventing local overheating of the lower light source device 502. As previously described, the lower transparent baffle 503 is no longer provided with a hole to prevent impurities from passing through the hole and falling on the lower light source device 502.

[0041] Still like Figure 6As shown, the wafer support device 140a includes a conveyor belt 305 and quartz rods 307. Two quartz rods 307 are located on either side of the conveyor belt 305. The conveyor belt 305 has an upper surface 605 and a lower surface 607. The lower surface 607 is generally planar and contacts the two quartz rods 307, thereby supporting the conveyor belt 305. In this application, the conveyor belt 305 forms a support member for the wafers 150. A spacer 618 is provided on the upper surface 605 of the conveyor belt 305. The spacer 618 has two ribs 628a and 628b extending along the direction of the conveyor belt 305. The inner sides of the two ribs 628a and 628b each form an outwardly and upwardly extending inclined surface. The two inclined surfaces have bottoms 629a and 629b, respectively, and the distance between the bottoms 629a and 629b is less than the width of the wafer 150. Therefore, when the wafer 150 is positioned on the conveyor belt 305, the two side edges of the wafer 150 in the width direction contact the inclined surface or the tops of the two ribs 628a, 628b, creating a certain distance between the wafer 150 and the upper surface of the conveyor belt 305. This prevents the lower surface of the wafer 150 from contacting the conveyor belt, facilitating a smooth lower surface (i.e., the back surface) of the wafer 150. In the application, the conveyor belt 305 has a mesh structure, meaning that the conveyor belt 305 has hollow sections extending through the upper and lower surfaces of the conveyor belt 305. Therefore, light from the lower light source device 502 can pass through the hollow sections to illuminate the lower surface of the wafer 150. Furthermore, the mesh conveyor belt 305 with hollow sections facilitates airflow on both sides of the conveyor belt 305. The spacer 618 can be integrally formed with the mesh conveyor belt 305, for example, by bending upward several metal wires forming the upper portion of the mesh conveyor belt, or it can be a separately formed component attached to the upper surface of the conveyor belt 305.

[0042] The wafer optical processing device 100 in the present application is disposed downstream of the wafer sintering processing device in a sintering furnace. After the wafer undergoes the sintering process and rapid cooling, it is transported by a conveyor belt 305 to the wafer entrance of the wafer optical processing device 100. As the wafer 150 is transported by the conveyor belt 305 and passes through the wafer optical processing device 100, the upper light source device 402 and the lower light source device 502 of the wafer optical processing device 100 respectively perform optical processing on the front and back sides of the wafer 150. During the processing, the upper light source device 402 and the lower light source device 502 generate a large amount of heat. In order to maintain the temperature within the wafer optical processing device 100 within a certain range (for example, 250°C-300°C), the cooling water flowing in the upper cooling device 401 and the lower cooling device 501 can remove some of the heat. At the same time, the fan connected to the wafer optical processing device 100 causes the airflow to flow from the air inlet 103a to the air outlet 104a, which can also remove some of the heat. The fan can adjust the air volume according to the temperature inside the wafer light processing device 100, increasing the air volume when the temperature is high and reducing the air volume when the temperature is low. When the wafer reaches the wafer outlet of the wafer light processing device 100, the light processing process has been completed, and the wafer 150 will be transported to the next process by the conveyor belt. The entire light processing process only takes 10-30 seconds. The wafer light processing device 100 in this application can process the front and back of the wafer at the same time, greatly improving the processing efficiency. Wafers whose front and back sides have been processed can be used in electrodes of solar cells, and both the front and back sides of such electrodes can receive solar energy.

[0043] Although only some features of the present invention have been illustrated and described herein, various modifications and variations may be made by those skilled in the art. It should be understood that the appended claims are intended to cover all such modifications and variations that fall within the true spirit of the present invention.

Claims

1. A wafer light processing device for light processing a sintered wafer, characterized in that: include: A wafer support device (140a, 140b), the wafer support device (140a, 140b) comprising a support member, the support member having an upper surface (605) and a lower surface (607) arranged opposite to each other, the support member being hollowed out in a direction from the upper surface (605) to the lower surface (607), and the support member being configured to support the wafer above the upper surface (605); an upper light source device (402), the upper light source device (402) being disposed above the wafer support device (140a, 140b) and configured to provide a light source irradiated toward the upper surface (605) of the support member (305); a lower light source device (502), the lower light source device (502) being disposed below the wafer support device (140a, 140b) and configured to provide a light source irradiated toward the lower surface (607) of the support member (305); an upper transparent baffle (403), the upper transparent baffle (403) being located between the upper light source device (402) and the wafer support device (140a, 140b), and having a distance therebetween from the upper light source device (402), and having a plurality of holes formed on the upper transparent baffle (403); and A lower transparent baffle (503) is located between the lower light source device (502) and the wafer support device (140a, 140b), and has a distance between the lower light source device (502). The lower transparent baffle (503) is not provided with a hole.

2. The wafer optical processing device according to claim 1, wherein: The wafer support device (140a, 140b) comprises a conveyor belt (305), which forms the support.

3. The wafer optical processing device according to claim 2, wherein: An isolation member (618) is provided on the conveyor belt (305), and the isolation member (618) is configured to separate the wafer from the upper surface of the conveyor belt (305) by a certain distance; The spacer (618) further includes two spaced-apart protrusions extending along the travel direction of the conveyor belt, each of the two protrusions having an inclined surface facing each other so that both ends of the wafer rest on the inclined surface.

4. The wafer optical processing device according to claim 1, wherein: The upper light source device (402) and the lower light source device (502) respectively include a plurality of light source modules. When the wafer is subjected to light processing, one or more of the plurality of light source modules can be activated.

5. The wafer optical processing device according to claim 4, wherein: The plurality of light source modules provide LED light sources.

6. The wafer optical processing device according to claim 1, wherein: The maximum illumination energy that the upper light source device (402) can provide per unit time is greater than the maximum illumination energy that the lower light source device (502) can provide per unit time.

7. The wafer optical processing device according to claim 1, wherein: The wafer light processing device further comprises: an upper cooling device (401), the upper cooling device (401) being arranged above the upper light source device (402) so as to provide cooling for the upper light source device (402), and A lower cooling device (501), the lower cooling device (501) is arranged below the lower light source device (502) and is used to provide cooling for the lower light source device (502).

8. The wafer optical processing device according to claim 1, wherein: The wafer light processing device further comprises: A shell (101), the upper light source device (402) and the lower light source device (502) are both located in the shell (101), the shell (101) comprises an air inlet (103a, 103b) and an air outlet (104a, 104b), the air inlet (103a, 103b) is located above the shell (101), and the air outlet (104a, 140b) is located below the shell (101), so that air flow can flow in from the air inlet (103a, 103b) and flow out from the air outlet (104a, 140b).

9. The wafer optical processing device according to claim 1, wherein: The upper light source device includes a light source plate integrated with a plurality of light source modules, and the lower light source device includes a plurality of separate detachable light source modules.

10. A sintering furnace, characterized in that: The sintering furnace comprises: Wafer sintering processing equipment; and The wafer light processing device as described in any one of claims 1 to 9 is arranged downstream of the wafer sintering processing device.

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