Camera panel and camera device

Abstract

A camera panel is provided. The camera panel includes a photoelectric conversion element, a pixel, a first conductive film, a second conductive film, a third conductive film, a fourth conductive film and a fifth conductive film. The pixel includes a pixel circuit and provides an image signal. The first conductive film is provided with an image signal, and the photoelectric conversion element includes a first terminal connected to the second conductive film and a second terminal connected to the pixel circuit. The pixel circuit includes a first switch, a second switch, a third switch, a transistor and a capacitor. The first switch includes a terminal connected to the second terminal of the photoelectric conversion element and a terminal connected to a node. The transistor includes a gate electrode connected to the node and a first electrode connected to the third conductive film. The second switch includes a terminal connected to the second electrode of the transistor and a terminal connected to the first conductive film. The third switch includes a terminal connected to the fourth conductive film and a terminal connected to the node. The capacitor includes a first electrode connected to the node and a second electrode connected to the fifth conductive film.

Description

Technical Field

[0001] One embodiment of the present invention relates to an imaging panel, an imaging device, or a semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. The technical field of one embodiment of the invention disclosed in this specification, etc., relates to an object, method, or manufacturing method. In addition, one embodiment of the present invention relates to a process, machine, product, or composition of matter. Therefore, more specifically, as an example of the technical field of one embodiment of the present invention disclosed in this specification, a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a driving method of these devices, or a manufacturing method of these devices can be cited. Background Art

[0003] It is known that a three-dimensional distance measurement sensor using the TOF method is used in a structure of a motion recognition device (Patent Document 1). By utilizing this structure, the detection of position change information and shape change information is simplified. In addition, the detection of position change information and shape change information of a detection object moving at high speed is simplified. Motion recognition is performed based on pattern matching. Video data for pattern matching is obtained from the three-dimensional distance measurement sensor. Object data is selected from the video data of the detection object that changes with time, and motion data is inferred based on the time change of the selected object data. The motion recognition device performs operations defined based on output data generated from the motion data.

[0004] In addition, a distance measuring device is known, which includes a photoelectric sensor including a light receiving element, a first transistor and a second transistor, a wiring, a signal line and a power supply line, wherein the wiring is electrically connected to an electrode of the light receiving element, the signal line is electrically connected to the gate electrode of the first transistor, the power supply line is electrically connected to one of the source electrode and the drain electrode of the second transistor, one of the source electrode and the drain electrode of the first transistor is electrically connected to the gate electrode of the second transistor, and the other of the source electrode and the drain electrode of the first transistor is electrically connected to the other electrode of the light receiving element and the other of the source electrode and the drain electrode of the second transistor (Patent Document 2).

[0005] [Prior technical literature]

[0006] [Patent Document]

[0007] [Patent Document 1] Japanese Patent Application Publication No. 2013-175160

[0008] [Patent Document 2] Japanese Patent Application Publication No. 2013-224931 Summary of the invention

[0009] Technical problem to be solved by the invention

[0010] One of the purposes of one embodiment of the present invention is to provide a novel camera panel with high convenience or reliability. Another purpose of one embodiment of the present invention is to provide a novel camera device with high convenience or reliability. Another purpose of one embodiment of the present invention is to provide a novel camera panel, a novel camera device or a novel semiconductor device.

[0011] Note that the recording of the above-mentioned purpose does not prevent the existence of other purposes. Furthermore, one mode of the present invention does not need to achieve all of the above-mentioned purposes. Purposes other than the above-mentioned purpose can be clearly seen from the description of the specification, drawings, claims, etc., and purposes other than the above-mentioned purpose can be extracted from the description.

[0012] Solutions to technical problems

[0013] (1) One embodiment of the present invention is an imaging panel including an imaging area.

[0014] The imaging region includes a photoelectric conversion element, a first pixel, a first conductive film, a second conductive film, a third conductive film, a fourth conductive film, and a fifth conductive film.

[0015] The first pixel includes a first pixel circuit, and the first pixel provides a first image signal. In addition, the first conductive film is provided with the first image signal.

[0016] The photoelectric conversion element includes a first terminal electrically connected to the second conductive film and a second terminal electrically connected to the first pixel circuit.

[0017] The first pixel circuit includes a first switch, a second switch, a third switch, a transistor and a capacitor.

[0018] The first switch includes a first terminal electrically connected to the second terminal of the photoelectric conversion element and a second terminal electrically connected to the node.

[0019] The transistor includes a gate electrode electrically connected to the node and a first electrode electrically connected to the third conductive film.

[0020] The second switch includes a first terminal electrically connected to the second electrode of the transistor and a second terminal electrically connected to the first conductive film.

[0021] The third switch includes a first terminal electrically connected to the fourth conductive film and a second terminal electrically connected to the node.

[0022] The capacitor includes a first electrode electrically connected to the node and a second electrode electrically connected to the fifth conductive film.

[0023] Thus, the potential of the node can be changed according to the exposure. In addition, the exposure can be recorded on the node. In addition, the potential of the node can be changed by using the potential of the fifth conductive film. In addition, the potential of the fifth conductive film and the potential of the node can be added. In addition, the operation can be performed in the first pixel. As a result, a novel camera panel with high convenience or reliability can be provided.

[0024] (2) In addition, one embodiment of the present invention is the above-mentioned imaging panel, wherein the first switch includes a first transistor including an oxide semiconductor, and the second switch includes a second transistor including an oxide semiconductor.

[0025] As a result, compared with a transistor using silicon as a semiconductor, the current flowing through the first switch and the second switch in the non-conducting state can be made smaller. In addition, the potential of the node can be maintained for a longer time. As a result, a novel camera panel with high convenience and reliability can be provided.

[0026] (3) In addition, one embodiment of the present invention is the above-mentioned imaging panel, wherein the first pixel circuit includes a fourth switch.

[0027] The fourth switch includes a first terminal electrically connected to the fourth conductive film and a second terminal electrically connected to the first terminal of the first switch.

[0028] Thus, the potential of the node can be initialized regardless of the conduction state of the first switch. In addition, the operation can be accelerated. In addition, the noise can be reduced. As a result, a novel camera panel with high convenience or reliability can be provided.

[0029] (4) In addition, one embodiment of the present invention is the above-mentioned imaging panel, wherein the first pixel includes a photoelectric conversion element.

[0030] (5) In addition, one embodiment of the present invention is the above-mentioned imaging panel, wherein the imaging area includes second pixels.

[0031] The second pixel includes a second pixel circuit, and the second pixel provides a second image signal. In addition, the first conductive film is provided with the second image signal.

[0032] The photoelectric conversion element includes a second terminal electrically connected to the second pixel circuit.

[0033] (6) In addition, one embodiment of the present invention is the above-mentioned imaging panel, wherein the imaging area includes a group of pixels, another group of pixels, a first wiring, a second wiring, and a third wiring.

[0034] A group of pixels is arranged in a row direction, and a group of pixels includes pixels.

[0035] Another group of pixels is arranged in a column direction intersecting the row direction, and the other group of pixels includes pixels.

[0036] The first wiring is electrically connected to a group of pixels.

[0037] The second wiring is electrically connected to a group of pixels.

[0038] The third wiring is electrically connected to a group of pixels.

[0039] The first conductive film is electrically connected to another group of pixels.

[0040] The fifth conductive film is electrically connected to another group of pixels.

[0041] (7) Another embodiment of the present invention is the above-mentioned imaging panel including a selection line driving circuit, a signal line driving circuit, and a readout circuit.

[0042] The selection line driving circuit provides a first selection signal, a second selection signal and a third selection signal.

[0043] The signal line driver circuit provides weight data.

[0044] The readout circuit is provided with a first image signal, and the readout circuit provides image data.

[0045] The first wiring is supplied with a first selection signal, the second wiring is supplied with a second selection signal, the third wiring is supplied with a third selection signal, and the fifth conductive film is supplied with weight data.

[0046] The first switch operates based on a first selection signal, the second switch operates based on a second selection signal, and the third switch operates based on a third selection signal.

[0047] As a result, it is possible to provide a novel imaging panel having high convenience and reliability.

[0048] (8) Another aspect of the present invention is an imaging device including a light source, the imaging panel, and a control unit.

[0049] The light source emits pulsed light based on the control signal, and the imaging panel performs imaging based on the control signal.

[0050] The control unit is provided with control information and image data, provides a control signal based on the control information, and provides image information based on the image data.

[0051] Thus, the time from light emission to image capture can be recorded. In addition, the distance from the image capture device to the object can be measured. As a result, a novel image capture device with high convenience and reliability can be provided.

[0052] In the drawings of this specification, the components are classified according to their functions and shown as block diagrams that are independent of each other. However, it is difficult to completely divide the actual components according to their functions, and one component may involve multiple functions.

[0053] In this specification, the names of the source and drain of a transistor are interchanged according to the polarity of the transistor and the level of the potential applied to each terminal. Generally speaking, in an n-channel transistor, the terminal to which a low potential is applied is called the source, and the terminal to which a high potential is applied is called the drain. In addition, in a p-channel transistor, the terminal to which a low potential is applied is called the drain, and the terminal to which a high potential is applied is called the source. In this specification, although for convenience in some cases it is assumed that the source and drain are fixed to describe the connection relationship of the transistor, in fact, the names of the source and drain are interchanged according to the above-mentioned potential relationship.

[0054] In this specification, the source of a transistor refers to a source region of a part of a semiconductor film used as an active layer or a source electrode connected to the semiconductor film. Similarly, the drain of a transistor refers to a drain region of a part of the semiconductor film or a drain electrode connected to the semiconductor film. In addition, the gate refers to a gate electrode.

[0055] In this specification, a state in which transistors are connected in series refers to, for example, a state in which only one of the source and drain of a first transistor is connected to only one of the source and drain of a second transistor. Also, a state in which transistors are connected in parallel refers to a state in which one of the source and drain of a first transistor is connected to one of the source and drain of a second transistor and the other of the source and drain of the first transistor is connected to the other of the source and drain of the second transistor.

[0056] In this specification, connection refers to electrical connection, which is equivalent to a state in which current, voltage or potential can be supplied or transmitted. Therefore, the connection state does not necessarily have to refer to a direct connection state, but also includes a state in which current, voltage or potential can be supplied or transmitted through wiring, resistors, diodes, transistors and other circuit elements.

[0057] Even when independent components are connected to each other on the circuit diagram in this specification, there are cases where one conductive film actually has the functions of multiple components, for example, a part of the wiring is used as an electrode, etc. The category of connection in this specification includes such a case where one conductive film has the functions of multiple components.

[0058] In addition, in this specification, one of a first electrode and a second electrode of a transistor is a source electrode, and the other is a drain electrode.

[0059] Effects of the Invention

[0060] According to one embodiment of the present invention, a novel camera panel with high convenience or reliability can be provided. In addition, according to one embodiment of the present invention, a novel camera device with high convenience or reliability can be provided. In addition, according to one embodiment of the present invention, a novel camera panel, a novel camera device or a novel semiconductor device can be provided.

[0061] Note that the description of these effects does not prevent the existence of other effects. Note that one embodiment of the present invention does not need to achieve all of the above effects. Effects other than the above effects are obvious from the description of the specification, drawings, claims, etc., and can be extracted from the description.

[0062] BRIEF DESCRIPTION OF THE DRAWINGS

[0063] [ Figure 1 ]A top view illustrating the structure of a camera panel according to an embodiment.

[0064] [ Fig. 2 ] A cross-sectional view and a circuit diagram illustrating the structure of an imaging panel according to an embodiment.

[0065] [ Figure 3 ]A block diagram illustrating the structure of a camera panel according to an embodiment.

[0066] [ Fig. 4 ] A timing chart illustrating a method for driving an imaging panel according to an embodiment.

[0067] [ Figure 5 ]A circuit diagram illustrating the structure of a camera panel according to an embodiment.

[0068] [ Figure 6 ]A circuit diagram illustrating the structure of a camera panel according to an embodiment.

[0069] [ Figure 7 ]A circuit diagram illustrating the structure of a camera panel according to an embodiment.

[0070] [Fig. 8] A circuit diagram illustrating the structure of an imaging panel according to an embodiment and a timing diagram illustrating a driving method. [Fig. 8]

[0071] [Fig. 9] A diagram illustrating the structure of a pixel of an imaging device.

[0072] [Fig. 10] A diagram illustrating the structure of a pixel of an imaging device.

[0073] [Fig. 11] A diagram illustrating a transistor.

[0074] [Fig. 12] A diagram illustrating the structure of a pixel of an imaging device.

[0075] [Fig. 13] A diagram illustrating a transistor.

[0076] [Fig. 14] A diagram illustrating the structure of a pixel of an imaging device.

[0077] [Fig. 15] A three-dimensional view of a package and a module that accommodates a camera device.

[0078] [Fig. 16] A diagram illustrating an electronic device.

[0079] [Fig. 17] A diagram illustrating the structure of an imaging device according to an embodiment.

[0080] Modes for Carrying Out the Invention

[0081] A camera panel of one embodiment of the present invention includes a camera area, and the camera area includes a photoelectric conversion element, a pixel, a first conductive film, a second conductive film, a third conductive film, a fourth conductive film, and a fifth conductive film. The pixel includes a pixel circuit and provides an image signal. The first conductive film is provided with an image signal, and the photoelectric conversion element includes a first terminal electrically connected to the second conductive film and a second terminal electrically connected to the pixel circuit. The pixel circuit includes a first switch, a second switch, a third switch, a transistor, and a capacitor. The first switch includes a first terminal electrically connected to the second terminal of the photoelectric conversion element and a second terminal electrically connected to a node. The transistor includes a gate electrode electrically connected to the node and a first electrode electrically connected to the third conductive film. The second switch includes a first terminal electrically connected to the second electrode of the transistor and a second terminal electrically connected to the first conductive film. The third switch includes a first terminal electrically connected to the fourth conductive film and a second terminal electrically connected to the node. The capacitor includes a first electrode electrically connected to the node and a second electrode electrically connected to the fifth conductive film.

[0082] Thus, the potential of the node can be changed according to the exposure. In addition, the exposure can be recorded on the node. In addition, the potential of the node can be changed by using the potential of the fifth conductive film. In addition, the potential of the fifth conductive film and the potential of the node can be added. In addition, calculation can be performed in the pixel. As a result, a novel camera panel with high convenience or reliability can be provided.

[0083] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and a person skilled in the art can easily understand that the method and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below. In addition, in the structure of the invention described below, the same figure mark is used in different drawings to represent the same part or the part with the same function, and its repeated description is omitted.

[0084] (Implementation Method 1)

[0085] In this embodiment, refer to Figures 1 to 3 , Figure 5 and Figure 6 The structure of an imaging panel according to one embodiment of the present invention will be described.

[0086] Figure 1 It is a plan view for explaining the structure of an imaging panel according to one embodiment of the present invention.

[0087] FIG. 2 is a diagram for explaining the structure of an imaging panel according to one embodiment of the present invention. Figure 2A is a cross-sectional view of an imaging panel according to one embodiment of the present invention, Figure 2B is a circuit diagram illustrating the structure of a pixel.

[0088] Figure 3 This is a block diagram illustrating the structure of an imaging panel according to one embodiment of the present invention.

[0089] Figure 5 This is a circuit diagram for explaining the structure of an imaging panel according to one embodiment of the present invention.

[0090] Figure 6 This is a circuit diagram for explaining the structure of an imaging panel according to one embodiment of the present invention.

[0091] Note that in this specification, a variable that takes an integer value greater than or equal to 1 is sometimes used for a symbol. For example, "(p)" containing a variable p that takes an integer value greater than or equal to 1 is sometimes used to specify a portion of a symbol of any one of at most p components. Also, for example, "(m,n)" containing variables m and n that take an integer value greater than or equal to 1 is sometimes used to specify a portion of a symbol of any one of at most m×n components.

[0092] <Structural Example 1 of Image Pickup Panel>

[0093] The imaging panel 800 described in this embodiment includes an imaging area 241 (see Figure 1 ).

[0094] <<Configuration Example 1 of Imaging Area 241>>

[0095] The imaging area 241 includes a photoelectric conversion element PD (i, j) and a pixel 802 (i, j) (see Figure 1 and Figure 2A ). In addition, the imaging region 241 includes a conductive film WX(j), a conductive film VCOM, a conductive film VPI, a conductive film VR, and a conductive film BW(j) (see Figure 2B ).

[0096] 《Configuration Example 1 of Pixel 802(i,j)》

[0097] Pixel 802(i,j) includes pixel circuit 430(i,j) (see Figure 2A ).

[0098] The pixel 802(i,j) provides the first image signal, and the conductive film WX(j) is provided with the first image signal (refer to Figure 2B ).

[0099] 《Photoelectric conversion element PD(i,j)》

[0100] The photoelectric conversion element PD(i,j) includes a first terminal electrically connected to the conductive film VCOM and a second terminal electrically connected to the pixel circuit 430 (i,j).

[0101] 《Configuration Example 1 of Pixel Circuit 430(i,j)》

[0102] The pixel circuit 430 (i, j) includes a switch SW1 , a switch SW2 , a switch SW3 , a transistor M, and a capacitor C1 .

[0103] The switch SW1 includes a first terminal electrically connected to the second terminal of the photoelectric conversion element PD(i,j) and a second terminal electrically connected to the node FD1 (i,j).

[0104] The transistor M includes a gate electrode electrically connected to the node FD1 (i, j) and a first electrode electrically connected to the conductive film VPI.

[0105] The switch SW2 includes a first terminal electrically connected to the second electrode of the transistor M and a second terminal electrically connected to the conductive film WX(j).

[0106] The switch SW3 includes a first terminal electrically connected to the conductive film VR and a second terminal electrically connected to the node FD1 (i, j).

[0107] The capacitor C1 includes a first electrode electrically connected to the node FD1 (i, j) and a second electrode electrically connected to the conductive film BW (j).

[0108] Thus, the potential of the node FD1(i,j) can be changed according to the exposure. In addition, the exposure can be recorded on the node FD1(i,j). In addition, the potential of the node FD1(i,j) can be changed by using the potential of the conductive film BW(j). In addition, the potential of the conductive film BW(j) and the potential of the node FD1(i,j) can be added. In addition, calculations can be performed in the pixel 802(i,j). As a result, a novel camera panel with high convenience or reliability can be provided.

[0109] 《Configuration example 1 of switch SW1 and switch SW2》

[0110] The switch SW1 includes a first transistor including an oxide semiconductor.

[0111] The switch SW2 includes a second transistor including an oxide semiconductor.

[0112] As a result, compared with transistors using silicon as semiconductors, the current flowing through switches SW1 and SW2 in the non-conducting state can be made smaller. In addition, the potential of node FD1(i,j) can be maintained for a longer time. As a result, a novel camera panel with high convenience and reliability can be provided.

[0113] 《Configuration Example 2 of Pixel Circuit 430(i,j)》

[0114] In addition, the pixel circuit 430 (i, j) includes a switch SW4 (see Figure 5 ).

[0115] The switch SW4 includes a first terminal electrically connected to the conductive film VR and a second terminal electrically connected to the first terminal of the switch SW1. In addition, the second terminal is electrically connected to the first terminal of the switch SW1 at a node FD2(i,j).

[0116] Thus, regardless of the on-state of the switch SW1, the potential of the node FD2(i,j) can be initialized. In addition, the operation can be accelerated. In addition, the noise can be reduced. As a result, a novel camera panel with high convenience and reliability can be provided.

[0117] 《Structural Example 2 of Pixel 802(i,j)》

[0118] In addition, the pixel 802 (i, j) includes a photoelectric conversion element PD (i, j). In other words, each pixel includes a photoelectric conversion element.

[0119] <<Configuration Example 2 of Imaging Area 241>>

[0120] In addition, the imaging area 241 includes a pixel 802 (i+1, j).

[0121] 《Structural Example 3 of Pixel 802 (i+1, j)》

[0122] Pixel 802 (i+1, j) includes pixel circuit 430 (i+1, j).

[0123] The pixel 802 (i+1, j) provides the second image signal, and the conductive film WX(j) is provided with the second image signal.

[0124] 《Photoelectric conversion element PD(i,j)》

[0125] The photoelectric conversion element PD(i,j) includes a second terminal (see Figure 6). In other words, multiple pixels share one photoelectric conversion element. As a result, the light receiving area of ​​the photoelectric conversion element PD(i,j) can be expanded. Alternatively, two pixel circuits can be used to record the changes in light incident on one photoelectric conversion element PD(i,j). Alternatively, two pixel circuits can be used to record the light incident on one photoelectric conversion element PD(i,j) during two periods.

[0126] 《Configuration Example 3 of Pixel Circuit 430(i,j)》

[0127] Reference Figure 7 Another structure of the imaging panel according to one embodiment of the present invention will be described.

[0128] Figure 7 This is a circuit diagram for explaining the structure of an imaging panel according to one embodiment of the present invention.

[0129] Reference Figure 7 The pixel circuit 430 (i, j) of the camera panel described in the present invention is used Figure 2B The illustrated pixel panel differs in that the switch SW3 includes a second terminal electrically connected to the first terminal of the switch SW1.

[0130] Thus, even when dark current flows through the photoelectric conversion element PD(i,j), the potential of the node FD2(i,j) can be initialized. Alternatively, the potential non-uniformity of the node FD2(i,j) can be suppressed. As a result, a novel imaging panel with high convenience and reliability can be provided.

[0131] <<Configuration example 3 of imaging area 241>>

[0132] In addition, the imaging area 241 includes a group of pixels 802 (1, j) to 802 (m, j) and another group of pixels 802 (i, 1) to 802 (i, n) (see Figure 3 ). In addition, it includes wiring TX(i), wiring SE(i) and wiring RS(i) (refer to Figure 2B ).

[0133] A group of pixels 802 ( i, 1 ) to 802 ( i, n ) are arranged in a row direction (a direction indicated by an arrow ROW in the drawing) and include a pixel 802 ( i, j ).

[0134] A group of pixels 802 ( 1, j) to 802 ( m, j) are arranged in a column direction (a direction indicated by an arrow COL in the drawing) intersecting the row direction, and include a pixel 802 ( i, j).

[0135] 《Configuration example of wiring TX(i)》

[0136] The wiring TX(i) is electrically connected to a group of pixels 802 ( i, 1 ) to 802 ( i, n ) arranged in the row direction.

[0137] 《Configuration example of wiring SE (i)》

[0138] The wiring SE(i) is electrically connected to a group of pixels 802(i, 1) to 802(i, n) arranged in the row direction.

[0139] 《Configuration example of wiring RS(i)》

[0140] The wiring RS(i) is electrically connected to a group of pixels 802 (i, 1) to 802 (i, n) arranged in the row direction.

[0141] 《Structural example of conductive film WX(j)》

[0142] The conductive film WX(j) is electrically connected to a group of pixels 802 ( 1, j ) to 802 ( m, j ) arranged in the column direction.

[0143] 《Structural example of conductive film BW(j)》

[0144] The conductive film BW(j) is electrically connected to a group of pixels 802 ( 1, j ) to 802 ( m, j ) arranged in the column direction.

[0145] As a result, it is possible to provide a novel imaging panel having high convenience and reliability.

[0146] <<Configuration example 4 of imaging area 241>>

[0147] Another structure of the imaging panel according to one embodiment of the present invention will be described with reference to FIG. 8 .

[0148] FIG. 8 is a diagram for explaining the structure of an imaging panel according to one embodiment of the present invention. Fig. 8A is a circuit diagram illustrating the structure of a pixel circuit of an imaging panel according to one embodiment of the present invention. Figure 8B Instructions for use Fig. 8A A timing diagram illustrating a method for driving an imaging panel.

[0149] 8 described with reference to the camera panel and the use of Figure 2B The pixel panel described is different in that the pixel circuit 430 (i, j) includes a switch SW5; the pixel circuit 430 (i, j) includes a capacitor C2; and the imaging area 241 includes a wiring CT (i). Here, the differences are described in detail, and the above description is used for parts that can use the same structure as the above structure.

[0150] 《Configuration example of pixel circuit 430(i,j)》

[0151] The switch SW5 includes a first terminal electrically connected to the node FD1 (i, j) (see FIG. 8 ).

[0152] The switch SW1 includes a second terminal electrically connected to a second terminal of the switch SW5 .

[0153] The capacitor C2 includes a first electrode electrically connected to the conductive film VCOM2 and a second electrode electrically connected to the second terminal of the switch SW5. The conductive film VCOM2 can supply a ground potential, for example.

[0154] 《Configuration example of wiring CT(i)》

[0155] The wiring CT(i) is electrically connected to a group of pixels 802 ( i, 1 ) to 802 ( i, n ) arranged in the row direction.

[0156] Thus, the noise generated when the node FD1(i, j) is initialized using the switch SW3 can be cancelled. Alternatively, the data including the weight proportional to the product of the exposure EXP(i, j) of the pixel 802(i, j) and the weight data W(i, j) can be obtained using a readout circuit including a two-stage correlated double sampling circuit. As a result, a novel imaging panel with high convenience and reliability can be provided.

[0157] Note that this embodiment mode can be combined with other embodiment modes described in this specification as appropriate.

[0158] (Implementation Method 2)

[0159] In this embodiment, refer to Figure 3 4 illustrates the structure of an imaging panel according to one embodiment of the present invention.

[0160] FIG. 4 is a diagram for explaining a method of driving an imaging panel according to one embodiment of the present invention. Figure 4A is a timing chart for explaining a method for driving an imaging panel according to one embodiment of the present invention. Figure 4B This is a timing chart for explaining changes in potentials of nodes included in pixels of an imaging panel according to one embodiment of the present invention.

[0161] <Structural Example 1 of Image Pickup Panel>

[0162] The imaging panel 800 described in this embodiment includes a selection line driving circuit GD, a signal line driving circuit BWD, and a readout circuit RD (see Figure 3 ).

[0163] 《Configuration example of selection line driver circuit GD》

[0164] The selection line driving circuit GD includes a driving circuit RSD, a driving circuit TXD, and a driving circuit SED, and has a function of providing a first selection signal, a second selection signal, and a third selection signal.

[0165] 《Configuration example of signal line driver circuit BWD》

[0166] The signal line driving circuit BWD provides weight data.

[0167] 《Configuration example of readout circuit RD》

[0168] The readout circuit RD is supplied with the first image signal, and the readout circuit RD supplies image data.

[0169] 《Configuration example of wiring TX(i)》

[0170] The wiring TX(i) is supplied with the above-mentioned first selection signal.

[0171] 《Configuration example of wiring SE (i)》

[0172] The wiring SE(i) is supplied with the above-mentioned second selection signal.

[0173] 《Configuration example of wiring RS(i)》

[0174] The wiring RS(i) is supplied with the above-mentioned third selection signal.

[0175] 《Structural example of conductive film BW(j)》

[0176] The conductive film BW(j) is provided with the above-mentioned weight data.

[0177] 《Configuration example of switch SW1》

[0178] The switch SW1 operates based on the first selection signal.

[0179] 《Configuration example of switch SW2》

[0180] The switch SW2 operates based on the second selection signal.

[0181] 《Configuration example of switch SW3》

[0182] The switch SW3 operates based on the third selection signal.

[0183] As a result, it is possible to provide a novel imaging panel having high convenience and reliability.

[0184] <Method 1 for Driving the Image Capture Panel 800>

[0185] The method of recording the exposure levels EXP(i, j) to EXP(i+2, j) using the imaging panel 800 is described (see FIG. 4 ). Figure 4A The symbol 1Write represents the recording period.

[0186] [First step]

[0187] In a first step, pixel 802(i,j) is initialized.

[0188] For example, during the period T0, the wiring RS(i) supplies a potential for turning on the switch SW3 of the pixel 802(i,j), and the potential of the node FD1(i,j) is initialized using the potential supplied by the conductive film VR (see Figure 4B ).

[0189] [Step 2]

[0190] In the second step, the exposure level EXP(i, j) in the period T1 is recorded on the pixel 802 (i, j).

[0191] For example, during the period T1, the wiring TX(i) supplies a potential that causes the switch SW1 of the pixel 802(i,j) to be in a non-conductive state (see Figure 4A ). The photoelectric conversion element PD(i,j) causes a current to flow according to the exposure level EXP(i,j), and the potential of the node FD1(i,j) increases.

[0192] Specifically, the node FD1(i,j) holds a potential higher than the potential r supplied by the conductive film VR by a voltage x (see Figure 4B ). Note that, for example, the voltage x includes a component derived from fixed ambient light, which is recorded as k in the figure.

[0193] Furthermore, when light is incident on pixel 802 (i, j) during period T1, the light is also incident on pixel 802 (i+1, j), and both pixels record the exposure derived from the light.

[0194] [Third step]

[0195] In the third step, the exposure EXP(i+1,j) in the period T1 and the period T2 is recorded on the pixel 802(i+1,j). In addition, the period T2 can be made much shorter than the period T0. In addition, the rise of the signal provided to the wiring TX(i+1) may not be consistent with the rise of the signal provided to the wiring TX(i). For example, the rise of the signal provided to the wiring TX(i+1) may be later than the rise of the signal provided to the wiring TX(i). Specifically, it can be delayed by a period shorter than 10ns. Alternatively, the width of the pulse signal provided to the wiring TX(i+1) can be made the same as the width of the pulse signal provided to the wiring TX(i+1).

[0196] For example, during period T2, the wiring TX(i+1) provides a potential that causes the switch SW1 of the pixel 802(i+1,j) to be in a non-conductive state (see Figure 4A ). The photoelectric conversion element PD(i+1,j) causes a current to flow according to the exposure level EXP(i+1,j), and the potential of the node FD1(i+1,j) increases.

[0197] Specifically, the node FD1(i+1,j) holds a potential higher than the potential r supplied by the conductive film VR by a voltage (x+d) (see Figure 4B ). Note that, for example, the voltage d is derived from a fixed ambient light component.

[0198] The period T2 is preferably less than 10 ns. In 10 ns, light moves about 3 m. In addition, when light enters the pixel 802 (i+1, j) during the period T2, the pixel 802 (i+1, j) records the light and the pixel 802 (i, j) does not record the light.

[0199] In this way, the distance to the object existing within 3 m from the imaging panel can be calculated.

[0200] [Step 4]

[0201] In the fourth step, the exposure level EXP(i+2,j) in the period T1 to the period T3 is recorded on the pixel 802 (i+2,j).

[0202] For example, during period T3, the wiring TX(i+2) supplies a potential that causes the switch SW1 of the pixel 802(i+2,j) to be in a non-conductive state (see Figure 4A ). The photoelectric conversion element PD(i+2,j) causes a current to flow according to the exposure level EXP(i+2,j), and the potential of the node FD1(i+2,j) increases.

[0203] Specifically, the node FD1(i+2,j) holds a potential higher than the potential r supplied by the conductive film VR by a voltage (x+2d+p) (see Figure 4B). Note that, for example, voltage 2d is derived from the component of fixed ambient light incident during periods T2 and T3, and voltage p is derived from the component of pulsed light incident during period T3. Figure 4B 2 shows the amount of light LUMI incident during the period T0 to the period T4.

[0204] Thus, pixel 802 (i, j) records the exposure EXP (i, j) during period T1, pixel 802 (i+1, j) records the exposure EXP (i+1, j) during period T2, and pixel 802 (i+2, j) records the exposure EXP (i+2, j) during period T3.

[0205] <Method 2 of Driving the Image Capture Panel 800>

[0206] A method of obtaining information including a weight proportional to the product of the exposure EXP(i,j) of the pixel 802 (i,j) and the weight data W(i,j) from the current flowing through the conductive film WX(j) will be described.

[0207] Specifically, the change amount I caused by the presence or absence of the weight data W(i, j) in the current flowing through the conductive film WX(j) is described. dif (i, j, w) to obtain the information including the weight. Note that Figure 4A In FIG. 1 , symbol 1Read indicates a period for obtaining information including weights.

[0208] [First step]

[0209] In the first step, the current I(i, j, 0) flowing through the conductive film WX(j) when the weight data W(i, j) is not used is measured.

[0210] For example, in period T11, a potential for turning on the switch SW2 is supplied using the wiring SE(i), and a reference potential is supplied to the capacitor C1 (see Figure 4A ). Thus, a state where no weighted data W(i,j) is added can be formed.

[0211] In addition, the current I(i, j, 0) flowing from the conductive film WX(j) to the conductive film VPI is measured using the readout circuit RD (see Figure 2B and Figure 3 ). In other words, the first image signal is read out using the readout circuit RD.

[0212] For example, the current I(i, j, 0) flowing through the conductive film WX(j) is proportional to the function represented by the following equation (1). Note that in the equation, r+x is the potential of the node FD1(i, j) during the period T11, and Vth is the threshold value of the transistor M.

[0213] [Formula 1]

[0214] (r+x-Vth) 2 ···(1)

[0215] [Step 2]

[0216] In the second step, the current I(i, j, w) flowing through the conductive film WX(j) when the weight data W(i, j) is used is measured.

[0217] For example, in period T12, the wiring SE(i) is used to supply a potential for turning on the switch SW2, and the conductive film BW(j) is used to supply a voltage including the weight data W(i, j) (see Figure 4A ).

[0218] In addition, the current I(i, j, w) flowing from the conductive film WX(j) to the conductive film VPI is measured using the readout circuit RD (see Figure 2B and Figure 3 ).

[0219] For example, the current I(i, j, w) flowing through the conductive film WX(j) is proportional to the function represented by the following equation (2). Note that in the equation, r+x is the potential of the node FD1(i, j) during the period T11, w is the voltage including the weight data W(i, j), and Vth is the threshold value of the transistor M.

[0220] [Formula 2]

[0221] (r+x+w-Vth) 2 ···(2)

[0222] [Third step]

[0223] In the third step, the change amount I of the current flowing through the conductive film WX(j) due to the presence or absence of the weight data W(i, j) is obtained. dif (i, j, w).

[0224] For example, by using a differential circuit to subtract the current I(i, j, w) from the current I(i, j, 0), the change I of the current flowing through the conductive film WX(j) due to the presence or absence of the weight data W(i, j) is obtained. dif (i, j, w).

[0225] Note that the change in the current flowing through the conductive film WX(j) due to the presence or absence of the weight data W(i, j) is I dif (i, j, w) is proportional to the function expressed by the following equation (3).

[0226] [Formula 3]

[0227] (r+x-Vth)2 -(r+x+w-Vth) 2

[0228] =(r+x-Vth+r+x+w-Vth)(r+x-Vth-rx-w+Vth)

[0229] =-w(2r+2x+w-2Vth)···(3)

[0230] [Step 4]

[0231] In the fourth step, the change I obtained from the third step is dif (i, j, w) minus the change I when there is no exposure dif0 (i, j, w) to calculate I DELTA (i, j, w).

[0232] Note that the change in the current flowing through the conductive film WX(j) of the pixel that is not exposed due to the presence or absence of the weight data W(i, j) may be used as the change in the current when not exposed. dif0 (i, j, w).

[0233] Specifically, the computing device is used to calculate the change I dif (i, j, w) minus the change I dif0 (i, j, w).

[0234] Note that the change in I without exposure dif0 (i, j, w) is proportional to the function expressed by the following equation (4).

[0235] [Formula 4]

[0236] (r-Vth) 2 -(r+w-Vth) 2

[0237] =(r-Vth+r+w-Vth)(r-Vth-r-w+Vth)

[0238] =-W(2r+w-2Vth)···(4)

[0239] I DELTA (i, j, w) is proportional to the function expressed by the following equation (5). Note that in the equation, r+x is the potential of the node FD1 (i, j) in the period T11, and w is the voltage including the weight data W (i, j).

[0240] [Formula 5]

[0241] -w(2r+2x+w-2Vth)+w(2r+w-2Vth)

[0242] =-2wx···(5)

[0243] Thus, based on the calculation result, information including a weight proportional to the product of the exposure EXP(i, j) of the pixel 802 (i, j) and the weight data W(i, j) can be obtained.

[0244] <Method 3 of Driving the Image Capture Panel 800>

[0245] The following describes a method of subtracting a component derived from fixed light incident on the imaging panel 800. For example, the component derived from fixed ambient light incident on the pixel 802(i, j), the pixel 802(i+1, j), and the pixel 802(i+2, j) can be subtracted from these pixels.

[0246] Note that pixel 802(i,j) records light incident during period T1, pixel 802(i+1,j) records light incident during periods T1 and T2, and pixel 802(i+2,j) records light incident during periods T1 to T3.

[0247] [First step]

[0248] In the first step, for example, the I of the pixel 802 (i, j) is calculated by a computing device. DELTA (i,j,w).

[0249] Specifically, w is the weight data W(i,j), from the change I dif (i,j,w) minus the change I dif0 (i,j,-w) to calculate I DELTA (i,j,-w). Note that I DELTA (i, j, -w) is proportional to the value w(r+x) obtained by multiplying (r+x) by w.

[0250] [Step 2]

[0251] In the second step, for example, the I of pixel 802 (i+1, j) is calculated by a computing device. DELTA (i+1,j,w).

[0252] Specifically, -2w is used as the weight data W(i+1,j), and the change I dif (i+1,j,-2w) minus the change I dif0 (i+1,j,-2w) to calculate I DELTA (i+1,j,-2w). DELTA (i+1, j, -2w) is proportional to the value -2w(r+x+d) obtained by multiplying (r+x+d) by -2w.

[0253] [Third step]

[0254] In the third step, for example, the I of the pixel 802 (i+2, j) is calculated by using a computing device. DELTA (i+2,j,w).

[0255] Specifically, w is the weight data W(i+2,j), and the change I dif (i+2,j,w) minus the change I dif0 (i+2,j,w) to calculate I DELTA (i+2,j,w). DELTA (i+2, j, w) is proportional to the value w(r+x+2d+p) obtained by multiplying (r+x+2d+p) by w.

[0256] [Step 4]

[0257] In the fourth step, for example, the I calculated in the first to third steps is calculated by a computing device. DELTA (i, j, -w), I DELTA (i+1, j, -2w) and I DELTA The sum SUM of (i+2, j, w). The sum SUM is proportional to the value obtained by multiplying p by w.

[0258] [Formula 6]

[0259] w(r+x)-2w(r+x+d)+w(r+x+2d+p)

[0260] =w(r+x-2r-2x-2d+r+x+2d+p)

[0261] =wp···(6)

[0262] Thus, the component derived from the fixed light can be subtracted from the light incident during the specified period to extract the remaining components. Alternatively, the component derived from the fixed light can be subtracted from the light incident during the specified period, for example, the component of the pulsed light can be extracted.

[0263] <Method 4 of Driving the Image Capture Panel 800>

[0264] Instructions for use Fig. 8A The driving method of the imaging panel described in the Figure 8B ). Note that Figure 8B The symbol 1Write indicates the recording period. Figure 8B In FIG. 1 , symbol 1Read indicates a period for obtaining information including weights.

[0265] [First step]

[0266] In a first step, pixel 802(i,j) is initialized.

[0267] For example, during the period T0, the wiring RS(i) supplies a potential for turning on the switch SW3, and the wiring CT(i) supplies a potential for turning on the switch SW5. Thus, the potentials of the nodes FD1(i, j) and FD2(i, j) are initialized using the potentials supplied by the conductive film VR.

[0268] [Step 2]

[0269] In the second step, the exposure level EXP(i, j) in the period T1 is recorded on the pixel 802 (i, j).

[0270] For example, during the period T1, the wiring TX(i) supplies a potential that causes the switch SW1 of the pixel 802(i,j) to be in a non-conductive state (see Figure 8B ). The photoelectric conversion element PD(i,j) causes a current to flow according to the exposure level EXP(i,j), and the potential of the node FD2(i,j) increases.

[0271] Specifically, the node FD2 (i, j) holds a potential higher than the potential r supplied from the conductive film VR by a voltage x.

[0272] [Third step]

[0273] In the third step, the current I(i, j, 0) flowing through the conductive film WX(j) when there is no influence of exposure and when the weight data W(i, j) is not used is measured.

[0274] For example, in period T11, a potential for turning on the switch SW2 is supplied using the wiring SE(i), and a reference potential is supplied to the capacitor C1 (see Figure 8B ). Thus, a state where no weighted data W(i,j) is added can be formed.

[0275] In addition, a potential for maintaining the non-conductive state of the switch SW5 is supplied using the wiring CT(i). This can prevent the exposure from affecting the potential of the node FD1(i,j).

[0276] In addition, the current I(i, j, 0) flowing from the conductive film WX(j) to the conductive film VPI is measured using the readout circuit RD (see Fig. 8A and Figure 3 ). In other words, the potential of the node FD1 (i, j) which is not affected by the exposure is read out using the readout circuit RD.

[0277] [Step 4]

[0278] In the fourth step, the current I(i, j, w) flowing through the conductive film WX(j) when there is no influence of exposure and the weight data W(i, j) is used is measured.

[0279] For example, in period T12, the wiring SE(i) is used to supply a potential for turning on the switch SW2, and the conductive film BW(j) is used to supply a voltage including the weight data W(i, j) (see Figure 8B ).

[0280] In addition, a potential for maintaining the non-conductive state of the switch SW5 is supplied using the wiring CT(i). This can prevent the exposure from affecting the potential of the node FD1(i,j).

[0281] In addition, the current I(i, j, w) flowing from the conductive film WX(j) to the conductive film VPI is measured using the readout circuit RD (see Fig. 8A and Figure 3 ).

[0282] [Step 5]

[0283] In the fifth step, the change amount I of the current flowing through the conductive film WX(j) due to the presence or absence of the weight data W(i, j) is obtained when there is no influence of exposure. dif0 (i,j,w).

[0284] For example, by using a differential circuit to subtract the current I(i,j,w) from the current I(i,j,0), the change I of the current flowing through the conductive film WX(j) due to the presence or absence of the weight data W(i,j) is obtained. dif0 (i,j,w).

[0285] [Step 6]

[0286] In the sixth step, the current I(i, j, 0) flowing through the conductive film WX(j) when exposed and using the weight data W(i, j) is measured.

[0287] For example, in period T13, a potential for turning on the switch SW2 is supplied using the wiring SE(i), and a reference potential is supplied to the capacitor C1 (see Figure 8B ). Thus, a state where no weighted data W(i,j) is added can be formed.

[0288] Furthermore, a potential for turning on the switch SW5 is supplied using the wiring CT(i), so that the potential of the node FD1(i,j) can be brought to a potential in an exposed state.

[0289] In addition, the current I(i, j, 0) flowing from the conductive film WX(j) to the conductive film VPI is measured using the readout circuit RD (see Fig. 8A and Figure 3 ). In other words, the potential of the node FD1 (i, j) in the exposed state is read out using the readout circuit RD.

[0290] [Step 7]

[0291] In the seventh step, the current I(i, j, w) flowing through the conductive film WX(j) when exposed and using the weight data W(i, j) is measured.

[0292] For example, in period T14, the wiring SE(i) is used to supply a potential for turning on the switch SW2, and the conductive film BW(j) is used to supply a voltage including the weight data W(i, j) (see Figure 8B ).

[0293] Furthermore, a potential for turning on the switch SW5 is supplied using the wiring CT(i), so that the potential of the node FD1(i,j) can be brought to a potential in an exposed state.

[0294] In addition, the current I(i, j, w) flowing from the conductive film WX(j) to the conductive film VPI is measured using the readout circuit RD (see Fig. 8A and Figure 3 ).

[0295] [Step 8]

[0296] In the eighth step, the change amount I of the current flowing through the conductive film WX(j) during exposure due to the presence or absence of the weight data W(i, j) is obtained. dif (i,j,w).

[0297] For example, by using a differential circuit to subtract the current I(i,j,w) from the current I(i,j,0), the change I of the current flowing through the conductive film WX(j) due to the presence or absence of the weight data W(i,j) is obtained. dif (i,j,w).

[0298] Note that this embodiment mode can be combined with other embodiment modes described in this specification as appropriate.

[0299] (Implementation method 3)

[0300] In this embodiment, a configuration example of an imaging device according to one embodiment of the present invention will be described.

[0301] Fig. 9A and Fig. 9B The structure of a pixel included in an imaging device is exemplified. Fig. 9A An example in which a pixel has a stacked-layer structure including a layer 2561 and a layer 2562 is shown.

[0302] Layer 2561 includes a photoelectric conversion element PD(i,j). Fig. 9C As shown, the photoelectric conversion element PD(i,j) can be a stack of layers 2565a, 2565b and 2565c.

[0303] Fig. 9C The photoelectric conversion element PD(i,j) shown is a pn junction photodiode. For example, a p + type semiconductor, an n-type semiconductor can be used as layer 2565b, and an n-type semiconductor can be used as layer 2565c. + Alternatively, n + type semiconductor, a p-type semiconductor may be used as layer 2565b, and a p-type semiconductor may be used as layer 2565c. + In addition, the photoelectric conversion element PD(i,j) may be a pin junction photodiode using an i-type semiconductor as the layer 2565b.

[0304] The pn junction photodiode or the pin junction photodiode can be formed using single crystal silicon. Alternatively, the pin junction photodiode can be formed using a thin film of amorphous silicon, microcrystalline silicon, polycrystalline silicon, or the like.

[0305] In addition, the photoelectric conversion element PD(i,j) in layer 2561 can be as follows Fig.9D As shown, a stack of layer 2566a, layer 2566b, layer 2566c and layer 2566d is used. Fig.9D The photoelectric conversion element PD(i, j) shown is an example of an avalanche photodiode, in which the layers 2566a and 2566d correspond to electrodes, and the layers 2566b and 2566c correspond to photoelectric conversion units.

[0306] The layer 2566a is preferably made of a low-resistance metal layer or the like. For example, aluminum, titanium, tungsten, tantalum, silver, or a stacked layer thereof can be used.

[0307] The layer 2566d is preferably a conductive layer having high light transmittance to visible light, and for example, indium oxide, tin oxide, zinc oxide, indium tin oxide, gallium zinc oxide, indium gallium zinc oxide, or graphene can be used. Alternatively, the layer 2566d may be omitted.

[0308] The layers 2566b and 2566c of the photoelectric conversion unit may have a pn junction photodiode structure using a selenium-based material as the photoelectric conversion layer. Preferably, a p-type semiconductor selenium-based material is used as the layer 2566b, and an n-type semiconductor such as gallium oxide is used as the layer 2566c.

[0309] Photoelectric conversion elements using selenium materials have high external quantum efficiency for visible light. The photoelectric conversion element can increase the amount of electron amplification relative to the amount of incident light by using avalanche multiplication. In addition, selenium materials have high light absorption coefficients, so they have advantages in production, such as being able to manufacture photoelectric conversion layers with thin films. Thin films of selenium materials can be formed by vacuum evaporation or sputtering.

[0310] As the selenium-based material, crystalline selenium such as single crystal selenium or polycrystalline selenium, amorphous selenium, a compound of copper, indium, and selenium (CIS), or a compound of copper, indium, gallium, and selenium (CIGS) can be used.

[0311] The n-type semiconductor is preferably formed of a material with a wide band gap and translucency to visible light. For example, zinc oxide, gallium oxide, indium oxide, tin oxide, or oxides mixed with the above substances can be used. In addition, these materials also have the function of a hole injection blocking layer, which can reduce dark current.

[0312] In addition, the photoelectric conversion element PD(i,j) in layer 2561 can be as follows Fig.9E As shown, a stack of layer 2567a, layer 2567b, layer 2567c, layer 2567d and layer 2567e is used. Fig.9D The photoelectric conversion element PD(i,j) shown is an example of an organic photoconductive film, the layers 2567a and 2567e correspond to electrodes, and the layers 2567b, 2567c, and 2567d correspond to photoelectric conversion units.

[0313] One of the layer 2567b and the layer 2567d in the photoelectric conversion unit may be a hole transport layer, and the other may be an electron transport layer. Alternatively, the layer 2567c may be a photoelectric conversion layer.

[0314] As the hole transport layer, for example, molybdenum oxide can be used. As the electron transport layer, for example, C 60 , C 70 Fullerenes or their derivatives, etc.

[0315] As the photoelectric conversion layer, a mixed layer (bulk heterojunction structure) of an n-type organic semiconductor and a p-type organic semiconductor can be used.

[0316] Fig. 9AThe layer 2562 shown may use a silicon substrate, for example. The silicon substrate includes Si transistors, etc. By using the Si transistors, in addition to forming a pixel circuit, a circuit for driving the pixel circuit, a readout circuit for an image signal, an image processing circuit, etc. may also be formed. Specifically, a part or all of the transistors included in the pixel circuit and the peripheral circuit (pixel 802 (i, j), selection line drive circuit GD, signal line drive circuit BWD, and readout circuit RD, etc.) described in Embodiment 1 or Embodiment 2 may be set in layer 2562.

[0317] Alternatively, pixels can be Fig. 9B As shown, a stacked structure of layer 2561, layer 2563 and layer 2562 is used.

[0318] The layer 2563 may include an OS transistor (for example, a switch SW1 and a switch SW3 of the pixel 802 (i, j)). In this case, the layer 2562 preferably includes an Si transistor (for example, a transistor M and a switch SW2 of the pixel 802 (i, j)). In addition, a part of the transistors included in the peripheral circuit described in Embodiment 1 or Embodiment 2 may be provided in the layer 2563.

[0319] By adopting this structure, the components and peripheral circuits constituting the pixel circuit can be dispersed into multiple layers, and the components can be overlapped with each other or with the peripheral circuits, so that the area of ​​the camera device can be reduced. Fig. 9B In the structure, layer 2562 can also be used as a supporting substrate and pixels 802 (i, j) and peripheral circuits can be set in layers 2561 and 2563.

[0320] As a semiconductor material for OS transistors, metal oxides with an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more can be used. Typical examples include oxide semiconductors containing indium, such as CAAC-OS or CAC-OS mentioned later. CAAC-OS has stable atoms constituting the crystal, and is suitable for transistors that emphasize reliability. CAC-OS exhibits high mobility characteristics and is suitable for transistors that are driven at high speeds.

[0321] Since the semiconductor layer of the OS transistor has a large energy gap, it exhibits an extremely low off-state current characteristic of only a few yA / μm (current value per channel width of 1μm). Unlike Si transistors, OS transistors do not experience impact ionization, avalanche breakdown, short channel effects, etc., so they can form circuits with high voltage resistance and high reliability. In addition, the electrical characteristic unevenness caused by the uneven crystallinity of Si transistors is not easily generated in OS transistors.

[0322] As the semiconductor layer in the OS transistor, for example, a film represented by an "In-M-Zn-based oxide" containing indium, zinc and M (selected from metals such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium or hafnium) can be used.

[0323] When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn oxide, the atomic ratio of the metal element of the sputtering target used to form the In-M-Zn oxide preferably satisfies In≥M and Zn≥M. The atomic ratio of the metal element of such a sputtering target is preferably In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, etc. Note that the atomic ratio of the semiconductor layer formed may vary within the range of ±40% of the atomic ratio of the metal element in the above-mentioned sputtering target.

[0324] As the semiconductor layer, an oxide semiconductor with a low carrier density is used. For example, an oxide semiconductor with a carrier density of 1×10 17 / cm 3 Below, preferably 1×10 15 / cm 3 Below, more preferably 1×10 13 / cm 3 Below, more preferably 1×10 11 / cm 3 Below, more preferably less than 1×10 10 / cm 3 , 1×10 -9 / cm 3 The above oxide semiconductors are referred to as high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors. Since the defect state density of the oxide semiconductor is low, it can be said that the oxide semiconductor has stable characteristics.

[0325] Note that the present invention is not limited to the above description, and a material having an appropriate composition can be used according to the desired semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the transistor. In addition, it is preferred to appropriately set the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. of the semiconductor layer to obtain the desired semiconductor characteristics of the transistor.

[0326] When the oxide semiconductor constituting the semiconductor layer contains silicon or carbon, which is one of the Group 14 elements, oxygen vacancies increase, which causes the semiconductor layer to become n-type. Therefore, the concentration of silicon or carbon in the semiconductor layer (the concentration measured by secondary ion mass spectrometry) is set to 2×10 18 atoms / cm 3 Below, preferably 2×10 17 atoms / cm 3 the following.

[0327] In addition, when an alkali metal or alkaline earth metal is bonded to an oxide semiconductor, carriers are generated, which increases the off-state current of the transistor. Therefore, the concentration of the alkali metal or alkaline earth metal in the semiconductor layer (the concentration measured by secondary ion mass spectrometry) is set to 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 the following.

[0328] In addition, when the oxide semiconductor constituting the semiconductor layer contains nitrogen, electrons are generated as carriers, the carrier density increases, and it is easy to become n-type. As a result, transistors using oxide semiconductors containing nitrogen tend to have normally-on characteristics. Therefore, the nitrogen concentration of the semiconductor layer (the concentration measured by secondary ion mass spectrometry) is preferably 5×10 18 atoms / cm 3 the following.

[0329] In addition, when the oxide semiconductor constituting the semiconductor layer contains hydrogen, hydrogen reacts with oxygen bonded to metal atoms to generate water, and thus oxygen vacancies are sometimes formed in the oxide semiconductor. In the case where the channel formation region in the oxide semiconductor contains oxygen vacancies, the transistor may have a normally-on characteristic. Furthermore, sometimes defects formed by hydrogen entering oxygen vacancies are used as donors to generate electrons as carriers. In addition, a portion of the hydrogen is bonded to oxygen bonded to metal atoms to generate electrons as carriers. Therefore, transistors using oxide semiconductors containing more hydrogen tend to have normally-on characteristics.

[0330] Defects formed by hydrogen entering oxygen vacancies are used as donors for oxide semiconductors. However, it is difficult to quantitatively evaluate this defect. Therefore, in oxide semiconductors, evaluation is sometimes performed based on carrier concentration rather than donor concentration. Therefore, in this specification, etc., sometimes as a parameter of an oxide semiconductor, instead of using donor concentration, carrier concentration assumed to be in a state where no electric field is applied is used. That is, the "carrier concentration" described in this specification, etc. may sometimes be referred to as "donor concentration".

[0331] Therefore, it is preferable to reduce the amount of hydrogen in the oxide semiconductor as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration measured by secondary ion mass spectrometry (SIMS) is less than 1×10 20 atoms / cm 3 , preferably less than 1×10 19 atoms / cm 3 , more preferably less than 5×10 18 atoms / cm 3 , and more preferably less than 1×10 18 atoms / cm 3 By using an oxide semiconductor in which impurities such as hydrogen have been sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be imparted.

[0332] In addition, the semiconductor layer may also have a non-single-crystal structure, for example. The non-single-crystal structure includes, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor) with a c-axis orientation, a polycrystalline structure, a microcrystalline structure, or an amorphous structure. Among the non-single-crystal structures, the amorphous structure has the highest defect state density, while the CAAC-OS has the lowest defect state density.

[0333] The oxide semiconductor film with an amorphous structure has, for example, a disordered atomic arrangement and no crystalline component. Alternatively, the oxide semiconductor film with an amorphous structure has, for example, a completely amorphous structure and no crystalline part.

[0334] In addition, the semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may have a single layer structure or a stacked layer structure including two or more of the above regions.

[0335] Next, the structure of CAC (Cloud-Aligned Composite)-OS, which is one embodiment of a non-single-crystal semiconductor layer, will be described.

[0336] CAC-OS refers to, for example, a configuration in which elements contained in an oxide semiconductor are unevenly distributed, wherein the size of the material containing the unevenly distributed elements is greater than or equal to 0.5 nm and less than or equal to 10 nm, preferably greater than or equal to 1 nm and less than or equal to 2 nm, or a similar size. Note that in the following, a state in which one or more metal elements are unevenly distributed in an oxide semiconductor and regions containing the metal elements are mixed in a size of greater than or equal to 0.5 nm and less than or equal to 10 nm, preferably greater than or equal to 1 nm and less than or equal to 2 nm, is also referred to as a mosaic or patch shape.

[0337] The oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition, it may also contain one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten and magnesium.

[0338] For example, CAC-OS in In-Ga-Zn oxide (in CAC-OS, In-Ga-Zn oxide can be referred to as CAC-IGZO in particular) refers to a material divided into indium oxide (hereinafter referred to as InO X1 (X1 is a real number greater than 0)) or indium zinc oxide (hereinafter referred to as In X2 Zn Y2 O Z2 (X2, Y2 and Z2 are real numbers greater than 0)) and gallium oxide (hereinafter referred to as GaO X3 (X3 is a real number greater than 0)) or gallium zinc oxide (hereinafter referred to as Ga X4 Zn Y4 O Z4 (X4, Y4 and Z4 are real numbers greater than 0)) etc. to form a mosaic shape, and the mosaic-shaped InO X1 or In X2 Zn Y2 O Z2 A structure uniformly distributed in the film (hereinafter also referred to as a cloud shape).

[0339] In other words, CAC-OS is a GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 In this specification, for example, when the atomic ratio of In to element M in the first region is greater than that in the second region, the In concentration in the first region is higher than that in the second region.

[0340] Note that IGZO is a general term and sometimes refers to a compound containing In, Ga, Zn, and O. As a typical example, InGaO3(ZnO) m1 (m1 is a natural number) or In (1+x0) Ga (1-x0) O3(ZnO) m0 (-1≤x0≤1, m0 is an arbitrary number).

[0341] The crystalline compound has a single crystal structure, a polycrystalline structure or a CAAC structure. The CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected in a non-oriented manner on the ab plane.

[0342] On the other hand, CAC-OS is related to the material composition of oxide semiconductors. CAC-OS refers to a composition in which, in a material composition containing In, Ga, Zn, and O, nanoparticle-like regions with Ga as the main component are observed in part, and nanoparticle-like regions with In as the main component are observed in part, and these regions are irregularly dispersed in a mosaic shape. Therefore, in CAC-OS, the crystal structure is a secondary factor.

[0343] CAC-OS does not include a stacked-layer structure of two or more films having different compositions, for example, a structure consisting of two layers of a film having In as a main component and a film having Ga as a main component.

[0344] Note that sometimes no GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 There are clear boundaries between the regions of the main components.

[0345] In the case where CAC-OS includes one or more selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten and magnesium instead of gallium, CAC-OS refers to a structure in which nanoparticle-like regions with the metal element as the main component are observed in a part and nanoparticle-like regions with In as the main component are observed in a part and are irregularly dispersed in a mosaic manner.

[0346] CAC-OS can be formed, for example, by sputtering without heating the substrate. When CAC-OS is formed by sputtering, one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas can be used as a deposition gas. In addition, the lower the flow rate ratio of the oxygen gas in the total flow rate of the deposition gas during film formation, the better. For example, the flow rate ratio of the oxygen gas is set to be greater than 0% and less than 30%, preferably greater than 0% and less than 10%.

[0347] CAC-OS has the following characteristics: when measured by the Out-of-plane method using θ / 2θ scanning, which is one of the X-ray diffraction (XRD) measurement methods, no clear peak is observed. In other words, according to the X-ray diffraction measurement, it is known that there is no orientation in the ab plane direction and the c-axis direction in the measurement area.

[0348] In addition, in the electron diffraction pattern of CAC-OS obtained by irradiating an electron beam with a beam diameter of 1 nm (also called a nanobeam), a ring-shaped area with high brightness (ring-shaped area) and multiple bright spots in the ring-shaped area were observed. Therefore, according to the electron diffraction pattern, it can be seen that the crystal structure of CAC-OS has an nc (nano-crystal) structure that is not oriented in the plane direction and the cross-sectional direction.

[0349] In addition, for example, in CAC-OS of In-Ga-Zn oxide, it can be confirmed from the EDX-mapping image obtained by energy dispersive X-ray spectroscopy (EDX) that there is GaO X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 A composition in which the main components are unevenly distributed in the area.

[0350] The structure of CAC-OS is different from that of IGZO compounds in which metal elements are evenly distributed, and it has different properties from IGZO compounds. X3 The area with In as the main component X2 Zn Y2 O Z2 or InO X1 The regions where the main components are present are separated from each other, and the regions where the main components are present are in a mosaic-like structure.

[0351] Here, In X2 Zn Y2 OZ2 or InO X1 The conductivity of the area with GaO as the main component is higher than that of the area with GaO as the main component. X3 In other words, when the carrier flows through the region with In X2 Zn Y2 O Z2 or InO X1 When In is the main component of the region, it exhibits the conductivity of an oxide semiconductor. X2 Zn Y2 O Z2 or InO X1 When the region as the main component is distributed in a cloud-like manner in the oxide semiconductor, a high field-effect mobility (μ) can be achieved.

[0352] On the other hand, GaO X3 The insulation of the area with In as the main component is higher than that of the area with In X2 Zn Y2 O Z2 or InO X1 In other words, when GaO X3 When regions with the main components of MgO and the like are distributed in an oxide semiconductor, leakage current can be suppressed and good switching operation can be achieved.

[0353] Therefore, when CAC-OS is used in semiconductor devices, the X3 The insulation properties of etc. and the causes of In X2 Zn Y2 O Z2 or InO X1 The complementary effect of conductivity can achieve high on-state current (I on ) and high field effect mobility (μ).

[0354] In addition, semiconductor elements using CAC-OS have high reliability. Therefore, CAC-OS is suitable for use as a constituent material of various semiconductor devices.

[0355] Fig. 10A Yes Description Fig. 9A FIG. 2561 is a diagram showing an example of a cross section of a pixel. As the photoelectric conversion element PD(i,j), layer 2561 includes a pn junction type photodiode using silicon as a photoelectric conversion layer. Layer 2562 includes a Si transistor, Fig. 10A The switch SW1 and the switch SW3 constituting the pixel circuit are illustrated as examples.

[0356] In the photoelectric conversion element PD(i,j), the layer 2565a may be p + type region, layer 2565b is an n-type region and layer 2565c is an n-type region. +In addition, layer 2565b is provided with region 2536 for connecting the power line to layer 2565c. For example, region 2536 may be p + Type area.

[0357] Fig. 10A The Si transistor shown is a fin-type transistor having a channel formation region in a silicon substrate 2540. Fig.11A The cross section along the channel width is shown. Si transistors can also be Fig. 11B A planar transistor is shown.

[0358] In addition, if Fig. 11C The Si transistor shown may also be a transistor including a semiconductor layer 2545 of a silicon thin film. For example, the semiconductor layer 2545 may use single crystal silicon (SOI (Silicon on Insulator)) formed on an insulating layer 2546 on a silicon substrate 2540.

[0359] Fig. 10A An example is shown in which the components of the layer 2561 and the components of the layer 2562 are electrically connected by bonding technology.

[0360] An insulating layer 2542, a conductive layer 2533, and a conductive layer 2534 are provided on the layer 2561. The conductive layer 2533 and the conductive layer 2534 have a region buried in the insulating layer 2542. The conductive layer 2533 is electrically connected to the layer 2565a. The conductive layer 2534 is electrically connected to the region 2536. The surfaces of the insulating layer 2542, the conductive layer 2533, and the conductive layer 2534 are flattened so that their heights are uniform.

[0361] An insulating layer 2541, a conductive layer 2531, and a conductive layer 2532 are provided on the layer 2562. The conductive layer 2531 and the conductive layer 2532 have a region buried in the insulating layer 2541. The conductive layer 2531 is electrically connected to a power supply line. The conductive layer 2532 is electrically connected to a source or a drain of a transistor for the switch SW1. In addition, the surfaces of the insulating layer 2541, the conductive layer 2531, and the conductive layer 2532 are flattened so that their heights are uniform.

[0362] Here, the main components of the conductive layer 2531 and the conductive layer 2533 are preferably the same metal element. The main components of the conductive layer 2532 and the conductive layer 2534 are preferably the same metal element. In addition, the insulating layer 2541 and the insulating layer 2542 are preferably composed of the same component.

[0363] For example, Cu, Al, Sn, Zn, W, Ag, Pt, or Au can be used as the conductive layers 2531, 2532, 2533, and 2534. From the viewpoint of ease of bonding, Cu, Al, W, or Au is preferably used. In addition, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, titanium nitride, or the like can be used for the insulating layers 2541 and 2542.

[0364] In other words, it is preferable that the same metal material as the above metal material is used as the combination of the conductive layer 2531 and the conductive layer 2533 and the combination of the conductive layer 2532 and the conductive layer 2534. In addition, it is preferable that the same insulating material as the above insulating material is used as the insulating layer 2541 and the insulating layer 2542. With the above structure, bonding can be performed with the boundary between the layer 2561 and the layer 2562 as the bonding position.

[0365] Through the above-described bonding step, electrical connection can be achieved between the combination of the conductive layer 2531 and the conductive layer 2533 and between the combination of the conductive layer 2532 and the conductive layer 2534. In addition, connection between the insulating layer 2541 and the insulating layer 2542 with mechanical strength can be achieved.

[0366] When joining metal layers, a surface activation bonding method can be used. In this method, the oxide film and impurity adsorption layer on the surface are removed by sputtering treatment, etc., and the cleaned and activated surfaces are brought into contact for bonding. Alternatively, a diffusion bonding method that uses temperature and pressure to bond the surfaces can be used. The above methods can all produce atomic-level bonding, so excellent bonding can be obtained both electrically and mechanically.

[0367] In addition, when bonding the insulating layer, a hydrophilic bonding method can be used. In this method, after obtaining high flatness by polishing, etc., the surfaces that have been hydrophilized by oxygen plasma, etc. are brought into contact for temporary bonding, and dehydration is performed by heat treatment to perform formal bonding. The hydrophilic bonding method also produces bonding at the atomic level, so mechanically excellent bonding can be obtained.

[0368] In the case of the bonding layer 2561 and the layer 2562, since the insulating layer and the metal layer are mixed at each bonding surface, for example, a surface activation bonding method and a hydrophilic bonding method may be combined.

[0369] For example, a method of bonding can be adopted in which the surface is cleaned after polishing, the surface of the metal layer is subjected to an anti-oxidation treatment, and then a hydrophilic treatment is performed. Alternatively, a difficultly oxidizable metal such as Au can be used as the surface of the metal layer and a hydrophilic treatment can be performed. Alternatively, bonding methods other than the above methods can be used.

[0370] Fig. 10B As Fig. 9AThe layer 2561 of the pixel shown is a cross-sectional view when a pn junction type photodiode using a selenium-based material as a photoelectric conversion layer is used. The layer 2566a is one electrode, the photoelectric conversion layer is composed of layers 2566b and 2566c, and the other electrode is composed of a layer 2566d.

[0371] In this case, the layer 2561 can be directly provided on the layer 2562. The layer 2566a is electrically connected to the source or drain of the transistor for the switch SW1. The layer 2566d is electrically connected to the power supply line through the conductive layer 2537. In the case where an organic photoconductive film is used for the layer 2561, the connection method with the transistor is the same as the above method.

[0372] Fig. 12A Yes Description Fig. 9B 2561 includes a pn junction photodiode using silicon as a photoelectric conversion layer as a photoelectric conversion element PD(i,j). Layer 2562 includes a Si transistor, Fig. 12A The transistor M and the switch SW2 constituting the pixel circuit are shown. The layer 2562 includes an OS transistor, Fig. 12A The switch SW1 and the switch SW3 constituting the pixel circuit are shown, and an example of a structure in which the layer 2561 and the layer 2563 are electrically connected by a bonding process is shown.

[0373] Fig.13A The OS transistor is shown in detail. Fig.13A The OS transistor shown has a self-aligned structure in which a source electrode 2205 and a drain electrode 2206 are formed by providing an insulating layer over a stack of an oxide semiconductor layer and a conductive layer and providing a groove reaching the semiconductor layer.

[0374] In addition to the channel formation region, the source region 2203, and the drain region 2204 formed in the oxide semiconductor layer, the OS transistor may further include a gate electrode 2201 and a gate insulating film 2202. At least the gate insulating film 2202 and the gate electrode 2201 are provided in the groove. An oxide semiconductor layer 2207 may also be provided in the groove.

[0375] like Fig. 13B As shown, the OS transistor may also adopt a self-aligned structure in which a source region and a drain region are formed in a semiconductor layer using the gate electrode 2201 as a mask.

[0376] Or, if Fig. 13C As shown, a non-self-aligned top gate transistor having a region where the source electrode 2205 or the drain electrode 2206 overlaps with the gate electrode 2201 can be used.

[0377] The transistor for switch SW1 and the transistor for switch SW3 include a back gate 2535, but may not include a back gate. Fig.13D As shown in the cross-sectional view of the transistor in the channel width direction, the back gate 2535 can also be electrically connected to the front gate of the opposite transistor. As an example, Fig.13D China-Israel Fig. 12A The transistor shown in the figure is used as an example, and the same applies to transistors of other structures. In addition, a structure in which a fixed potential different from that of the front gate can be supplied to the back gate 2535 can also be adopted.

[0378] An insulating layer 2543 having a function of preventing diffusion of hydrogen is provided between a region where the OS transistor is formed and a region where the Si transistor is formed. Hydrogen in the insulating layer provided near the channel formation region of the transistor M and the transistor for switch SW2 terminates dangling bonds of silicon. On the other hand, hydrogen in the insulating layer provided near the channel formation region of the transistor for switch SW1 and the transistor for switch SW3 may become one of the causes of carrier generation in the oxide semiconductor layer.

[0379] The reliability of the transistor M and the transistor for the switch SW2 can be improved by confining hydrogen in one layer by the insulating layer 2543. At the same time, since the diffusion of hydrogen from one layer to another is suppressed, the reliability of the transistor for the switch SW1 and the transistor for the switch SW3 can be improved.

[0380] The insulating layer 2543 can be made of, for example, aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, yttria-stabilized zirconia (YSZ), or the like.

[0381] Fig. 12B It is described as Fig. 9B The cross-sectional view of the case where the layer 2561 of the pixel shown uses a pn junction type photodiode using a selenium-based material as a photoelectric conversion layer. The layer 2561 can be directly provided on the layer 2563. The details of the layers 2561, 2562, and 2563 can refer to the above description. Note that when an organic photoconductive film is used for the layer 2561, the connection method with the transistor is the same as the above method.

[0382] Fig.14A 2 is a stereogram showing an example of adding a color filter or the like to a pixel of an imaging device of one embodiment of the present invention. The stereogram also shows a cross section of a plurality of pixels. An insulating layer 2580 is formed on a layer 2561 forming a photoelectric conversion element PD(i,j). The insulating layer 2580 can use a silicon oxide film or the like having high light transmittance to visible light. In addition, a silicon nitride film can also be stacked as a passivation film. In addition, a dielectric film such as hafnium oxide can also be stacked as an anti-reflection film.

[0383] A light shielding layer 2581 may be formed on the insulating layer 2580. The light shielding layer 2581 has a function of preventing mixing of light passing through the upper color filter. A metal layer such as aluminum or tungsten may be used as the light shielding layer 2581. Alternatively, the metal layer and a dielectric film having the function of an anti-reflection film may be stacked.

[0384] An organic resin layer 2582 used as a planarization film may be provided on the insulating layer 2580 and the light shielding layer 2581. In addition, a color filter 2583 (color filters 2583a, 2583b, 2583c) is formed in each pixel. For example, the color filters 2583a, 2583b, and 2583c are provided with colors such as R (red), G (green), B (blue), Y (yellow), C (cyan), and M (magenta), thereby obtaining a color image.

[0385] An insulating layer 2586 or the like which is light-transmissive to visible light may be provided on the color filter 2583 .

[0386] In addition, if Fig. 14B As shown, an optical conversion layer 2585 may be used instead of the color filter 2583. By adopting such a structure, an imaging device capable of obtaining images in various wavelength regions can be formed.

[0387] For example, when a filter that blocks light with a wavelength below the visible light is used as the optical conversion layer 2585, an infrared camera device can be obtained. When a color filter that blocks light with a wavelength below the near infrared light is used as the optical conversion layer 2585, a far infrared camera device can be obtained. In addition, when a filter that blocks light with a wavelength above the visible light is used as the optical conversion layer 2585, an ultraviolet camera device can be obtained.

[0388] In addition, by using a scintillator for the optical conversion layer 2585, an imaging device for obtaining an image that visualizes the radiation intensity, such as an X-ray imaging device, can be formed. When radiation such as X-rays that pass through the object to be photographed enters the scintillator, it is converted into light (fluorescence) such as visible light or ultraviolet light due to the photoluminescence phenomenon. Image data is obtained by detecting this light by the photoelectric conversion element PD (i, j). In addition, the imaging device of this structure can also be used for radiation detectors, etc.

[0389] The scintillator contains a substance that absorbs the energy of radiation such as X-rays or gamma rays and emits visible light or ultraviolet light when the scintillator is irradiated with radiation such as X-rays or gamma rays. For example, a material obtained by dispersing Gd2O2S:Tb, Gd2O2S:Pr, Gd2O2S:Eu, BaFCl:Eu, NaI, CsI, CaF2, BaF2, CeF3, LiF, LiI, ZnO, etc. in a resin or ceramic can be used.

[0390] In addition, in the photoelectric conversion element PD (i, j) using a selenium-based material, since radiation such as X-rays can be directly converted into electric charges, it is not necessary to use a scintillator.

[0391] In addition, if Fig. 14C As shown in FIG. 2 , a microlens array 2584 may be provided on the color filter 2583. Light passing through each lens of the microlens array 2584 is irradiated to the photoelectric conversion element PD (i, j) via the color filter 2583 provided thereunder. Fig. 14B The optical conversion layer 2585 is shown with a microlens array 2584 disposed thereon.

[0392] An example of a package and a camera module that accommodate an image sensor chip will be described below. The image sensor chip may be the one having the structure of the above-mentioned imaging device.

[0393] Fig.15A1 This is a perspective view of the top surface of a package that houses an image sensor chip. The package includes a package substrate 2410 that fixes an image sensor chip 2450, a glass cover 2420, and an adhesive 2430 that bonds them together.

[0394] Fig.15A2 This is a three-dimensional view of the bottom side of the package. The bottom side of the package includes a BGA (Ball grid array) with solder balls as bumps 2440. Note that it is not limited to BGA, and can also include LGA (Land grid array), PGA (Pin Grid Array), etc.

[0395] Fig.15A3 24 is a perspective view of a package omitting a portion of a glass cover plate 2420 and an adhesive 2430. Electrode pads 2460 are formed on a package substrate 2410 and are electrically connected to bumps 2440 via through holes. Electrode pads 2460 are electrically connected to an image sensor chip 2450 via wires 2470.

[0396] in addition, Fig.15B1 This is a perspective view of the top side of a camera module in which an image sensor chip is housed in a lens-integrated package. The camera module includes a package substrate 2411 that fixes an image sensor chip 2451, a lens cover 2421, and a lens 2435. In addition, an IC chip 2490 having functions such as a driving circuit and a signal conversion circuit of the camera device is provided between the package substrate 2411 and the image sensor chip 2451, and has a structure as a SiP (System in Package).

[0397] Fig.15B2This is a perspective view of the bottom side of the camera module. The bottom and side surfaces of the package substrate 2411 have a QFN (Quad flat no-lead package) structure with a storage connection pad 2441. Note that this structure is an example, and a QFP (Quad flat package) or the above-mentioned BGA can also be provided.

[0398] Figure 15B3 This is a perspective view of the module in which a portion of the lens cover 2421 and the lens 2435 are omitted. The connection pad 2441 is electrically connected to the electrode pad 2461 , and the electrode pad 2461 is electrically connected to the image sensor chip 2451 or the IC chip 2490 through the wire 2471 .

[0399] By housing the image sensor chip in a package of the above type, it can be easily mounted on a printed circuit board or the like, and thus the image sensor chip can be incorporated into various semiconductor devices and electronic devices.

[0400] This embodiment mode can be combined with the description of other embodiment modes as appropriate.

[0401] (Implementation 4)

[0402] Electronic devices that can use the camera device according to one embodiment of the present invention include display devices, personal computers, image storage devices or image reproduction devices with recording media, mobile phones, including portable game consoles, portable data terminals, e-book readers, imaging devices such as video cameras or digital cameras, goggle-type displays (head-mounted displays), navigation systems, audio reproduction devices (car audio systems, digital audio players, etc.), copiers, fax machines, printers, multifunction printers, automatic teller machines (ATMs), and vending machines. FIG. 16A to FIG. 16F Specific examples of these electronic devices are shown.

[0403] Fig.16A The mobile phone is an example of a mobile phone, which includes a housing 2981, a display unit 2982, operation buttons 2983, an external connection interface 2984, a speaker 2985, a microphone 2986, a camera 2987, etc. The mobile phone has a touch sensor on the display unit 2982. By touching the display unit 2982 with a finger or a stylus pen, various operations such as making a call or inputting text can be performed. The camera device and its operating method of one embodiment of the present invention can be applied to the elements used to obtain images in the mobile phone.

[0404] Fig. 16BThe portable data terminal includes a housing 2911, a display unit 2912, a speaker 2913, a camera 2919, etc. Information can be input and output through the touch panel function of the display unit 2912. In addition, text and the like can be recognized from the image acquired by the camera 2919, and the text can be output in the form of voice using the speaker 2913. The camera device and the operating method thereof according to one embodiment of the present invention can be applied to the elements used to acquire images in the portable data terminal.

[0405] Fig. 16C The surveillance camera includes a bracket 2951, a camera unit 2952, a protective cover 2953, etc. A rotating mechanism is provided in the camera unit 2952, and the surroundings can be photographed by being provided on the ceiling. A camera device and a working method thereof according to one embodiment of the present invention can be applied to an element used to obtain an image in the camera unit. Note that "surveillance camera" is a general name and is not limited to its use. For example, a device having a function as a surveillance camera is called a video camera or a video camera.

[0406] Fig.16D The present invention is a video camera, which includes a first housing 2971, a second housing 2972, a display unit 2973, an operation key 2974, a lens 2975, a connection unit 2976, a speaker 2977, a microphone 2978, etc. The operation key 2974 and the lens 2975 are provided in the first housing 2971, and the display unit 2973 is provided in the second housing 2972. The camera device and the operating method thereof according to one embodiment of the present invention can be applied to the components used to obtain images in the video camera.

[0407] Fig.16E The digital camera includes a housing 2961, a shutter button 2962, a microphone 2963, a light emitting unit 2967, a lens 2965, etc. The imaging device and the operating method thereof according to one embodiment of the present invention can be applied to components for acquiring images in the digital camera.

[0408] Fig.16F The present invention is a watch-type information terminal, which includes a display unit 2932, a housing and wristband 2933, and a camera 2939. The display unit 2932 may also include a touch panel for operating the information terminal. The display unit 2932 and the housing and wristband 2933 are flexible and suitable for being worn on the body. The camera device and the working method thereof according to one embodiment of the present invention can be applied to the components used to obtain images in the information terminal.

[0409] This embodiment mode can be combined with the descriptions of other embodiment modes as appropriate.

[0410] (Implementation 5)

[0411] In this embodiment, a configuration of an imaging device according to one embodiment of the present invention will be described with reference to FIG. 17 .

[0412] FIG. 17 is a diagram for explaining the structure of an imaging device according to one embodiment of the present invention.

[0413] <Configuration Example 1 of Imaging Device>

[0414] The imaging device described in this embodiment includes a light source 249, an imaging panel 800, and a control unit 248 (see Fig.17A ).

[0415] 《Structural example of light source 249》

[0416] For example, a light emitting diode can be used for the light source 249. Specifically, a laser diode is used for the light source 249. For example, a near-infrared laser diode can be used.

[0417] The light source 249 emits pulsed light based on the control signal SP.

[0418] <<Structural Example of Camera Panel 800>>

[0419] The imaging panel 800 performs imaging based on the control signal SP.

[0420] 《Configuration example of control unit 248》

[0421] The control unit 248 is supplied with the control information CI and the image data ID.

[0422] The control unit 248 provides a control signal SP based on the control information CI.

[0423] The control unit 248 provides image information II based on the image data ID.

[0424] Thus, the time from light emission to image capture can be recorded. In addition, the distance from the image capture device to the object can be measured using the time-of-flight method. As a result, a novel image capture device with high convenience or reliability can be provided.

[0425] <Configuration Example 2 of Imaging Device>

[0426] The imaging device 5200B described in this embodiment includes a computing device 5210, a display unit 5230, an input unit 5240, a detection unit 5250, and a communication unit 5290, and has a function of providing operation information and a function of receiving image information. For example, an imaging panel of one embodiment of the present invention can be used for the detection unit 5250.

[0427] Specifically, the imaging panel of one embodiment of the present invention can be used in a digital camera (see Fig. 17B Alternatively, the imaging panel of one embodiment of the present invention can be used in a portable information communication device (see Fig. 17C Alternatively, the imaging panel of one embodiment of the present invention can be used in an augmented reality display device (see Fig.17D ).

[0428] Note that this embodiment mode can be combined with other embodiment modes described in this specification as appropriate.

[0429] For example, in this specification, etc., when it is clearly stated that "X is connected to Y", the cases disclosed in this specification, etc. include: a case where X is electrically connected to Y; a case where X is functionally connected to Y; and a case where X is directly connected to Y. Therefore, the connection relationship other than the connection relationship shown in the drawings or the text is not limited to the predetermined connection relationship, and the connection relationship other than the connection relationship shown in the drawings or the text is also disclosed in the drawings or the text.

[0430] Here, X and Y are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

[0431] As an example of the case where X and Y are directly connected, there can be cited a case where an element capable of electrically connecting X and Y (such as a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) is not connected between X and Y, and a case where X and Y are connected without an element capable of electrically connecting X and Y (such as a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.).

[0432] As an example of a case where X and Y are electrically connected, one or more elements (such as switches, transistors, capacitors, inductors, resistors, diodes, display elements, light-emitting elements, loads, etc.) that can electrically connect X and Y can be connected between X and Y. In addition, the switch has a function of controlling on and off. In other words, the switch has a function of controlling whether to make current flow by controlling to become a conducting state (on state) or a non-conducting state (off state). Alternatively, the switch has a function of selecting and switching a current path. In addition, the case where X and Y are electrically connected includes the case where X and Y are directly connected.

[0433] As an example of a case where X and Y are functionally connected, one or more circuits capable of functionally connecting X and Y (for example, a logic circuit (inverter, NAND circuit, NOR circuit, etc.), a signal conversion circuit (DA conversion circuit, AD conversion circuit, γ (gamma) correction circuit, etc.), a potential level conversion circuit (power supply circuit (boost circuit, step-down circuit, etc.), a level converter circuit that changes the potential level of a signal, etc.), a voltage source, a current source, a switching circuit, an amplifier circuit (a circuit capable of increasing signal amplitude or current, etc., an operational amplifier, a differential amplifier circuit, a source follower circuit, a buffer circuit, etc.), a signal generation circuit, a storage circuit, a control circuit, etc.) may be connected between X and Y. Note that, for example, even if another circuit is interposed between X and Y, when a signal output from X is transmitted to Y, it can be said that X and Y are functionally connected. In addition, the case where X and Y are functionally connected includes the case where X and Y are directly connected and the case where X and Y are electrically connected.

[0434] Furthermore, when it is explicitly stated that “X and Y are electrically connected”, the cases disclosed in this specification etc. include: a case where X and Y are electrically connected (in other words, a case where X and Y are connected with another element or another circuit interposed therebetween); a case where X and Y are functionally connected (in other words, a case where X and Y are functionally connected with another circuit interposed therebetween); and a case where X and Y are directly connected (in other words, a case where X and Y are connected without another element or another circuit interposed therebetween). In other words, when it is explicitly stated that “X and Y are electrically connected”, it means that the contents disclosed in this specification etc. include the same contents as the case where it is only explicitly stated that “connected”.

[0435] Note that, for example, a case where the source (or first terminal, etc.) of a transistor is electrically connected to X through Z1 (or not through Z1) and the drain (or second terminal, etc.) of the transistor is electrically connected to Y through Z2 (or not through Z2) and a case where the source (or first terminal, etc.) of the transistor is directly connected to a part of Z1 and another part of Z1 is directly connected to X, the drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2 and another part of Z2 is directly connected to Y can be expressed as follows.

[0436] For example, it can be expressed as "X, Y, the source (or first terminal, etc.) of the transistor, and the drain (or second terminal, etc.) of the transistor are electrically connected to each other, and are electrically connected in the order of X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y". Alternatively, it can be expressed as "the source (or first terminal, etc.) of the transistor is electrically connected to X, the drain (or second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are electrically connected in sequence". Alternatively, it can be expressed as "X is electrically connected to Y through the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor, and X, the source (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor, and Y are arranged to be connected to each other in sequence". By specifying the connection order in the circuit structure using the same expression method as this example, the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor can be distinguished to determine the technical scope.

[0437] In addition, as another expression method, for example, it can be expressed as "the source (or first terminal, etc.) of the transistor is electrically connected to X through at least a first connection path, the first connection path does not have a second connection path, the second connection path is a path between the source (or first terminal, etc.) of the transistor and the drain (or second terminal, etc.) of the transistor that passes through the transistor, the first connection path is a path passing through Z1, the drain (or second terminal, etc.) of the transistor is electrically connected to Y through at least a third connection path, the third connection path does not have the second connection path, and the third connection path is a path passing through Z2". Alternatively, it can also be expressed as "the source (or first terminal, etc.) of the transistor is electrically connected to X through Z1 at least on the first connection path, the first connection path does not have a second connection path, the second connection path has a connection path passing through the transistor, the drain (or second terminal, etc.) of the transistor is electrically connected to Y through Z2 at least on the third connection path, and the third connection path does not have the second connection path". Alternatively, it can be expressed as "the source (or first terminal, etc.) of the transistor is electrically connected to X through Z1 via at least a first electrical path, the first electrical path does not have a second electrical path, the second electrical path is an electrical path from the source (or first terminal, etc.) of the transistor to the drain (or second terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the transistor is electrically connected to Y via Z2 via at least a third electrical path, the third electrical path does not have a fourth electrical path, and the fourth electrical path is an electrical path from the drain (or second terminal, etc.) of the transistor to the source (or first terminal, etc.) of the transistor". By using the same expression method as these examples to define the connection path in the circuit structure, the source (or first terminal, etc.) and drain (or second terminal, etc.) of the transistor can be distinguished to determine the technical scope.

[0438] Note that this expression method is an example and is not limited to the above expression method. Here, X, Y, Z1, and Z2 are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films and layers, etc.).

[0439] In addition, even if the independent components are shown to be electrically connected to each other in the circuit diagram, one component may have the functions of multiple components. For example, when a part of the wiring is used as an electrode, one conductive film has the functions of both wiring and electrode. Therefore, the category of "electrically connected" in this specification also includes the case where one conductive film has the functions of multiple components.

[0440] [Explanation of symbols]

[0441] C1: capacitor, C2: capacitor, FD1(i,j): node, FD2(i,j): node, ID: image data, IS: image signal, SW1: switch, SW2: switch, SW3: switch, SW4: switch, SW5: switch, T0: period, T1: period, T2: period, T3: period, T11: period, T12: period, T13: period, T14: period, 241: imaging area, 248: control unit, 249: light source, 430(i,j): pixel circuit, 800: imaging panel, 802(i,j): image signal,j): pixel, 2201: gate electrode, 2202: gate insulating film, 2203: source region, 2204: drain region, 2205: source electrode, 2206: drain electrode, 2207: oxide semiconductor layer, 2410: packaging substrate, 2411: packaging substrate, 2420: glass cover, 2421: lens cover, 2430: adhesive, 2435: lens, 2440: bump, 2441: connection pad, 2450: image sensor chip, 2451: image sensor chip, 2460: electrode pad, 2461: electrode pad, 2470: lead, 2471: lead, 2490: IC chip, 2531: conductive layer, 2532: conductive layer, 2533: conductive layer, 2534: conductive layer, 2535: back gate, 2536: region, 2540: silicon substrate, 2541: insulating layer, 2542: insulating layer, 2543: insulating layer, 2545: semiconductor layer, 2546: insulating layer, 2561: layer, 2562: layer, 2563: layer, 2565a: layer, 2565b: layer, 2565c: layer, 2566a: layer, 2566b: layer, 2566c: layer, 2566d: layer, 2567a: layer, 2567b: layer, 2567c: layer, 2567d: layer, 2567e: layer, 2580: insulating layer, 2581: light shielding layer, 2582: organic resin layer, 2583: color filter, 2583a: color filter, 2583b: color filter, 2583c: color filter, 2584: microlens array, 2585: optical conversion layer, 2586: insulating layer, 2911: housing, 2912: display unit, 2913: speaker, 2919: camera, 2932: display unit, 2933: housing and wristband, 2939: camera, 2951: bracket, 2952: camera unit, 2953: protective cover, 2961: housing, 2962: shutter button, 2963: microphone, 2965: lens, 2967: light emitting unit, 2971: housing, 2972: housing, 2973: display unit, 2974: operation key, 2975: lens, 2976: connection unit, 2977: speaker, 2978: microphone, 2981: housing, 2982: display unit, 2983: operation button, 2984: external connection port, 2985: speaker, 2986: microphone, 2987: camera, 5200B: camera device, 5210: computing device, 5230: display unit, 5240: input unit, 5250: detection unit, 5290: communication unit,

Claims

1. A camera panel, comprising: Photoelectric conversion element; a first pixel circuit; a first conductive film to which an image signal is supplied; a second conductive film; a third conductive film; a fourth conductive film; and a fifth conductive film, The photoelectric conversion element includes a first terminal electrically connected to the second conductive film. The first pixel circuit includes a first switch, a second switch, a third switch, a transistor and a capacitor. The first switch includes a first terminal directly connected to the second terminal of the photoelectric conversion element and a second terminal electrically connected to a node. The transistor includes a gate electrode electrically connected to the node and a first electrode electrically connected to the third conductive film. The second switch includes a first terminal electrically connected to the second electrode of the transistor and a second terminal electrically connected to the first conductive film. The third switch includes a first terminal electrically connected to the fourth conductive film and a second terminal electrically connected to the node. Furthermore, the capacitor includes a first electrode electrically connected to the node and a second electrode electrically connected to the fifth conductive film.

2. The imaging panel according to claim 1, The first pixel circuit further includes a fourth switch. And the fourth switch includes a first terminal electrically connected to the fourth conductive film and a second terminal electrically connected to the first terminal of the first switch.

3. The imaging panel according to claim 1, The first switch and the third switch each include a back gate electrically connected to a gate electrode.

4. A camera panel, comprising: Photoelectric conversion element; a first pixel circuit; a first conductive film to which an image signal is supplied; a second conductive film; a third conductive film; a fourth conductive film; and a fifth conductive film, The first terminal of the photoelectric conversion element is electrically connected to the second conductive film. The first pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor and a capacitor. One of the source and the drain of the first transistor is directly connected to the second terminal of the photoelectric conversion element, the other of the source and the drain of the first transistor is electrically connected to a node, The gate of the fourth transistor is electrically connected to the node, One of a source and a drain of the fourth transistor is electrically connected to the third conductive film, One of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the fourth transistor, the other of the source and the drain of the second transistor is electrically connected to the first conductive film, One of the source and the drain of the third transistor is electrically connected to the fourth conductive film, the other of the source and the drain of the third transistor is electrically connected to the node, A first electrode of the capacitor is electrically connected to the node, Furthermore, the second electrode of the capacitor is electrically connected to the fifth conductive film.

5. The imaging panel according to claim 4, The first pixel circuit further includes a fifth transistor, One of the source and the drain of the fifth transistor is electrically connected to the fourth conductive film, And the other of the source and the drain of the fifth transistor is electrically connected to one of the source and the drain of the first transistor.

6. The imaging panel according to claim 1 or 4, Also included is a second pixel circuit electrically connected to the second terminal of the photoelectric conversion element.

7. The imaging panel according to claim 1 or 4, A signal line driving circuit is also included, the signal line driving circuit being configured to provide weight data to the fifth conductive film.

8. The imaging panel according to claim 1 or 4, Each of the first conductive film, the second conductive film, the third conductive film, the fourth conductive film, and the fifth conductive film is a wiring.

9. The imaging panel according to claim 4, The first transistor and the third transistor each include a back gate electrically connected to a gate electrode. 10 . An imaging device comprising the imaging panel according to claim 1 or 4 .

Images