Electronic packaging and its bearing structure and manufacturing method

By designing the spacer and filling the insulator in the semiconductor package structure, the warping problem of the package during the heat treatment is solved, the stability and thermal resistance of the structure are improved, and failure caused by warping is prevented.

CN112447608BActive Publication Date: 2024-12-24SILICONWARE PRECISION IND CO LTD
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Patent Information

Application Number
CN201910863410.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-09-02
Filing Date
2019-09-12
Publication Date
2024-12-24
Estimated Expiration
2039-09-12

AI Technical Summary

Technical Problem

During the heat treatment, existing semiconductor packages are prone to warping due to thermal expansion and contraction, resulting in the inability to effectively engage the conductive bumps. The complexity of the multi-chip package structure increases the structure to make the structure fragile and prone to failure.

Method used

A load-bearing structure is designed, by forming a spacer on the insulating plate body, forming an insulator by pressurizing and heating process, breaking the structural stress concentration point of the insulating plate body, and filling with soft glue to absorb stress and heat deformation.

Benefits of technology

Effectively avoid or reduce warping problems, improve the stability and thermal resistance of the packaging structure, and prevent delamination and chip cracking.

✦ Generated by Eureka AI based on patent content.

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Abstract

An electronic package and its supporting structure and manufacturing method, wherein a supporting structure forms a spacer in an insulating plate body provided with a circuit layer, and the spacer is not electrically connected to the circuit layer, so that the insulating plate body is disconnected through the design of the spacer, so that the structural stress of the insulating plate body will not be continuously concentrated on the hard material of the insulating plate body, thereby avoiding the problem of warping.
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Description

Technical Field

[0001] The present invention relates to a semiconductor packaging structure, in particular to an electronic packaging component and its supporting structure and manufacturing method. Background Art

[0002] Existing semiconductor package 1, such as Figure 1 As shown, a semiconductor chip 11 is first placed on a packaging substrate 10 with its active surface 11a by flip-chip bonding (i.e., through conductive bumps 110 and bottom glue 111), and then a heat sink 13 is reflow-bonded with its top plate 130 on the inactive surface 11b of the semiconductor chip 11 via a TIM layer 12 (which includes a solder layer and flux), and the supporting legs 131 of the heat sink 13 are mounted on the packaging substrate 10 via an adhesive layer 14, so that the heat energy generated by the semiconductor chip 11 can be conducted to the top plate 130 of the heat sink 13 via the inactive surface 11b and the TIM layer 12 to dissipate heat to the outside of the semiconductor package 1.

[0003] However, in the existing semiconductor package 1, due to the material properties of the package substrate 10, during the thermal cycle of the packaging process, the package substrate 10 is easily deformed due to thermal expansion and contraction, causing the package substrate 10 to warp, resulting in the conductive bump 110 being unable to be effectively or accurately bonded to the package substrate 10.

[0004] In addition, with the evolution of technology, the demand trend of electronic products is moving towards heterogeneous integration, and the multi-chip packaging structure (MCM / MCP) has emerged. Its characteristics of packaging multiple semiconductor chips into one semiconductor chip enable it to have a larger number of I / Os, and can greatly increase the computing power of the processor and reduce the delay time of signal transmission, so as to be applied to high-end products with high-density lines / high transmission speeds / high stacking numbers / large-size designs. However, the diversification of product functions makes the packaging structure more complex, and the complex structure is realized in a smaller volume, which makes the structure more fragile. When the packaging structure is warped or otherwise deformed, it is more likely to fail. In addition, due to its structural characteristics of multiple chips integrated on a substrate, as the market specification requirements change with each passing day, the overall packaging structure size is also getting larger and larger, making the problems of delamination, ball cracking and chip collapse caused by warping increasingly serious.

[0005] Therefore, how to overcome the above-mentioned problems of the prior art has become a difficult problem that needs to be overcome urgently in the industry. Summary of the invention

[0006] In view of the above-mentioned defects of the prior art, the present invention provides a bearing structure and a manufacturing method thereof to effectively avoid or reduce the problem of warping.

[0007] The bearing structure of the present invention comprises: an insulating plate body; a circuit layer arranged on the insulating plate body; and a first spacer arranged in the insulating plate body but not electrically connected to the circuit layer.

[0008] The present invention also provides a method for manufacturing a supporting structure, which includes: providing a substrate; forming a recess in the substrate; forming a metal layer on the substrate to cover the recess so that the recess serves as a spacer; and forming a circuit layer through the metal layer, and the spacer is not electrically connected to the circuit layer.

[0009] In the aforementioned supporting structure and its manufacturing method, the substrate includes a core layer, which has an insulating core, and the spacer penetrates the insulating core. For example, the core layer also has at least one insulating portion formed on the insulating core. Further, the insulating portion is formed in the spacer through a pressurization and heating process.

[0010] In the aforementioned supporting structure and its manufacturing method, the substrate is defined with a crystal placement area and a peripheral area surrounding the crystal placement area, so that the spacing part is on the peripheral area. For example, the spacing part is on the contour edge and / or contour corner of the peripheral area. Alternatively, the peripheral area is defined with a bottom glue boundary line to divide the peripheral area into a first area adjacent to the crystal placement area and a second area at the outermost side. Further, the spacing part is on the first area and / or the second area of ​​the peripheral area.

[0011] In the aforementioned supporting structure and manufacturing method thereof, the spacer is a groove, a hole or a combination thereof.

[0012] In the aforementioned supporting structure and manufacturing method thereof, the profile of the spacer is in a straight line, a curve, a wave, a serrated shape or a combination thereof.

[0013] The present invention further provides an electronic package, which includes: the aforementioned supporting structure; an electronic component, which is arranged on the supporting structure and electrically connected to the circuit layer; and a heat sink, which is arranged on the supporting structure, wherein the heat sink has a second spacing portion.

[0014] In the aforementioned electronic package, the heat sink includes a heat sink combined with the electronic component, and the second spacing portion is on a side of the heat sink combined with the electronic component. For example, the second spacing portion is outside the area where the heat sink is combined with the electronic component.

[0015] In the aforementioned electronic package, the second spacing portion is a groove, a hole or a combination thereof.

[0016] In the aforementioned electronic package, the contour of the second spacer is in a straight line, a curve, a wave, a sawtooth shape or a combination thereof.

[0017] From the above, it can be seen that the electronic package and its supporting structure and manufacturing method of the present invention mainly destroy (or disconnect) the insulating plate or the substrate through the design of the spacer, so that the structural stress of the insulating plate or the substrate will not be continuously concentrated in the harder part of the material of the insulating plate or the substrate. Therefore, compared with the prior art, the supporting structure of the present invention can avoid or reduce the problem of warping.

[0018] In addition, the spacer is filled with a soft plastic material (ie, the insulator), which can not only absorb the stress release of the hard material of the insulating plate or the substrate, but also absorb the thermal deformation caused by the subsequent high-temperature process. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.

[0020] Figures 2A to 2E It is a cross-sectional schematic diagram of the method for manufacturing the bearing structure of the present invention.

[0021] Figure 2A 'for Figure 2A Schematic diagram of the overall top view.

[0022] Figure 2B 'for Figure 2B Schematic diagram of the overall top view.

[0023] Figure 2C ' and 2C" Figure 2C Schematic diagrams of different implementation methods.

[0024] Figure 2E ' and 2E" Figure 2E Schematic diagrams of different implementation methods.

[0025] Figure 2F and 2F 'for Figure 2E An overall top view schematic diagram of an insulating plate body.

[0026] Figure 3A and 3A 'for Figure 2E Schematic cross-sectional views of different embodiments of subsequent processes.

[0027] Figure 3B It is a cross-sectional schematic diagram of the electronic package of the present invention.

[0028] Figure 3B ' and 3B" Figure 3B Partial top schematic diagrams of different embodiments.

[0029] Figure 4A and 4B for Figure 3B A partial top view of a different part of the first embodiment.

[0030] Figure 5A and 5B for Figure 3B A partial top view of the different parts of the second embodiment of the present invention.

[0031] Fig. 6A and 6B for Figure 3B A partial top view of the different parts of the third embodiment of the present invention.

[0032] Description of Reference Numerals

[0033] 1 semiconductor package 10 package substrate

[0034] 11 semiconductor chip 11a, 31a active surface

[0035] 11b, 31b non-active surface 110, 310 conductive bump

[0036] 111,311 Primer 12 TIM layer

[0037] 13,33,43,53,63 heat sink 130 top sheet

[0038] 131,331 Support foot 14 Adhesive layer

[0039] 2,2',2”,4,5,6 Load-bearing structure 2a Base material

[0040] 2b Insulation board 20 Core layer

[0041] 200 insulating core 201 first metal layer

[0042] 202 second metal layer 203 insulator

[0043] 203', 203" Hollow part 203a First insulating part

[0044] 203b Second insulating portion 21, 21' First spacer

[0045] 21a,21b,21c,21d,21e,21f,41b,41a,46,51,56,61,66 concave part

[0046] 22 Circuit layer 220 Conductive via

[0047] 23 dielectric layer 24 insulation protection layer

[0048] 25 Surface treatment layer 3,3',3" Electronic packaging

[0049] 31 Electronic components 32 Bonding layer

[0050] 330 heat sink 34 colloid

[0051] 36,36',36a,36b,36c,36d,36e,36f,36g,36h Second spacer

[0052] 91 first bearing member 92 second bearing member

[0053] A: Crystal placement area B: Peripheral area

[0054] B1 First area B2 Second area

[0055] C area L bottom glue boundary line. DETAILED DESCRIPTION

[0056] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0057] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions under which the present invention can be implemented, so they have no substantial technical significance. Any modification of the structure, change in the proportion relationship, or adjustment of the size should still fall within the scope of the technical contents disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present invention without substantially changing the technical contents.

[0058] Figures 2A to 2E It is a cross-sectional schematic diagram of the manufacturing method of the bearing structure 2 of the present invention.

[0059] like Figure 2A and 2A 'As shown, a substrate 2a is provided, which defines a crystal region A and a peripheral region B surrounding the crystal region A.

[0060] In this embodiment, the substrate 2a is disposed on the first carrier 91, and the substrate 2a includes a first metal layer 201 and a core layer 20 sequentially stacked on the first carrier 91, and the core layer 20 has a first insulating portion 203a, an insulating core portion 200 and a second insulating portion 203b sequentially stacked on the first metal layer 201. For example, the first carrier 91 is a metal pressing plate such as stainless steel, the first metal layer 201 is a copper foil, the first and second insulating portions 203a, 203b are colloids such as epoxy resin, and the insulating core portion 200 contains glass fiber and an organic resin such as BT (Bismaleimide Triazine), FR4 or FR5.

[0061] In addition, when manufacturing the substrate 2a, the first metal layer 201 can be laid on the first carrier 91 first, and then the manufactured adhesive sheet is used as the core layer 20 so that the core layer 20 is adhered to the first metal layer 201 with its first insulating portion 203a.

[0062] Furthermore, the peripheral region B is defined with a ring-shaped underfill boundary line L to divide the peripheral region B into a first area B1 adjacent to the die-forming region A and an outermost second area B2, wherein the second area B2 surrounds the first area B1.

[0063] like Figure 2B As shown, a recess is formed on the peripheral region B of the substrate 2 a to serve as a first spacer 21 , so that the first metal layer 201 is exposed at the first spacer 21 .

[0064] In this embodiment, the first spacer 21 penetrates the core layer 20 (or the insulating core 200) but does not penetrate the first metal layer 201. For example, the first metal layer 201 remains intact. Specifically, a laser is used to perform a slotting operation to form the first spacer 21, and the intensity of the laser used is within a wavelength range that does not damage (or only damages very little) the copper foil, so that the first metal layer 201 serves as a stopper for the slotting operation.

[0065] In addition, the first spacer 21 is located in the peripheral area B, for example, on the contour edge (such as the first area B1) and / or contour corner of the peripheral area B, and can be as follows: Figure 2B 'The recesses 21a, 21b, 21c, 21d shown; it should be understood that the first spacer 21 is located on the first area B1 and / or the second area B2 of the peripheral area B.

[0066] Therefore, the first spacer 21 can be formed along the interval between the contour edge of the crystal placement area A and the contour edge of the bottom glue boundary line L; or, the first spacer 21' can be formed along the contour edge adjacent to the bottom glue boundary line L; or, recesses 21a, 21b, 21c, and 21d can be formed at the four corners of the substrate 2a as the first spacer 21, wherein the recess 21c also has Figure 2B It should be understood that the patterns disclosed in each corner can be matched on a single core layer 20 as required, such as the four corners are a combination of the same pattern or at least two patterns.

[0067] like Figure 2C As shown, a second metal layer 202 is formed on the substrate 2 a so that the second metal layer 202 covers the first spacer 21 .

[0068] In this embodiment, the second metal layer 202 is pressed onto the second insulating portion 203b of the core layer 20 of the substrate 2a via the second carrier 92. For example, the second carrier 92 is a metal pressing plate such as stainless steel, and the second metal layer 202 is copper foil to form a copper foil substrate, wherein the first insulating portion 203a, the insulating core 200 and the second insulating portion 203b serve as the insulating plate body 2b in the copper foil substrate.

[0069] In addition, during the process of laminating the second metal layer 202, part of the material of the first insulating portion 203a and / or the second insulating portion 203b may be filled into the first spacer 21 to form an insulator 203 in the first spacer 21. Specifically, Figure 2C As shown, the insulator 203 may fill the first spacer 21; or Figure 2C As shown in FIG. ', the insulator 203 does not fill the first spacer 21, so as to form a hollow portion 203' in the first spacer 21. It should be understood that the first insulating portion 203a and / or the second insulating portion 203b may not be filled in the first spacer 21. Figure 2C ” As shown in the figure, the first spacer 21 is used as the hollow portion 203”.

[0070] Furthermore, the first and second carriers 91 , 92 are used as pressure plates to melt the adhesive material of the first insulating portion 203 a and / or the second insulating portion 203 b due to the high temperature and high pressure during the pressurization and heating process, and then fill into the first spacer 21 .

[0071] like Figure 2D As shown, continued Figure 2C The first carrier 91 and the second carrier 92 are removed to expose the first metal layer 201 and the second metal layer 202.

[0072] like Figure 2E As shown, a patterning process is performed to make the first metal layer 201 and the second metal layer 202 into a circuit layer 22 that is not electrically connected to the first spacer 21 (or insulator 203), and to form at least one conductive through hole 220 electrically connected to the circuit layer 22 to obtain the desired supporting structure 2.

[0073] In the present embodiment, the conductive via 220 is formed in the die-placement region A, but may also be formed in the peripheral region B as required.

[0074] In addition, the supporting structure 2 can be configured with at least one dielectric layer 23 on the insulating plate 2 b (or the core layer 20 ) as required, and the circuit layer 22 is exposed on the dielectric layer 23 .

[0075] Again, if you continue Figure 2C ' and 2C "process, the first spacer 21 of the supporting structure 2 'on the peripheral area B will have a hollow portion 203 ', such as Figure 2E 'shown.

[0076] In addition, the core layer can be stacked, the spacer can be formed, the metal layer can be pressed, and the patterned circuit layer can be formed to form another supporting structure 2", such as Figure 2E ”, wherein a surface treatment layer 25 such as a nickel-gold material can be formed on the outermost circuit layer 22, and an insulating protection layer 24 such as a solder mask can be formed on the outermost dielectric layer 23, and the outermost circuit layer 22 is exposed on the insulating protection layer 24. For example, the processes of configuring the core layer 20, the spacer, the metal layer such as copper foil, and the patterning process are repeated as required. Specifically, when a plurality of insulating plates 2b are overlapped, the position (or volume) of the spacer of each insulating plate 2b can be different according to different moire conditions.

[0077] The manufacturing method of the bearing structure 2, 2', 2" of the present invention is mainly to destroy (or disconnect) the insulating core 200 of the insulating plate body 2b by designing the first spacer 21, so that the structural stress will not be continuously concentrated on the insulating core 200 made of a harder material (glass fiber). Therefore, compared with the prior art, the bearing structure 2, 2', 2" of the present invention utilizes the principle of stress truncation to avoid warpage or reduce the warpage problem, and uses each stress truncation point (multiple first spacers 21) as the deformation freedom control point of the bearing structure 2, 2', 2" to appropriately compensate for the warping direction.

[0078] In addition, the first spacer 21 is filled with a soft plastic material (the insulator 203 ), which can not only absorb the stress release of the hard material (glass fiber), but also absorb the thermal deformation caused by the subsequent high-temperature process.

[0079] Furthermore, the soft plastic material (the insulator 203) can be used as a partition to disconnect the insulating core 200, so that two adjacent blocks of the insulating core 200 after disconnection will not abut against each other due to thermal deformation, thereby improving the effect of stress interruption, that is, the effect of stress interruption can be sustained.

[0080] In addition, in the preferred embodiment of the supporting structure 2, 2', 2", the best recess design is a full groove design; the second best design is to form the first spacer 21 along the interval between the contour edge of the die placement area A and the contour edge of the bottom glue boundary line L, and along the contour edge adjacent to the bottom glue boundary line L, such as Figure 2F As shown, the recessed portion design at the two places is to use a groove-shaped recessed portion 21e at the corner, and a hole-shaped recessed portion 21f at the edge straight line segment, and the first spacer 21 is formed at the four corners, and the recessed portion design is groove-shaped; or, as Figure 2F 'As shown, it can also be designed as a full hole type recess 21f design.

[0081] Figure 3A and 3A ' is a schematic cross-sectional view of different embodiments of electronic packages 3, 3' using the supporting structure 2, 2', 2".

[0082] like Figure 3A and 3A As shown in FIG. ', at least one electronic component 31 and a heat sink 33 are disposed on the supporting structure 2, 2'.

[0083] The electronic component 31 is disposed on the die-laying region A of the supporting structure 2 , 2 ′, and the electronic component 31 is an active component, a passive component, a packaged component or a combination of the three.

[0084] In this embodiment, the active component is, for example, a semiconductor chip, the passive component is, for example, a resistor, a capacitor, and an inductor, and the package component includes a substrate, a chip disposed on the substrate, and a package layer covering the chip. For example, the electronic component 31 is a semiconductor chip having an active surface 31a and an inactive surface 31b opposite to each other, so that the electronic component 31 is combined and electrically connected to the circuit layer 22 of the supporting structure 2, 2' by a plurality of conductive bumps 310 in a flip chip manner, and the conductive bumps 310 are covered with a primer 311. In other embodiments, the electronic component 31 can also be electrically connected to the circuit layer 22 by wire bonding or other methods.

[0085] In addition, the layout range of the base glue 311 is limited within the base glue boundary line L, that is, the base glue 311 will not exceed the base glue boundary line L.

[0086] The heat sink 33 is disposed on the inactive surface 31 b of the electronic component 31 via a bonding layer 32 .

[0087] In this embodiment, the heat sink 33 has a heat sink 330 and a plurality of support legs 331 disposed at the lower side of the heat sink 330. For example, the heat sink 330 is a heat sink and contacts the bonding layer 32 at the lower side, and the support legs 331 are bonded to the peripheral area B of the supporting structure 2, 2' by a glue 34 and are relatively located on the upper surface of the supporting structure 2, 2'.

[0088] In addition, the bonding layer 32 is a thermal interface material (TIM) or a general thermal conductive adhesive, and there is no particular limitation.

[0089] Furthermore, a second spacer 36 may be formed on the heat sink 33 as required, such as Figure 3B The electronic package 3" shown in the figure, for example, a concave portion is formed on the side of the heat sink 330 facing the bonding layer 32 (or the electronic component 31) to serve as the second spacer 36, so that the supporting foot 331 and the second spacer 36 are located on the same side of the heat sink 33.

[0090] Further, if Figure 3B ' and 3B', the second spacer 36 is located in the layout area of ​​the bonding layer 32 (or the electronic component 31) (eg Figure 3B ' and the dotted frame shown in 3B", that is, outside the area where the heat sink 330 is combined with the bonding layer 32 (or the electronic component 31). Therefore, a recessed portion can be formed along the contour edge of the heat sink 330 where the electronic component 31 is combined (such as the area C outside the contour edge of the bonding layer 32) to serve as the second spacer 36; or, the second spacer 36' is formed at the turning corner between the heat sink 330 and the supporting leg 331, such as Figure 3B Alternatively, the second spacers 36a, 36b, 36c, 36d, 36e, 36f, 36g, and 36h are formed at the four corners of the heat sink 330. It should be understood that the patterns disclosed at each corner can be matched on a single heat sink 330 as required, such as the four corners are all the same pattern or at least two patterns of concave combinations.

[0091] On the other hand, the recessed portions (i.e., the first spacer 21 and the second spacer 36) are slots or holes (e.g., Fig. 6A The recess 61 of the supporting structure 6 is shown Figure 6B The concave portion 66 of the heat sink 63 shown in FIG. 1 is a concave portion 66 of the heat sink 63 shown in FIG. 1 , and the concave portion (spacer) is in a straight line shape (eg Figure 5A The recess 51 of the supporting structure 5 is shown Figure 5B The concave portion 56 of the heat sink 53 shown in FIG. Figure 4A The concave portion 41b of the bearing structure 4 shown in FIG. Figure 4A The recess 41a of the supporting structure 4 is shown Figure 4BThe concave portion 46 of the heat sink 43 shown in the figure is in a serrated shape and can be mixed and matched into various patterns according to needs, such as a ring. For example, the concave portion (spacer) can be a groove formed by continuous line segments, or a plurality of holes can be arranged in a desired pattern. Therefore, the pattern of the concave portion can be designed according to needs without special restrictions.

[0092] further, Figure 4A and 4B The structural combination of the substrate 4 and the heat sink 43 is a first optimal combination; Figure 5A and 5B The structural combination of the substrate 5 and the heat sink 53 is the second best combination; Fig. 6A and 6B The structural combination of the substrate 6 and the heat sink 63 is the third best combination.

[0093] The electronic package 3, 3', 3" of the present invention improves the anti-warping effect through the design of the first spacer 21 and the second spacer 36. Specifically, the anti-warping effect of the first best combination is better than the anti-warping effect of the second best combination, and the anti-warping effect of the second best combination is better than the anti-warping effect of the third best combination.

[0094] The present invention also provides an electronic package 3, 3', 3", which includes: a supporting structure 2, 2', 2", an electronic component 31 arranged on the supporting structure 2, 2', 2" and electrically connected to the circuit layer 22, and a heat sink 33 arranged on the supporting structure 2, 2', 2", wherein the heat sink 33 is provided with a second spacer 36, and the supporting structure 2, 2', 2" includes an insulating board body 2b, at least one circuit layer 22 arranged on the insulating board body 2b, and a first spacer 21 arranged in the insulating board body 2b and not electrically connected to the circuit layer 22.

[0095] In one embodiment, the insulating plate body 2b includes a core layer 20 having an insulating core 200, and the first spacer 21 penetrates the insulating core 200. Further, the core layer 20 also has at least one first insulating portion 203a and a second insulating portion 203b formed on the insulating core 200. For example, the first insulating portion 203a and the second insulating portion 203b are also formed in the first spacer 21.

[0096] In one embodiment, the insulating plate body 2b is defined with a die-placement area A and a peripheral area B surrounding the die-placement area A, so that the first spacer 21 is located in the peripheral area B. For example, the first spacer 21 is located on the contour edge and / or contour corner of the peripheral area B. Further, the peripheral area B is defined with a primer boundary line L, so as to divide the peripheral area B into a first area B1 adjacent to the die-placement area A and an outermost second area B2. For example, the first spacer 21 is located on the first area B1 and / or the second area B2 of the peripheral area B.

[0097] In one embodiment, the first spacer 21 is a groove, a hole or a combination thereof. For example, the first spacer 21 has a straight line, a curve, a wave, a zigzag or a combination thereof.

[0098] In one embodiment, the heat sink 33 includes a heat sink 330 combined with the electronic component 31 and at least one supporting leg 331 disposed on the heat sink 330, so that the heat sink 330 is disposed on the supporting structure 2, 2', 2" via the supporting leg 331, and the second spacer 36 is located on one side of the heat sink 330 combined with the electronic component 31.

[0099] In one embodiment, the second spacer 36 is located outside the area where the heat sink 330 is combined with the electronic component 31 .

[0100] In one embodiment, the second spacer 36 is a groove, a hole or a combination thereof. For example, the profile of the second spacer 36 is straight, curved, wavy, serrated or a combination thereof.

[0101] In summary, the electronic package and its supporting structure and manufacturing method of the present invention, through the design of the spacer portion of the insulating plate body, destroy (or disconnect) the internal structure of the insulating plate body so that the structural stress will not be continuously concentrated in the insulating plate body. Therefore, the supporting structure of the present invention can effectively avoid or reduce the problem of warping.

[0102] In addition, the insulating body is filled in the spacer of the insulating plate body, which can not only absorb the stress release of the hard material in the insulating plate body, but also absorb the thermal deformation caused by the subsequent high-temperature process.

[0103] The above embodiments are only used to illustrate the principles and effects of the present invention, and are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. A bearing structure, characterized in that: include: An insulating plate body, which defines a die-placement region and a peripheral region surrounding the die-placement region, and includes a core layer, wherein the core layer has an insulating core portion and at least one insulating portion formed on the insulating core portion; A circuit layer is provided on the insulating plate body; and A first spacer is arranged in the insulating plate body and is not electrically connected to the circuit layer. The first spacer penetrates the insulating core. The first spacer is located in the peripheral area and the insulating part is also formed in the first spacer.

2. The bearing structure according to claim 1, characterized in that: The first spacing portion is on a contour edge and / or contour corner of the peripheral region.

3. The bearing structure according to claim 1, characterized in that: The peripheral area is defined with a bottom glue boundary line to divide the peripheral area into a first area adjacent to the chip placement area and an outermost second area.

4. The bearing structure according to claim 3, characterized in that: The first spacing portion is on the first area and / or the second area of ​​the peripheral region.

5. The bearing structure according to claim 1, characterized in that: The first spacer is a groove, a hole or a combination thereof.

6. The bearing structure according to claim 1, characterized in that: The first spacer has a profile that is straight, curved, wavy, serrated, or a combination thereof.

7. A method for manufacturing a load-bearing structure, characterized in that: The following steps are involved: A substrate is provided, wherein the substrate is defined with a die-placement region and a peripheral region surrounding the die-placement region, and comprises a core layer, wherein the core layer has an insulating core portion and at least one insulating portion formed on the insulating core portion; forming a recess in the substrate so that the recess is located in the peripheral region and penetrates the insulating core; Forming a metal layer on the substrate to cover the concave portion and use the concave portion as a spacer, wherein when forming the metal layer, part of the material of the insulating portion is filled into the spacer to form an insulator in the spacer; as well as A circuit layer is formed through the metal layer, and the spacer is not electrically connected to the circuit layer.

8. The method for manufacturing a bearing structure according to claim 7, characterized in that: The insulating portion is formed in the spacer through a pressurizing and heating process.

9. The method for making a bearing structure according to claim 7, characterized in that: The spacing portion is located on a contour edge and / or contour corner of the peripheral region.

10. The method for manufacturing a bearing structure according to claim 7, characterized in that: The peripheral area is defined with a bottom glue boundary line to divide the peripheral area into a first area adjacent to the chip placement area and an outermost second area.

11. The method for manufacturing a bearing structure according to claim 10, characterized in that: The spacing portion is on the first area and / or the second area of ​​the peripheral region.

12. The method for manufacturing a bearing structure according to claim 7, characterized in that: The spacer is a groove, a hole or a combination thereof.

13. The method for manufacturing a bearing structure according to claim 7, characterized in that: The profile of the spacer is in a straight line, a curve, a wave, a sawtooth shape or a combination thereof.

14. An electronic package, characterized in that: include: The load-bearing structure according to claim 1; An electronic component, which is disposed on the supporting structure and electrically connected to the circuit layer; as well as The heat sink is arranged on the supporting structure, wherein the heat sink has a second spacing portion.

15. The electronic package according to claim 14, characterized in that: The heat dissipation element includes a heat dissipation body combined with the electronic component, and the second spacing portion is located at a side of the heat dissipation body combined with the electronic component.

16. The electronic package according to claim 15, characterized in that The second spacing portion is outside the area where the heat sink is combined with the electronic component.

17. The electronic package according to claim 14, characterized in that: The second spacer is a groove, a hole or a combination thereof.

18. The electronic package according to claim 14, characterized in that The profile of the second spacer is in a straight line, a curve, a wave, a sawtooth shape or a combination thereof.