Semiconductor device and method for manufacturing semiconductor device

Abstract

The present invention relates to a semiconductor device and a manufacturing method of a semiconductor device. The semiconductor device (U) of the present invention has: bumps (5) on a plurality of electrode pads (2), a resist (8) covering the bumps (5), and a vent hole (10) formed inside the resist (8) to communicate the bumps (5) with air outside the resist (8). Thus, a semiconductor device (U) capable of mitigating stress applied to a semiconductor device (U) having a fragile insulating film (11) is provided.

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor device and a manufacturing method of a semiconductor device. BACKGROUND

[0002] In recent years, the high-density of semiconductor devices and the multi-pin of electrode terminals are being advanced. Therefore, the semiconductor devices are pursuing the narrow pitch between electrode terminals and the reduction of the area of electrode terminals. As one of the mounting techniques of semiconductor devices to mounting substrates which make the narrow pitch between electrode terminals and reduce the area of electrode terminals, flip chip mounting is known.

[0003] In flip chip mounting, a protrusion electrode is formed on an electrode terminal of a semiconductor device such as a system LSI, a memory, a CPU, etc. The protrusion electrode is pressed and heated against an electrode pad of a mounting substrate. Thereby, the electrode terminal and the electrode pad of the mounting substrate are connected by a bump, and the semiconductor device is flip chip mounted on the mounting substrate.

[0004] In addition, with the further miniaturization of transistors in semiconductor devices, a fragile low dielectric film is used. Therefore, a low stress mounting technique of semiconductor devices to mounting substrates is required.

[0005] Therefore, for example, face down mounting using a fine front end micro metal bump composed of gold, copper, etc. is proposed. In face down mounting, the front end of the fine metal bump is plastically deformed in a mounting step, and is joined to an electrode pad by solid phase diffusion. According to this method, by the plastic deformation of the fine front end metal bump, the stress to the semiconductor device can be relaxed. Therefore, face down mounting can cope with the mounting to semiconductor devices having a fragile low dielectric film.

[0006] As a method of forming the above-mentioned fine front end metal bump, a vapor deposition method in which metal fine particles and a carrier gas are sprayed and the metal fine particles are deposited is disclosed in, for example, International Publication No. 2007 / 114314 (hereinafter, referred to as "Patent Document 1").

[0007] However, in the above-mentioned vapor deposition method, in order to form a conical metal bump, metal fine particles and a carrier gas must be sprayed from a nozzle to an electrode portion for each 1 metal bump. Therefore, in order to form a plurality of bumps to a multi-pin, and a large diameter silicon wafer, the entire surface of the silicon wafer must be scanned, and metal fine particles and a carrier gas must be sprayed. As a result, a long production time is required in order to form a plurality of metal bumps.

[0008] Further, the deposited metal film is peeled off at the same time as the mask layer. Therefore, the metal film composed of expensive metals such as gold, platinum, etc. needs to be discarded, or a metal recovery operation needs to be additionally performed. As a result, the production cost increases.

[0009] Therefore, a bump forming method that is good in productivity and low in cost, and in which the yield, reliability can be improved is proposed in, for example, Japanese Patent Application Publication No. 4-217324 (hereinafter, referred to as "Patent Document 2").

[0010] The bump forming method disclosed in Patent Document 2 first overexposes a negative resist to form a resist pattern having an inverse taper shape. Then, the formed resist pattern is used as a mask to form a bump by an electrolytic plating method.

[0011] Hereinafter, the bump forming method disclosed in Patent Document 2 will be described with reference to the drawings. Figures 7A-7C The bump forming method disclosed in Patent Document 2 will be described.

[0012] Figures 7A-7C is a cross-sectional view schematically showing a manufacturing method of a semiconductor device disclosed in Patent Document 2.

[0013] As shown in Figure 7A , first, after forming an insulating film 102, an aluminum pad 103, and a protective film 104 on a silicon substrate 101, a barrier metal 105 is formed.

[0014] Next, a negative resist 107 is applied to the barrier metal 105.

[0015] Next, an exposure mask is pressed against the resist 107 to perform exposure. In a negative resist, a portion irradiated with light is not dissolved in a developing solution, and a portion not irradiated with light is dissolved in the developing solution. At this time, the exposure time is made longer than usual, that is, overexposure. Thereby, the cross-sectional shape after development becomes the resist 107 having an opening portion with an inverse taper shape as shown in Figure 7B .

[0016] Next, the resist 107 is used as a mask to fill an electrolytic plating solution in the opening portion of the resist 107. Thereby, a bump 106 having a positive taper shape is formed as shown in Figure 7C .

[0017] Note that, as a method of filling the opening portion of the resist with metal, in addition to the method of using the electrolytic plating solution described above, a method of ejecting a fluid of metal to fill the fluid of metal in the opening portion of the resist is proposed in, for example, International Publication No. 2016 / 114275 (hereinafter, referred to as "Patent Document 3").

[0018] According to the method disclosed in Patent Document 3, a tank capable of accommodating a fluid of metal such as molten solder and a head portion including a nozzle are provided.

[0019] Further, first, the nozzle is brought close to the opening portion of the resist. Next, a positive pressure is applied to the fluid by a pressure supply portion to inject the fluid into the opening portion. Next, the injected molten solder is cooled to its solidification point. Thereby, a bump can be formed.

[0020] However, if the semiconductor device is further narrowed in pitch and the opening of the resist is made smaller, it is difficult to fill metal into the minute opening. Particularly in a case where the thickness of the resist is thick and the opening of the resist is fine, for example, in a step of ejecting molten solder to fill the opening, the pressure resistance and the surface tension of the molten solder as a viscous fluid sometimes exceed the ejection pressure of the fluid. Therefore, it is possible that the molten solder cannot be filled to every corner of the bottom of the opening of the resist. SUMMARY

[0021] The present application provides a semiconductor device capable of mitigating stress applied to a semiconductor and a circuit substrate side having a fragile low dielectric film, and a manufacturing method capable of stably producing the semiconductor device.

[0022] The semiconductor device of the present application has: bumps on a plurality of electrode pads, a resist covering the bumps, and a vent hole of air formed in the inside of the resist to communicate the bumps with the outside of the resist.

[0023] In addition, the semiconductor device of the present application has: a plurality of bumps provided on the electrode pads, dummy bumps, a resist covering the bumps and the dummy bumps, and a vent hole of air connecting the bumps with the dummy bumps.

[0024] In addition, the manufacturing method of the semiconductor device of the present application includes: a bump under metal layer forming step of forming a bump under metal layer in a manner of covering a plurality of electrode pads; and a resist forming step of forming a resist covering the bump under metal layer. Further, it includes: a resist opening step of pressing a nanoimprint mold from the upper surface side of the resist to form a plurality of openings of the resist not reaching the electrode pads in the resist for a region where the plurality of electrode pads are formed in the resist. In addition, it includes: a resist curing step of performing a heat treatment after giving light energy to the resist from the upper surface side of the resist to cure the resist. Further, it includes: a developing step of reacting the resist with a developing solution to make the openings reach the electrode pads in a manner that the opening width of the openings is widened toward the electrode pad side. Further, it includes at least: a metal filling step of filling metal in the openings to form the bumps; and a resist peeling step of peeling the resist. Furthermore, the manufacturing method of the semiconductor device forms a first protrusion for the resist opening and a second protrusion for the vent hole of air on the nanoimprint mold in the resist opening step, and forms the vent hole of air connected to the bumps via the second protrusion.

[0025] Further, the semiconductor device manufacturing method of the present application includes: a bump lower metal layer forming step of forming a bump lower metal layer in a manner of covering a plurality of electrode pads; a path forming adhesive supplying step of supplying a path forming adhesive to the bump lower metal layer of the plurality of electrode pads. Further, it includes: a resist forming step of forming a resist covering the bump lower metal layer; a resist opening step of pressing a nanoimprint mold from an upper surface side of the resist for a region in which the plurality of electrode pads are formed in the resist, and forming a plurality of opening portions in the resist which do not reach the electrode pads. Further, it includes: a resist curing step of curing the resist by performing a heat treatment after applying light energy to the resist from the upper surface side of the resist; and a developing step of causing the resist to react with a developing solution, and causing the opening portions to reach the electrode pads in a manner of expanding in opening width toward the electrode pad side. Further, it includes at least: a metal filling step of filling a metal in the opening portions, and forming bumps; and a peeling step of peeling the resist. Further, the semiconductor device manufacturing method forms a vent hole of air in the resist curing step by volatilizing the path forming adhesive.

[0026] According to the present application, it is possible to provide a semiconductor device and a semiconductor device manufacturing method in which stress applied to a circuit board side is relaxed in a mounting step. BRIEF DESCRIPTION OF DRAWINGS

[0027] Figure 1A is a sectional view of the semiconductor device according to Embodiment 1.

[0028] Figure 1B is a plan view of the semiconductor device according to Embodiment 1.

[0029] Figure 2A is a sectional view of the semiconductor device manufacturing method according to Embodiment 1.

[0030] Figure 2B is a sectional view of the semiconductor device manufacturing method according to Embodiment 1.

[0031] Figure 2C is a sectional view of the semiconductor device manufacturing method according to Embodiment 1.

[0032] Figure 2D is a sectional view of the semiconductor device manufacturing method according to Embodiment 1.

[0033] Figure 2E is a sectional view of the semiconductor device manufacturing method according to Embodiment 1.

[0034] Figure 2F is a sectional view of the semiconductor device manufacturing method according to Embodiment 1.

[0035] Figure 2G is a cross-sectional view for explaining a manufacturing method of the semiconductor device according to Embodiment 1.

[0036] Figure 3A is a cross-sectional view of the semiconductor device according to Embodiment 2.

[0037] Figure 3B is a plan view of the semiconductor device according to Embodiment 2.

[0038] Figure 4A is a cross-sectional view for explaining a manufacturing method of the semiconductor device according to Embodiment 2.

[0039] Figure 4B is a cross-sectional view for explaining a manufacturing method of the semiconductor device according to Embodiment 2.

[0040] Figure 4C is a cross-sectional view for explaining a manufacturing method of the semiconductor device according to Embodiment 2.

[0041] Figure 4D is a cross-sectional view for explaining a manufacturing method of the semiconductor device according to Embodiment 2.

[0042] Figure 4E is a cross-sectional view for explaining a manufacturing method of the semiconductor device according to Embodiment 2.

[0043] Figure 4F is a cross-sectional view for explaining a manufacturing method of the semiconductor device according to Embodiment 2.

[0044] Figure 4G is a cross-sectional view for explaining a manufacturing method of the semiconductor device according to Embodiment 2.

[0045] Figure 5 is a perspective view for explaining a modification of the semiconductor device according to Embodiment 2.

[0046] Figure 6A is a cross-sectional view of the modification of the semiconductor device according to Embodiment 2.

[0047] Figure 6B is a plan view of the modification of the semiconductor device according to Embodiment 2.

[0048] Figure 7A is a cross-sectional view for explaining a manufacturing method of a semiconductor device according to the related art.

[0049] Figure 7B is a cross-sectional view for explaining a manufacturing method of a semiconductor device according to the related art.

[0050] Figure 7Cis a sectional view showing a manufacturing method of a semiconductor device in the related art. DETAILED DESCRIPTION

[0051] The present application provides a structure of a semiconductor device having a stress-relieving bump electrode and a manufacturing method of a semiconductor device in a semiconductor device subjected to multi-pin and fragile processes.

[0052] Hereinafter, the embodiments of the present application will be described with reference to the drawings.

[0053] Further advantages and effects of the one aspect of the present application can be clear from the description and drawings. The above-mentioned advantages and / or effects are provided by the features described in the several embodiments and the description and drawings, respectively, and do not necessarily need to be all provided when having one or more of the same features.

[0054] (Embodiment 1)

[0055] Hereinafter, the semiconductor device U of Embodiment 1 of the present application will be described item by item.

[0056] <Structure of Semiconductor Device>

[0057] Hereinafter, the structure of the semiconductor device U of Embodiment 1 will be described using Figure 1A and Figure 1B

[0058] Figure 1A is a sectional view of the semiconductor device U to which Embodiment 1 is applied. Figure 1B is a plan view of the semiconductor device U to which Embodiment 1 is applied. Note that Figure 1A is a sectional view showing the structure of the semiconductor device U before mounting.

[0059] Note that hereinafter, the normal direction of the surface of the semiconductor device U on which the electrode pad 2 is formed will be referred to as the upward direction for the sake of explanation of the positional relationship of components. However, the above-mentioned direction does not indicate the posture of the semiconductor device U at the time of use.

[0060] As shown in Figure 1A and Figure 1B , the semiconductor device U of Embodiment 1 has a structure composed of the electrode pad 2, the insulating film 3, the bump-under metal layer 4, and the bump 5, which are sequentially stacked on the device main body 1. The fragile insulating film 11 is provided under the electrode pad 2. Note that the fragile insulating film 11 is actually composed of a three-dimensional wiring layer including an insulating film and a fine wiring layer, and is connected to a transistor. Also, the transistor is fine, and thus a low dielectric layer is required for high-speed transmission. At this time, the low dielectric layer is a porous structure, and as a result, becomes fragile.

[0061] ​The device body 1 is a semiconductor element such as a transistor, a rectifier element, a sensor element, a light-emitting element, or a light-receiving element. The device body 1 has a structure in which a semiconductor element is formed in a semiconductor substrate such as silicon, gallium arsenide, gallium nitride, silicon carbide, indium gallium arsenide, or indium phosphide. Note that the device body 1 can be a discrete device or a monolithic IC.

[0062] The electrode pad 2 contains a metal such as gold, copper, aluminum, aluminum silicon, aluminum copper, tungsten, or the like. The electrode pad 2 is provided over the device body 1.

[0063] The insulating film 3 is formed of a material such as SiN, SiO2, polyimide, polybenzoxazole, or the like, and has an opening portion over the electrode pad 2. The under bump metal layer 4 is provided over the insulating film 3. Further, the bump 5 is formed over the under bump metal layer 4. The bump 5 is electrically connected to the electrode pad 2 through the under bump metal layer 4. Note that the bump 5 is formed over each of a plurality of electrode pads 2.

[0064] Further, the resist 8 is formed so as to be in contact with the bump 5 finally formed. The first opening portion 8a in which a metal forming the bump 5 is filled, and the second opening portion 8b which is an air vent 10, are formed in the resist 8. The air vent 10 which is the second opening portion 8b is connected to the bump 5 filled from the first opening portion 8a.

[0065] The under bump metal layer 4 is formed of a conductive layer, and is formed so as to be electrically connected to the electrode pad 2. That is, the under bump metal layer 4 functions as a conductive layer in a metal filling process to be described later. Specifically, in the metal filling process, first, the under bump metal layer 4 is formed as a conductive film over the entire surface of the device body 1 by sputtering, evaporation, plating, or the like. Then, the conductive film formed is removed by photolithography to make the conductive film between terminals independent with respect to each electrode pad 2. Thus, the under bump metal layer 4 is formed.

[0066] Note that in the case where a molten solder is used in the metal filling process, the under bump metal layer 4 preferably uses a material which is wetted with the molten solder and diffuses after being wetted with the molten solder. Specifically, the under bump metal layer 4 preferably contains, for example, Cu, Au-Ni, Au-Cu-Ni, Au, or the like.

[0067] In this embodiment, the electrode pad 2 is arranged at a pitch of, for example, 15 μm, and is formed to have a diameter of 10 μm.

[0068] Furthermore, there is no gap between the bump 5 and the under-bump metal layer 4, and it is integrally formed on the under-bump metal layer 4. The bump 5 is made of a conductive material, for example, containing solder materials such as SnAg, SnAgCu, Sn, In, SnAgBiIn, SnSb, SnZn, SnZnBi, AuSn, and SnIn.

[0069] The photoresist 8 is composed of a photosensitive insulating adhesive, such as a chemically amplified negative photoresist.

[0070] In addition, such as Figure 1B As shown, a plurality of bumps 5 are arranged at predetermined intervals on the device body 1. The bumps 5 are preferably formed in such a way that at least the top tip 5a of the bump 5 is exposed from the surface of the resist 8 during manufacturing.

[0071] The second opening 8b of the resist 8 constituting the air outlet 10 is formed around the top 5a of the bump 5. Specifically, multiple air outlets 10 are formed at equal intervals from the center of the bump 5 along the diameter direction of the bump 5, for example, four. Here, the diameter of the top 5a of the bump 5 is, for example, 5 μm to 8 μm, and the diameter of the air outlet 10 is, for example, 0.5 μm to 2 μm. It should be noted that the air outlets 10 are formed approximately parallel (including parallel) to the vertical direction relative to the electrode pad 2.

[0072] The semiconductor device U of Embodiment 1 is constructed in the manner described above.

[0073] <Methods for Manufacturing Semiconductor Devices>

[0074] Next, the manufacturing method of the semiconductor device U in Embodiment 1 will be described using... Figures 2A-2G Please provide an explanation.

[0075] Figures 2A-2G This is a cross-sectional view illustrating the manufacturing method of the semiconductor device U according to Embodiment 1.

[0076] The manufacturing method of the semiconductor device U in Embodiment 1 includes at least the following steps: forming a metal layer under bumps, forming a resist, opening a resist, curing a resist, developing, filling a metal, cooling, and stripping.

[0077] First of all, Figure 2A The steps for forming the metal layer under the bump shown are explained.

[0078] like Figure 2A As shown, the main body of the device 1 has multiple electrode pads 2, an insulating film 3, and a metal layer under the bumps 4 formed sequentially on the upper surface of the fragile insulating film 11.

[0079] An insulating film 3 is formed on the electrode pad 2, having an opening that exposes a portion of the electrode pad 2. Specifically, the insulating film 3 is first formed by, for example, plasma CVD or spin coating of a solution. The formed insulating film 3 is then heat-treated, and the opening is formed by a photolithography step. As a result, the upper surface of the electrode pad 2 is exposed through the opening formed on the insulating film 3.

[0080] Next, a bump undermetal layer 4 is formed in such a way that it covers the exposed portions of the insulating film 3 and the electrode pad 2.

[0081] It should be noted that the semiconductor device U is supplied in the form of a circular silicon wafer, such as 6-inch, 8-inch, or 12-inch wafers.

[0082] The under-bump metal layer 4 is a thin conductive layer formed over the entire upper surface of the device body 1, covering multiple electrode pads 2. Furthermore, the under-bump metal layer 4 serves as a conductive layer used as an electrode during the metal filling process. It should be noted that when the metal filling process is an electroplating process, the under-bump metal layer 4 also serves as a base layer for forming the electroplated layer. The material of the under-bump metal layer 4 is, for example, Ni, W, Cr, Cu, Co, Ti, Au, etc. Additionally, the thickness of the under-bump metal layer 4 is, for example, 0.02 to 2 μm.

[0083] Next, regarding Figure 2B The steps for forming the resist shown are explained.

[0084] like Figure 2B As shown, after forming the under-bump metal layer 4, a layer of resist 8 is formed on the under-bump metal layer 4. The resist 8 is formed in a manner that ensures uniform film thickness using, for example, a spin coater, bar coater, spray coater, or spray dispenser.

[0085] Next, regarding Figure 2C The steps for opening the resist as shown are explained.

[0086] like Figure 2C As shown, firstly, a nanoimprint mold 9 is prepared, having, for example, a first protrusion 9a and a second protrusion 9b in a cylindrical shape.

[0087] Next, the positions of the first protrusion 9a and the second protrusion 9b of the nanoimprint mold 9 are aligned with the positions of the electrode pads 2 provided on the upper surface of the device body 1 of the semiconductor device U.

[0088] Next, the first protruding portion 9a and the second protruding portion 9b are pressed into the resist 8 softened by the heating and pressing portion. At this time, between the first protruding portion 9a and the second protruding portion 9b of the nanoimprint mold 9 and the bump lower metal layer 4 on the electrode pad 2, at positions (non- reached positions) where the resist 8 remains, the pressing of the nanoimprint mold 9 is stopped.

[0089] Then, the nanoimprint mold 9 is lifted from the resist 8. Thereby, the first opening portion 8a and the second opening portion 8b corresponding to the first protruding portion 9a and the second protruding portion 9b of the nanoimprint mold 9 are formed in the layer of the resist 8 (refer to FIG. 6). Figure 2D At this time, the first opening portion 8a and the second opening portion 8b formed in the resist 8 are opened in the vertical direction (the upward direction) of the resist 8.

[0090] As described above, the nanoimprint mold 9 has the plurality of first protruding portions 9a and the plurality of second protruding portions 9b that form the first opening portion 8a and the second opening portion 8b in the resist 8 at positions corresponding to the plurality of electrode pads 2, respectively. Also, the plurality of first opening portions 8a and the plurality of second opening portions 8b formed by the nanoimprint mold 9 are formed in the same shape (different sizes) such as a cylindrical shape, respectively.

[0091] That is, the nanoimprint mold 9 is a mold for transfer in which the first protruding portion 9a and the second protruding portion 9b having the same size and shape as the first opening portion 8a and the second opening portion 8b formed in the resist 8 are arranged at a predetermined interval on one surface.

[0092] Note that the shape of the first protruding portion 9a and the second protruding portion 9b is not limited to the above-described cylindrical shape, and can be, for example, a polygonal column such as a quadrangular column or an octagonal column.

[0093] In addition, the nanoimprint mold 9 can be formed of, for example, one of quartz, glass, electroformed nickel, silicon, and organic silicone resin, or can be formed by laminating a plurality of them. In the case of being laminated, it is more preferable to use a soft organic silicone resin on the upper surface of the nanoimprint mold 9. By the organic silicone resin, it is possible to absorb warping, undulation, or the like of the device main body 1 of the semiconductor device U.

[0094] Further, the nanoimprint mold 9 can be formed, for example, by flowing a material of the nanoimprint mold 9 in a master for manufacturing the nanoimprint mold 9 and injecting the flowed material, and solidifying the injected material. At this time, the manufactured master has a plurality of recesses having the same size as the opening diameter of the first opening portion 8a and the second opening portion 8b at an interval equal to the interval of the first opening portion 8a and the second opening portion 8b formed on the resist 8. Note that the master can be formed, for example, by etching processing or electric discharge machining of silicon, quartz, or glass.

[0095] It should be noted that there is no particular limitation on the external dimensions of the nanoimprint mold 9 if it is larger than the external dimensions of the semiconductor device U. Furthermore, the shape of the nanoimprint mold 9 is, for example, rectangular.

[0096] Next, regarding Figure 2D The resist curing steps shown are explained.

[0097] like Figure 2D As shown, the photoresist 8, on which the first opening 8a and the second opening 8b are formed by the nanoimprint mold 9, is imparted with light energy to react with the photoresist 8.

[0098] Specifically, the resist 8 is irradiated with light such as ultraviolet light, and then heated. At this time, the portion near the upper surface of the resist 8 receives more light energy than the portion near the lower metal layer 4 of the bump. Therefore, in response to the irradiated light energy, a large amount of acid-generating agent near the upper surface of the resist 8 reacts, and the acid concentration increases.

[0099] Next, a cross-linking reaction of the photoresist 8 occurs through the heating element. At this time, accompanied by a high acid concentration, the degree of cross-linking is higher closer to the upper surface of the photoresist 8 and lower closer to the under-bump metal layer 4. It should be noted that the heating element can be, for example, a batch oven, a reflow oven, induction heating, infrared heating, or a heating plate.

[0100] Next, regarding Figure 2E The development steps shown will be explained.

[0101] In the developing step, the semiconductor device U is first immersed in the developing solution. At this time, the developing solution enters the first opening 8a of the resist 8. This dissolves the inner wall of the first opening 8a of the resist 8. Furthermore, the first opening 8a widens its opening (opening diameter) towards the bottom surface and is formed in an inverted conical shape. Thus, the first opening 8a communicates with the second opening 8b.

[0102] Here, regarding the above Figure 2D The process of curing the resist in the process is explained in detail.

[0103] That is, during the resist curing step, as described above, the amount of light reaching decreases from the surface of the resist 8 to the bottom of the interior of the first opening 8a. Therefore, compared to the surface of the resist 8, the amount of acid generated inside the first opening 8a is less, and the degree of crosslinking of the resist 8 is lower. Consequently, Figure 2E In the development step shown, the dissolution of the resist 8 into the developer is more promoted towards the bottom of the inner wall of the first opening 8a compared to the vicinity of the surface of the resist 8. As a result, as... Figure 2E As shown, the first conical opening 8a is formed within the resist 8.

[0104] It should be noted that the details of the formation step of the first opening 8a based on the development step will be described later.

[0105] Here, the developer has the function of dissolving resist 8. The developer is, for example, an aqueous solution of tetramethylammonium hydroxide or trimethyl-2-hydroxyethylammonium hydroxide.

[0106] Furthermore, the developer residue entering the first opening 8a and the second opening 8b is removed by the cleaning solution. The cleaning solution is, for example, pure water.

[0107] On the other hand, the second opening 8b in the resist 8 has a smaller opening shape than the first opening 8a, resulting in less developer entering. Therefore, compared to the first opening 8a, the enlarged diameter of the hole in the second opening 8b from the upper surface side to the bottom side relative to the thickness direction of the resist 8 is smaller. That is, as... Figure 2E As shown, the second opening 8b is formed with substantially the same diameter in the thickness direction of the resist 8.

[0108] Next, regarding Figure 2F The metal filling steps shown are explained.

[0109] like Figure 2F As shown, in the metal filling step, firstly, the metal filling unit 20 is configured to be in contact with the photoresist 8 of the semiconductor device U. The metal filling unit 20 consists of a tank 21 containing molten metal 24, a pressure generating source 22, and a drive control device 23, etc.

[0110] Next, the drive control device 23 moves the position of the can 21 so that the opening of the can 21 is aligned with the position of the first opening 8a of the resist 8. After the movement, pressure is applied to the can 21 by the pressure generating source 22. As a result, molten metal 24 is supplied from the front end of the opening of the can 21 to the first opening 8a, and the first opening 8a is filled with molten metal 24. At this time, materials such as solder, indium, and gold-tin can be used as the molten metal 24.

[0111] then, Figure 2G In the cooling step shown, the molten metal 24 filled into the first opening 8a is cooled below its solidification point. This forms a pointed protrusion 5.

[0112] Here, on Figure 2F The metal filling steps shown are described in detail.

[0113] First, such as Figure 2F As indicated by the black arrow, molten metal 24 is injected into the first opening 8a of the resist 8, which is formed in an anti-cone shape, through the pressure generating source 22. At this time, air is discharged from the pressure outlet, i.e., the air outlet 10 (see reference).Figure 1A ) of the resist 8, and the air compressed by the injection of the molten metal 24 is discharged.

[0114] Then, the molten metal 24 filled in the first opening portion 8a wets and spreads to the bump under metal layer 4, and is filled to the bottom surface of the first opening portion 8a.

[0115] On the other hand, the molten metal 24 is a fluid having viscosity, and thus does not fill to the air discharge hole 10, i.e., the second opening portion 8b, which is minute. Therefore, the second opening portion 8b remains as the air discharge hole 10.

[0116] Then, a peeling step, not shown, is performed. Specifically, in the peeling step, the resist 8 is peeled and removed to form the semiconductor device U.

[0117] <Effects>

[0118] As described above, according to the embodiment 1 of the present application, even if the shape of the opening portion formed in the resist is a minute tapered shape, the molten metal can be stably filled to the bottom of the opening portion. Thereby, a bump having a sharp tip portion can be formed. As a result, even if the semiconductor having an insulating film including a fragile low dielectric film, by plastic deformation of the bump, can be joined while stress is mitigated.

[0119] (Embodiment 2)

[0120] Hereinafter, the semiconductor device U of the embodiment 2 of the present application will be described in detail.

[0121] <Structure of Semiconductor Device>

[0122] Hereinafter, the structure of the semiconductor device U of the embodiment 2 will be described using Figure 3A and Figure 3B .

[0123] Figure 3A and Figure 3B are schematic diagrams for describing the structure of the semiconductor device U related to the embodiment 2. Note that, matters not described are the same as those of the embodiment 1. Figure 3A is a cross-sectional view of the semiconductor device U. Figure 3B is a plan view of the semiconductor device U.

[0124] As shown in Figure 3A and Figure 3B , the semiconductor device U of the embodiment 2 differs from the embodiment 1 in that the air discharge hole 10 is formed in a planar direction (substantially parallel (including parallel) to the electrode pad 2). Note that matters not described are the same as those of the embodiment 1.

[0125] That is, as shown in Figure 3AAs shown, the semiconductor device U of Embodiment 2 has a structure in which the electrode pad 2, the insulating film 3, the bump-under metal layer 4, and the bump 5 or the dummy bump 15 (corresponding to the first opening portion formed in the resist) are sequentially stacked on the device body 1. The fragile insulating film 11 is provided under the electrode pad 2.

[0126] The device body 1 is, for example, a semiconductor element as in Embodiment 1.

[0127] The electrode pad 2 contains, for example, gold, copper, aluminum, aluminum silicon, aluminum copper, tungsten, or the like. The electrode pad 2 is provided in plurality on the device body 1.

[0128] The bump-under metal layer 4 is formed on the electrode pad 2, and the bump 5 and the dummy bump 15 are formed on the bump-under metal layer 4. The bump 5 is electrically conducted with the electrode pad 2 via the bump-under metal layer 4. Note that the bump 5 is formed on a plurality of, for example, eight, identical electrode pads 2.

[0129] Further, the resist 8 is formed in a manner of covering the finally formed bump 5 and the dummy bump 15. The resist 8 has the air vent 10 formed therein to communicate the bump 5 with the dummy bump 15. The air vent 10 is connected to the bump 5. Note that the air vent 10 can be a hollow or can be finally filled with a metal of the same material as the bump 5.

[0130] Further, the dummy bump 15 is formed in the resist 8 on the same electrode pad 2 as the bump 5, for example, in a manner of being surrounded by the plurality of bumps 5, via the bump-under metal layer 4 as in the bump 5. Also, the dummy bump 15 is connected to each of the bumps 5 formed around via the air vent 10.

[0131] The semiconductor device U of Embodiment 2 is configured in the above manner.

[0132] <Method of manufacturing semiconductor device>

[0133] Next, a method of manufacturing the semiconductor device U of Embodiment 2 will be described with reference to Figures 4A-4G

[0134] Figures 4A-4G is a sectional view illustrating the method of manufacturing the semiconductor device U related to Embodiment 2.

[0135] The method of manufacturing the semiconductor device U of Embodiment 2 includes at least a bump-under metal layer forming step, a path-forming adhesive supplying step, a resist forming step, a resist opening step, a resist curing step, a developing step, a metal filling step, and a peeling step.

[0136] First, the path-forming adhesive supplying step shown in Figure 4A will be described.​

[0137] like Figure 4A As shown, the main body 1 of the device is the same as that in Embodiment 1, having an electrode pad 2, an insulating film 3, and a bump under metal layer 4 formed sequentially on the upper surface.

[0138] Furthermore, in the path forming adhesive supply step, firstly, the path forming adhesive 13 is supplied to the under-bump metal layer 4 via a material supply unit (not shown). Here, the material supply unit can be, for example, a dispenser, a screen printing machine, or vapor deposition using a mask.

[0139] Next, the supply path is formed by bonding agent 13 and cured or dried by light or heat.

[0140] Here, the path-forming adhesive 13 contains components with a boiling point lower than the curing temperature of the photoresist 8, and is a photo- or thermosetting adhesive or a hydrophilic material. It should be noted that the photo- or thermosetting adhesive is composed of solvent components such as ethanol, alcohols, glycol ethers, toluene, and xylene; resin components such as acrylics, epoxy resins, and polyurethane resins; and insulating filler components such as inorganic fillers and organic fillers. Furthermore, the hydrophilic material is, for example, a hydrophilic polymer containing 2,3-dihydroxypropyl methacrylate, polyvinyl alcohol, polyoxyethylene glycol methacrylate, carboxylic acid esters, sulfonates, etc.

[0141] In the steps described below, the adhesive 13 for path formation will be described using a light-curing adhesive as an example.

[0142] Next, regarding Figure 4B The steps for forming the resist shown are explained.

[0143] like Figure 4B As shown, in the resist forming step, the resist 8 is supplied by means of a bonding agent 13 formed along a path that covers volatile components, such as spin coating, screen printing, or a dispenser. Then, the resist 8 is cured by irradiating it with ultraviolet light or by heating it based on a heating element, thus forming a layer of resist 8.

[0144] then, Figure 4C In the resist opening step shown, a nanoimprint mold 9 with multiple first protrusions 9a is pressed into the resist 8. At this time, the pressing of the nanoimprint mold 9 is stopped at the position where the resist 8 remains (the unreached position) between the first protrusions 9a of the nanoimprint mold 9 and the metal layer 4 under the bumps on the electrode pad 2. Then, the nanoimprint mold 9 is peeled off from the resist 8. As a result, a first opening 8a is formed within the layer of the resist 8 (see reference). Figure 4D ).

[0145] then,Figure 4D In the resist curing step shown, light is irradiated to the resist 8 by the light irradiation section, for example, ultraviolet rays. At this time, the acid generator contained in the resist 8 reacts to generate acid. Then, the generated acid is diffused in the resist 8 by heating based on the heating section, and the cross-linking reaction with the cross-linking agent contained in the resist 8 is promoted. At this time, the path-forming adhesive 13 is volatilized by heating based on the heating section, and the air vent 10 connecting the bump 5 and the dummy bump 15 by air is formed. At this time, the air vent not shown is formed in a manner, for example, penetrating in the vertical direction (or the left-right direction) with respect to the paper surface of Figure 4D Thus, the volatilized path-forming adhesive 13 is discharged via the air vent, and the air vent 10 is formed.

[0146] Next, Figure 4E In the development step shown, as in Embodiment 1, the opening width (opening diameter) of the first opening portion 8a of the resist 8 is enlarged by the developer, and a reverse taper-shaped opening portion is formed.

[0147] Next, Figure 4F In the metal filling step shown, the metal is filled in the first opening portion 8a of the resist 8 using the metal filling unit 20 to form the bump 5. At this time, the air in the first opening portion 8a is discharged to the dummy bump 15 through the air vent 10 at the time of metal filling. Then, the air is discharged to the outside air through the dummy bump 15. Thus, as shown, a plurality of bumps 5 arranged around the dummy bump 15 are formed. Figure 4G

[0148] Further, a peeling step not shown is performed. Specifically, in the peeling step, the resist 8 is peeled and removed to form the semiconductor device U.

[0149] In the above manner, the semiconductor device U of Embodiment 2 is manufactured.

[0150] Hereinafter, a case where a hydrophilic polymer is used for the path-forming adhesive in the path-forming adhesive application step will be described.

[0151] First, as in the above path-forming adhesive application step, the path-forming adhesive is supplied in a prescribed pattern shape by drawing, and then dried. Thus, the hydrophilic function is generated in the pattern where the path-forming adhesive is drawn only.

[0152] Further, in the development step, the developer penetrates the pattern exhibiting the hydrophilic function, and the hydrophilic polymer is dissolved. Thus, the air vent 10 connecting the bump 5 and the dummy bump 15 by air is formed.

[0153] As described above, according to Embodiment 2 of the present application, it is possible to fill the metal into a more minute reverse taper-shaped opening portion.​

[0154] <Modifications in Implementation Method 2>

[0155] Hereinafter, the structure of the semiconductor device U in the modified example of Embodiment 2 will be described using... Figure 5 Please provide an explanation.

[0156] Figure 5 This is a perspective view illustrating the structure of a modified example of the semiconductor device U according to Embodiment 2.

[0157] Figure 5 As shown, in the modified example, the semiconductor device U has bumps 5 formed on a plurality of separately formed electrode pads 2. Then, virtual pads 25 are formed adjacent to the bumps 5.

[0158] Next, similar to the manufacturing method of Embodiment 2 described above, bumps 5 with air vents 10 are formed. Then, the resist 8 is peeled off. Thus, the above-described structure of the semiconductor device U is formed.

[0159] In other words, the semiconductor device U involved in the modified example differs from the above-described embodiment 2 in that it has an independently disposed electrode pad 2.

[0160] Hereinafter, a method for manufacturing a semiconductor device U according to a variation of Embodiment 2 will be described. Figure 6A and Figure 6B Please provide an explanation.

[0161] Figure 6A and Figure 6B This is a schematic diagram illustrating the solder filling step in the manufacturing method of the semiconductor device U according to a variation of Embodiment 2. It should be noted that... Figure 6A This is a cross-sectional view of semiconductor device U. Figure 6B This is a top view of semiconductor device U.

[0162] like Figure 6A As shown, the modified example of the semiconductor device U has a structure consisting of an electrode pad 2, a bump under-metal layer 4, and bumps 5 or virtual bumps 15 formed sequentially on the device body 1. A fragile insulating film 11 is provided under the electrode pad 2.

[0163] The main body 1 of the device is, for example, a semiconductor element, just like in Embodiment 2 described above.

[0164] The electrode pads 2 contain metals such as gold, copper, aluminum, aluminum-silicon, aluminum-copper, and tungsten. It should be noted that multiple electrode pads 2 are disposed on the main body 1 of the device.

[0165] A bump under metal layer 4 is formed on electrode pad 2, and bump 5 and dummy bump 15 are formed on bump under metal layer 4. Bump 5 is electrically connected to electrode pad 2 via bump under metal layer 4. Note that one bump 5 is formed on each of electrode pads 2.

[0166] Further, resist 8 is formed so as to cover bump 5 and dummy bump 15 finally formed. Resist 8 has air vent 10 formed inside to communicate bump 5 and dummy bump 15. Air vent 10 is connected to bump 5. Note that air vent 10 can be a hollow, or can be finally filled with metal of the same material as bump 5.

[0167] Further, dummy bump 15 is provided on dummy pad 25 on the same plane as bump 5 via bump under metal layer 4. Further, dummy bump 15 is connected to one bump 5 arranged adjacent to dummy bump 15 via air vent 10. Further, each of a plurality of bumps 5 is connected to one bump 5 arranged adjacent thereto via air vent 10. That is, a plurality of bumps 5 and dummy bump 15 and bump 5 are connected to each other via one air vent 10.

[0168] Specifically, the modification relates to a semiconductor device U as Figure 6B

[0169] By the above configuration, if bump 5 at a position farthest from dummy pad 25 on the path is filled with molten solder in order, air squeezed out by the filled molten solder can escape to the outside from dummy bump 15 via the path of the continuous air vent 10 in order.

[0170] Further, dummy bump 15 arranged adjacent to bump 5 is formed in the same shape and size as first opening portion 8a formed inside resist 8. Therefore, dummy bump 15 can be formed at the same time as the resist opening step. Thus, a new production step for forming dummy bump is not required, and therefore the productivity of semiconductor device U can be improved.

[0171] <Effects>

[0172] As described above, according to Embodiment 2 of the present application, a bump in a more minute protrusion shape can be formed. Thus, when semiconductor device U is mounted on a circuit board, stress acting on fragile insulating film 11 inside semiconductor device U can be further relaxed. As a result, the manufacturing yield of semiconductor device U can be further improved.

[0173] ​Note that in the above embodiment, the filling of the molten solder is described as an example in the metal filling step, but the present application is not limited to this. For example, a nanoclay paste, a conductive paste, a plating material, or the like can be filled, and the same effect can be obtained.

Claims

1. A semiconductor device having: a bump on a plurality of electrode pads, a resist covering the bump, and an air vent hole formed in an inside of the resist for filling an opening portion of a metal forming the bump and communicating the bump with an outside of the resist, wherein the air vent hole is opened at a position different from the opening portion, the air vent hole is disposed in a substantially vertical direction with respect to the electrode pad.

2. The semiconductor device according to claim 1, wherein the air vent hole is provided a plurality of times around the bump.

3. A semiconductor device having: a plurality of bumps provided on an electrode pad, and a dummy bump; a resist covering the bumps and the dummy bump; and an air vent hole connecting the bumps and the dummy bump, the resist having a first opening portion in which the bumps are arranged, a second opening portion opened at a position different from the first opening portion, having the same shape and size as the first opening portion, and in which the bumps are not arranged, and an air vent hole communicating the first opening portion and the second opening portion.

4. The semiconductor device according to claim 3, wherein the dummy bump is connected to the plurality of bumps respectively via the air vent hole.

5. The semiconductor device according to claim 3 or claim 4, wherein the air vent hole is disposed substantially in parallel with respect to the electrode pad.

6. A manufacturing method of a semiconductor device, comprising at least: a bump under metal layer forming step of forming a bump under metal layer in a manner of covering a plurality of electrode pads; a resist forming step of forming a resist covering the bump under metal layer; a resist opening step of, for a region of the resist in which the plurality of electrode pads are formed, pressing a nanoimprint mold from a top surface side of the resist, and forming a plurality of first opening portions in the resist which do not reach the electrode pads; a resist curing step of, for the resist, after giving light energy from the top surface side of the resist, performing a heat treatment, and curing the resist; a developing step of causing the resist to react with a developing solution, and causing the first opening portions to reach the electrode pads in a manner that an opening width of the first opening portions expands toward a side of the electrode pads; a metal filling step of filling a metal in the first opening portions, and forming bumps; and a peeling step of peeling the resist, in the resist opening step, a first protruding portion for the first opening and a second protruding portion for the air vent hole are formed on the nanoimprint mold, the second protruding portion is disposed at a position different from the first protruding portion, and a second opening portion which is narrower than the first opening portion is formed in the resist, in the developing step, the first opening portion after the expansion is communicated with the second opening portion, and the second opening portion becomes an air vent hole.

7. A manufacturing method of a semiconductor device, comprising at least: a bump under metal layer forming step of forming a bump under metal layer in a manner of covering a plurality of electrode pads; ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ ​ a path-forming adhesive supply step of supplying a path-forming adhesive to the bump-under metal layer of the plurality of electrode pads; a resist forming step of forming a resist covering the bump-under metal layer; a resist opening step of, for a region in which the plurality of electrode pads are formed in the resist, pressing a nanoimprint mold from the upper surface side of the resist to form a plurality of opening portions in the resist that do not reach the electrode pads; a resist curing step of, for the resist, performing a heat treatment after imparting light energy from the upper surface side of the resist to cure the resist; a developing step of causing the resist to react with a developing solution to cause the opening portions to reach the electrode pads in a manner in which the opening width of the opening portions expands toward the electrode pad side; a metal filling step of filling metal in the opening portions to form bumps; and a peeling step of peeling the resist, in the resist curing step, the path-forming adhesive is volatilized to form a vent hole that connects air between adjacent opening portions between the bump-under metal layer and the resist. ​

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